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authorTony Lindgren <tony@atomide.com>2009-05-28 18:45:14 -0400
committerTony Lindgren <tony@atomide.com>2009-05-28 18:45:14 -0400
commitcd07ecc828486e5887113c7dc4d9f9022145811b (patch)
treef3950d6077a794d4500244b2f372c6912af15eec /arch
parent4c50d22a0cf240918d53afbf9a8416a9d93aacee (diff)
parentb04e8975e70d9b2bc27c017f92b356b312692544 (diff)
Merge branch 'omap4' into for-next
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/configs/omap_4430sdp_defconfig806
-rw-r--r--arch/arm/mach-omap2/Kconfig6
-rw-r--r--arch/arm/mach-omap2/Makefile3
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c94
-rw-r--r--arch/arm/mach-omap2/gpmc.c6
-rw-r--r--arch/arm/mach-omap2/id.c8
-rw-r--r--arch/arm/mach-omap2/io.c52
-rw-r--r--arch/arm/mach-omap2/serial.c7
-rw-r--r--arch/arm/mach-omap2/timer-gp.c9
-rw-r--r--arch/arm/plat-omap/Kconfig11
-rw-r--r--arch/arm/plat-omap/clock.c33
-rw-r--r--arch/arm/plat-omap/common.c31
-rw-r--r--arch/arm/plat-omap/devices.c2
-rw-r--r--arch/arm/plat-omap/dma.c23
-rw-r--r--arch/arm/plat-omap/dmtimer.c59
-rw-r--r--arch/arm/plat-omap/gpio.c134
-rw-r--r--arch/arm/plat-omap/include/mach/clock.h8
-rw-r--r--arch/arm/plat-omap/include/mach/common.h1
-rw-r--r--arch/arm/plat-omap/include/mach/control.h7
-rw-r--r--arch/arm/plat-omap/include/mach/cpu.h21
-rw-r--r--arch/arm/plat-omap/include/mach/debug-macro.S2
-rw-r--r--arch/arm/plat-omap/include/mach/dma.h1
-rw-r--r--arch/arm/plat-omap/include/mach/entry-macro.S46
-rw-r--r--arch/arm/plat-omap/include/mach/hardware.h1
-rw-r--r--arch/arm/plat-omap/include/mach/io.h37
-rw-r--r--arch/arm/plat-omap/include/mach/irqs.h89
-rw-r--r--arch/arm/plat-omap/include/mach/memory.h3
-rw-r--r--arch/arm/plat-omap/include/mach/omap44xx.h46
-rw-r--r--arch/arm/plat-omap/include/mach/serial.h16
-rw-r--r--arch/arm/plat-omap/io.c29
-rw-r--r--arch/arm/plat-omap/mux.c3
-rw-r--r--arch/arm/plat-omap/sram.c21
33 files changed, 1550 insertions, 66 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index e84729bf13d4..676d10d028b5 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -127,6 +127,7 @@ endif
127 machine-$(CONFIG_ARCH_OMAP1) := omap1 127 machine-$(CONFIG_ARCH_OMAP1) := omap1
128 machine-$(CONFIG_ARCH_OMAP2) := omap2 128 machine-$(CONFIG_ARCH_OMAP2) := omap2
129 machine-$(CONFIG_ARCH_OMAP3) := omap2 129 machine-$(CONFIG_ARCH_OMAP3) := omap2
130 machine-$(CONFIG_ARCH_OMAP4) := omap2
130 plat-$(CONFIG_ARCH_OMAP) := omap 131 plat-$(CONFIG_ARCH_OMAP) := omap
131 machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443 132 machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443
132 machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 133 machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0
diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig
new file mode 100644
index 000000000000..67a3a770cc2f
--- /dev/null
+++ b/arch/arm/configs/omap_4430sdp_defconfig
@@ -0,0 +1,806 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29
4# Fri April 19 19:58:24 20089
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
26CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
28
29#
30# General setup
31#
32CONFIG_EXPERIMENTAL=y
33CONFIG_BROKEN_ON_SMP=y
34CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION=""
36CONFIG_LOCALVERSION_AUTO=y
37CONFIG_SWAP=y
38CONFIG_SYSVIPC=y
39CONFIG_SYSVIPC_SYSCTL=y
40CONFIG_BSD_PROCESS_ACCT=y
41# CONFIG_BSD_PROCESS_ACCT_V3 is not set
42
43#
44# RCU Subsystem
45#
46CONFIG_CLASSIC_RCU=y
47# CONFIG_TREE_RCU is not set
48# CONFIG_PREEMPT_RCU is not set
49# CONFIG_TREE_RCU_TRACE is not set
50# CONFIG_PREEMPT_RCU_TRACE is not set
51# CONFIG_IKCONFIG is not set
52CONFIG_LOG_BUF_SHIFT=14
53CONFIG_GROUP_SCHED=y
54CONFIG_FAIR_GROUP_SCHED=y
55# CONFIG_RT_GROUP_SCHED is not set
56CONFIG_USER_SCHED=y
57# CONFIG_CGROUP_SCHED is not set
58# CONFIG_CGROUPS is not set
59CONFIG_SYSFS_DEPRECATED=y
60CONFIG_SYSFS_DEPRECATED_V2=y
61# CONFIG_RELAY is not set
62# CONFIG_NAMESPACES is not set
63CONFIG_BLK_DEV_INITRD=y
64CONFIG_INITRAMFS_SOURCE=""
65CONFIG_CC_OPTIMIZE_FOR_SIZE=y
66CONFIG_SYSCTL=y
67CONFIG_ANON_INODES=y
68CONFIG_EMBEDDED=y
69CONFIG_UID16=y
70# CONFIG_SYSCTL_SYSCALL is not set
71CONFIG_KALLSYMS=y
72# CONFIG_KALLSYMS_ALL is not set
73# CONFIG_KALLSYMS_EXTRA_PASS is not set
74CONFIG_HOTPLUG=y
75CONFIG_PRINTK=y
76CONFIG_BUG=y
77# CONFIG_ELF_CORE is not set
78CONFIG_BASE_FULL=y
79CONFIG_FUTEX=y
80CONFIG_EPOLL=y
81CONFIG_SIGNALFD=y
82CONFIG_TIMERFD=y
83CONFIG_EVENTFD=y
84CONFIG_SHMEM=y
85CONFIG_AIO=y
86CONFIG_VM_EVENT_COUNTERS=y
87CONFIG_COMPAT_BRK=y
88# CONFIG_SLAB is not set
89# CONFIG_SLUB is not set
90# CONFIG_SLOB is not set
91# CONFIG_PROFILING is not set
92CONFIG_HAVE_OPROFILE=y
93# CONFIG_KPROBES is not set
94CONFIG_HAVE_KPROBES=y
95CONFIG_HAVE_KRETPROBES=y
96CONFIG_HAVE_CLK=y
97CONFIG_HAVE_GENERIC_DMA_COHERENT=y
98CONFIG_SLABINFO=y
99CONFIG_RT_MUTEXES=y
100CONFIG_BASE_SMALL=0
101CONFIG_MODULES=y
102# CONFIG_MODULE_FORCE_LOAD is not set
103CONFIG_MODULE_UNLOAD=y
104# CONFIG_MODULE_FORCE_UNLOAD is not set
105CONFIG_MODVERSIONS=y
106CONFIG_MODULE_SRCVERSION_ALL=y
107CONFIG_BLOCK=y
108# CONFIG_LBD is not set
109# CONFIG_BLK_DEV_IO_TRACE is not set
110# CONFIG_BLK_DEV_BSG is not set
111# CONFIG_BLK_DEV_INTEGRITY is not set
112
113#
114# IO Schedulers
115#
116CONFIG_IOSCHED_NOOP=y
117CONFIG_IOSCHED_AS=y
118CONFIG_IOSCHED_DEADLINE=y
119CONFIG_IOSCHED_CFQ=y
120CONFIG_DEFAULT_AS=y
121# CONFIG_DEFAULT_DEADLINE is not set
122# CONFIG_DEFAULT_CFQ is not set
123# CONFIG_DEFAULT_NOOP is not set
124CONFIG_DEFAULT_IOSCHED="anticipatory"
125# CONFIG_FREEZER is not set
126
127#
128# System Type
129#
130# CONFIG_ARCH_AAEC2000 is not set
131# CONFIG_ARCH_INTEGRATOR is not set
132# CONFIG_ARCH_REALVIEW is not set
133# CONFIG_ARCH_VERSATILE is not set
134# CONFIG_ARCH_AT91 is not set
135# CONFIG_ARCH_CLPS711X is not set
136# CONFIG_ARCH_EBSA110 is not set
137# CONFIG_ARCH_EP93XX is not set
138# CONFIG_ARCH_FOOTBRIDGE is not set
139# CONFIG_ARCH_NETX is not set
140# CONFIG_ARCH_H720X is not set
141# CONFIG_ARCH_IMX is not set
142# CONFIG_ARCH_IOP13XX is not set
143# CONFIG_ARCH_IOP32X is not set
144# CONFIG_ARCH_IOP33X is not set
145# CONFIG_ARCH_IXP23XX is not set
146# CONFIG_ARCH_IXP2000 is not set
147# CONFIG_ARCH_IXP4XX is not set
148# CONFIG_ARCH_L7200 is not set
149# CONFIG_ARCH_KIRKWOOD is not set
150# CONFIG_ARCH_KS8695 is not set
151# CONFIG_ARCH_NS9XXX is not set
152# CONFIG_ARCH_LOKI is not set
153# CONFIG_ARCH_MV78XX0 is not set
154# CONFIG_ARCH_MXC is not set
155# CONFIG_ARCH_ORION5X is not set
156# CONFIG_ARCH_PNX4008 is not set
157# CONFIG_ARCH_PXA is not set
158# CONFIG_ARCH_RPC is not set
159# CONFIG_ARCH_SA1100 is not set
160# CONFIG_ARCH_S3C2410 is not set
161# CONFIG_ARCH_S3C64XX is not set
162# CONFIG_ARCH_SHARK is not set
163# CONFIG_ARCH_LH7A40X is not set
164# CONFIG_ARCH_DAVINCI is not set
165CONFIG_ARCH_OMAP=y
166# CONFIG_ARCH_MSM is not set
167# CONFIG_ARCH_W90X900 is not set
168
169#
170# TI OMAP Implementations
171#
172# CONFIG_ARCH_OMAP1 is not set
173# CONFIG_ARCH_OMAP2 is not set
174# CONFIG_ARCH_OMAP3 is not set
175CONFIG_ARCH_OMAP4=y
176
177#
178# OMAP Feature Selections
179#
180# CONFIG_OMAP_RESET_CLOCKS is not set
181# CONFIG_OMAP_COMPONENT_VERSION is not set
182# CONFIG_OMAP_GPIO_SWITCH is not set
183# CONFIG_OMAP_MUX is not set
184# CONFIG_OMAP_MCBSP is not set
185# CONFIG_OMAP_MBOX_FWK is not set
186# CONFIG_OMAP_MPU_TIMER is not set
187CONFIG_OMAP_32K_TIMER=y
188CONFIG_OMAP_32K_TIMER_HZ=128
189CONFIG_OMAP_DM_TIMER=y
190CONFIG_OMAP_LL_DEBUG_UART1=y
191# CONFIG_OMAP_LL_DEBUG_UART2 is not set
192# CONFIG_OMAP_LL_DEBUG_UART3 is not set
193
194
195
196#
197# OMAP Board Type
198#
199CONFIG_MACH_OMAP_4430SDP=y
200
201#
202# Processor Type
203#
204CONFIG_CPU_32=y
205CONFIG_CPU_32v6K=y
206CONFIG_CPU_V7=y
207CONFIG_CPU_32v7=y
208CONFIG_CPU_ABRT_EV7=y
209CONFIG_CPU_PABRT_IFAR=y
210CONFIG_CPU_CACHE_V7=y
211CONFIG_CPU_CACHE_VIPT=y
212CONFIG_CPU_COPY_V6=y
213CONFIG_CPU_TLB_V7=y
214CONFIG_CPU_HAS_ASID=y
215CONFIG_CPU_CP15=y
216CONFIG_CPU_CP15_MMU=y
217
218#
219# Processor Features
220#
221# CONFIG_ARM_THUMB is not set
222# CONFIG_ARM_THUMBEE is not set
223# CONFIG_CPU_ICACHE_DISABLE is not set
224CONFIG_CPU_DCACHE_DISABLE=y
225# CONFIG_CPU_BPREDICT_DISABLE is not set
226CONFIG_HAS_TLS_REG=y
227# CONFIG_OUTER_CACHE is not set
228CONFIG_ARM_GIC=y
229
230#
231# Bus support
232#
233# CONFIG_PCI_SYSCALL is not set
234# CONFIG_ARCH_SUPPORTS_MSI is not set
235# CONFIG_PCCARD is not set
236
237#
238# Kernel Features
239#
240# CONFIG_NO_HZ is not set
241# CONFIG_HIGH_RES_TIMERS is not set
242CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
243CONFIG_VMSPLIT_3G=y
244# CONFIG_VMSPLIT_2G is not set
245# CONFIG_VMSPLIT_1G is not set
246CONFIG_PAGE_OFFSET=0xC0000000
247# CONFIG_PREEMPT is not set
248CONFIG_HZ=128
249CONFIG_AEABI=y
250# CONFIG_OABI_COMPAT is not set
251CONFIG_ARCH_FLATMEM_HAS_HOLES=y
252# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
253# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
254CONFIG_SELECT_MEMORY_MODEL=y
255CONFIG_FLATMEM_MANUAL=y
256# CONFIG_DISCONTIGMEM_MANUAL is not set
257# CONFIG_SPARSEMEM_MANUAL is not set
258CONFIG_FLATMEM=y
259CONFIG_FLAT_NODE_MEM_MAP=y
260CONFIG_PAGEFLAGS_EXTENDED=y
261CONFIG_SPLIT_PTLOCK_CPUS=4
262# CONFIG_PHYS_ADDR_T_64BIT is not set
263CONFIG_ZONE_DMA_FLAG=0
264CONFIG_VIRT_TO_BUS=y
265# CONFIG_UNEVICTABLE_LRU is not set
266# CONFIG_LEDS is not set
267CONFIG_ALIGNMENT_TRAP=y
268
269#
270# Boot options
271#
272CONFIG_ZBOOT_ROM_TEXT=0x0
273CONFIG_ZBOOT_ROM_BSS=0x0
274CONFIG_CMDLINE="root=/dev/ram0 rw mem=128M console=ttyS0,115200n8 initrd=0x81600000,20M ramdisk_size=20480"
275# CONFIG_XIP_KERNEL is not set
276# CONFIG_KEXEC is not set
277
278#
279# CPU Power Management
280#
281# CONFIG_CPU_FREQ is not set
282# CONFIG_CPU_IDLE is not set
283
284#
285# Floating point emulation
286#
287
288#
289# At least one emulation must be selected
290#
291CONFIG_FPE_NWFPE=y
292# CONFIG_FPE_NWFPE_XP is not set
293# CONFIG_FPE_FASTFPE is not set
294CONFIG_VFP=y
295CONFIG_VFPv3=y
296# CONFIG_NEON is not set
297
298#
299# Userspace binary formats
300#
301CONFIG_BINFMT_ELF=y
302# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
303CONFIG_HAVE_AOUT=y
304# CONFIG_BINFMT_AOUT is not set
305CONFIG_BINFMT_MISC=y
306
307#
308# Power management options
309#
310# CONFIG_PM is not set
311CONFIG_ARCH_SUSPEND_POSSIBLE=y
312# CONFIG_NET is not set
313
314#
315# Device Drivers
316#
317
318#
319# Generic Driver Options
320#
321CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
322CONFIG_STANDALONE=y
323CONFIG_PREVENT_FIRMWARE_BUILD=y
324# CONFIG_FW_LOADER is not set
325# CONFIG_DEBUG_DRIVER is not set
326# CONFIG_DEBUG_DEVRES is not set
327# CONFIG_SYS_HYPERVISOR is not set
328# CONFIG_MTD is not set
329# CONFIG_PARPORT is not set
330CONFIG_BLK_DEV=y
331# CONFIG_BLK_DEV_COW_COMMON is not set
332CONFIG_BLK_DEV_LOOP=y
333# CONFIG_BLK_DEV_CRYPTOLOOP is not set
334CONFIG_BLK_DEV_RAM=y
335CONFIG_BLK_DEV_RAM_COUNT=16
336CONFIG_BLK_DEV_RAM_SIZE=16384
337# CONFIG_BLK_DEV_XIP is not set
338# CONFIG_CDROM_PKTCDVD is not set
339# CONFIG_MISC_DEVICES is not set
340CONFIG_HAVE_IDE=y
341# CONFIG_IDE is not set
342
343#
344# SCSI device support
345#
346# CONFIG_RAID_ATTRS is not set
347# CONFIG_SCSI is not set
348# CONFIG_SCSI_DMA is not set
349# CONFIG_SCSI_NETLINK is not set
350# CONFIG_ATA is not set
351# CONFIG_MD is not set
352
353#
354# Input device support
355#
356CONFIG_INPUT=y
357# CONFIG_INPUT_FF_MEMLESS is not set
358# CONFIG_INPUT_POLLDEV is not set
359
360#
361# Userland interfaces
362#
363# CONFIG_INPUT_MOUSEDEV is not set
364# CONFIG_INPUT_JOYDEV is not set
365CONFIG_INPUT_EVDEV=y
366# CONFIG_INPUT_EVBUG is not set
367
368#
369# Input Device Drivers
370#
371# CONFIG_INPUT_KEYBOARD is not set
372# CONFIG_INPUT_MOUSE is not set
373# CONFIG_INPUT_JOYSTICK is not set
374# CONFIG_INPUT_TABLET is not set
375# CONFIG_INPUT_TOUCHSCREEN is not set
376# CONFIG_INPUT_MISC is not set
377
378#
379# Hardware I/O ports
380#
381# CONFIG_SERIO is not set
382# CONFIG_GAMEPORT is not set
383
384#
385# Character devices
386#
387CONFIG_VT=y
388CONFIG_CONSOLE_TRANSLATIONS=y
389CONFIG_VT_CONSOLE=y
390CONFIG_HW_CONSOLE=y
391# CONFIG_VT_HW_CONSOLE_BINDING is not set
392CONFIG_DEVKMEM=y
393# CONFIG_SERIAL_NONSTANDARD is not set
394
395#
396# Serial drivers
397#
398CONFIG_SERIAL_8250=y
399CONFIG_SERIAL_8250_CONSOLE=y
400CONFIG_SERIAL_8250_NR_UARTS=32
401CONFIG_SERIAL_8250_RUNTIME_UARTS=4
402CONFIG_SERIAL_8250_EXTENDED=y
403CONFIG_SERIAL_8250_MANY_PORTS=y
404CONFIG_SERIAL_8250_SHARE_IRQ=y
405CONFIG_SERIAL_8250_DETECT_IRQ=y
406CONFIG_SERIAL_8250_RSA=y
407
408#
409# Non-8250 serial port support
410#
411CONFIG_SERIAL_CORE=y
412CONFIG_SERIAL_CORE_CONSOLE=y
413CONFIG_UNIX98_PTYS=y
414# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
415# CONFIG_LEGACY_PTYS is not set
416# CONFIG_IPMI_HANDLER is not set
417CONFIG_HW_RANDOM=y
418# CONFIG_R3964 is not set
419# CONFIG_RAW_DRIVER is not set
420# CONFIG_TCG_TPM is not set
421# CONFIG_I2C is not set
422# CONFIG_SPI is not set
423CONFIG_ARCH_REQUIRE_GPIOLIB=y
424CONFIG_GPIOLIB=y
425# CONFIG_DEBUG_GPIO is not set
426# CONFIG_GPIO_SYSFS is not set
427
428#
429# Memory mapped GPIO expanders:
430#
431
432#
433# I2C GPIO expanders:
434#
435
436#
437# PCI GPIO expanders:
438#
439
440#
441# SPI GPIO expanders:
442#
443# CONFIG_W1 is not set
444# CONFIG_POWER_SUPPLY is not set
445# CONFIG_HWMON is not set
446# CONFIG_THERMAL is not set
447# CONFIG_THERMAL_HWMON is not set
448# CONFIG_WATCHDOG is not set
449CONFIG_SSB_POSSIBLE=y
450
451#
452# Sonics Silicon Backplane
453#
454# CONFIG_SSB is not set
455
456#
457# Multifunction device drivers
458#
459# CONFIG_MFD_CORE is not set
460# CONFIG_MFD_SM501 is not set
461# CONFIG_MFD_ASIC3 is not set
462# CONFIG_HTC_EGPIO is not set
463# CONFIG_HTC_PASIC3 is not set
464# CONFIG_MFD_TMIO is not set
465# CONFIG_MFD_T7L66XB is not set
466# CONFIG_MFD_TC6387XB is not set
467# CONFIG_MFD_TC6393XB is not set
468
469#
470# Multimedia devices
471#
472
473#
474# Multimedia core support
475#
476# CONFIG_VIDEO_DEV is not set
477# CONFIG_VIDEO_MEDIA is not set
478
479#
480# Multimedia drivers
481#
482CONFIG_DAB=y
483
484#
485# Graphics support
486#
487# CONFIG_VGASTATE is not set
488# CONFIG_VIDEO_OUTPUT_CONTROL is not set
489# CONFIG_FB is not set
490# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
491
492#
493# Display device support
494#
495# CONFIG_DISPLAY_SUPPORT is not set
496
497#
498# Console display driver support
499#
500# CONFIG_VGA_CONSOLE is not set
501CONFIG_DUMMY_CONSOLE=y
502# CONFIG_SOUND is not set
503# CONFIG_HID_SUPPORT is not set
504# CONFIG_USB_SUPPORT is not set
505# CONFIG_MMC is not set
506# CONFIG_MEMSTICK is not set
507# CONFIG_ACCESSIBILITY is not set
508# CONFIG_NEW_LEDS is not set
509CONFIG_RTC_LIB=y
510# CONFIG_RTC_CLASS is not set
511# CONFIG_DMADEVICES is not set
512# CONFIG_REGULATOR is not set
513# CONFIG_UIO is not set
514# CONFIG_STAGING is not set
515
516#
517# CBUS support
518#
519# CONFIG_CBUS is not set
520
521#
522# File systems
523#
524CONFIG_EXT2_FS=y
525# CONFIG_EXT2_FS_XATTR is not set
526# CONFIG_EXT2_FS_XIP is not set
527CONFIG_EXT3_FS=y
528# CONFIG_EXT3_FS_XATTR is not set
529# CONFIG_EXT4_FS is not set
530CONFIG_JBD=y
531# CONFIG_REISERFS_FS is not set
532# CONFIG_JFS_FS is not set
533# CONFIG_FS_POSIX_ACL is not set
534CONFIG_FILE_LOCKING=y
535# CONFIG_XFS_FS is not set
536# CONFIG_BTRFS_FS is not set
537CONFIG_DNOTIFY=y
538CONFIG_INOTIFY=y
539CONFIG_INOTIFY_USER=y
540CONFIG_QUOTA=y
541CONFIG_PRINT_QUOTA_WARNING=y
542CONFIG_QUOTA_TREE=y
543# CONFIG_QFMT_V1 is not set
544CONFIG_QFMT_V2=y
545CONFIG_QUOTACTL=y
546# CONFIG_AUTOFS_FS is not set
547# CONFIG_AUTOFS4_FS is not set
548# CONFIG_FUSE_FS is not set
549
550#
551# CD-ROM/DVD Filesystems
552#
553# CONFIG_ISO9660_FS is not set
554# CONFIG_UDF_FS is not set
555
556#
557# DOS/FAT/NT Filesystems
558#
559CONFIG_FAT_FS=y
560CONFIG_MSDOS_FS=y
561CONFIG_VFAT_FS=y
562CONFIG_FAT_DEFAULT_CODEPAGE=437
563CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
564# CONFIG_NTFS_FS is not set
565
566#
567# Pseudo filesystems
568#
569CONFIG_PROC_FS=y
570CONFIG_PROC_SYSCTL=y
571CONFIG_SYSFS=y
572CONFIG_TMPFS=y
573# CONFIG_TMPFS_POSIX_ACL is not set
574# CONFIG_HUGETLB_PAGE is not set
575# CONFIG_CONFIGFS_FS is not set
576CONFIG_MISC_FILESYSTEMS=y
577# CONFIG_ADFS_FS is not set
578# CONFIG_AFFS_FS is not set
579# CONFIG_HFS_FS is not set
580# CONFIG_HFSPLUS_FS is not set
581# CONFIG_BEFS_FS is not set
582# CONFIG_BFS_FS is not set
583# CONFIG_EFS_FS is not set
584# CONFIG_CRAMFS is not set
585# CONFIG_SQUASHFS is not set
586# CONFIG_VXFS_FS is not set
587# CONFIG_MINIX_FS is not set
588# CONFIG_OMFS_FS is not set
589# CONFIG_HPFS_FS is not set
590# CONFIG_QNX4FS_FS is not set
591# CONFIG_ROMFS_FS is not set
592# CONFIG_SYSV_FS is not set
593# CONFIG_UFS_FS is not set
594
595#
596# Partition Types
597#
598CONFIG_PARTITION_ADVANCED=y
599# CONFIG_ACORN_PARTITION is not set
600# CONFIG_OSF_PARTITION is not set
601# CONFIG_AMIGA_PARTITION is not set
602# CONFIG_ATARI_PARTITION is not set
603# CONFIG_MAC_PARTITION is not set
604CONFIG_MSDOS_PARTITION=y
605# CONFIG_BSD_DISKLABEL is not set
606# CONFIG_MINIX_SUBPARTITION is not set
607# CONFIG_SOLARIS_X86_PARTITION is not set
608# CONFIG_UNIXWARE_DISKLABEL is not set
609# CONFIG_LDM_PARTITION is not set
610# CONFIG_SGI_PARTITION is not set
611# CONFIG_ULTRIX_PARTITION is not set
612# CONFIG_SUN_PARTITION is not set
613# CONFIG_KARMA_PARTITION is not set
614# CONFIG_EFI_PARTITION is not set
615# CONFIG_SYSV68_PARTITION is not set
616CONFIG_NLS=y
617CONFIG_NLS_DEFAULT="iso8859-1"
618CONFIG_NLS_CODEPAGE_437=y
619# CONFIG_NLS_CODEPAGE_737 is not set
620# CONFIG_NLS_CODEPAGE_775 is not set
621# CONFIG_NLS_CODEPAGE_850 is not set
622# CONFIG_NLS_CODEPAGE_852 is not set
623# CONFIG_NLS_CODEPAGE_855 is not set
624# CONFIG_NLS_CODEPAGE_857 is not set
625# CONFIG_NLS_CODEPAGE_860 is not set
626# CONFIG_NLS_CODEPAGE_861 is not set
627# CONFIG_NLS_CODEPAGE_862 is not set
628# CONFIG_NLS_CODEPAGE_863 is not set
629# CONFIG_NLS_CODEPAGE_864 is not set
630# CONFIG_NLS_CODEPAGE_865 is not set
631# CONFIG_NLS_CODEPAGE_866 is not set
632# CONFIG_NLS_CODEPAGE_869 is not set
633# CONFIG_NLS_CODEPAGE_936 is not set
634# CONFIG_NLS_CODEPAGE_950 is not set
635# CONFIG_NLS_CODEPAGE_932 is not set
636# CONFIG_NLS_CODEPAGE_949 is not set
637# CONFIG_NLS_CODEPAGE_874 is not set
638# CONFIG_NLS_ISO8859_8 is not set
639# CONFIG_NLS_CODEPAGE_1250 is not set
640# CONFIG_NLS_CODEPAGE_1251 is not set
641# CONFIG_NLS_ASCII is not set
642CONFIG_NLS_ISO8859_1=y
643# CONFIG_NLS_ISO8859_2 is not set
644# CONFIG_NLS_ISO8859_3 is not set
645# CONFIG_NLS_ISO8859_4 is not set
646# CONFIG_NLS_ISO8859_5 is not set
647# CONFIG_NLS_ISO8859_6 is not set
648# CONFIG_NLS_ISO8859_7 is not set
649# CONFIG_NLS_ISO8859_9 is not set
650# CONFIG_NLS_ISO8859_13 is not set
651# CONFIG_NLS_ISO8859_14 is not set
652# CONFIG_NLS_ISO8859_15 is not set
653# CONFIG_NLS_KOI8_R is not set
654# CONFIG_NLS_KOI8_U is not set
655# CONFIG_NLS_UTF8 is not set
656
657#
658# Kernel hacking
659#
660# CONFIG_PRINTK_TIME is not set
661# CONFIG_ENABLE_WARN_DEPRECATED is not set
662# CONFIG_ENABLE_MUST_CHECK is not set
663CONFIG_FRAME_WARN=1024
664CONFIG_MAGIC_SYSRQ=y
665# CONFIG_UNUSED_SYMBOLS is not set
666# CONFIG_DEBUG_FS is not set
667# CONFIG_HEADERS_CHECK is not set
668CONFIG_DEBUG_KERNEL=y
669# CONFIG_DEBUG_BUGVERBOSE is not set
670CONFIG_DEBUG_INFO=y
671# CONFIG_DEBUG_VM is not set
672# CONFIG_DEBUG_WRITECOUNT is not set
673# CONFIG_DEBUG_MEMORY_INIT is not set
674CONFIG_FRAME_POINTER=y
675# CONFIG_BOOT_PRINTK_DELAY is not set
676# CONFIG_RCU_TORTURE_TEST is not set
677# CONFIG_RCU_CPU_STALL_DETECTOR is not set
678# CONFIG_BACKTRACE_SELF_TEST is not set
679# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
680# CONFIG_FAULT_INJECTION is not set
681# CONFIG_LATENCYTOP is not set
682CONFIG_HAVE_FUNCTION_TRACER=y
683
684#
685# Tracers
686#
687# CONFIG_FUNCTION_TRACER is not set
688# CONFIG_IRQSOFF_TRACER is not set
689# CONFIG_SCHED_TRACER is not set
690# CONFIG_CONTEXT_SWITCH_TRACER is not set
691# CONFIG_BOOT_TRACER is not set
692# CONFIG_TRACE_BRANCH_PROFILING is not set
693# CONFIG_STACK_TRACER is not set
694# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
695# CONFIG_SAMPLES is not set
696CONFIG_HAVE_ARCH_KGDB=y
697# CONFIG_KGDB is not set
698# CONFIG_DEBUG_USER is not set
699# CONFIG_DEBUG_ERRORS is not set
700# CONFIG_DEBUG_STACK_USAGE is not set
701# CONFIG_DEBUG_ICEDCC is not set
702
703#
704# Security options
705#
706# CONFIG_KEYS is not set
707# CONFIG_SECURITY is not set
708# CONFIG_SECURITYFS is not set
709# CONFIG_SECURITY_FILE_CAPABILITIES is not set
710CONFIG_CRYPTO=y
711
712#
713# Crypto core or helper
714#
715CONFIG_CRYPTO_ALGAPI=y
716CONFIG_CRYPTO_BLKCIPHER=y
717CONFIG_CRYPTO_MANAGER=y
718# CONFIG_CRYPTO_GF128MUL is not set
719# CONFIG_CRYPTO_NULL is not set
720# CONFIG_CRYPTO_CRYPTD is not set
721# CONFIG_CRYPTO_AUTHENC is not set
722# CONFIG_CRYPTO_TEST is not set
723
724#
725# Authenticated Encryption with Associated Data
726#
727# CONFIG_CRYPTO_CCM is not set
728# CONFIG_CRYPTO_GCM is not set
729# CONFIG_CRYPTO_SEQIV is not set
730
731#
732# Block modes
733#
734CONFIG_CRYPTO_CBC=y
735# CONFIG_CRYPTO_CTR is not set
736# CONFIG_CRYPTO_CTS is not set
737CONFIG_CRYPTO_ECB=m
738# CONFIG_CRYPTO_LRW is not set
739CONFIG_CRYPTO_PCBC=m
740# CONFIG_CRYPTO_XTS is not set
741
742#
743# Hash modes
744#
745# CONFIG_CRYPTO_HMAC is not set
746# CONFIG_CRYPTO_XCBC is not set
747
748#
749# Digest
750#
751CONFIG_CRYPTO_CRC32C=y
752# CONFIG_CRYPTO_MD4 is not set
753CONFIG_CRYPTO_MD5=y
754# CONFIG_CRYPTO_MICHAEL_MIC is not set
755# CONFIG_CRYPTO_RMD128 is not set
756# CONFIG_CRYPTO_RMD160 is not set
757# CONFIG_CRYPTO_RMD256 is not set
758# CONFIG_CRYPTO_RMD320 is not set
759# CONFIG_CRYPTO_SHA1 is not set
760# CONFIG_CRYPTO_SHA256 is not set
761# CONFIG_CRYPTO_SHA512 is not set
762# CONFIG_CRYPTO_TGR192 is not set
763# CONFIG_CRYPTO_WP512 is not set
764
765#
766# Ciphers
767#
768# CONFIG_CRYPTO_AES is not set
769# CONFIG_CRYPTO_ANUBIS is not set
770# CONFIG_CRYPTO_ARC4 is not set
771# CONFIG_CRYPTO_BLOWFISH is not set
772# CONFIG_CRYPTO_CAMELLIA is not set
773# CONFIG_CRYPTO_CAST5 is not set
774# CONFIG_CRYPTO_CAST6 is not set
775CONFIG_CRYPTO_DES=y
776# CONFIG_CRYPTO_FCRYPT is not set
777# CONFIG_CRYPTO_KHAZAD is not set
778# CONFIG_CRYPTO_SALSA20 is not set
779# CONFIG_CRYPTO_SEED is not set
780# CONFIG_CRYPTO_SERPENT is not set
781# CONFIG_CRYPTO_TEA is not set
782# CONFIG_CRYPTO_TWOFISH is not set
783
784#
785# Compression
786#
787# CONFIG_CRYPTO_DEFLATE is not set
788# CONFIG_CRYPTO_LZO is not set
789CONFIG_CRYPTO_HW=y
790
791#
792# Library routines
793#
794CONFIG_BITREVERSE=y
795CONFIG_GENERIC_FIND_LAST_BIT=y
796CONFIG_CRC_CCITT=y
797# CONFIG_CRC16 is not set
798CONFIG_CRC_T10DIF=y
799# CONFIG_CRC_ITU_T is not set
800CONFIG_CRC32=y
801# CONFIG_CRC7 is not set
802CONFIG_LIBCRC32C=y
803CONFIG_PLIST=y
804CONFIG_HAS_IOMEM=y
805CONFIG_HAS_IOPORT=y
806CONFIG_HAS_DMA=y
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index b5c9088a6a4e..a755eb5e2361 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -25,7 +25,7 @@ config ARCH_OMAP3430
25 select ARCH_OMAP_OTG 25 select ARCH_OMAP_OTG
26 26
27comment "OMAP Board Type" 27comment "OMAP Board Type"
28 depends on ARCH_OMAP2 || ARCH_OMAP3 28 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4
29 29
30config MACH_OMAP_GENERIC 30config MACH_OMAP_GENERIC
31 bool "Generic OMAP board" 31 bool "Generic OMAP board"
@@ -75,3 +75,7 @@ config MACH_NOKIA_RX51
75config MACH_OMAP_ZOOM2 75config MACH_OMAP_ZOOM2
76 bool "OMAP3 Zoom2 board" 76 bool "OMAP3 Zoom2 board"
77 depends on ARCH_OMAP3 && ARCH_OMAP34XX 77 depends on ARCH_OMAP3 && ARCH_OMAP34XX
78
79config MACH_OMAP_4430SDP
80 bool "OMAP 4430 SDP board"
81 depends on ARCH_OMAP4
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index c48b12c0fe2d..3a48f2fb0ca0 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -60,6 +60,9 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \
60obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2.o \ 60obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom2.o \
61 mmc-twl4030.o \ 61 mmc-twl4030.o \
62 board-zoom-debugboard.o 62 board-zoom-debugboard.o
63
64obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o
65
63# Platform specific device init code 66# Platform specific device init code
64obj-y += usb-musb.o 67obj-y += usb-musb.o
65 68
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
new file mode 100644
index 000000000000..57e477bd89c6
--- /dev/null
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -0,0 +1,94 @@
1/*
2 * Board support file for OMAP4430 SDP.
3 *
4 * Copyright (C) 2009 Texas Instruments
5 *
6 * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
7 *
8 * Based on mach-omap2/board-3430sdp.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/io.h>
19#include <linux/gpio.h>
20
21#include <mach/hardware.h>
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25
26#include <mach/board.h>
27#include <mach/common.h>
28#include <mach/control.h>
29#include <mach/timer-gp.h>
30#include <asm/hardware/gic.h>
31
32static struct platform_device sdp4430_lcd_device = {
33 .name = "sdp4430_lcd",
34 .id = -1,
35};
36
37static struct platform_device *sdp4430_devices[] __initdata = {
38 &sdp4430_lcd_device,
39};
40
41static struct omap_uart_config sdp4430_uart_config __initdata = {
42 .enabled_uarts = (1 << 0) | (1 << 1) | (1 << 2),
43};
44
45static struct omap_lcd_config sdp4430_lcd_config __initdata = {
46 .ctrl_name = "internal",
47};
48
49static struct omap_board_config_kernel sdp4430_config[] __initdata = {
50 { OMAP_TAG_UART, &sdp4430_uart_config },
51 { OMAP_TAG_LCD, &sdp4430_lcd_config },
52};
53
54static void __init gic_init_irq(void)
55{
56 gic_dist_init(0, IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
57 gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
58}
59
60static void __init omap_4430sdp_init_irq(void)
61{
62 omap2_init_common_hw(NULL);
63#ifdef CONFIG_OMAP_32K_TIMER
64 omap2_gp_clockevent_set_gptimer(1);
65#endif
66 gic_init_irq();
67 omap_gpio_init();
68}
69
70
71static void __init omap_4430sdp_init(void)
72{
73 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
74 omap_board_config = sdp4430_config;
75 omap_board_config_size = ARRAY_SIZE(sdp4430_config);
76 omap_serial_init();
77}
78
79static void __init omap_4430sdp_map_io(void)
80{
81 omap2_set_globals_443x();
82 omap2_map_common_io();
83}
84
85MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
86 /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
87 .phys_io = 0x48000000,
88 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
89 .boot_params = 0x80000100,
90 .map_io = omap_4430sdp_map_io,
91 .init_irq = omap_4430sdp_init_irq,
92 .init_machine = omap_4430sdp_init,
93 .timer = &omap_timer,
94MACHINE_END
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 2249049c1d5a..f91934b2b092 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -5,6 +5,9 @@
5 * 5 *
6 * Author: Juha Yrjola 6 * Author: Juha Yrjola
7 * 7 *
8 * Copyright (C) 2009 Texas Instruments
9 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
10 *
8 * This program is free software; you can redistribute it and/or modify 11 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 12 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
@@ -424,6 +427,9 @@ void __init gpmc_init(void)
424 } else if (cpu_is_omap34xx()) { 427 } else if (cpu_is_omap34xx()) {
425 ck = "gpmc_fck"; 428 ck = "gpmc_fck";
426 l = OMAP34XX_GPMC_BASE; 429 l = OMAP34XX_GPMC_BASE;
430 } else if (cpu_is_omap44xx()) {
431 ck = "gpmc_fck";
432 l = OMAP44XX_GPMC_BASE;
427 } 433 }
428 434
429 gpmc_l3_clk = clk_get(NULL, ck); 435 gpmc_l3_clk = clk_get(NULL, ck);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 34b5914e0f8b..458990e20c60 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -6,6 +6,9 @@
6 * Copyright (C) 2005 Nokia Corporation 6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com> 7 * Written by Tony Lindgren <tony@atomide.com>
8 * 8 *
9 * Copyright (C) 2009 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
9 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
@@ -200,7 +203,10 @@ void __init omap2_check_revision(void)
200 omap24xx_check_revision(); 203 omap24xx_check_revision();
201 else if (cpu_is_omap34xx()) 204 else if (cpu_is_omap34xx())
202 omap34xx_check_revision(); 205 omap34xx_check_revision();
203 else 206 else if (cpu_is_omap44xx()) {
207 printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n");
208 return;
209 } else
204 pr_err("OMAP revision unknown, please fix!\n"); 210 pr_err("OMAP revision unknown, please fix!\n");
205 211
206 /* 212 /*
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 916fcd3a2328..32afd9448216 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -4,12 +4,14 @@
4 * OMAP2 I/O mapping code 4 * OMAP2 I/O mapping code
5 * 5 *
6 * Copyright (C) 2005 Nokia Corporation 6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007 Texas Instruments 7 * Copyright (C) 2007-2009 Texas Instruments
8 * 8 *
9 * Author: 9 * Author:
10 * Juha Yrjola <juha.yrjola@nokia.com> 10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com> 11 * Syed Khasim <x0khasim@ti.com>
12 * 12 *
13 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
14 *
13 * This program is free software; you can redistribute it and/or modify 15 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as 16 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation. 17 * published by the Free Software Foundation.
@@ -30,6 +32,7 @@
30#include <mach/sdrc.h> 32#include <mach/sdrc.h>
31#include <mach/gpmc.h> 33#include <mach/gpmc.h>
32 34
35#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */
33#include "clock.h" 36#include "clock.h"
34 37
35#include <mach/powerdomain.h> 38#include <mach/powerdomain.h>
@@ -38,7 +41,7 @@
38 41
39#include <mach/clockdomain.h> 42#include <mach/clockdomain.h>
40#include "clockdomains.h" 43#include "clockdomains.h"
41 44#endif
42/* 45/*
43 * The machine specific code may provide the extra mapping besides the 46 * The machine specific code may provide the extra mapping besides the
44 * default mapping provided here. 47 * default mapping provided here.
@@ -166,6 +169,46 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
166 }, 169 },
167}; 170};
168#endif 171#endif
172#ifdef CONFIG_ARCH_OMAP4
173static struct map_desc omap44xx_io_desc[] __initdata = {
174 {
175 .virtual = L3_44XX_VIRT,
176 .pfn = __phys_to_pfn(L3_44XX_PHYS),
177 .length = L3_44XX_SIZE,
178 .type = MT_DEVICE,
179 },
180 {
181 .virtual = L4_44XX_VIRT,
182 .pfn = __phys_to_pfn(L4_44XX_PHYS),
183 .length = L4_44XX_SIZE,
184 .type = MT_DEVICE,
185 },
186 {
187 .virtual = L4_WK_44XX_VIRT,
188 .pfn = __phys_to_pfn(L4_WK_44XX_PHYS),
189 .length = L4_WK_44XX_SIZE,
190 .type = MT_DEVICE,
191 },
192 {
193 .virtual = OMAP44XX_GPMC_VIRT,
194 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
195 .length = OMAP44XX_GPMC_SIZE,
196 .type = MT_DEVICE,
197 },
198 {
199 .virtual = L4_PER_44XX_VIRT,
200 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
201 .length = L4_PER_44XX_SIZE,
202 .type = MT_DEVICE,
203 },
204 {
205 .virtual = L4_EMU_44XX_VIRT,
206 .pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
207 .length = L4_EMU_44XX_SIZE,
208 .type = MT_DEVICE,
209 },
210};
211#endif
169 212
170void __init omap2_map_common_io(void) 213void __init omap2_map_common_io(void)
171{ 214{
@@ -183,6 +226,9 @@ void __init omap2_map_common_io(void)
183 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); 226 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
184#endif 227#endif
185 228
229#if defined(CONFIG_ARCH_OMAP4)
230 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
231#endif
186 /* Normally devicemaps_init() would flush caches and tlb after 232 /* Normally devicemaps_init() would flush caches and tlb after
187 * mdesc->map_io(), but we must also do it here because of the CPU 233 * mdesc->map_io(), but we must also do it here because of the CPU
188 * revision check below. 234 * revision check below.
@@ -198,9 +244,11 @@ void __init omap2_map_common_io(void)
198void __init omap2_init_common_hw(struct omap_sdrc_params *sp) 244void __init omap2_init_common_hw(struct omap_sdrc_params *sp)
199{ 245{
200 omap2_mux_init(); 246 omap2_mux_init();
247#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
201 pwrdm_init(powerdomains_omap); 248 pwrdm_init(powerdomains_omap);
202 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); 249 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
203 omap2_clk_init(); 250 omap2_clk_init();
204 omap2_sdrc_init(sp); 251 omap2_sdrc_init(sp);
252#endif
205 gpmc_init(); 253 gpmc_init();
206} 254}
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index fddbc4e1b231..b094c15bfe47 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -10,6 +10,9 @@
10 * 10 *
11 * Based off of arch/arm/mach-omap/omap1/serial.c 11 * Based off of arch/arm/mach-omap/omap1/serial.c
12 * 12 *
13 * Copyright (C) 2009 Texas Instruments
14 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com
15 *
13 * This file is subject to the terms and conditions of the GNU General Public 16 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive 17 * License. See the file "COPYING" in the main directory of this archive
15 * for more details. 18 * for more details.
@@ -493,6 +496,10 @@ void __init omap_serial_init(void)
493 496
494 if (info == NULL) 497 if (info == NULL)
495 return; 498 return;
499 if (cpu_is_omap44xx()) {
500 for (i = 0; i < OMAP_MAX_NR_PORTS; i++)
501 serial_platform_data[i].irq += 32;
502 }
496 503
497 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { 504 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
498 struct plat_serial8250_port *p = serial_platform_data + i; 505 struct plat_serial8250_port *p = serial_platform_data + i;
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index f36aba12090e..2ce474a9d2b6 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -17,9 +17,10 @@
17 * 17 *
18 * Some parts based off of TI's 24xx code: 18 * Some parts based off of TI's 24xx code:
19 * 19 *
20 * Copyright (C) 2004 Texas Instruments, Inc. 20 * Copyright (C) 2004-2009 Texas Instruments, Inc.
21 * 21 *
22 * Roughly modelled after the OMAP1 MPU timer code. 22 * Roughly modelled after the OMAP1 MPU timer code.
23 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
23 * 24 *
24 * This file is subject to the terms and conditions of the GNU General Public 25 * This file is subject to the terms and conditions of the GNU General Public
25 * License. See the file "COPYING" in the main directory of this archive 26 * License. See the file "COPYING" in the main directory of this archive
@@ -82,7 +83,8 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
82 case CLOCK_EVT_MODE_PERIODIC: 83 case CLOCK_EVT_MODE_PERIODIC:
83 period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; 84 period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
84 period -= 1; 85 period -= 1;
85 86 if (cpu_is_omap44xx())
87 period = 0xff; /* FIXME: */
86 omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period); 88 omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
87 break; 89 break;
88 case CLOCK_EVT_MODE_ONESHOT: 90 case CLOCK_EVT_MODE_ONESHOT:
@@ -145,6 +147,9 @@ static void __init omap2_gp_clockevent_init(void)
145 "timer-gp: omap_dm_timer_set_source() failed\n"); 147 "timer-gp: omap_dm_timer_set_source() failed\n");
146 148
147 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); 149 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
150 if (cpu_is_omap44xx())
151 /* Assuming 32kHz clk is driving GPT1 */
152 tick_rate = 32768; /* FIXME: */
148 153
149 pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n", 154 pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
150 gptimer_id, tick_rate); 155 gptimer_id, tick_rate);
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 4bc9ed701dc4..f8a61249f7d9 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -23,6 +23,11 @@ config ARCH_OMAP3
23 select CPU_V7 23 select CPU_V7
24 select COMMON_CLKDEV 24 select COMMON_CLKDEV
25 25
26config ARCH_OMAP4
27 bool "TI OMAP4"
28 select CPU_V7
29 select ARM_GIC
30
26endchoice 31endchoice
27 32
28comment "OMAP Feature Selections" 33comment "OMAP Feature Selections"
@@ -128,13 +133,13 @@ config OMAP_MPU_TIMER
128 133
129config OMAP_32K_TIMER 134config OMAP_32K_TIMER
130 bool "Use 32KHz timer" 135 bool "Use 32KHz timer"
131 depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX 136 depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX || ARCH_OMAP4
132 help 137 help
133 Select this option if you want to enable the OMAP 32KHz timer. 138 Select this option if you want to enable the OMAP 32KHz timer.
134 This timer saves power compared to the OMAP_MPU_TIMER, and has 139 This timer saves power compared to the OMAP_MPU_TIMER, and has
135 support for no tick during idle. The 32KHz timer provides less 140 support for no tick during idle. The 32KHz timer provides less
136 intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is 141 intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
137 currently only available for OMAP16XX, 24XX and 34XX. 142 currently only available for OMAP16XX, 24XX, 34XX and OMAP4.
138 143
139endchoice 144endchoice
140 145
@@ -149,7 +154,7 @@ config OMAP_32K_TIMER_HZ
149 154
150config OMAP_DM_TIMER 155config OMAP_DM_TIMER
151 bool "Use dual-mode timer" 156 bool "Use dual-mode timer"
152 depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX 157 depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX || ARCH_OMAP4
153 help 158 help
154 Select this option if you want to use OMAP Dual-Mode timers. 159 Select this option if you want to use OMAP Dual-Mode timers.
155 160
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 508c96ab24e9..e8c327a45a55 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -36,10 +36,40 @@ static struct clk_functions *arch_clock;
36 * Standard clock functions defined in include/linux/clk.h 36 * Standard clock functions defined in include/linux/clk.h
37 *-------------------------------------------------------------------------*/ 37 *-------------------------------------------------------------------------*/
38 38
39/* This functions is moved to arch/arm/common/clkdev.c. For OMAP4 since
40 * clock framework is not up , it is defined here to avoid rework in
41 * every driver. Also dummy prcm reset function is added */
42
43/* Dummy hooks only for OMAP4.For rest OMAPs, common clkdev is used */
44#if defined(CONFIG_ARCH_OMAP4)
45struct clk *clk_get(struct device *dev, const char *id)
46{
47 return NULL;
48}
49EXPORT_SYMBOL(clk_get);
50
51void clk_put(struct clk *clk)
52{
53}
54EXPORT_SYMBOL(clk_put);
55
56void omap2_clk_prepare_for_reboot(void)
57{
58}
59EXPORT_SYMBOL(omap2_clk_prepare_for_reboot);
60
61void omap_prcm_arch_reset(char mode)
62{
63}
64EXPORT_SYMBOL(omap_prcm_arch_reset);
65#endif
39int clk_enable(struct clk *clk) 66int clk_enable(struct clk *clk)
40{ 67{
41 unsigned long flags; 68 unsigned long flags;
42 int ret = 0; 69 int ret = 0;
70 if (cpu_is_omap44xx())
71 /* OMAP4 clk framework not supported yet */
72 return 0;
43 73
44 if (clk == NULL || IS_ERR(clk)) 74 if (clk == NULL || IS_ERR(clk))
45 return -EINVAL; 75 return -EINVAL;
@@ -140,6 +170,9 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
140 unsigned long flags; 170 unsigned long flags;
141 int ret = -EINVAL; 171 int ret = -EINVAL;
142 172
173 if (cpu_is_omap44xx())
174 /* OMAP4 clk framework not supported yet */
175 return 0;
143 if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent)) 176 if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent))
144 return ret; 177 return ret;
145 178
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 86ee23d6f73c..ebcf006406f9 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -2,6 +2,10 @@
2 * linux/arch/arm/plat-omap/common.c 2 * linux/arch/arm/plat-omap/common.c
3 * 3 *
4 * Code common to all OMAP machines. 4 * Code common to all OMAP machines.
5 * The file is created by Tony Lindgren <tony@atomide.com>
6 *
7 * Copyright (C) 2009 Texas Instruments
8 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
5 * 9 *
6 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
@@ -216,6 +220,15 @@ static cycle_t omap34xx_32k_read(struct clocksource *cs)
216#define omap34xx_32k_read NULL 220#define omap34xx_32k_read NULL
217#endif 221#endif
218 222
223#ifdef CONFIG_ARCH_OMAP4
224static cycle_t omap44xx_32k_read(struct clocksource *cs)
225{
226 return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10);
227}
228#else
229#define omap44xx_32k_read NULL
230#endif
231
219/* 232/*
220 * Kernel assumes that sched_clock can be called early but may not have 233 * Kernel assumes that sched_clock can be called early but may not have
221 * things ready yet. 234 * things ready yet.
@@ -263,6 +276,8 @@ static int __init omap_init_clocksource_32k(void)
263 clocksource_32k.read = omap2430_32k_read; 276 clocksource_32k.read = omap2430_32k_read;
264 else if (cpu_is_omap34xx()) 277 else if (cpu_is_omap34xx())
265 clocksource_32k.read = omap34xx_32k_read; 278 clocksource_32k.read = omap34xx_32k_read;
279 else if (cpu_is_omap44xx())
280 clocksource_32k.read = omap44xx_32k_read;
266 else 281 else
267 return -ENODEV; 282 return -ENODEV;
268 283
@@ -350,3 +365,19 @@ void __init omap2_set_globals_343x(void)
350} 365}
351#endif 366#endif
352 367
368#if defined(CONFIG_ARCH_OMAP4)
369static struct omap_globals omap4_globals = {
370 .class = OMAP443X_CLASS,
371 .tap = OMAP2_IO_ADDRESS(0x4830a000),
372 .ctrl = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE),
373 .prm = OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE),
374 .cm = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE),
375};
376
377void __init omap2_set_globals_443x(void)
378{
379 omap2_set_globals_tap(&omap4_globals);
380 omap2_set_globals_control(&omap4_globals);
381}
382#endif
383
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 87fb7ff41794..a64b692a1bfe 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -311,6 +311,8 @@ static void omap_init_wdt(void)
311 wdt_resources[0].start = 0x49016000; /* WDT2 */ 311 wdt_resources[0].start = 0x49016000; /* WDT2 */
312 else if (cpu_is_omap343x()) 312 else if (cpu_is_omap343x())
313 wdt_resources[0].start = 0x48314000; /* WDT2 */ 313 wdt_resources[0].start = 0x48314000; /* WDT2 */
314 else if (cpu_is_omap44xx())
315 wdt_resources[0].start = 0x4a314000;
314 else 316 else
315 return; 317 return;
316 318
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 06e9cbe8b8eb..def14ec265b3 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -10,6 +10,9 @@
10 * Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com> 10 * Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com>
11 * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc. 11 * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
12 * 12 *
13 * Copyright (C) 2009 Texas Instruments
14 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
15 *
13 * Support functions for the OMAP internal DMA channels. 16 * Support functions for the OMAP internal DMA channels.
14 * 17 *
15 * This program is free software; you can redistribute it and/or modify 18 * This program is free software; you can redistribute it and/or modify
@@ -872,7 +875,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
872 } 875 }
873 l = dma_read(CCR(lch)); 876 l = dma_read(CCR(lch));
874 l &= ~((1 << 6) | (1 << 26)); 877 l &= ~((1 << 6) | (1 << 26));
875 if (cpu_is_omap2430() || cpu_is_omap34xx()) 878 if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
876 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26); 879 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
877 else 880 else
878 l |= ((read_prio & 0x1) << 6); 881 l |= ((read_prio & 0x1) << 6);
@@ -1844,7 +1847,8 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
1844#define omap1_dma_irq_handler NULL 1847#define omap1_dma_irq_handler NULL
1845#endif 1848#endif
1846 1849
1847#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 1850#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
1851 defined(CONFIG_ARCH_OMAP4)
1848 1852
1849static int omap2_dma_handle_ch(int ch) 1853static int omap2_dma_handle_ch(int ch)
1850{ 1854{
@@ -2339,6 +2343,9 @@ static int __init omap_init_dma(void)
2339 } else if (cpu_is_omap34xx()) { 2343 } else if (cpu_is_omap34xx()) {
2340 omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE); 2344 omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
2341 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 2345 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2346 } else if (cpu_is_omap44xx()) {
2347 omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE);
2348 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2342 } else { 2349 } else {
2343 pr_err("DMA init failed for unsupported omap\n"); 2350 pr_err("DMA init failed for unsupported omap\n");
2344 return -ENODEV; 2351 return -ENODEV;
@@ -2437,12 +2444,18 @@ static int __init omap_init_dma(void)
2437 } 2444 }
2438 } 2445 }
2439 2446
2440 if (cpu_is_omap2430() || cpu_is_omap34xx()) 2447 if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
2441 omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE, 2448 omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
2442 DMA_DEFAULT_FIFO_DEPTH, 0); 2449 DMA_DEFAULT_FIFO_DEPTH, 0);
2443 2450
2444 if (cpu_class_is_omap2()) 2451 if (cpu_class_is_omap2()) {
2445 setup_irq(INT_24XX_SDMA_IRQ0, &omap24xx_dma_irq); 2452 int irq;
2453 if (cpu_is_omap44xx())
2454 irq = INT_44XX_SDMA_IRQ0;
2455 else
2456 irq = INT_24XX_SDMA_IRQ0;
2457 setup_irq(irq, &omap24xx_dma_irq);
2458 }
2446 2459
2447 /* FIXME: Update LCD DMA to work on 24xx */ 2460 /* FIXME: Update LCD DMA to work on 24xx */
2448 if (cpu_class_is_omap1()) { 2461 if (cpu_class_is_omap1()) {
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index ee206122f507..7f50b6103dee 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -7,6 +7,9 @@
7 * OMAP2 support by Juha Yrjola 7 * OMAP2 support by Juha Yrjola
8 * API improvements and OMAP2 clock framework support by Timo Teras 8 * API improvements and OMAP2 clock framework support by Timo Teras
9 * 9 *
10 * Copyright (C) 2009 Texas Instruments
11 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
12 *
10 * This program is free software; you can redistribute it and/or modify it 13 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 14 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your 15 * Free Software Foundation; either version 2 of the License, or (at your
@@ -150,7 +153,8 @@
150struct omap_dm_timer { 153struct omap_dm_timer {
151 unsigned long phys_base; 154 unsigned long phys_base;
152 int irq; 155 int irq;
153#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 156#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
157 defined(CONFIG_ARCH_OMAP4)
154 struct clk *iclk, *fclk; 158 struct clk *iclk, *fclk;
155#endif 159#endif
156 void __iomem *io_base; 160 void __iomem *io_base;
@@ -169,6 +173,9 @@ struct omap_dm_timer {
169#define omap3_dm_timers NULL 173#define omap3_dm_timers NULL
170#define omap3_dm_source_names NULL 174#define omap3_dm_source_names NULL
171#define omap3_dm_source_clocks NULL 175#define omap3_dm_source_clocks NULL
176#define omap4_dm_timers NULL
177#define omap4_dm_source_names NULL
178#define omap4_dm_source_clocks NULL
172 179
173static struct omap_dm_timer omap1_dm_timers[] = { 180static struct omap_dm_timer omap1_dm_timers[] = {
174 { .phys_base = 0xfffb1400, .irq = INT_1610_GPTIMER1 }, 181 { .phys_base = 0xfffb1400, .irq = INT_1610_GPTIMER1 },
@@ -191,6 +198,9 @@ static const int dm_timer_count = ARRAY_SIZE(omap1_dm_timers);
191#define omap3_dm_timers NULL 198#define omap3_dm_timers NULL
192#define omap3_dm_source_names NULL 199#define omap3_dm_source_names NULL
193#define omap3_dm_source_clocks NULL 200#define omap3_dm_source_clocks NULL
201#define omap4_dm_timers NULL
202#define omap4_dm_source_names NULL
203#define omap4_dm_source_clocks NULL
194 204
195static struct omap_dm_timer omap2_dm_timers[] = { 205static struct omap_dm_timer omap2_dm_timers[] = {
196 { .phys_base = 0x48028000, .irq = INT_24XX_GPTIMER1 }, 206 { .phys_base = 0x48028000, .irq = INT_24XX_GPTIMER1 },
@@ -225,6 +235,9 @@ static const int dm_timer_count = ARRAY_SIZE(omap2_dm_timers);
225#define omap2_dm_timers NULL 235#define omap2_dm_timers NULL
226#define omap2_dm_source_names NULL 236#define omap2_dm_source_names NULL
227#define omap2_dm_source_clocks NULL 237#define omap2_dm_source_clocks NULL
238#define omap4_dm_timers NULL
239#define omap4_dm_source_names NULL
240#define omap4_dm_source_clocks NULL
228 241
229static struct omap_dm_timer omap3_dm_timers[] = { 242static struct omap_dm_timer omap3_dm_timers[] = {
230 { .phys_base = 0x48318000, .irq = INT_24XX_GPTIMER1 }, 243 { .phys_base = 0x48318000, .irq = INT_24XX_GPTIMER1 },
@@ -250,6 +263,40 @@ static const char *omap3_dm_source_names[] __initdata = {
250static struct clk *omap3_dm_source_clocks[2]; 263static struct clk *omap3_dm_source_clocks[2];
251static const int dm_timer_count = ARRAY_SIZE(omap3_dm_timers); 264static const int dm_timer_count = ARRAY_SIZE(omap3_dm_timers);
252 265
266#elif defined(CONFIG_ARCH_OMAP4)
267
268#define omap_dm_clk_enable(x) clk_enable(x)
269#define omap_dm_clk_disable(x) clk_disable(x)
270#define omap1_dm_timers NULL
271#define omap2_dm_timers NULL
272#define omap2_dm_source_names NULL
273#define omap2_dm_source_clocks NULL
274#define omap3_dm_timers NULL
275#define omap3_dm_source_names NULL
276#define omap3_dm_source_clocks NULL
277
278static struct omap_dm_timer omap4_dm_timers[] = {
279 { .phys_base = 0x4a318000, .irq = INT_44XX_GPTIMER1 },
280 { .phys_base = 0x48032000, .irq = INT_44XX_GPTIMER2 },
281 { .phys_base = 0x48034000, .irq = INT_44XX_GPTIMER3 },
282 { .phys_base = 0x48036000, .irq = INT_44XX_GPTIMER4 },
283 { .phys_base = 0x40138000, .irq = INT_44XX_GPTIMER5 },
284 { .phys_base = 0x4013a000, .irq = INT_44XX_GPTIMER6 },
285 { .phys_base = 0x4013a000, .irq = INT_44XX_GPTIMER7 },
286 { .phys_base = 0x4013e000, .irq = INT_44XX_GPTIMER8 },
287 { .phys_base = 0x4803e000, .irq = INT_44XX_GPTIMER9 },
288 { .phys_base = 0x48086000, .irq = INT_44XX_GPTIMER10 },
289 { .phys_base = 0x48088000, .irq = INT_44XX_GPTIMER11 },
290 { .phys_base = 0x4a320000, .irq = INT_44XX_GPTIMER12 },
291};
292static const char *omap4_dm_source_names[] __initdata = {
293 "sys_ck",
294 "omap_32k_fck",
295 NULL
296};
297static struct clk *omap4_dm_source_clocks[2];
298static const int dm_timer_count = ARRAY_SIZE(omap4_dm_timers);
299
253#else 300#else
254 301
255#error OMAP architecture not supported! 302#error OMAP architecture not supported!
@@ -459,7 +506,8 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
459} 506}
460EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask); 507EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
461 508
462#elif defined(CONFIG_ARCH_OMAP2) || defined (CONFIG_ARCH_OMAP3) 509#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
510 defined(CONFIG_ARCH_OMAP4)
463 511
464struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) 512struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
465{ 513{
@@ -711,6 +759,10 @@ int __init omap_dm_timer_init(void)
711 dm_timers = omap3_dm_timers; 759 dm_timers = omap3_dm_timers;
712 dm_source_names = omap3_dm_source_names; 760 dm_source_names = omap3_dm_source_names;
713 dm_source_clocks = omap3_dm_source_clocks; 761 dm_source_clocks = omap3_dm_source_clocks;
762 } else if (cpu_is_omap44xx()) {
763 dm_timers = omap4_dm_timers;
764 dm_source_names = omap4_dm_source_names;
765 dm_source_clocks = omap4_dm_source_clocks;
714 } 766 }
715 767
716 if (cpu_class_is_omap2()) 768 if (cpu_class_is_omap2())
@@ -723,7 +775,8 @@ int __init omap_dm_timer_init(void)
723 for (i = 0; i < dm_timer_count; i++) { 775 for (i = 0; i < dm_timer_count; i++) {
724 timer = &dm_timers[i]; 776 timer = &dm_timers[i];
725 timer->io_base = IO_ADDRESS(timer->phys_base); 777 timer->io_base = IO_ADDRESS(timer->phys_base);
726#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 778#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
779 defined(CONFIG_ARCH_OMAP4)
727 if (cpu_class_is_omap2()) { 780 if (cpu_class_is_omap2()) {
728 char clk_name[16]; 781 char clk_name[16];
729 sprintf(clk_name, "gpt%d_ick", i + 1); 782 sprintf(clk_name, "gpt%d_ick", i + 1);
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index ee0b21f5b094..7fd89ba8d3b5 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -6,6 +6,9 @@
6 * Copyright (C) 2003-2005 Nokia Corporation 6 * Copyright (C) 2003-2005 Nokia Corporation
7 * Written by Juha Yrjölä <juha.yrjola@nokia.com> 7 * Written by Juha Yrjölä <juha.yrjola@nokia.com>
8 * 8 *
9 * Copyright (C) 2009 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
9 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
@@ -146,6 +149,16 @@
146#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000) 149#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000)
147#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000) 150#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000)
148 151
152/*
153 * OMAP44XX specific GPIO registers
154 */
155#define OMAP44XX_GPIO1_BASE IO_ADDRESS(0x4a310000)
156#define OMAP44XX_GPIO2_BASE IO_ADDRESS(0x48055000)
157#define OMAP44XX_GPIO3_BASE IO_ADDRESS(0x48057000)
158#define OMAP44XX_GPIO4_BASE IO_ADDRESS(0x48059000)
159#define OMAP44XX_GPIO5_BASE IO_ADDRESS(0x4805B000)
160#define OMAP44XX_GPIO6_BASE IO_ADDRESS(0x4805D000)
161
149#define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE) 162#define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE)
150 163
151struct gpio_bank { 164struct gpio_bank {
@@ -153,11 +166,13 @@ struct gpio_bank {
153 u16 irq; 166 u16 irq;
154 u16 virtual_irq_start; 167 u16 virtual_irq_start;
155 int method; 168 int method;
156#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 169#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
170 defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4)
157 u32 suspend_wakeup; 171 u32 suspend_wakeup;
158 u32 saved_wakeup; 172 u32 saved_wakeup;
159#endif 173#endif
160#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 174#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
175 defined(CONFIG_ARCH_OMAP4)
161 u32 non_wakeup_gpios; 176 u32 non_wakeup_gpios;
162 u32 enabled_non_wakeup_gpios; 177 u32 enabled_non_wakeup_gpios;
163 178
@@ -251,6 +266,24 @@ static struct gpio_bank gpio_bank_34xx[6] = {
251 266
252#endif 267#endif
253 268
269#ifdef CONFIG_ARCH_OMAP4
270static struct gpio_bank gpio_bank_44xx[6] = {
271 { OMAP44XX_GPIO1_BASE, INT_44XX_GPIO_BANK1, IH_GPIO_BASE, \
272 METHOD_GPIO_24XX },
273 { OMAP44XX_GPIO2_BASE, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32, \
274 METHOD_GPIO_24XX },
275 { OMAP44XX_GPIO3_BASE, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64, \
276 METHOD_GPIO_24XX },
277 { OMAP44XX_GPIO4_BASE, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96, \
278 METHOD_GPIO_24XX },
279 { OMAP44XX_GPIO5_BASE, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128, \
280 METHOD_GPIO_24XX },
281 { OMAP44XX_GPIO6_BASE, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160, \
282 METHOD_GPIO_24XX },
283};
284
285#endif
286
254static struct gpio_bank *gpio_bank; 287static struct gpio_bank *gpio_bank;
255static int gpio_bank_count; 288static int gpio_bank_count;
256 289
@@ -273,7 +306,7 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
273 } 306 }
274 if (cpu_is_omap24xx()) 307 if (cpu_is_omap24xx())
275 return &gpio_bank[gpio >> 5]; 308 return &gpio_bank[gpio >> 5];
276 if (cpu_is_omap34xx()) 309 if (cpu_is_omap34xx() || cpu_is_omap44xx())
277 return &gpio_bank[gpio >> 5]; 310 return &gpio_bank[gpio >> 5];
278 BUG(); 311 BUG();
279 return NULL; 312 return NULL;
@@ -285,7 +318,7 @@ static inline int get_gpio_index(int gpio)
285 return gpio & 0x1f; 318 return gpio & 0x1f;
286 if (cpu_is_omap24xx()) 319 if (cpu_is_omap24xx())
287 return gpio & 0x1f; 320 return gpio & 0x1f;
288 if (cpu_is_omap34xx()) 321 if (cpu_is_omap34xx() || cpu_is_omap44xx())
289 return gpio & 0x1f; 322 return gpio & 0x1f;
290 return gpio & 0x0f; 323 return gpio & 0x0f;
291} 324}
@@ -307,7 +340,7 @@ static inline int gpio_valid(int gpio)
307 return 0; 340 return 0;
308 if (cpu_is_omap24xx() && gpio < 128) 341 if (cpu_is_omap24xx() && gpio < 128)
309 return 0; 342 return 0;
310 if (cpu_is_omap34xx() && gpio < 192) 343 if ((cpu_is_omap34xx() || cpu_is_omap44xx()) && gpio < 192)
311 return 0; 344 return 0;
312 return -1; 345 return -1;
313} 346}
@@ -353,7 +386,8 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
353 reg += OMAP850_GPIO_DIR_CONTROL; 386 reg += OMAP850_GPIO_DIR_CONTROL;
354 break; 387 break;
355#endif 388#endif
356#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 389#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
390 defined(CONFIG_ARCH_OMAP4)
357 case METHOD_GPIO_24XX: 391 case METHOD_GPIO_24XX:
358 reg += OMAP24XX_GPIO_OE; 392 reg += OMAP24XX_GPIO_OE;
359 break; 393 break;
@@ -425,7 +459,8 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
425 l &= ~(1 << gpio); 459 l &= ~(1 << gpio);
426 break; 460 break;
427#endif 461#endif
428#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 462#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
463 defined(CONFIG_ARCH_OMAP4)
429 case METHOD_GPIO_24XX: 464 case METHOD_GPIO_24XX:
430 if (enable) 465 if (enable)
431 reg += OMAP24XX_GPIO_SETDATAOUT; 466 reg += OMAP24XX_GPIO_SETDATAOUT;
@@ -476,7 +511,8 @@ static int __omap_get_gpio_datain(int gpio)
476 reg += OMAP850_GPIO_DATA_INPUT; 511 reg += OMAP850_GPIO_DATA_INPUT;
477 break; 512 break;
478#endif 513#endif
479#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 514#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
515 defined(CONFIG_ARCH_OMAP4)
480 case METHOD_GPIO_24XX: 516 case METHOD_GPIO_24XX:
481 reg += OMAP24XX_GPIO_DATAIN; 517 reg += OMAP24XX_GPIO_DATAIN;
482 break; 518 break;
@@ -520,7 +556,7 @@ void omap_set_gpio_debounce(int gpio, int enable)
520 else 556 else
521 goto done; 557 goto done;
522 558
523 if (cpu_is_omap34xx()) { 559 if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
524 if (enable) 560 if (enable)
525 clk_enable(bank->dbck); 561 clk_enable(bank->dbck);
526 else 562 else
@@ -550,7 +586,8 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
550} 586}
551EXPORT_SYMBOL(omap_set_gpio_debounce_time); 587EXPORT_SYMBOL(omap_set_gpio_debounce_time);
552 588
553#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 589#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
590 defined(CONFIG_ARCH_OMAP4)
554static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, 591static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
555 int trigger) 592 int trigger)
556{ 593{
@@ -660,7 +697,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
660 goto bad; 697 goto bad;
661 break; 698 break;
662#endif 699#endif
663#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 700#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
701 defined(CONFIG_ARCH_OMAP4)
664 case METHOD_GPIO_24XX: 702 case METHOD_GPIO_24XX:
665 set_24xx_gpio_triggering(bank, gpio, trigger); 703 set_24xx_gpio_triggering(bank, gpio, trigger);
666 break; 704 break;
@@ -745,7 +783,8 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
745 reg += OMAP850_GPIO_INT_STATUS; 783 reg += OMAP850_GPIO_INT_STATUS;
746 break; 784 break;
747#endif 785#endif
748#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 786#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
787 defined(CONFIG_ARCH_OMAP4)
749 case METHOD_GPIO_24XX: 788 case METHOD_GPIO_24XX:
750 reg += OMAP24XX_GPIO_IRQSTATUS1; 789 reg += OMAP24XX_GPIO_IRQSTATUS1;
751 break; 790 break;
@@ -814,7 +853,8 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
814 inv = 1; 853 inv = 1;
815 break; 854 break;
816#endif 855#endif
817#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 856#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
857 defined(CONFIG_ARCH_OMAP4)
818 case METHOD_GPIO_24XX: 858 case METHOD_GPIO_24XX:
819 reg += OMAP24XX_GPIO_IRQENABLE1; 859 reg += OMAP24XX_GPIO_IRQENABLE1;
820 mask = 0xffffffff; 860 mask = 0xffffffff;
@@ -887,7 +927,8 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
887 l |= gpio_mask; 927 l |= gpio_mask;
888 break; 928 break;
889#endif 929#endif
890#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 930#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
931 defined(CONFIG_ARCH_OMAP4)
891 case METHOD_GPIO_24XX: 932 case METHOD_GPIO_24XX:
892 if (enable) 933 if (enable)
893 reg += OMAP24XX_GPIO_SETIRQENABLE1; 934 reg += OMAP24XX_GPIO_SETIRQENABLE1;
@@ -932,7 +973,8 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
932 spin_unlock_irqrestore(&bank->lock, flags); 973 spin_unlock_irqrestore(&bank->lock, flags);
933 return 0; 974 return 0;
934#endif 975#endif
935#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 976#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
977 defined(CONFIG_ARCH_OMAP4)
936 case METHOD_GPIO_24XX: 978 case METHOD_GPIO_24XX:
937 if (bank->non_wakeup_gpios & (1 << gpio)) { 979 if (bank->non_wakeup_gpios & (1 << gpio)) {
938 printk(KERN_ERR "Unable to modify wakeup on " 980 printk(KERN_ERR "Unable to modify wakeup on "
@@ -1017,7 +1059,8 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
1017 __raw_writel(1 << offset, reg); 1059 __raw_writel(1 << offset, reg);
1018 } 1060 }
1019#endif 1061#endif
1020#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1062#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1063 defined(CONFIG_ARCH_OMAP4)
1021 if (bank->method == METHOD_GPIO_24XX) { 1064 if (bank->method == METHOD_GPIO_24XX) {
1022 /* Disable wake-up during idle for dynamic tick */ 1065 /* Disable wake-up during idle for dynamic tick */
1023 void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA; 1066 void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
@@ -1069,7 +1112,8 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
1069 if (bank->method == METHOD_GPIO_850) 1112 if (bank->method == METHOD_GPIO_850)
1070 isr_reg = bank->base + OMAP850_GPIO_INT_STATUS; 1113 isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
1071#endif 1114#endif
1072#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1115#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1116 defined(CONFIG_ARCH_OMAP4)
1073 if (bank->method == METHOD_GPIO_24XX) 1117 if (bank->method == METHOD_GPIO_24XX)
1074 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; 1118 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
1075#endif 1119#endif
@@ -1346,7 +1390,7 @@ static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
1346/*---------------------------------------------------------------------*/ 1390/*---------------------------------------------------------------------*/
1347 1391
1348static int initialized; 1392static int initialized;
1349#if !defined(CONFIG_ARCH_OMAP3) 1393#if !(defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4))
1350static struct clk * gpio_ick; 1394static struct clk * gpio_ick;
1351#endif 1395#endif
1352 1396
@@ -1359,7 +1403,7 @@ static struct clk * gpio5_ick;
1359static struct clk * gpio5_fck; 1403static struct clk * gpio5_fck;
1360#endif 1404#endif
1361 1405
1362#if defined(CONFIG_ARCH_OMAP3) 1406#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
1363static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS]; 1407static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
1364#endif 1408#endif
1365 1409
@@ -1419,8 +1463,8 @@ static int __init _omap_gpio_init(void)
1419 } 1463 }
1420#endif 1464#endif
1421 1465
1422#if defined(CONFIG_ARCH_OMAP3) 1466#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
1423 if (cpu_is_omap34xx()) { 1467 if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
1424 for (i = 0; i < OMAP34XX_NR_GPIOS; i++) { 1468 for (i = 0; i < OMAP34XX_NR_GPIOS; i++) {
1425 sprintf(clk_name, "gpio%d_ick", i + 1); 1469 sprintf(clk_name, "gpio%d_ick", i + 1);
1426 gpio_iclks[i] = clk_get(NULL, clk_name); 1470 gpio_iclks[i] = clk_get(NULL, clk_name);
@@ -1497,6 +1541,17 @@ static int __init _omap_gpio_init(void)
1497 (rev >> 4) & 0x0f, rev & 0x0f); 1541 (rev >> 4) & 0x0f, rev & 0x0f);
1498 } 1542 }
1499#endif 1543#endif
1544#ifdef CONFIG_ARCH_OMAP4
1545 if (cpu_is_omap44xx()) {
1546 int rev;
1547
1548 gpio_bank_count = OMAP34XX_NR_GPIOS;
1549 gpio_bank = gpio_bank_44xx;
1550 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
1551 printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n",
1552 (rev >> 4) & 0x0f, rev & 0x0f);
1553 }
1554#endif
1500 for (i = 0; i < gpio_bank_count; i++) { 1555 for (i = 0; i < gpio_bank_count; i++) {
1501 int j, gpio_count = 16; 1556 int j, gpio_count = 16;
1502 1557
@@ -1520,7 +1575,8 @@ static int __init _omap_gpio_init(void)
1520 gpio_count = 32; /* 730 has 32-bit GPIOs */ 1575 gpio_count = 32; /* 730 has 32-bit GPIOs */
1521 } 1576 }
1522 1577
1523#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1578#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1579 defined(CONFIG_ARCH_OMAP4)
1524 if (bank->method == METHOD_GPIO_24XX) { 1580 if (bank->method == METHOD_GPIO_24XX) {
1525 static const u32 non_wakeup_gpios[] = { 1581 static const u32 non_wakeup_gpios[] = {
1526 0xe203ffc0, 0x08700040 1582 0xe203ffc0, 0x08700040
@@ -1577,7 +1633,7 @@ static int __init _omap_gpio_init(void)
1577 set_irq_chained_handler(bank->irq, gpio_irq_handler); 1633 set_irq_chained_handler(bank->irq, gpio_irq_handler);
1578 set_irq_data(bank->irq, bank); 1634 set_irq_data(bank->irq, bank);
1579 1635
1580 if (cpu_is_omap34xx()) { 1636 if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
1581 sprintf(clk_name, "gpio%d_dbck", i + 1); 1637 sprintf(clk_name, "gpio%d_dbck", i + 1);
1582 bank->dbck = clk_get(NULL, clk_name); 1638 bank->dbck = clk_get(NULL, clk_name);
1583 if (IS_ERR(bank->dbck)) 1639 if (IS_ERR(bank->dbck))
@@ -1599,7 +1655,8 @@ static int __init _omap_gpio_init(void)
1599 return 0; 1655 return 0;
1600} 1656}
1601 1657
1602#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1658#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
1659 defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4)
1603static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) 1660static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
1604{ 1661{
1605 int i; 1662 int i;
@@ -1622,7 +1679,8 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
1622 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; 1679 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
1623 break; 1680 break;
1624#endif 1681#endif
1625#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1682#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1683 defined(CONFIG_ARCH_OMAP4)
1626 case METHOD_GPIO_24XX: 1684 case METHOD_GPIO_24XX:
1627 wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN; 1685 wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
1628 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; 1686 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
@@ -1663,7 +1721,8 @@ static int omap_gpio_resume(struct sys_device *dev)
1663 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; 1721 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
1664 break; 1722 break;
1665#endif 1723#endif
1666#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1724#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1725 defined(CONFIG_ARCH_OMAP4)
1667 case METHOD_GPIO_24XX: 1726 case METHOD_GPIO_24XX:
1668 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; 1727 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1669 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; 1728 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
@@ -1695,7 +1754,8 @@ static struct sys_device omap_gpio_device = {
1695 1754
1696#endif 1755#endif
1697 1756
1698#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1757#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1758 defined(CONFIG_ARCH_OMAP4)
1699 1759
1700static int workaround_enabled; 1760static int workaround_enabled;
1701 1761
@@ -1711,7 +1771,8 @@ void omap2_gpio_prepare_for_retention(void)
1711 1771
1712 if (!(bank->enabled_non_wakeup_gpios)) 1772 if (!(bank->enabled_non_wakeup_gpios))
1713 continue; 1773 continue;
1714#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1774#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1775 defined(CONFIG_ARCH_OMAP4)
1715 bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); 1776 bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
1716 l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); 1777 l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1717 l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); 1778 l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
@@ -1720,7 +1781,8 @@ void omap2_gpio_prepare_for_retention(void)
1720 bank->saved_risingdetect = l2; 1781 bank->saved_risingdetect = l2;
1721 l1 &= ~bank->enabled_non_wakeup_gpios; 1782 l1 &= ~bank->enabled_non_wakeup_gpios;
1722 l2 &= ~bank->enabled_non_wakeup_gpios; 1783 l2 &= ~bank->enabled_non_wakeup_gpios;
1723#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1784#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1785 defined(CONFIG_ARCH_OMAP4)
1724 __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); 1786 __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1725 __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); 1787 __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT);
1726#endif 1788#endif
@@ -1745,7 +1807,8 @@ void omap2_gpio_resume_after_retention(void)
1745 1807
1746 if (!(bank->enabled_non_wakeup_gpios)) 1808 if (!(bank->enabled_non_wakeup_gpios))
1747 continue; 1809 continue;
1748#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1810#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1811 defined(CONFIG_ARCH_OMAP4)
1749 __raw_writel(bank->saved_fallingdetect, 1812 __raw_writel(bank->saved_fallingdetect,
1750 bank->base + OMAP24XX_GPIO_FALLINGDETECT); 1813 bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1751 __raw_writel(bank->saved_risingdetect, 1814 __raw_writel(bank->saved_risingdetect,
@@ -1755,14 +1818,16 @@ void omap2_gpio_resume_after_retention(void)
1755 * state. If so, generate an IRQ by software. This is 1818 * state. If so, generate an IRQ by software. This is
1756 * horribly racy, but it's the best we can do to work around 1819 * horribly racy, but it's the best we can do to work around
1757 * this silicon bug. */ 1820 * this silicon bug. */
1758#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1821#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1822 defined(CONFIG_ARCH_OMAP4)
1759 l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); 1823 l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
1760#endif 1824#endif
1761 l ^= bank->saved_datain; 1825 l ^= bank->saved_datain;
1762 l &= bank->non_wakeup_gpios; 1826 l &= bank->non_wakeup_gpios;
1763 if (l) { 1827 if (l) {
1764 u32 old0, old1; 1828 u32 old0, old1;
1765#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1829#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1830 defined(CONFIG_ARCH_OMAP4)
1766 old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); 1831 old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
1767 old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); 1832 old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
1768 __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0); 1833 __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
@@ -1798,7 +1863,8 @@ static int __init omap_gpio_sysinit(void)
1798 1863
1799 mpuio_init(); 1864 mpuio_init();
1800 1865
1801#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1866#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
1867 defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4)
1802 if (cpu_is_omap16xx() || cpu_class_is_omap2()) { 1868 if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
1803 if (ret == 0) { 1869 if (ret == 0) {
1804 ret = sysdev_class_register(&omap_gpio_sysclass); 1870 ret = sysdev_class_register(&omap_gpio_sysclass);
@@ -1887,7 +1953,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
1887 1953
1888 irqstat = irq_desc[irq].status; 1954 irqstat = irq_desc[irq].status;
1889#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \ 1955#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
1890 defined(CONFIG_ARCH_OMAP34XX) 1956 defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4)
1891 if (is_in && ((bank->suspend_wakeup & mask) 1957 if (is_in && ((bank->suspend_wakeup & mask)
1892 || irqstat & IRQ_TYPE_SENSE_MASK)) { 1958 || irqstat & IRQ_TYPE_SENSE_MASK)) {
1893 char *trigger = NULL; 1959 char *trigger = NULL;
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index d7bd19c8ce3c..f9f65e1ba3f1 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -22,7 +22,8 @@ struct clkops {
22 void (*disable)(struct clk *); 22 void (*disable)(struct clk *);
23}; 23};
24 24
25#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 25#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
26 defined(CONFIG_ARCH_OMAP4)
26 27
27struct clksel_rate { 28struct clksel_rate {
28 u32 val; 29 u32 val;
@@ -51,7 +52,7 @@ struct dpll_data {
51 u8 max_divider; 52 u8 max_divider;
52 u32 max_tolerance; 53 u32 max_tolerance;
53 u16 max_multiplier; 54 u16 max_multiplier;
54# if defined(CONFIG_ARCH_OMAP3) 55#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
55 u8 modes; 56 u8 modes;
56 void __iomem *autoidle_reg; 57 void __iomem *autoidle_reg;
57 void __iomem *idlest_reg; 58 void __iomem *idlest_reg;
@@ -83,7 +84,8 @@ struct clk {
83 void (*init)(struct clk *); 84 void (*init)(struct clk *);
84 __u8 enable_bit; 85 __u8 enable_bit;
85 __s8 usecount; 86 __s8 usecount;
86#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 87#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
88 defined(CONFIG_ARCH_OMAP4)
87 u8 fixed_div; 89 u8 fixed_div;
88 void __iomem *clksel_reg; 90 void __iomem *clksel_reg;
89 u32 clksel_mask; 91 u32 clksel_mask;
diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h
index 834f0b3aad18..fdeab421b4dc 100644
--- a/arch/arm/plat-omap/include/mach/common.h
+++ b/arch/arm/plat-omap/include/mach/common.h
@@ -60,6 +60,7 @@ struct omap_globals {
60void omap2_set_globals_242x(void); 60void omap2_set_globals_242x(void);
61void omap2_set_globals_243x(void); 61void omap2_set_globals_243x(void);
62void omap2_set_globals_343x(void); 62void omap2_set_globals_343x(void);
63void omap2_set_globals_443x(void);
63 64
64/* These get called from omap2_set_globals_xxxx(), do not call these */ 65/* These get called from omap2_set_globals_xxxx(), do not call these */
65void omap2_set_globals_tap(struct omap_globals *); 66void omap2_set_globals_tap(struct omap_globals *);
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index fcc5a9b76973..8140dbccb7bc 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -1,9 +1,9 @@
1/* 1/*
2 * arch/arm/plat-omap/include/mach/control.h 2 * arch/arm/plat-omap/include/mach/control.h
3 * 3 *
4 * OMAP2/3 System Control Module definitions 4 * OMAP2/3/4 System Control Module definitions
5 * 5 *
6 * Copyright (C) 2007-2008 Texas Instruments, Inc. 6 * Copyright (C) 2007-2009 Texas Instruments, Inc.
7 * Copyright (C) 2007-2008 Nokia Corporation 7 * Copyright (C) 2007-2008 Nokia Corporation
8 * 8 *
9 * Written by Paul Walmsley 9 * Written by Paul Walmsley
@@ -203,7 +203,8 @@
203#define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14) 203#define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14)
204 204
205#ifndef __ASSEMBLY__ 205#ifndef __ASSEMBLY__
206#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 206#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
207 defined(CONFIG_ARCH_OMAP4)
207extern void __iomem *omap_ctrl_base_get(void); 208extern void __iomem *omap_ctrl_base_get(void);
208extern u8 omap_ctrl_readb(u16 offset); 209extern u8 omap_ctrl_readb(u16 offset);
209extern u16 omap_ctrl_readw(u16 offset); 210extern u16 omap_ctrl_readw(u16 offset);
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index 98b144252364..fc60c4ebcc28 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -5,8 +5,12 @@
5 * 5 *
6 * Copyright (C) 2004, 2008 Nokia Corporation 6 * Copyright (C) 2004, 2008 Nokia Corporation
7 * 7 *
8 * Copyright (C) 2009 Texas Instruments.
9 *
8 * Written by Tony Lindgren <tony.lindgren@nokia.com> 10 * Written by Tony Lindgren <tony.lindgren@nokia.com>
9 * 11 *
12 * Added OMAP4 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
13 *
10 * This program is free software; you can redistribute it and/or modify 14 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 15 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or 16 * the Free Software Foundation; either version 2 of the License, or
@@ -155,6 +159,8 @@ IS_OMAP_SUBCLASS(343x, 0x343)
155#define cpu_is_omap243x() 0 159#define cpu_is_omap243x() 0
156#define cpu_is_omap34xx() 0 160#define cpu_is_omap34xx() 0
157#define cpu_is_omap343x() 0 161#define cpu_is_omap343x() 0
162#define cpu_is_omap44xx() 0
163#define cpu_is_omap443x() 0
158 164
159#if defined(MULTI_OMAP1) 165#if defined(MULTI_OMAP1)
160# if defined(CONFIG_ARCH_OMAP730) 166# if defined(CONFIG_ARCH_OMAP730)
@@ -348,12 +354,21 @@ IS_OMAP_TYPE(3430, 0x3430)
348# define cpu_is_omap3430() is_omap3430() 354# define cpu_is_omap3430() is_omap3430()
349#endif 355#endif
350 356
357# if defined(CONFIG_ARCH_OMAP4)
358# undef cpu_is_omap44xx
359# undef cpu_is_omap443x
360# define cpu_is_omap44xx() 1
361# define cpu_is_omap443x() 1
362# endif
363
351/* Macros to detect if we have OMAP1 or OMAP2 */ 364/* Macros to detect if we have OMAP1 or OMAP2 */
352#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \ 365#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
353 cpu_is_omap16xx()) 366 cpu_is_omap16xx())
354#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx()) 367#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
368 cpu_is_omap44xx())
355 369
356#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 370#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
371 defined(CONFIG_ARCH_OMAP4)
357 372
358/* Various silicon revisions for omap2 */ 373/* Various silicon revisions for omap2 */
359#define OMAP242X_CLASS 0x24200024 374#define OMAP242X_CLASS 0x24200024
@@ -370,6 +385,8 @@ IS_OMAP_TYPE(3430, 0x3430)
370#define OMAP3430_REV_ES3_0 0x34303034 385#define OMAP3430_REV_ES3_0 0x34303034
371#define OMAP3430_REV_ES3_1 0x34304034 386#define OMAP3430_REV_ES3_1 0x34304034
372 387
388#define OMAP443X_CLASS 0x44300034
389
373/* 390/*
374 * omap_chip bits 391 * omap_chip bits
375 * 392 *
diff --git a/arch/arm/plat-omap/include/mach/debug-macro.S b/arch/arm/plat-omap/include/mach/debug-macro.S
index 1b11f5c6a2d9..ac24050e3416 100644
--- a/arch/arm/plat-omap/include/mach/debug-macro.S
+++ b/arch/arm/plat-omap/include/mach/debug-macro.S
@@ -36,7 +36,7 @@
36 add \rx, \rx, #0x00004000 @ UART 3 36 add \rx, \rx, #0x00004000 @ UART 3
37#endif 37#endif
38 38
39#elif CONFIG_ARCH_OMAP3 39#elif defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
40 moveq \rx, #0x48000000 @ physical base address 40 moveq \rx, #0x48000000 @ physical base address
41 movne \rx, #0xd8000000 @ virtual base 41 movne \rx, #0xd8000000 @ virtual base
42 orr \rx, \rx, #0x0006a000 42 orr \rx, \rx, #0x0006a000
diff --git a/arch/arm/plat-omap/include/mach/dma.h b/arch/arm/plat-omap/include/mach/dma.h
index 19df76f97ab3..8c1eae88737e 100644
--- a/arch/arm/plat-omap/include/mach/dma.h
+++ b/arch/arm/plat-omap/include/mach/dma.h
@@ -48,6 +48,7 @@
48/* Hardware registers for omap2 and omap3 */ 48/* Hardware registers for omap2 and omap3 */
49#define OMAP24XX_DMA4_BASE (L4_24XX_BASE + 0x56000) 49#define OMAP24XX_DMA4_BASE (L4_24XX_BASE + 0x56000)
50#define OMAP34XX_DMA4_BASE (L4_34XX_BASE + 0x56000) 50#define OMAP34XX_DMA4_BASE (L4_34XX_BASE + 0x56000)
51#define OMAP44XX_DMA4_BASE (L4_44XX_BASE + 0x56000)
51 52
52#define OMAP_DMA4_REVISION 0x00 53#define OMAP_DMA4_REVISION 0x00
53#define OMAP_DMA4_GCR 0x78 54#define OMAP_DMA4_GCR 0x78
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S
index 33256a0e9a28..00f45c01390d 100644
--- a/arch/arm/plat-omap/include/mach/entry-macro.S
+++ b/arch/arm/plat-omap/include/mach/entry-macro.S
@@ -3,6 +3,9 @@
3 * 3 *
4 * Low-level IRQ helper macros for OMAP-based platforms 4 * Low-level IRQ helper macros for OMAP-based platforms
5 * 5 *
6 * Copyright (C) 2009 Texas Instruments
7 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
8 *
6 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
@@ -10,6 +13,7 @@
10#include <mach/hardware.h> 13#include <mach/hardware.h>
11#include <mach/io.h> 14#include <mach/io.h>
12#include <mach/irqs.h> 15#include <mach/irqs.h>
16#include <asm/hardware/gic.h>
13 17
14#if defined(CONFIG_ARCH_OMAP1) 18#if defined(CONFIG_ARCH_OMAP1)
15 19
@@ -56,7 +60,8 @@
56 .endm 60 .endm
57 61
58#endif 62#endif
59#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 63#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
64 defined(CONFIG_ARCH_OMAP4)
60 65
61#include <mach/omap24xx.h> 66#include <mach/omap24xx.h>
62#include <mach/omap34xx.h> 67#include <mach/omap34xx.h>
@@ -67,7 +72,9 @@
67#elif defined(CONFIG_ARCH_OMAP34XX) 72#elif defined(CONFIG_ARCH_OMAP34XX)
68#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE) 73#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE)
69#endif 74#endif
70 75#if defined(CONFIG_ARCH_OMAP4)
76#include <mach/omap44xx.h>
77#endif
71#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */ 78#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */
72#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */ 79#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */
73 80
@@ -80,6 +87,7 @@
80 .macro arch_ret_to_user, tmp1, tmp2 87 .macro arch_ret_to_user, tmp1, tmp2
81 .endm 88 .endm
82 89
90#ifndef CONFIG_ARCH_OMAP4
83 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 91 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
84 ldr \base, =OMAP2_VA_IC_BASE 92 ldr \base, =OMAP2_VA_IC_BASE
85 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ 93 ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
@@ -95,6 +103,40 @@
95 and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ 103 and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
96 104
97 .endm 105 .endm
106#else
107 /*
108 * The interrupt numbering scheme is defined in the
109 * interrupt controller spec. To wit:
110 *
111 * Interrupts 0-15 are IPI
112 * 16-28 are reserved
113 * 29-31 are local. We allow 30 to be used for the watchdog.
114 * 32-1020 are global
115 * 1021-1022 are reserved
116 * 1023 is "spurious" (no interrupt)
117 *
118 * For now, we ignore all local interrupts so only return an
119 * interrupt if it's between 30 and 1020. The test_for_ipi
120 * routine below will pick up on IPIs.
121 * A simple read from the controller will tell us the number
122 * of the highest priority enabled interrupt.
123 * We then just need to check whether it is in the
124 * valid range for an IRQ (30-1020 inclusive).
125 */
126 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
127 ldr \base, =OMAP44XX_VA_GIC_CPU_BASE
128 ldr \irqstat, [\base, #GIC_CPU_INTACK]
129
130 ldr \tmp, =1021
131
132 bic \irqnr, \irqstat, #0x1c00
133
134 cmp \irqnr, #29
135 cmpcc \irqnr, \irqnr
136 cmpne \irqnr, \tmp
137 cmpcs \irqnr, \irqnr
138 .endm
139#endif
98 140
99 .macro irq_prio_table 141 .macro irq_prio_table
100 .endm 142 .endm
diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/mach/hardware.h
index 3dc423ed3e80..26c1fbff08aa 100644
--- a/arch/arm/plat-omap/include/mach/hardware.h
+++ b/arch/arm/plat-omap/include/mach/hardware.h
@@ -285,5 +285,6 @@
285#include "omap16xx.h" 285#include "omap16xx.h"
286#include "omap24xx.h" 286#include "omap24xx.h"
287#include "omap34xx.h" 287#include "omap34xx.h"
288#include "omap44xx.h"
288 289
289#endif /* __ASM_ARCH_OMAP_HARDWARE_H */ 290#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index 0610d7e2b3d7..3b2814720569 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -6,6 +6,9 @@
6 * Copied from arch/arm/mach-sa1100/include/mach/io.h 6 * Copied from arch/arm/mach-sa1100/include/mach/io.h
7 * Copyright (C) 1997-1999 Russell King 7 * Copyright (C) 1997-1999 Russell King
8 * 8 *
9 * Copyright (C) 2009 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
9 * This program is free software; you can redistribute it and/or modify it 12 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the 13 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your 14 * Free Software Foundation; either version 2 of the License, or (at your
@@ -157,6 +160,40 @@
157#define DSP_MMU_34XX_VIRT 0xe2000000 160#define DSP_MMU_34XX_VIRT 0xe2000000
158#define DSP_MMU_34XX_SIZE SZ_4K 161#define DSP_MMU_34XX_SIZE SZ_4K
159 162
163
164#elif defined(CONFIG_ARCH_OMAP4)
165/* We map both L3 and L4 on OMAP4 */
166#define L3_44XX_PHYS L3_44XX_BASE
167#define L3_44XX_VIRT 0xd4000000
168#define L3_44XX_SIZE SZ_1M
169
170#define L4_44XX_PHYS L4_44XX_BASE
171#define L4_44XX_VIRT 0xda000000
172#define L4_44XX_SIZE SZ_4M
173
174
175#define L4_WK_44XX_PHYS L4_WK_44XX_BASE
176#define L4_WK_44XX_VIRT 0xda300000
177#define L4_WK_44XX_SIZE SZ_1M
178
179#define L4_PER_44XX_PHYS L4_PER_44XX_BASE
180#define L4_PER_44XX_VIRT 0xd8000000
181#define L4_PER_44XX_SIZE SZ_4M
182
183#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
184#define L4_EMU_44XX_VIRT 0xe4000000
185#define L4_EMU_44XX_SIZE SZ_64M
186
187#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
188#define OMAP44XX_GPMC_VIRT 0xe0000000
189#define OMAP44XX_GPMC_SIZE SZ_1M
190
191
192#define IO_OFFSET 0x90000000
193#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
194#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
195#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */
196
160#endif 197#endif
161 198
162#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) 199#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index f5f7c928b53d..8015fe27c8b0 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -4,6 +4,9 @@
4 * Copyright (C) Greg Lonnon 2001 4 * Copyright (C) Greg Lonnon 2001
5 * Updated for OMAP-1610 by Tony Lindgren <tony@atomide.com> 5 * Updated for OMAP-1610 by Tony Lindgren <tony@atomide.com>
6 * 6 *
7 * Copyright (C) 2009 Texas Instruments
8 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
9 *
7 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 11 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or 12 * the Free Software Foundation; either version 2 of the License, or
@@ -422,6 +425,92 @@
422 425
423#define INT_34XX_BENCH_MPU_EMUL 3 426#define INT_34XX_BENCH_MPU_EMUL 3
424 427
428
429#define IRQ_GIC_START 32
430
431#define INT_44XX_BENCH_MPU_EMUL (3 + IRQ_GIC_START)
432#define INT_44XX_SSM_ABORT_IRQ (6 + IRQ_GIC_START)
433#define INT_44XX_SYS_NIRQ (7 + IRQ_GIC_START)
434#define INT_44XX_D2D_FW_IRQ (8 + IRQ_GIC_START)
435#define INT_44XX_PRCM_MPU_IRQ (11 + IRQ_GIC_START)
436#define INT_44XX_SDMA_IRQ0 (12 + IRQ_GIC_START)
437#define INT_44XX_SDMA_IRQ1 (13 + IRQ_GIC_START)
438#define INT_44XX_SDMA_IRQ2 (14 + IRQ_GIC_START)
439#define INT_44XX_SDMA_IRQ3 (15 + IRQ_GIC_START)
440#define INT_44XX_ISS_IRQ (24 + IRQ_GIC_START)
441#define INT_44XX_DSS_IRQ (25 + IRQ_GIC_START)
442#define INT_44XX_MAIL_U0_MPU (26 + IRQ_GIC_START)
443#define INT_44XX_DSP_MMU (28 + IRQ_GIC_START)
444#define INT_44XX_GPTIMER1 (37 + IRQ_GIC_START)
445#define INT_44XX_GPTIMER2 (38 + IRQ_GIC_START)
446#define INT_44XX_GPTIMER3 (39 + IRQ_GIC_START)
447#define INT_44XX_GPTIMER4 (40 + IRQ_GIC_START)
448#define INT_44XX_GPTIMER5 (41 + IRQ_GIC_START)
449#define INT_44XX_GPTIMER6 (42 + IRQ_GIC_START)
450#define INT_44XX_GPTIMER7 (43 + IRQ_GIC_START)
451#define INT_44XX_GPTIMER8 (44 + IRQ_GIC_START)
452#define INT_44XX_GPTIMER9 (45 + IRQ_GIC_START)
453#define INT_44XX_GPTIMER10 (46 + IRQ_GIC_START)
454#define INT_44XX_GPTIMER11 (47 + IRQ_GIC_START)
455#define INT_44XX_GPTIMER12 (95 + IRQ_GIC_START)
456#define INT_44XX_SHA1MD5 (51 + IRQ_GIC_START)
457#define INT_44XX_I2C1_IRQ (56 + IRQ_GIC_START)
458#define INT_44XX_I2C2_IRQ (57 + IRQ_GIC_START)
459#define INT_44XX_HDQ_IRQ (58 + IRQ_GIC_START)
460#define INT_44XX_SPI1_IRQ (65 + IRQ_GIC_START)
461#define INT_44XX_SPI2_IRQ (66 + IRQ_GIC_START)
462#define INT_44XX_HSI_1_IRQ0 (67 + IRQ_GIC_START)
463#define INT_44XX_HSI_2_IRQ1 (68 + IRQ_GIC_START)
464#define INT_44XX_HSI_1_DMAIRQ (71 + IRQ_GIC_START)
465#define INT_44XX_UART1_IRQ (72 + IRQ_GIC_START)
466#define INT_44XX_UART2_IRQ (73 + IRQ_GIC_START)
467#define INT_44XX_UART3_IRQ (74 + IRQ_GIC_START)
468#define INT_44XX_UART4_IRQ (70 + IRQ_GIC_START)
469#define INT_44XX_USB_IRQ_NISO (76 + IRQ_GIC_START)
470#define INT_44XX_USB_IRQ_ISO (77 + IRQ_GIC_START)
471#define INT_44XX_USB_IRQ_HGEN (78 + IRQ_GIC_START)
472#define INT_44XX_USB_IRQ_HSOF (79 + IRQ_GIC_START)
473#define INT_44XX_USB_IRQ_OTG (80 + IRQ_GIC_START)
474#define INT_44XX_MCBSP4_IRQ_TX (81 + IRQ_GIC_START)
475#define INT_44XX_MCBSP4_IRQ_RX (82 + IRQ_GIC_START)
476#define INT_44XX_MMC_IRQ (83 + IRQ_GIC_START)
477#define INT_44XX_MMC2_IRQ (86 + IRQ_GIC_START)
478#define INT_44XX_MCBSP2_IRQ_TX (89 + IRQ_GIC_START)
479#define INT_44XX_MCBSP2_IRQ_RX (90 + IRQ_GIC_START)
480#define INT_44XX_SPI3_IRQ (91 + IRQ_GIC_START)
481#define INT_44XX_SPI5_IRQ (69 + IRQ_GIC_START)
482
483#define INT_44XX_MCBSP5_IRQ (16 + IRQ_GIC_START)
484#define INT_44xX_MCBSP1_IRQ (17 + IRQ_GIC_START)
485#define INT_44XX_MCBSP2_IRQ (22 + IRQ_GIC_START)
486#define INT_44XX_MCBSP3_IRQ (23 + IRQ_GIC_START)
487#define INT_44XX_MCBSP4_IRQ (27 + IRQ_GIC_START)
488#define INT_44XX_HS_USB_MC (92 + IRQ_GIC_START)
489#define INT_44XX_HS_USB_DMA (93 + IRQ_GIC_START)
490
491#define INT_44XX_GPIO_BANK1 (29 + IRQ_GIC_START)
492#define INT_44XX_GPIO_BANK2 (30 + IRQ_GIC_START)
493#define INT_44XX_GPIO_BANK3 (31 + IRQ_GIC_START)
494#define INT_44XX_GPIO_BANK4 (32 + IRQ_GIC_START)
495#define INT_44XX_GPIO_BANK5 (33 + IRQ_GIC_START)
496#define INT_44XX_GPIO_BANK6 (34 + IRQ_GIC_START)
497#define INT_44XX_USIM_IRQ (35 + IRQ_GIC_START)
498#define INT_44XX_WDT3_IRQ (36 + IRQ_GIC_START)
499#define INT_44XX_SPI4_IRQ (48 + IRQ_GIC_START)
500#define INT_44XX_SHA1MD52_IRQ (49 + IRQ_GIC_START)
501#define INT_44XX_FPKA_READY_IRQ (50 + IRQ_GIC_START)
502#define INT_44XX_SHA1MD51_IRQ (51 + IRQ_GIC_START)
503#define INT_44XX_RNG_IRQ (52 + IRQ_GIC_START)
504#define INT_44XX_I2C3_IRQ (61 + IRQ_GIC_START)
505#define INT_44XX_FPKA_ERROR_IRQ (64 + IRQ_GIC_START)
506#define INT_44XX_PBIAS_IRQ (75 + IRQ_GIC_START)
507#define INT_44XX_OHCI_IRQ (76 + IRQ_GIC_START)
508#define INT_44XX_EHCI_IRQ (77 + IRQ_GIC_START)
509#define INT_44XX_TLL_IRQ (78 + IRQ_GIC_START)
510#define INT_44XX_PARTHASH_IRQ (79 + IRQ_GIC_START)
511#define INT_44XX_MMC3_IRQ (94 + IRQ_GIC_START)
512
513
425/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and 514/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
426 * 16 MPUIO lines */ 515 * 16 MPUIO lines */
427#define OMAP_MAX_GPIO_LINES 192 516#define OMAP_MAX_GPIO_LINES 192
diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h
index 99ed564d9277..9ad41dc484c1 100644
--- a/arch/arm/plat-omap/include/mach/memory.h
+++ b/arch/arm/plat-omap/include/mach/memory.h
@@ -38,7 +38,8 @@
38 */ 38 */
39#if defined(CONFIG_ARCH_OMAP1) 39#if defined(CONFIG_ARCH_OMAP1)
40#define PHYS_OFFSET UL(0x10000000) 40#define PHYS_OFFSET UL(0x10000000)
41#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 41#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
42 defined(CONFIG_ARCH_OMAP4)
42#define PHYS_OFFSET UL(0x80000000) 43#define PHYS_OFFSET UL(0x80000000)
43#endif 44#endif
44 45
diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h
new file mode 100644
index 000000000000..15dec7f1c7c0
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap44xx.h
@@ -0,0 +1,46 @@
1/*:
2 * Address mappings and base address for OMAP4 interconnects
3 * and peripherals.
4 *
5 * Copyright (C) 2009 Texas Instruments
6 *
7 * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#ifndef __ASM_ARCH_OMAP44XX_H
14#define __ASM_ARCH_OMAP44XX_H
15
16/*
17 * Please place only base defines here and put the rest in device
18 * specific headers.
19 */
20#define L4_44XX_BASE 0x4a000000
21#define L4_WK_44XX_BASE 0x4a300000
22#define L4_PER_44XX_BASE 0x48000000
23#define L4_EMU_44XX_BASE 0x54000000
24#define L3_44XX_BASE 0x44000000
25#define OMAP4430_32KSYNCT_BASE 0x4a304000
26#define OMAP4430_CM_BASE 0x4a004000
27#define OMAP4430_PRM_BASE 0x48306000
28#define OMAP44XX_GPMC_BASE 0x50000000
29#define OMAP443X_SCM_BASE 0x4a002000
30#define OMAP443X_CTRL_BASE OMAP443X_SCM_BASE
31#define OMAP44XX_IC_BASE 0x48200000
32#define OMAP44XX_IVA_INTC_BASE 0x40000000
33#define IRQ_SIR_IRQ 0x0040
34#define OMAP44XX_GIC_DIST_BASE 0x48241000
35#define OMAP44XX_GIC_CPU_BASE 0x48240100
36#define OMAP44XX_VA_GIC_CPU_BASE IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
37#define OMAP44XX_SCU_BASE 0x48240000
38#define OMAP44XX_VA_SCU_BASE IO_ADDRESS(OMAP44XX_SCU_BASE)
39#define OMAP44XX_LOCAL_TWD_BASE 0x48240600
40#define OMAP44XX_VA_LOCAL_TWD_BASE IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
41#define OMAP44XX_LOCAL_TWD_SIZE 0x00000100
42#define OMAP44XX_WKUPGEN_BASE 0x48281000
43#define OMAP44XX_VA_WKUPGEN_BASE IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
44
45#endif /* __ASM_ARCH_OMAP44XX_H */
46
diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h
index 8e895858b3e3..13abd02d1527 100644
--- a/arch/arm/plat-omap/include/mach/serial.h
+++ b/arch/arm/plat-omap/include/mach/serial.h
@@ -1,5 +1,8 @@
1/* 1/*
2 * arch/arm/plat-omap/include/mach/serial.h 2 * arch/arm/plat-omap/include/mach/serial.h
3 *
4 * Copyright (C) 2009 Texas Instruments
5 * Addded OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
3 * 6 *
4 * This program is distributed in the hope that it will be useful, 7 * This program is distributed in the hope that it will be useful,
5 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -15,19 +18,28 @@
15#define OMAP_UART1_BASE 0xfffb0000 18#define OMAP_UART1_BASE 0xfffb0000
16#define OMAP_UART2_BASE 0xfffb0800 19#define OMAP_UART2_BASE 0xfffb0800
17#define OMAP_UART3_BASE 0xfffb9800 20#define OMAP_UART3_BASE 0xfffb9800
21#define OMAP_MAX_NR_PORTS 3
18#elif defined(CONFIG_ARCH_OMAP2) 22#elif defined(CONFIG_ARCH_OMAP2)
19/* OMAP2 serial ports */ 23/* OMAP2 serial ports */
20#define OMAP_UART1_BASE 0x4806a000 24#define OMAP_UART1_BASE 0x4806a000
21#define OMAP_UART2_BASE 0x4806c000 25#define OMAP_UART2_BASE 0x4806c000
22#define OMAP_UART3_BASE 0x4806e000 26#define OMAP_UART3_BASE 0x4806e000
27#define OMAP_MAX_NR_PORTS 3
23#elif defined(CONFIG_ARCH_OMAP3) 28#elif defined(CONFIG_ARCH_OMAP3)
24/* OMAP3 serial ports */ 29/* OMAP3 serial ports */
25#define OMAP_UART1_BASE 0x4806a000 30#define OMAP_UART1_BASE 0x4806a000
26#define OMAP_UART2_BASE 0x4806c000 31#define OMAP_UART2_BASE 0x4806c000
27#define OMAP_UART3_BASE 0x49020000 32#define OMAP_UART3_BASE 0x49020000
33#define OMAP_MAX_NR_PORTS 3
34#elif defined(CONFIG_ARCH_OMAP4)
35/* OMAP4 serial ports */
36#define OMAP_UART1_BASE 0x4806a000
37#define OMAP_UART2_BASE 0x4806c000
38#define OMAP_UART3_BASE 0x48020000
39#define OMAP_UART4_BASE 0x4806e000
40#define OMAP_MAX_NR_PORTS 4
28#endif 41#endif
29 42
30#define OMAP_MAX_NR_PORTS 3
31#define OMAP1510_BASE_BAUD (12000000/16) 43#define OMAP1510_BASE_BAUD (12000000/16)
32#define OMAP16XX_BASE_BAUD (48000000/16) 44#define OMAP16XX_BASE_BAUD (48000000/16)
33#define OMAP24XX_BASE_BAUD (48000000/16) 45#define OMAP24XX_BASE_BAUD (48000000/16)
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
index af326efc1ad3..9b42d72d96cf 100644
--- a/arch/arm/plat-omap/io.c
+++ b/arch/arm/plat-omap/io.c
@@ -1,3 +1,14 @@
1/*
2 * Common io.c file
3 * This file is created by Russell King <rmk+kernel@arm.linux.org.uk>
4 *
5 * Copyright (C) 2009 Texas Instruments
6 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
1#include <linux/module.h> 12#include <linux/module.h>
2#include <linux/io.h> 13#include <linux/io.h>
3#include <linux/mm.h> 14#include <linux/mm.h>
@@ -7,6 +18,7 @@
7#include <mach/omap16xx.h> 18#include <mach/omap16xx.h>
8#include <mach/omap24xx.h> 19#include <mach/omap24xx.h>
9#include <mach/omap34xx.h> 20#include <mach/omap34xx.h>
21#include <mach/omap44xx.h>
10 22
11#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz))) 23#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz)))
12#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst))) 24#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst)))
@@ -92,7 +104,22 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
92 return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT); 104 return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT);
93 } 105 }
94#endif 106#endif
95 107#ifdef CONFIG_ARCH_OMAP4
108 if (cpu_is_omap44xx()) {
109 if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE))
110 return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT);
111 if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE))
112 return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT);
113 if (BETWEEN(p, L4_WK_44XX_PHYS, L4_WK_44XX_SIZE))
114 return XLATE(p, L4_WK_44XX_PHYS, L4_WK_44XX_VIRT);
115 if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
116 return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT);
117 if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE))
118 return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT);
119 if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE))
120 return XLATE(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_VIRT);
121 }
122#endif
96 return __arm_ioremap(p, size, type); 123 return __arm_ioremap(p, size, type);
97} 124}
98EXPORT_SYMBOL(omap_ioremap); 125EXPORT_SYMBOL(omap_ioremap);
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index 80b040fd5ca7..8d329fb20740 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -54,6 +54,9 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
54{ 54{
55 struct pin_config *reg; 55 struct pin_config *reg;
56 56
57 if (cpu_is_omap44xx())
58 return 0;
59
57 if (mux_cfg == NULL) { 60 if (mux_cfg == NULL) {
58 printk(KERN_ERR "Pin mux table not initialized\n"); 61 printk(KERN_ERR "Pin mux table not initialized\n");
59 return -ENODEV; 62 return -ENODEV;
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index bd44d1a9df9c..a5b9bcd6b108 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -6,6 +6,9 @@
6 * Copyright (C) 2005 Nokia Corporation 6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com> 7 * Written by Tony Lindgren <tony@atomide.com>
8 * 8 *
9 * Copyright (C) 2009 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
9 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
@@ -44,6 +47,8 @@
44#define OMAP3_SRAM_VA 0xd7000000 47#define OMAP3_SRAM_VA 0xd7000000
45#define OMAP3_SRAM_PUB_PA 0x40208000 48#define OMAP3_SRAM_PUB_PA 0x40208000
46#define OMAP3_SRAM_PUB_VA 0xd7008000 49#define OMAP3_SRAM_PUB_VA 0xd7008000
50#define OMAP4_SRAM_PA 0x40200000 /*0x402f0000*/
51#define OMAP4_SRAM_VA 0xd7000000 /*0xd70f0000*/
47 52
48#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 53#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
49#define SRAM_BOOTLOADER_SZ 0x00 54#define SRAM_BOOTLOADER_SZ 0x00
@@ -87,6 +92,10 @@ static int is_sram_locked(void)
87{ 92{
88 int type = 0; 93 int type = 0;
89 94
95 if (cpu_is_omap44xx())
96 /* Not yet supported */
97 return 0;
98
90 if (cpu_is_omap242x()) 99 if (cpu_is_omap242x())
91 type = omap_rev() & OMAP2_DEVICETYPE_MASK; 100 type = omap_rev() & OMAP2_DEVICETYPE_MASK;
92 101
@@ -135,6 +144,10 @@ void __init omap_detect_sram(void)
135 omap_sram_base = OMAP3_SRAM_VA; 144 omap_sram_base = OMAP3_SRAM_VA;
136 omap_sram_start = OMAP3_SRAM_PA; 145 omap_sram_start = OMAP3_SRAM_PA;
137 omap_sram_size = 0x10000; /* 64K */ 146 omap_sram_size = 0x10000; /* 64K */
147 } else if (cpu_is_omap44xx()) {
148 omap_sram_base = OMAP4_SRAM_VA;
149 omap_sram_start = OMAP4_SRAM_PA;
150 omap_sram_size = 0x8000; /* 32K */
138 } else { 151 } else {
139 omap_sram_base = OMAP2_SRAM_VA; 152 omap_sram_base = OMAP2_SRAM_VA;
140 omap_sram_start = OMAP2_SRAM_PA; 153 omap_sram_start = OMAP2_SRAM_PA;
@@ -212,6 +225,12 @@ void __init omap_map_sram(void)
212 omap_sram_io_desc[0].type = MT_MEMORY_NONCACHED; 225 omap_sram_io_desc[0].type = MT_MEMORY_NONCACHED;
213 } 226 }
214 227
228 if (cpu_is_omap44xx()) {
229 omap_sram_io_desc[0].virtual = OMAP4_SRAM_VA;
230 base = OMAP4_SRAM_PA;
231 base = ROUND_DOWN(base, PAGE_SIZE);
232 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
233 }
215 omap_sram_io_desc[0].length = 1024 * 1024; /* Use section desc */ 234 omap_sram_io_desc[0].length = 1024 * 1024; /* Use section desc */
216 iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc)); 235 iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
217 236
@@ -401,6 +420,8 @@ int __init omap_sram_init(void)
401 omap243x_sram_init(); 420 omap243x_sram_init();
402 else if (cpu_is_omap34xx()) 421 else if (cpu_is_omap34xx())
403 omap34xx_sram_init(); 422 omap34xx_sram_init();
423 else if (cpu_is_omap44xx())
424 omap34xx_sram_init(); /* FIXME: */
404 425
405 return 0; 426 return 0;
406} 427}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-19 03:44:17 -0500