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authorMagnus Damm <damm@igel.co.jp>2009-05-11 05:06:24 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-05-11 05:45:52 -0400
commitc42f32dca3855d8f867387ec6993d9b62516a00e (patch)
treea36071e210220360a5a0074d6d2e1263efa2e2ca /arch
parent03f408f1aad8d0f5eb6380732bffc0f72b250fa7 (diff)
sh: TMU platform data for sh7760
This patch adds TMU platform data for sh7760. Both clockevent and clocksource support is enabled. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c109
1 files changed, 109 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index d9bdc931ac09..4a6fd0d3c7bc 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -10,6 +10,7 @@
10#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <linux/sh_timer.h>
13#include <linux/serial_sci.h> 14#include <linux/serial_sci.h>
14#include <linux/io.h> 15#include <linux/io.h>
15 16
@@ -168,8 +169,104 @@ static struct platform_device sci_device = {
168 }, 169 },
169}; 170};
170 171
172static struct sh_timer_config tmu0_platform_data = {
173 .name = "TMU0",
174 .channel_offset = 0x04,
175 .timer_bit = 0,
176 .clk = "module_clk",
177 .clockevent_rating = 200,
178};
179
180static struct resource tmu0_resources[] = {
181 [0] = {
182 .name = "TMU0",
183 .start = 0xffd80008,
184 .end = 0xffd80013,
185 .flags = IORESOURCE_MEM,
186 },
187 [1] = {
188 .start = 16,
189 .flags = IORESOURCE_IRQ,
190 },
191};
192
193static struct platform_device tmu0_device = {
194 .name = "sh_tmu",
195 .id = 0,
196 .dev = {
197 .platform_data = &tmu0_platform_data,
198 },
199 .resource = tmu0_resources,
200 .num_resources = ARRAY_SIZE(tmu0_resources),
201};
202
203static struct sh_timer_config tmu1_platform_data = {
204 .name = "TMU1",
205 .channel_offset = 0x10,
206 .timer_bit = 1,
207 .clk = "module_clk",
208 .clocksource_rating = 200,
209};
210
211static struct resource tmu1_resources[] = {
212 [0] = {
213 .name = "TMU1",
214 .start = 0xffd80014,
215 .end = 0xffd8001f,
216 .flags = IORESOURCE_MEM,
217 },
218 [1] = {
219 .start = 17,
220 .flags = IORESOURCE_IRQ,
221 },
222};
223
224static struct platform_device tmu1_device = {
225 .name = "sh_tmu",
226 .id = 1,
227 .dev = {
228 .platform_data = &tmu1_platform_data,
229 },
230 .resource = tmu1_resources,
231 .num_resources = ARRAY_SIZE(tmu1_resources),
232};
233
234static struct sh_timer_config tmu2_platform_data = {
235 .name = "TMU2",
236 .channel_offset = 0x1c,
237 .timer_bit = 2,
238 .clk = "module_clk",
239};
240
241static struct resource tmu2_resources[] = {
242 [0] = {
243 .name = "TMU2",
244 .start = 0xffd80020,
245 .end = 0xffd8002f,
246 .flags = IORESOURCE_MEM,
247 },
248 [1] = {
249 .start = 18,
250 .flags = IORESOURCE_IRQ,
251 },
252};
253
254static struct platform_device tmu2_device = {
255 .name = "sh_tmu",
256 .id = 2,
257 .dev = {
258 .platform_data = &tmu2_platform_data,
259 },
260 .resource = tmu2_resources,
261 .num_resources = ARRAY_SIZE(tmu2_resources),
262};
263
264
171static struct platform_device *sh7760_devices[] __initdata = { 265static struct platform_device *sh7760_devices[] __initdata = {
172 &sci_device, 266 &sci_device,
267 &tmu0_device,
268 &tmu1_device,
269 &tmu2_device,
173}; 270};
174 271
175static int __init sh7760_devices_setup(void) 272static int __init sh7760_devices_setup(void)
@@ -179,6 +276,18 @@ static int __init sh7760_devices_setup(void)
179} 276}
180__initcall(sh7760_devices_setup); 277__initcall(sh7760_devices_setup);
181 278
279static struct platform_device *sh7760_early_devices[] __initdata = {
280 &tmu0_device,
281 &tmu1_device,
282 &tmu2_device,
283};
284
285void __init plat_early_device_setup(void)
286{
287 early_platform_add_devices(sh7760_early_devices,
288 ARRAY_SIZE(sh7760_early_devices));
289}
290
182#define INTC_ICR 0xffd00000UL 291#define INTC_ICR 0xffd00000UL
183#define INTC_ICR_IRLM (1 << 7) 292#define INTC_ICR_IRLM (1 << 7)
184 293