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authorJack Steiner <steiner@sgi.com>2010-03-11 13:43:29 -0500
committerIngo Molnar <mingo@elte.hu>2010-03-12 04:19:29 -0500
commit8447b360a3897bdfb0677107564d1dd9ab6e63be (patch)
tree0763a416221c1e26051119766a5d068920697e4f /arch
parentd6dd692168c049196f54edc2e8227c60702bb1d2 (diff)
x86, UV: Fix target_cpus() in x2apic_uv_x.c
target_cpu() should initially target all cpus, not just cpu 0. Otherwise systems with lots of disks can exhaust the interrupt vectors on cpu 0 if a large number of disks are discovered before the irq balancer is running. Note: UV code only... Signed-off-by: Jack Steiner <steiner@sgi.com> LKML-Reference: <20100311184328.GA21433@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 21db3cbea7dc..af0ca80e38a9 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -114,11 +114,9 @@ EXPORT_SYMBOL_GPL(uv_possible_blades);
114unsigned long sn_rtc_cycles_per_second; 114unsigned long sn_rtc_cycles_per_second;
115EXPORT_SYMBOL(sn_rtc_cycles_per_second); 115EXPORT_SYMBOL(sn_rtc_cycles_per_second);
116 116
117/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
118
119static const struct cpumask *uv_target_cpus(void) 117static const struct cpumask *uv_target_cpus(void)
120{ 118{
121 return cpumask_of(0); 119 return cpu_online_mask;
122} 120}
123 121
124static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask) 122static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask)