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authorSam Ravnborg <sam@ravnborg.org>2007-09-17 22:02:57 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-14 00:53:10 -0400
commit72be7e542c67a5a134e99ba19d1846498ef8f9d2 (patch)
tree6b07e9617f81da05f7bce103722661fbe93de594 /arch
parentbcbe40ebdd6ab832793448c8e611cfa904968e9a (diff)
[SPARC64]: beautify vmlinux.lds
Apply a consistent format to vmlinux.lds. The file is now to some degree readable. In addition move several labels inside the braces such that they reflect the actual start address of a section. Without this the label would not reflect if ld added alignment. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/sparc64/kernel/vmlinux.lds.S211
1 files changed, 122 insertions, 89 deletions
diff --git a/arch/sparc64/kernel/vmlinux.lds.S b/arch/sparc64/kernel/vmlinux.lds.S
index b982fa3dd748..9fcd503bc04a 100644
--- a/arch/sparc64/kernel/vmlinux.lds.S
+++ b/arch/sparc64/kernel/vmlinux.lds.S
@@ -10,105 +10,138 @@ ENTRY(_start)
10jiffies = jiffies_64; 10jiffies = jiffies_64;
11SECTIONS 11SECTIONS
12{ 12{
13 swapper_low_pmd_dir = 0x0000000000402000; 13 swapper_low_pmd_dir = 0x0000000000402000;
14 . = 0x4000; 14 . = 0x4000;
15 .text 0x0000000000404000 : 15 .text 0x0000000000404000 : {
16 { 16 _text = .;
17 _text = .; 17 TEXT_TEXT
18 TEXT_TEXT 18 SCHED_TEXT
19 SCHED_TEXT 19 LOCK_TEXT
20 LOCK_TEXT 20 KPROBES_TEXT
21 KPROBES_TEXT 21 *(.gnu.warning)
22 *(.gnu.warning) 22 } = 0
23 } =0 23 _etext = .;
24 _etext = .; 24 PROVIDE (etext = .);
25 PROVIDE (etext = .);
26 25
27 RO_DATA(PAGE_SIZE) 26 RO_DATA(PAGE_SIZE)
27 .data : {
28 DATA_DATA
29 CONSTRUCTORS
30 }
31 .data1 : {
32 *(.data1)
33 }
34 . = ALIGN(64);
35 .data.cacheline_aligned : {
36 *(.data.cacheline_aligned)
37 }
38 . = ALIGN(64);
39 .data.read_mostly : {
40 *(.data.read_mostly)
41 }
42 _edata = .;
43 PROVIDE (edata = .);
44 .fixup : {
45 *(.fixup)
46 }
47 . = ALIGN(16);
48 __ex_table : {
49 __start___ex_table = .;
50 *(__ex_table)
51 __stop___ex_table = .;
52 }
53 NOTES
28 54
29 .data : 55 . = ALIGN(PAGE_SIZE);
30 { 56 .init.text : {
31 DATA_DATA 57 __init_begin = .;
32 CONSTRUCTORS 58 _sinittext = .;
33 } 59 *(.init.text)
34 .data1 : { *(.data1) } 60 _einittext = .;
35 . = ALIGN(64); 61 }
36 .data.cacheline_aligned : { *(.data.cacheline_aligned) } 62 .init.data : {
37 . = ALIGN(64); 63 *(.init.data)
38 .data.read_mostly : { *(.data.read_mostly) } 64 }
39 _edata = .; 65 . = ALIGN(16);
40 PROVIDE (edata = .); 66 .init.setup : {
41 .fixup : { *(.fixup) } 67 __setup_start = .;
68 *(.init.setup)
69 __setup_end = .;
70 }
71 .initcall.init : {
72 __initcall_start = .;
73 INITCALLS
74 __initcall_end = .;
75 }
76 .con_initcall.init : {
77 __con_initcall_start = .;
78 *(.con_initcall.init)
79 __con_initcall_end = .;
80 }
81 SECURITY_INIT
42 82
43 . = ALIGN(16); 83 . = ALIGN(4);
44 __start___ex_table = .; 84 .tsb_ldquad_phys_patch : {
45 __ex_table : { *(__ex_table) } 85 __tsb_ldquad_phys_patch = .;
46 __stop___ex_table = .; 86 *(.tsb_ldquad_phys_patch)
87 __tsb_ldquad_phys_patch_end = .;
88 }
47 89
48 NOTES 90 .tsb_phys_patch : {
91 __tsb_phys_patch = .;
92 *(.tsb_phys_patch)
93 __tsb_phys_patch_end = .;
94 }
49 95
50 . = ALIGN(PAGE_SIZE); 96 .cpuid_patch : {
51 __init_begin = .; 97 __cpuid_patch = .;
52 .init.text : { 98 *(.cpuid_patch)
53 _sinittext = .; 99 __cpuid_patch_end = .;
54 *(.init.text) 100 }
55 _einittext = .; 101
56 } 102 .sun4v_1insn_patch : {
57 .init.data : { *(.init.data) } 103 __sun4v_1insn_patch = .;
58 . = ALIGN(16); 104 *(.sun4v_1insn_patch)
59 __setup_start = .; 105 __sun4v_1insn_patch_end = .;
60 .init.setup : { *(.init.setup) } 106 }
61 __setup_end = .; 107 .sun4v_2insn_patch : {
62 __initcall_start = .; 108 __sun4v_2insn_patch = .;
63 .initcall.init : { 109 *(.sun4v_2insn_patch)
64 INITCALLS 110 __sun4v_2insn_patch_end = .;
65 } 111 }
66 __initcall_end = .;
67 __con_initcall_start = .;
68 .con_initcall.init : { *(.con_initcall.init) }
69 __con_initcall_end = .;
70 SECURITY_INIT
71 . = ALIGN(4);
72 __tsb_ldquad_phys_patch = .;
73 .tsb_ldquad_phys_patch : { *(.tsb_ldquad_phys_patch) }
74 __tsb_ldquad_phys_patch_end = .;
75 __tsb_phys_patch = .;
76 .tsb_phys_patch : { *(.tsb_phys_patch) }
77 __tsb_phys_patch_end = .;
78 __cpuid_patch = .;
79 .cpuid_patch : { *(.cpuid_patch) }
80 __cpuid_patch_end = .;
81 __sun4v_1insn_patch = .;
82 .sun4v_1insn_patch : { *(.sun4v_1insn_patch) }
83 __sun4v_1insn_patch_end = .;
84 __sun4v_2insn_patch = .;
85 .sun4v_2insn_patch : { *(.sun4v_2insn_patch) }
86 __sun4v_2insn_patch_end = .;
87 112
88#ifdef CONFIG_BLK_DEV_INITRD 113#ifdef CONFIG_BLK_DEV_INITRD
89 . = ALIGN(PAGE_SIZE); 114 . = ALIGN(PAGE_SIZE);
90 __initramfs_start = .; 115 .init.ramfs : {
91 .init.ramfs : { *(.init.ramfs) } 116 __initramfs_start = .;
92 __initramfs_end = .; 117 *(.init.ramfs)
118 __initramfs_end = .;
119 }
93#endif 120#endif
94 121
95 PERCPU(PAGE_SIZE) 122 PERCPU(PAGE_SIZE)
96 123
97 . = ALIGN(PAGE_SIZE); 124 . = ALIGN(PAGE_SIZE);
98 __init_end = .; 125 __init_end = .;
99 __bss_start = .; 126 __bss_start = .;
100 .sbss : { *(.sbss) *(.scommon) } 127 .sbss : {
101 .bss : 128 *(.sbss)
102 { 129 *(.scommon)
103 *(.dynbss) 130 }
104 *(.bss) 131 .bss : {
105 *(COMMON) 132 *(.dynbss)
106 } 133 *(.bss)
107 _end = . ; 134 *(COMMON)
108 PROVIDE (end = .); 135 }
109 /DISCARD/ : { *(.exit.text) *(.exit.data) *(.exitcall.exit) } 136 _end = . ;
137 PROVIDE (end = .);
110 138
111 STABS_DEBUG 139 /DISCARD/ : {
140 *(.exit.text)
141 *(.exit.data)
142 *(.exitcall.exit)
143 }
112 144
113 DWARF_DEBUG 145 STABS_DEBUG
146 DWARF_DEBUG
114} 147}