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authorThomas Gleixner <tglx@linutronix.de>2009-08-27 10:42:07 -0400
committerThomas Gleixner <tglx@linutronix.de>2009-08-27 10:42:32 -0400
commit6effcd92454ca5d7021b74f89fcac75209e146f9 (patch)
tree6a3ebef5074ca4721f8f36fe85b9287a16ba2a01 /arch
parent10f02d1168585edf66229bb2ec90a42f32667a78 (diff)
parentac5672f82c39ff2f8dce81bf3e68b1dfc41f366f (diff)
Merge branch 'x86/paravirt' into x86/cleanups
Reason: The setup cleanups conflict with the paravirt cleanups. Avoid a rather large merge conflict Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/paravirt.h711
-rw-r--r--arch/x86/include/asm/paravirt_types.h720
2 files changed, 721 insertions, 710 deletions
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 4fb37c8a0832..6a07af432c81 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -7,689 +7,11 @@
7#include <asm/pgtable_types.h> 7#include <asm/pgtable_types.h>
8#include <asm/asm.h> 8#include <asm/asm.h>
9 9
10/* Bitmask of what can be clobbered: usually at least eax. */ 10#include <asm/paravirt_types.h>
11#define CLBR_NONE 0
12#define CLBR_EAX (1 << 0)
13#define CLBR_ECX (1 << 1)
14#define CLBR_EDX (1 << 2)
15#define CLBR_EDI (1 << 3)
16
17#ifdef CONFIG_X86_32
18/* CLBR_ANY should match all regs platform has. For i386, that's just it */
19#define CLBR_ANY ((1 << 4) - 1)
20
21#define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
22#define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
23#define CLBR_SCRATCH (0)
24#else
25#define CLBR_RAX CLBR_EAX
26#define CLBR_RCX CLBR_ECX
27#define CLBR_RDX CLBR_EDX
28#define CLBR_RDI CLBR_EDI
29#define CLBR_RSI (1 << 4)
30#define CLBR_R8 (1 << 5)
31#define CLBR_R9 (1 << 6)
32#define CLBR_R10 (1 << 7)
33#define CLBR_R11 (1 << 8)
34
35#define CLBR_ANY ((1 << 9) - 1)
36
37#define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
38 CLBR_RCX | CLBR_R8 | CLBR_R9)
39#define CLBR_RET_REG (CLBR_RAX)
40#define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
41
42#include <asm/desc_defs.h>
43#endif /* X86_64 */
44
45#define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
46 11
47#ifndef __ASSEMBLY__ 12#ifndef __ASSEMBLY__
48#include <linux/types.h> 13#include <linux/types.h>
49#include <linux/cpumask.h> 14#include <linux/cpumask.h>
50#include <asm/kmap_types.h>
51#include <asm/desc_defs.h>
52
53struct page;
54struct thread_struct;
55struct desc_ptr;
56struct tss_struct;
57struct mm_struct;
58struct desc_struct;
59struct task_struct;
60
61/*
62 * Wrapper type for pointers to code which uses the non-standard
63 * calling convention. See PV_CALL_SAVE_REGS_THUNK below.
64 */
65struct paravirt_callee_save {
66 void *func;
67};
68
69/* general info */
70struct pv_info {
71 unsigned int kernel_rpl;
72 int shared_kernel_pmd;
73 int paravirt_enabled;
74 const char *name;
75};
76
77struct pv_init_ops {
78 /*
79 * Patch may replace one of the defined code sequences with
80 * arbitrary code, subject to the same register constraints.
81 * This generally means the code is not free to clobber any
82 * registers other than EAX. The patch function should return
83 * the number of bytes of code generated, as we nop pad the
84 * rest in generic code.
85 */
86 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
87 unsigned long addr, unsigned len);
88
89 /* Basic arch-specific setup */
90 void (*arch_setup)(void);
91 char *(*memory_setup)(void);
92 void (*post_allocator_init)(void);
93
94 /* Print a banner to identify the environment */
95 void (*banner)(void);
96};
97
98
99struct pv_lazy_ops {
100 /* Set deferred update mode, used for batching operations. */
101 void (*enter)(void);
102 void (*leave)(void);
103};
104
105struct pv_time_ops {
106 void (*time_init)(void);
107
108 /* Set and set time of day */
109 unsigned long (*get_wallclock)(void);
110 int (*set_wallclock)(unsigned long);
111
112 unsigned long long (*sched_clock)(void);
113 unsigned long (*get_tsc_khz)(void);
114};
115
116struct pv_cpu_ops {
117 /* hooks for various privileged instructions */
118 unsigned long (*get_debugreg)(int regno);
119 void (*set_debugreg)(int regno, unsigned long value);
120
121 void (*clts)(void);
122
123 unsigned long (*read_cr0)(void);
124 void (*write_cr0)(unsigned long);
125
126 unsigned long (*read_cr4_safe)(void);
127 unsigned long (*read_cr4)(void);
128 void (*write_cr4)(unsigned long);
129
130#ifdef CONFIG_X86_64
131 unsigned long (*read_cr8)(void);
132 void (*write_cr8)(unsigned long);
133#endif
134
135 /* Segment descriptor handling */
136 void (*load_tr_desc)(void);
137 void (*load_gdt)(const struct desc_ptr *);
138 void (*load_idt)(const struct desc_ptr *);
139 void (*store_gdt)(struct desc_ptr *);
140 void (*store_idt)(struct desc_ptr *);
141 void (*set_ldt)(const void *desc, unsigned entries);
142 unsigned long (*store_tr)(void);
143 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
144#ifdef CONFIG_X86_64
145 void (*load_gs_index)(unsigned int idx);
146#endif
147 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
148 const void *desc);
149 void (*write_gdt_entry)(struct desc_struct *,
150 int entrynum, const void *desc, int size);
151 void (*write_idt_entry)(gate_desc *,
152 int entrynum, const gate_desc *gate);
153 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
154 void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
155
156 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
157
158 void (*set_iopl_mask)(unsigned mask);
159
160 void (*wbinvd)(void);
161 void (*io_delay)(void);
162
163 /* cpuid emulation, mostly so that caps bits can be disabled */
164 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
165 unsigned int *ecx, unsigned int *edx);
166
167 /* MSR, PMC and TSR operations.
168 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
169 u64 (*read_msr_amd)(unsigned int msr, int *err);
170 u64 (*read_msr)(unsigned int msr, int *err);
171 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
172
173 u64 (*read_tsc)(void);
174 u64 (*read_pmc)(int counter);
175 unsigned long long (*read_tscp)(unsigned int *aux);
176
177 /*
178 * Atomically enable interrupts and return to userspace. This
179 * is only ever used to return to 32-bit processes; in a
180 * 64-bit kernel, it's used for 32-on-64 compat processes, but
181 * never native 64-bit processes. (Jump, not call.)
182 */
183 void (*irq_enable_sysexit)(void);
184
185 /*
186 * Switch to usermode gs and return to 64-bit usermode using
187 * sysret. Only used in 64-bit kernels to return to 64-bit
188 * processes. Usermode register state, including %rsp, must
189 * already be restored.
190 */
191 void (*usergs_sysret64)(void);
192
193 /*
194 * Switch to usermode gs and return to 32-bit usermode using
195 * sysret. Used to return to 32-on-64 compat processes.
196 * Other usermode register state, including %esp, must already
197 * be restored.
198 */
199 void (*usergs_sysret32)(void);
200
201 /* Normal iret. Jump to this with the standard iret stack
202 frame set up. */
203 void (*iret)(void);
204
205 void (*swapgs)(void);
206
207 void (*start_context_switch)(struct task_struct *prev);
208 void (*end_context_switch)(struct task_struct *next);
209};
210
211struct pv_irq_ops {
212 void (*init_IRQ)(void);
213
214 /*
215 * Get/set interrupt state. save_fl and restore_fl are only
216 * expected to use X86_EFLAGS_IF; all other bits
217 * returned from save_fl are undefined, and may be ignored by
218 * restore_fl.
219 *
220 * NOTE: These functions callers expect the callee to preserve
221 * more registers than the standard C calling convention.
222 */
223 struct paravirt_callee_save save_fl;
224 struct paravirt_callee_save restore_fl;
225 struct paravirt_callee_save irq_disable;
226 struct paravirt_callee_save irq_enable;
227
228 void (*safe_halt)(void);
229 void (*halt)(void);
230
231#ifdef CONFIG_X86_64
232 void (*adjust_exception_frame)(void);
233#endif
234};
235
236struct pv_apic_ops {
237#ifdef CONFIG_X86_LOCAL_APIC
238 void (*setup_boot_clock)(void);
239 void (*setup_secondary_clock)(void);
240
241 void (*startup_ipi_hook)(int phys_apicid,
242 unsigned long start_eip,
243 unsigned long start_esp);
244#endif
245};
246
247struct pv_mmu_ops {
248 /*
249 * Called before/after init_mm pagetable setup. setup_start
250 * may reset %cr3, and may pre-install parts of the pagetable;
251 * pagetable setup is expected to preserve any existing
252 * mapping.
253 */
254 void (*pagetable_setup_start)(pgd_t *pgd_base);
255 void (*pagetable_setup_done)(pgd_t *pgd_base);
256
257 unsigned long (*read_cr2)(void);
258 void (*write_cr2)(unsigned long);
259
260 unsigned long (*read_cr3)(void);
261 void (*write_cr3)(unsigned long);
262
263 /*
264 * Hooks for intercepting the creation/use/destruction of an
265 * mm_struct.
266 */
267 void (*activate_mm)(struct mm_struct *prev,
268 struct mm_struct *next);
269 void (*dup_mmap)(struct mm_struct *oldmm,
270 struct mm_struct *mm);
271 void (*exit_mmap)(struct mm_struct *mm);
272
273
274 /* TLB operations */
275 void (*flush_tlb_user)(void);
276 void (*flush_tlb_kernel)(void);
277 void (*flush_tlb_single)(unsigned long addr);
278 void (*flush_tlb_others)(const struct cpumask *cpus,
279 struct mm_struct *mm,
280 unsigned long va);
281
282 /* Hooks for allocating and freeing a pagetable top-level */
283 int (*pgd_alloc)(struct mm_struct *mm);
284 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
285
286 /*
287 * Hooks for allocating/releasing pagetable pages when they're
288 * attached to a pagetable
289 */
290 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
291 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
292 void (*alloc_pmd_clone)(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count);
293 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
294 void (*release_pte)(unsigned long pfn);
295 void (*release_pmd)(unsigned long pfn);
296 void (*release_pud)(unsigned long pfn);
297
298 /* Pagetable manipulation functions */
299 void (*set_pte)(pte_t *ptep, pte_t pteval);
300 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
301 pte_t *ptep, pte_t pteval);
302 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
303 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
304 pte_t *ptep);
305 void (*pte_update_defer)(struct mm_struct *mm,
306 unsigned long addr, pte_t *ptep);
307
308 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
309 pte_t *ptep);
310 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
311 pte_t *ptep, pte_t pte);
312
313 struct paravirt_callee_save pte_val;
314 struct paravirt_callee_save make_pte;
315
316 struct paravirt_callee_save pgd_val;
317 struct paravirt_callee_save make_pgd;
318
319#if PAGETABLE_LEVELS >= 3
320#ifdef CONFIG_X86_PAE
321 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
322 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
323 pte_t *ptep);
324 void (*pmd_clear)(pmd_t *pmdp);
325
326#endif /* CONFIG_X86_PAE */
327
328 void (*set_pud)(pud_t *pudp, pud_t pudval);
329
330 struct paravirt_callee_save pmd_val;
331 struct paravirt_callee_save make_pmd;
332
333#if PAGETABLE_LEVELS == 4
334 struct paravirt_callee_save pud_val;
335 struct paravirt_callee_save make_pud;
336
337 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
338#endif /* PAGETABLE_LEVELS == 4 */
339#endif /* PAGETABLE_LEVELS >= 3 */
340
341#ifdef CONFIG_HIGHPTE
342 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
343#endif
344
345 struct pv_lazy_ops lazy_mode;
346
347 /* dom0 ops */
348
349 /* Sometimes the physical address is a pfn, and sometimes its
350 an mfn. We can tell which is which from the index. */
351 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
352 phys_addr_t phys, pgprot_t flags);
353};
354
355struct raw_spinlock;
356struct pv_lock_ops {
357 int (*spin_is_locked)(struct raw_spinlock *lock);
358 int (*spin_is_contended)(struct raw_spinlock *lock);
359 void (*spin_lock)(struct raw_spinlock *lock);
360 void (*spin_lock_flags)(struct raw_spinlock *lock, unsigned long flags);
361 int (*spin_trylock)(struct raw_spinlock *lock);
362 void (*spin_unlock)(struct raw_spinlock *lock);
363};
364
365/* This contains all the paravirt structures: we get a convenient
366 * number for each function using the offset which we use to indicate
367 * what to patch. */
368struct paravirt_patch_template {
369 struct pv_init_ops pv_init_ops;
370 struct pv_time_ops pv_time_ops;
371 struct pv_cpu_ops pv_cpu_ops;
372 struct pv_irq_ops pv_irq_ops;
373 struct pv_apic_ops pv_apic_ops;
374 struct pv_mmu_ops pv_mmu_ops;
375 struct pv_lock_ops pv_lock_ops;
376};
377
378extern struct pv_info pv_info;
379extern struct pv_init_ops pv_init_ops;
380extern struct pv_time_ops pv_time_ops;
381extern struct pv_cpu_ops pv_cpu_ops;
382extern struct pv_irq_ops pv_irq_ops;
383extern struct pv_apic_ops pv_apic_ops;
384extern struct pv_mmu_ops pv_mmu_ops;
385extern struct pv_lock_ops pv_lock_ops;
386
387#define PARAVIRT_PATCH(x) \
388 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
389
390#define paravirt_type(op) \
391 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
392 [paravirt_opptr] "i" (&(op))
393#define paravirt_clobber(clobber) \
394 [paravirt_clobber] "i" (clobber)
395
396/*
397 * Generate some code, and mark it as patchable by the
398 * apply_paravirt() alternate instruction patcher.
399 */
400#define _paravirt_alt(insn_string, type, clobber) \
401 "771:\n\t" insn_string "\n" "772:\n" \
402 ".pushsection .parainstructions,\"a\"\n" \
403 _ASM_ALIGN "\n" \
404 _ASM_PTR " 771b\n" \
405 " .byte " type "\n" \
406 " .byte 772b-771b\n" \
407 " .short " clobber "\n" \
408 ".popsection\n"
409
410/* Generate patchable code, with the default asm parameters. */
411#define paravirt_alt(insn_string) \
412 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
413
414/* Simple instruction patching code. */
415#define DEF_NATIVE(ops, name, code) \
416 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
417 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
418
419unsigned paravirt_patch_nop(void);
420unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
421unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
422unsigned paravirt_patch_ignore(unsigned len);
423unsigned paravirt_patch_call(void *insnbuf,
424 const void *target, u16 tgt_clobbers,
425 unsigned long addr, u16 site_clobbers,
426 unsigned len);
427unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
428 unsigned long addr, unsigned len);
429unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
430 unsigned long addr, unsigned len);
431
432unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
433 const char *start, const char *end);
434
435unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
436 unsigned long addr, unsigned len);
437
438int paravirt_disable_iospace(void);
439
440/*
441 * This generates an indirect call based on the operation type number.
442 * The type number, computed in PARAVIRT_PATCH, is derived from the
443 * offset into the paravirt_patch_template structure, and can therefore be
444 * freely converted back into a structure offset.
445 */
446#define PARAVIRT_CALL "call *%c[paravirt_opptr];"
447
448/*
449 * These macros are intended to wrap calls through one of the paravirt
450 * ops structs, so that they can be later identified and patched at
451 * runtime.
452 *
453 * Normally, a call to a pv_op function is a simple indirect call:
454 * (pv_op_struct.operations)(args...).
455 *
456 * Unfortunately, this is a relatively slow operation for modern CPUs,
457 * because it cannot necessarily determine what the destination
458 * address is. In this case, the address is a runtime constant, so at
459 * the very least we can patch the call to e a simple direct call, or
460 * ideally, patch an inline implementation into the callsite. (Direct
461 * calls are essentially free, because the call and return addresses
462 * are completely predictable.)
463 *
464 * For i386, these macros rely on the standard gcc "regparm(3)" calling
465 * convention, in which the first three arguments are placed in %eax,
466 * %edx, %ecx (in that order), and the remaining arguments are placed
467 * on the stack. All caller-save registers (eax,edx,ecx) are expected
468 * to be modified (either clobbered or used for return values).
469 * X86_64, on the other hand, already specifies a register-based calling
470 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
471 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
472 * special handling for dealing with 4 arguments, unlike i386.
473 * However, x86_64 also have to clobber all caller saved registers, which
474 * unfortunately, are quite a bit (r8 - r11)
475 *
476 * The call instruction itself is marked by placing its start address
477 * and size into the .parainstructions section, so that
478 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
479 * appropriate patching under the control of the backend pv_init_ops
480 * implementation.
481 *
482 * Unfortunately there's no way to get gcc to generate the args setup
483 * for the call, and then allow the call itself to be generated by an
484 * inline asm. Because of this, we must do the complete arg setup and
485 * return value handling from within these macros. This is fairly
486 * cumbersome.
487 *
488 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
489 * It could be extended to more arguments, but there would be little
490 * to be gained from that. For each number of arguments, there are
491 * the two VCALL and CALL variants for void and non-void functions.
492 *
493 * When there is a return value, the invoker of the macro must specify
494 * the return type. The macro then uses sizeof() on that type to
495 * determine whether its a 32 or 64 bit value, and places the return
496 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
497 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
498 * the return value size.
499 *
500 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
501 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
502 * in low,high order
503 *
504 * Small structures are passed and returned in registers. The macro
505 * calling convention can't directly deal with this, so the wrapper
506 * functions must do this.
507 *
508 * These PVOP_* macros are only defined within this header. This
509 * means that all uses must be wrapped in inline functions. This also
510 * makes sure the incoming and outgoing types are always correct.
511 */
512#ifdef CONFIG_X86_32
513#define PVOP_VCALL_ARGS \
514 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
515#define PVOP_CALL_ARGS PVOP_VCALL_ARGS
516
517#define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
518#define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
519#define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
520
521#define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
522 "=c" (__ecx)
523#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
524
525#define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
526#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
527
528#define EXTRA_CLOBBERS
529#define VEXTRA_CLOBBERS
530#else /* CONFIG_X86_64 */
531#define PVOP_VCALL_ARGS \
532 unsigned long __edi = __edi, __esi = __esi, \
533 __edx = __edx, __ecx = __ecx
534#define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
535
536#define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
537#define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
538#define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
539#define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
540
541#define PVOP_VCALL_CLOBBERS "=D" (__edi), \
542 "=S" (__esi), "=d" (__edx), \
543 "=c" (__ecx)
544#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
545
546#define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
547#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
548
549#define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
550#define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
551#endif /* CONFIG_X86_32 */
552
553#ifdef CONFIG_PARAVIRT_DEBUG
554#define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
555#else
556#define PVOP_TEST_NULL(op) ((void)op)
557#endif
558
559#define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
560 pre, post, ...) \
561 ({ \
562 rettype __ret; \
563 PVOP_CALL_ARGS; \
564 PVOP_TEST_NULL(op); \
565 /* This is 32-bit specific, but is okay in 64-bit */ \
566 /* since this condition will never hold */ \
567 if (sizeof(rettype) > sizeof(unsigned long)) { \
568 asm volatile(pre \
569 paravirt_alt(PARAVIRT_CALL) \
570 post \
571 : call_clbr \
572 : paravirt_type(op), \
573 paravirt_clobber(clbr), \
574 ##__VA_ARGS__ \
575 : "memory", "cc" extra_clbr); \
576 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
577 } else { \
578 asm volatile(pre \
579 paravirt_alt(PARAVIRT_CALL) \
580 post \
581 : call_clbr \
582 : paravirt_type(op), \
583 paravirt_clobber(clbr), \
584 ##__VA_ARGS__ \
585 : "memory", "cc" extra_clbr); \
586 __ret = (rettype)__eax; \
587 } \
588 __ret; \
589 })
590
591#define __PVOP_CALL(rettype, op, pre, post, ...) \
592 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
593 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
594
595#define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
596 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
597 PVOP_CALLEE_CLOBBERS, , \
598 pre, post, ##__VA_ARGS__)
599
600
601#define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
602 ({ \
603 PVOP_VCALL_ARGS; \
604 PVOP_TEST_NULL(op); \
605 asm volatile(pre \
606 paravirt_alt(PARAVIRT_CALL) \
607 post \
608 : call_clbr \
609 : paravirt_type(op), \
610 paravirt_clobber(clbr), \
611 ##__VA_ARGS__ \
612 : "memory", "cc" extra_clbr); \
613 })
614
615#define __PVOP_VCALL(op, pre, post, ...) \
616 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
617 VEXTRA_CLOBBERS, \
618 pre, post, ##__VA_ARGS__)
619
620#define __PVOP_VCALLEESAVE(rettype, op, pre, post, ...) \
621 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
622 PVOP_VCALLEE_CLOBBERS, , \
623 pre, post, ##__VA_ARGS__)
624
625
626
627#define PVOP_CALL0(rettype, op) \
628 __PVOP_CALL(rettype, op, "", "")
629#define PVOP_VCALL0(op) \
630 __PVOP_VCALL(op, "", "")
631
632#define PVOP_CALLEE0(rettype, op) \
633 __PVOP_CALLEESAVE(rettype, op, "", "")
634#define PVOP_VCALLEE0(op) \
635 __PVOP_VCALLEESAVE(op, "", "")
636
637
638#define PVOP_CALL1(rettype, op, arg1) \
639 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
640#define PVOP_VCALL1(op, arg1) \
641 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
642
643#define PVOP_CALLEE1(rettype, op, arg1) \
644 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
645#define PVOP_VCALLEE1(op, arg1) \
646 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
647
648
649#define PVOP_CALL2(rettype, op, arg1, arg2) \
650 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
651 PVOP_CALL_ARG2(arg2))
652#define PVOP_VCALL2(op, arg1, arg2) \
653 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
654 PVOP_CALL_ARG2(arg2))
655
656#define PVOP_CALLEE2(rettype, op, arg1, arg2) \
657 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
658 PVOP_CALL_ARG2(arg2))
659#define PVOP_VCALLEE2(op, arg1, arg2) \
660 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
661 PVOP_CALL_ARG2(arg2))
662
663
664#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
665 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
666 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
667#define PVOP_VCALL3(op, arg1, arg2, arg3) \
668 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
669 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
670
671/* This is the only difference in x86_64. We can make it much simpler */
672#ifdef CONFIG_X86_32
673#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
674 __PVOP_CALL(rettype, op, \
675 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
676 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
677 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
678#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
679 __PVOP_VCALL(op, \
680 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
681 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
682 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
683#else
684#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
685 __PVOP_CALL(rettype, op, "", "", \
686 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
687 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
688#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
689 __PVOP_VCALL(op, "", "", \
690 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
691 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
692#endif
693 15
694static inline int paravirt_enabled(void) 16static inline int paravirt_enabled(void)
695{ 17{
@@ -1393,20 +715,6 @@ static inline void pmd_clear(pmd_t *pmdp)
1393} 715}
1394#endif /* CONFIG_X86_PAE */ 716#endif /* CONFIG_X86_PAE */
1395 717
1396/* Lazy mode for batching updates / context switch */
1397enum paravirt_lazy_mode {
1398 PARAVIRT_LAZY_NONE,
1399 PARAVIRT_LAZY_MMU,
1400 PARAVIRT_LAZY_CPU,
1401};
1402
1403enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1404void paravirt_start_context_switch(struct task_struct *prev);
1405void paravirt_end_context_switch(struct task_struct *next);
1406
1407void paravirt_enter_lazy_mmu(void);
1408void paravirt_leave_lazy_mmu(void);
1409
1410#define __HAVE_ARCH_START_CONTEXT_SWITCH 718#define __HAVE_ARCH_START_CONTEXT_SWITCH
1411static inline void arch_start_context_switch(struct task_struct *prev) 719static inline void arch_start_context_switch(struct task_struct *prev)
1412{ 720{
@@ -1437,12 +745,6 @@ static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1437 pv_mmu_ops.set_fixmap(idx, phys, flags); 745 pv_mmu_ops.set_fixmap(idx, phys, flags);
1438} 746}
1439 747
1440void _paravirt_nop(void);
1441u32 _paravirt_ident_32(u32);
1442u64 _paravirt_ident_64(u64);
1443
1444#define paravirt_nop ((void *)_paravirt_nop)
1445
1446#if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS) 748#if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
1447 749
1448static inline int __raw_spin_is_locked(struct raw_spinlock *lock) 750static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
@@ -1479,17 +781,6 @@ static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
1479 781
1480#endif 782#endif
1481 783
1482/* These all sit in the .parainstructions section to tell us what to patch. */
1483struct paravirt_patch_site {
1484 u8 *instr; /* original instructions */
1485 u8 instrtype; /* type of this instruction */
1486 u8 len; /* length of original instruction */
1487 u16 clobbers; /* what registers you may clobber */
1488};
1489
1490extern struct paravirt_patch_site __parainstructions[],
1491 __parainstructions_end[];
1492
1493#ifdef CONFIG_X86_32 784#ifdef CONFIG_X86_32
1494#define PV_SAVE_REGS "pushl %ecx; pushl %edx;" 785#define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
1495#define PV_RESTORE_REGS "popl %edx; popl %ecx;" 786#define PV_RESTORE_REGS "popl %edx; popl %ecx;"
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
new file mode 100644
index 000000000000..2b3371bae295
--- /dev/null
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -0,0 +1,720 @@
1#ifndef _ASM_X86_PARAVIRT_TYPES_H
2#define _ASM_X86_PARAVIRT_TYPES_H
3
4/* Bitmask of what can be clobbered: usually at least eax. */
5#define CLBR_NONE 0
6#define CLBR_EAX (1 << 0)
7#define CLBR_ECX (1 << 1)
8#define CLBR_EDX (1 << 2)
9#define CLBR_EDI (1 << 3)
10
11#ifdef CONFIG_X86_32
12/* CLBR_ANY should match all regs platform has. For i386, that's just it */
13#define CLBR_ANY ((1 << 4) - 1)
14
15#define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
16#define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
17#define CLBR_SCRATCH (0)
18#else
19#define CLBR_RAX CLBR_EAX
20#define CLBR_RCX CLBR_ECX
21#define CLBR_RDX CLBR_EDX
22#define CLBR_RDI CLBR_EDI
23#define CLBR_RSI (1 << 4)
24#define CLBR_R8 (1 << 5)
25#define CLBR_R9 (1 << 6)
26#define CLBR_R10 (1 << 7)
27#define CLBR_R11 (1 << 8)
28
29#define CLBR_ANY ((1 << 9) - 1)
30
31#define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
32 CLBR_RCX | CLBR_R8 | CLBR_R9)
33#define CLBR_RET_REG (CLBR_RAX)
34#define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
35
36#endif /* X86_64 */
37
38#define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
39
40#ifndef __ASSEMBLY__
41
42#include <asm/desc_defs.h>
43#include <asm/kmap_types.h>
44
45struct page;
46struct thread_struct;
47struct desc_ptr;
48struct tss_struct;
49struct mm_struct;
50struct desc_struct;
51struct task_struct;
52struct cpumask;
53
54/*
55 * Wrapper type for pointers to code which uses the non-standard
56 * calling convention. See PV_CALL_SAVE_REGS_THUNK below.
57 */
58struct paravirt_callee_save {
59 void *func;
60};
61
62/* general info */
63struct pv_info {
64 unsigned int kernel_rpl;
65 int shared_kernel_pmd;
66 int paravirt_enabled;
67 const char *name;
68};
69
70struct pv_init_ops {
71 /*
72 * Patch may replace one of the defined code sequences with
73 * arbitrary code, subject to the same register constraints.
74 * This generally means the code is not free to clobber any
75 * registers other than EAX. The patch function should return
76 * the number of bytes of code generated, as we nop pad the
77 * rest in generic code.
78 */
79 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
80 unsigned long addr, unsigned len);
81
82 /* Basic arch-specific setup */
83 void (*arch_setup)(void);
84 char *(*memory_setup)(void);
85 void (*post_allocator_init)(void);
86
87 /* Print a banner to identify the environment */
88 void (*banner)(void);
89};
90
91
92struct pv_lazy_ops {
93 /* Set deferred update mode, used for batching operations. */
94 void (*enter)(void);
95 void (*leave)(void);
96};
97
98struct pv_time_ops {
99 void (*time_init)(void);
100
101 /* Set and set time of day */
102 unsigned long (*get_wallclock)(void);
103 int (*set_wallclock)(unsigned long);
104
105 unsigned long long (*sched_clock)(void);
106 unsigned long (*get_tsc_khz)(void);
107};
108
109struct pv_cpu_ops {
110 /* hooks for various privileged instructions */
111 unsigned long (*get_debugreg)(int regno);
112 void (*set_debugreg)(int regno, unsigned long value);
113
114 void (*clts)(void);
115
116 unsigned long (*read_cr0)(void);
117 void (*write_cr0)(unsigned long);
118
119 unsigned long (*read_cr4_safe)(void);
120 unsigned long (*read_cr4)(void);
121 void (*write_cr4)(unsigned long);
122
123#ifdef CONFIG_X86_64
124 unsigned long (*read_cr8)(void);
125 void (*write_cr8)(unsigned long);
126#endif
127
128 /* Segment descriptor handling */
129 void (*load_tr_desc)(void);
130 void (*load_gdt)(const struct desc_ptr *);
131 void (*load_idt)(const struct desc_ptr *);
132 void (*store_gdt)(struct desc_ptr *);
133 void (*store_idt)(struct desc_ptr *);
134 void (*set_ldt)(const void *desc, unsigned entries);
135 unsigned long (*store_tr)(void);
136 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
137#ifdef CONFIG_X86_64
138 void (*load_gs_index)(unsigned int idx);
139#endif
140 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
141 const void *desc);
142 void (*write_gdt_entry)(struct desc_struct *,
143 int entrynum, const void *desc, int size);
144 void (*write_idt_entry)(gate_desc *,
145 int entrynum, const gate_desc *gate);
146 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
147 void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
148
149 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
150
151 void (*set_iopl_mask)(unsigned mask);
152
153 void (*wbinvd)(void);
154 void (*io_delay)(void);
155
156 /* cpuid emulation, mostly so that caps bits can be disabled */
157 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
158 unsigned int *ecx, unsigned int *edx);
159
160 /* MSR, PMC and TSR operations.
161 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
162 u64 (*read_msr_amd)(unsigned int msr, int *err);
163 u64 (*read_msr)(unsigned int msr, int *err);
164 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
165
166 u64 (*read_tsc)(void);
167 u64 (*read_pmc)(int counter);
168 unsigned long long (*read_tscp)(unsigned int *aux);
169
170 /*
171 * Atomically enable interrupts and return to userspace. This
172 * is only ever used to return to 32-bit processes; in a
173 * 64-bit kernel, it's used for 32-on-64 compat processes, but
174 * never native 64-bit processes. (Jump, not call.)
175 */
176 void (*irq_enable_sysexit)(void);
177
178 /*
179 * Switch to usermode gs and return to 64-bit usermode using
180 * sysret. Only used in 64-bit kernels to return to 64-bit
181 * processes. Usermode register state, including %rsp, must
182 * already be restored.
183 */
184 void (*usergs_sysret64)(void);
185
186 /*
187 * Switch to usermode gs and return to 32-bit usermode using
188 * sysret. Used to return to 32-on-64 compat processes.
189 * Other usermode register state, including %esp, must already
190 * be restored.
191 */
192 void (*usergs_sysret32)(void);
193
194 /* Normal iret. Jump to this with the standard iret stack
195 frame set up. */
196 void (*iret)(void);
197
198 void (*swapgs)(void);
199
200 void (*start_context_switch)(struct task_struct *prev);
201 void (*end_context_switch)(struct task_struct *next);
202};
203
204struct pv_irq_ops {
205 void (*init_IRQ)(void);
206
207 /*
208 * Get/set interrupt state. save_fl and restore_fl are only
209 * expected to use X86_EFLAGS_IF; all other bits
210 * returned from save_fl are undefined, and may be ignored by
211 * restore_fl.
212 *
213 * NOTE: These functions callers expect the callee to preserve
214 * more registers than the standard C calling convention.
215 */
216 struct paravirt_callee_save save_fl;
217 struct paravirt_callee_save restore_fl;
218 struct paravirt_callee_save irq_disable;
219 struct paravirt_callee_save irq_enable;
220
221 void (*safe_halt)(void);
222 void (*halt)(void);
223
224#ifdef CONFIG_X86_64
225 void (*adjust_exception_frame)(void);
226#endif
227};
228
229struct pv_apic_ops {
230#ifdef CONFIG_X86_LOCAL_APIC
231 void (*setup_boot_clock)(void);
232 void (*setup_secondary_clock)(void);
233
234 void (*startup_ipi_hook)(int phys_apicid,
235 unsigned long start_eip,
236 unsigned long start_esp);
237#endif
238};
239
240struct pv_mmu_ops {
241 /*
242 * Called before/after init_mm pagetable setup. setup_start
243 * may reset %cr3, and may pre-install parts of the pagetable;
244 * pagetable setup is expected to preserve any existing
245 * mapping.
246 */
247 void (*pagetable_setup_start)(pgd_t *pgd_base);
248 void (*pagetable_setup_done)(pgd_t *pgd_base);
249
250 unsigned long (*read_cr2)(void);
251 void (*write_cr2)(unsigned long);
252
253 unsigned long (*read_cr3)(void);
254 void (*write_cr3)(unsigned long);
255
256 /*
257 * Hooks for intercepting the creation/use/destruction of an
258 * mm_struct.
259 */
260 void (*activate_mm)(struct mm_struct *prev,
261 struct mm_struct *next);
262 void (*dup_mmap)(struct mm_struct *oldmm,
263 struct mm_struct *mm);
264 void (*exit_mmap)(struct mm_struct *mm);
265
266
267 /* TLB operations */
268 void (*flush_tlb_user)(void);
269 void (*flush_tlb_kernel)(void);
270 void (*flush_tlb_single)(unsigned long addr);
271 void (*flush_tlb_others)(const struct cpumask *cpus,
272 struct mm_struct *mm,
273 unsigned long va);
274
275 /* Hooks for allocating and freeing a pagetable top-level */
276 int (*pgd_alloc)(struct mm_struct *mm);
277 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
278
279 /*
280 * Hooks for allocating/releasing pagetable pages when they're
281 * attached to a pagetable
282 */
283 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
284 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
285 void (*alloc_pmd_clone)(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count);
286 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
287 void (*release_pte)(unsigned long pfn);
288 void (*release_pmd)(unsigned long pfn);
289 void (*release_pud)(unsigned long pfn);
290
291 /* Pagetable manipulation functions */
292 void (*set_pte)(pte_t *ptep, pte_t pteval);
293 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
294 pte_t *ptep, pte_t pteval);
295 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
296 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
297 pte_t *ptep);
298 void (*pte_update_defer)(struct mm_struct *mm,
299 unsigned long addr, pte_t *ptep);
300
301 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
302 pte_t *ptep);
303 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
304 pte_t *ptep, pte_t pte);
305
306 struct paravirt_callee_save pte_val;
307 struct paravirt_callee_save make_pte;
308
309 struct paravirt_callee_save pgd_val;
310 struct paravirt_callee_save make_pgd;
311
312#if PAGETABLE_LEVELS >= 3
313#ifdef CONFIG_X86_PAE
314 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
315 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
316 pte_t *ptep);
317 void (*pmd_clear)(pmd_t *pmdp);
318
319#endif /* CONFIG_X86_PAE */
320
321 void (*set_pud)(pud_t *pudp, pud_t pudval);
322
323 struct paravirt_callee_save pmd_val;
324 struct paravirt_callee_save make_pmd;
325
326#if PAGETABLE_LEVELS == 4
327 struct paravirt_callee_save pud_val;
328 struct paravirt_callee_save make_pud;
329
330 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
331#endif /* PAGETABLE_LEVELS == 4 */
332#endif /* PAGETABLE_LEVELS >= 3 */
333
334#ifdef CONFIG_HIGHPTE
335 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
336#endif
337
338 struct pv_lazy_ops lazy_mode;
339
340 /* dom0 ops */
341
342 /* Sometimes the physical address is a pfn, and sometimes its
343 an mfn. We can tell which is which from the index. */
344 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
345 phys_addr_t phys, pgprot_t flags);
346};
347
348struct raw_spinlock;
349struct pv_lock_ops {
350 int (*spin_is_locked)(struct raw_spinlock *lock);
351 int (*spin_is_contended)(struct raw_spinlock *lock);
352 void (*spin_lock)(struct raw_spinlock *lock);
353 void (*spin_lock_flags)(struct raw_spinlock *lock, unsigned long flags);
354 int (*spin_trylock)(struct raw_spinlock *lock);
355 void (*spin_unlock)(struct raw_spinlock *lock);
356};
357
358/* This contains all the paravirt structures: we get a convenient
359 * number for each function using the offset which we use to indicate
360 * what to patch. */
361struct paravirt_patch_template {
362 struct pv_init_ops pv_init_ops;
363 struct pv_time_ops pv_time_ops;
364 struct pv_cpu_ops pv_cpu_ops;
365 struct pv_irq_ops pv_irq_ops;
366 struct pv_apic_ops pv_apic_ops;
367 struct pv_mmu_ops pv_mmu_ops;
368 struct pv_lock_ops pv_lock_ops;
369};
370
371extern struct pv_info pv_info;
372extern struct pv_init_ops pv_init_ops;
373extern struct pv_time_ops pv_time_ops;
374extern struct pv_cpu_ops pv_cpu_ops;
375extern struct pv_irq_ops pv_irq_ops;
376extern struct pv_apic_ops pv_apic_ops;
377extern struct pv_mmu_ops pv_mmu_ops;
378extern struct pv_lock_ops pv_lock_ops;
379
380#define PARAVIRT_PATCH(x) \
381 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
382
383#define paravirt_type(op) \
384 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
385 [paravirt_opptr] "i" (&(op))
386#define paravirt_clobber(clobber) \
387 [paravirt_clobber] "i" (clobber)
388
389/*
390 * Generate some code, and mark it as patchable by the
391 * apply_paravirt() alternate instruction patcher.
392 */
393#define _paravirt_alt(insn_string, type, clobber) \
394 "771:\n\t" insn_string "\n" "772:\n" \
395 ".pushsection .parainstructions,\"a\"\n" \
396 _ASM_ALIGN "\n" \
397 _ASM_PTR " 771b\n" \
398 " .byte " type "\n" \
399 " .byte 772b-771b\n" \
400 " .short " clobber "\n" \
401 ".popsection\n"
402
403/* Generate patchable code, with the default asm parameters. */
404#define paravirt_alt(insn_string) \
405 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
406
407/* Simple instruction patching code. */
408#define DEF_NATIVE(ops, name, code) \
409 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
410 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
411
412unsigned paravirt_patch_nop(void);
413unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
414unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
415unsigned paravirt_patch_ignore(unsigned len);
416unsigned paravirt_patch_call(void *insnbuf,
417 const void *target, u16 tgt_clobbers,
418 unsigned long addr, u16 site_clobbers,
419 unsigned len);
420unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
421 unsigned long addr, unsigned len);
422unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
423 unsigned long addr, unsigned len);
424
425unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
426 const char *start, const char *end);
427
428unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
429 unsigned long addr, unsigned len);
430
431int paravirt_disable_iospace(void);
432
433/*
434 * This generates an indirect call based on the operation type number.
435 * The type number, computed in PARAVIRT_PATCH, is derived from the
436 * offset into the paravirt_patch_template structure, and can therefore be
437 * freely converted back into a structure offset.
438 */
439#define PARAVIRT_CALL "call *%c[paravirt_opptr];"
440
441/*
442 * These macros are intended to wrap calls through one of the paravirt
443 * ops structs, so that they can be later identified and patched at
444 * runtime.
445 *
446 * Normally, a call to a pv_op function is a simple indirect call:
447 * (pv_op_struct.operations)(args...).
448 *
449 * Unfortunately, this is a relatively slow operation for modern CPUs,
450 * because it cannot necessarily determine what the destination
451 * address is. In this case, the address is a runtime constant, so at
452 * the very least we can patch the call to e a simple direct call, or
453 * ideally, patch an inline implementation into the callsite. (Direct
454 * calls are essentially free, because the call and return addresses
455 * are completely predictable.)
456 *
457 * For i386, these macros rely on the standard gcc "regparm(3)" calling
458 * convention, in which the first three arguments are placed in %eax,
459 * %edx, %ecx (in that order), and the remaining arguments are placed
460 * on the stack. All caller-save registers (eax,edx,ecx) are expected
461 * to be modified (either clobbered or used for return values).
462 * X86_64, on the other hand, already specifies a register-based calling
463 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
464 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
465 * special handling for dealing with 4 arguments, unlike i386.
466 * However, x86_64 also have to clobber all caller saved registers, which
467 * unfortunately, are quite a bit (r8 - r11)
468 *
469 * The call instruction itself is marked by placing its start address
470 * and size into the .parainstructions section, so that
471 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
472 * appropriate patching under the control of the backend pv_init_ops
473 * implementation.
474 *
475 * Unfortunately there's no way to get gcc to generate the args setup
476 * for the call, and then allow the call itself to be generated by an
477 * inline asm. Because of this, we must do the complete arg setup and
478 * return value handling from within these macros. This is fairly
479 * cumbersome.
480 *
481 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
482 * It could be extended to more arguments, but there would be little
483 * to be gained from that. For each number of arguments, there are
484 * the two VCALL and CALL variants for void and non-void functions.
485 *
486 * When there is a return value, the invoker of the macro must specify
487 * the return type. The macro then uses sizeof() on that type to
488 * determine whether its a 32 or 64 bit value, and places the return
489 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
490 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
491 * the return value size.
492 *
493 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
494 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
495 * in low,high order
496 *
497 * Small structures are passed and returned in registers. The macro
498 * calling convention can't directly deal with this, so the wrapper
499 * functions must do this.
500 *
501 * These PVOP_* macros are only defined within this header. This
502 * means that all uses must be wrapped in inline functions. This also
503 * makes sure the incoming and outgoing types are always correct.
504 */
505#ifdef CONFIG_X86_32
506#define PVOP_VCALL_ARGS \
507 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
508#define PVOP_CALL_ARGS PVOP_VCALL_ARGS
509
510#define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
511#define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
512#define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
513
514#define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
515 "=c" (__ecx)
516#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
517
518#define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
519#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
520
521#define EXTRA_CLOBBERS
522#define VEXTRA_CLOBBERS
523#else /* CONFIG_X86_64 */
524#define PVOP_VCALL_ARGS \
525 unsigned long __edi = __edi, __esi = __esi, \
526 __edx = __edx, __ecx = __ecx
527#define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
528
529#define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
530#define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
531#define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
532#define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
533
534#define PVOP_VCALL_CLOBBERS "=D" (__edi), \
535 "=S" (__esi), "=d" (__edx), \
536 "=c" (__ecx)
537#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
538
539#define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
540#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
541
542#define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
543#define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
544#endif /* CONFIG_X86_32 */
545
546#ifdef CONFIG_PARAVIRT_DEBUG
547#define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
548#else
549#define PVOP_TEST_NULL(op) ((void)op)
550#endif
551
552#define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
553 pre, post, ...) \
554 ({ \
555 rettype __ret; \
556 PVOP_CALL_ARGS; \
557 PVOP_TEST_NULL(op); \
558 /* This is 32-bit specific, but is okay in 64-bit */ \
559 /* since this condition will never hold */ \
560 if (sizeof(rettype) > sizeof(unsigned long)) { \
561 asm volatile(pre \
562 paravirt_alt(PARAVIRT_CALL) \
563 post \
564 : call_clbr \
565 : paravirt_type(op), \
566 paravirt_clobber(clbr), \
567 ##__VA_ARGS__ \
568 : "memory", "cc" extra_clbr); \
569 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
570 } else { \
571 asm volatile(pre \
572 paravirt_alt(PARAVIRT_CALL) \
573 post \
574 : call_clbr \
575 : paravirt_type(op), \
576 paravirt_clobber(clbr), \
577 ##__VA_ARGS__ \
578 : "memory", "cc" extra_clbr); \
579 __ret = (rettype)__eax; \
580 } \
581 __ret; \
582 })
583
584#define __PVOP_CALL(rettype, op, pre, post, ...) \
585 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
586 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
587
588#define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
589 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
590 PVOP_CALLEE_CLOBBERS, , \
591 pre, post, ##__VA_ARGS__)
592
593
594#define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
595 ({ \
596 PVOP_VCALL_ARGS; \
597 PVOP_TEST_NULL(op); \
598 asm volatile(pre \
599 paravirt_alt(PARAVIRT_CALL) \
600 post \
601 : call_clbr \
602 : paravirt_type(op), \
603 paravirt_clobber(clbr), \
604 ##__VA_ARGS__ \
605 : "memory", "cc" extra_clbr); \
606 })
607
608#define __PVOP_VCALL(op, pre, post, ...) \
609 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
610 VEXTRA_CLOBBERS, \
611 pre, post, ##__VA_ARGS__)
612
613#define __PVOP_VCALLEESAVE(rettype, op, pre, post, ...) \
614 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
615 PVOP_VCALLEE_CLOBBERS, , \
616 pre, post, ##__VA_ARGS__)
617
618
619
620#define PVOP_CALL0(rettype, op) \
621 __PVOP_CALL(rettype, op, "", "")
622#define PVOP_VCALL0(op) \
623 __PVOP_VCALL(op, "", "")
624
625#define PVOP_CALLEE0(rettype, op) \
626 __PVOP_CALLEESAVE(rettype, op, "", "")
627#define PVOP_VCALLEE0(op) \
628 __PVOP_VCALLEESAVE(op, "", "")
629
630
631#define PVOP_CALL1(rettype, op, arg1) \
632 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
633#define PVOP_VCALL1(op, arg1) \
634 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
635
636#define PVOP_CALLEE1(rettype, op, arg1) \
637 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
638#define PVOP_VCALLEE1(op, arg1) \
639 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
640
641
642#define PVOP_CALL2(rettype, op, arg1, arg2) \
643 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
644 PVOP_CALL_ARG2(arg2))
645#define PVOP_VCALL2(op, arg1, arg2) \
646 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
647 PVOP_CALL_ARG2(arg2))
648
649#define PVOP_CALLEE2(rettype, op, arg1, arg2) \
650 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
651 PVOP_CALL_ARG2(arg2))
652#define PVOP_VCALLEE2(op, arg1, arg2) \
653 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
654 PVOP_CALL_ARG2(arg2))
655
656
657#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
658 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
659 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
660#define PVOP_VCALL3(op, arg1, arg2, arg3) \
661 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
662 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
663
664/* This is the only difference in x86_64. We can make it much simpler */
665#ifdef CONFIG_X86_32
666#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
667 __PVOP_CALL(rettype, op, \
668 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
669 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
670 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
671#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
672 __PVOP_VCALL(op, \
673 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
674 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
675 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
676#else
677#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
678 __PVOP_CALL(rettype, op, "", "", \
679 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
680 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
681#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
682 __PVOP_VCALL(op, "", "", \
683 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
684 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
685#endif
686
687/* Lazy mode for batching updates / context switch */
688enum paravirt_lazy_mode {
689 PARAVIRT_LAZY_NONE,
690 PARAVIRT_LAZY_MMU,
691 PARAVIRT_LAZY_CPU,
692};
693
694enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
695void paravirt_start_context_switch(struct task_struct *prev);
696void paravirt_end_context_switch(struct task_struct *next);
697
698void paravirt_enter_lazy_mmu(void);
699void paravirt_leave_lazy_mmu(void);
700
701void _paravirt_nop(void);
702u32 _paravirt_ident_32(u32);
703u64 _paravirt_ident_64(u64);
704
705#define paravirt_nop ((void *)_paravirt_nop)
706
707/* These all sit in the .parainstructions section to tell us what to patch. */
708struct paravirt_patch_site {
709 u8 *instr; /* original instructions */
710 u8 instrtype; /* type of this instruction */
711 u8 len; /* length of original instruction */
712 u16 clobbers; /* what registers you may clobber */
713};
714
715extern struct paravirt_patch_site __parainstructions[],
716 __parainstructions_end[];
717
718#endif /* __ASSEMBLY__ */
719
720#endif /* _ASM_X86_PARAVIRT_TYPES_H */
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