aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2008-05-17 18:17:10 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-05-17 18:17:10 -0400
commit29e92f483603d97dd1d2bafcb32101287dfac4ad (patch)
tree87c267216117bef6b1c5752c459643f91fc50b80 /arch
parent08c18964a247b412acab56599a643e6f73e1ec5a (diff)
parentdfb0ae091479240c19bef4382026671776ca204e (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] pxa: spitz wants PXA27x UDC definitions [ARM] pxa: fix pxafb build when cpufreq is enabled [ARM] fix parenthesis in include/asm-arm/arch-omap/control.h [ARM] colibri: fix support for DM9000 ethernet device [ARM] arm/kernel/arthur.c: add MODULE_LICENSE [ARM] 5037/1: Orion: fix DNS323/Kurobox Pro PCI initialisation [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode [ARM] export copy_page [ARM] 5026/1: locomo: add .settype for gpio and several small fixes ARM: OMAP: Fixed comments on global PRM register usage ARM: OMAP: Add PARENT_CONTROLS_CLOCK flag to dpll5_m2_ck ARM: OMAP: PRCM fixes to ssi clock handling ARM: OMAP: Add fuctional clock enabler for iva2 ARM: OMAP: Fix 34xx to use correct shift values for gpio2-6 fclks ARM: OMAP: Keymap fix for palmte and palmz71 ARM: OMAP: Fix Unbalanced enable for IRQ in omap mailbox ARM: OMAP: DMA: Fix incorrect channel linking ARM: OMAP: Warn on disabling clocks with no users ARM: OMAP: Add calls to omap2_set_globals_*() ARM: OMAP: Update MMC header to fix compile
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/common/locomo.c66
-rw-r--r--arch/arm/kernel/armksyms.c2
-rw-r--r--arch/arm/kernel/arthur.c2
-rw-r--r--arch/arm/mach-omap1/board-palmte.c2
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c2
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c1
-rw-r--r--arch/arm/mach-omap2/board-apollon.c1
-rw-r--r--arch/arm/mach-omap2/board-generic.c1
-rw-r--r--arch/arm/mach-omap2/board-h4.c1
-rw-r--r--arch/arm/mach-omap2/clock.c4
-rw-r--r--arch/arm/mach-omap2/clock34xx.h21
-rw-r--r--arch/arm/mach-omap2/cm-regbits-34xx.h1
-rw-r--r--arch/arm/mach-omap2/mailbox.c25
-rw-r--r--arch/arm/mach-omap2/prm.h2
-rw-r--r--arch/arm/mach-orion5x/dns323-setup.c2
-rw-r--r--arch/arm/mach-orion5x/kurobox_pro-setup.c2
-rw-r--r--arch/arm/mach-pxa/colibri.c3
-rw-r--r--arch/arm/mach-pxa/spitz.c1
-rw-r--r--arch/arm/mm/proc-arm925.S2
-rw-r--r--arch/arm/mm/proc-arm926.S2
-rw-r--r--arch/arm/mm/proc-arm940.S2
-rw-r--r--arch/arm/mm/proc-arm946.S2
-rw-r--r--arch/arm/plat-omap/clock.c10
-rw-r--r--arch/arm/plat-omap/dma.c2
-rw-r--r--arch/arm/plat-omap/mailbox.c1
25 files changed, 108 insertions, 52 deletions
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index ae21755872ed..d973c986f721 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -321,11 +321,42 @@ static void locomo_gpio_unmask_irq(unsigned int irq)
321 locomo_writel(r, mapbase + LOCOMO_GIE); 321 locomo_writel(r, mapbase + LOCOMO_GIE);
322} 322}
323 323
324static int GPIO_IRQ_rising_edge;
325static int GPIO_IRQ_falling_edge;
326
327static int locomo_gpio_type(unsigned int irq, unsigned int type)
328{
329 unsigned int mask;
330 void __iomem *mapbase = get_irq_chip_data(irq);
331
332 mask = 1 << (irq - LOCOMO_IRQ_GPIO_START);
333
334 if (type == IRQT_PROBE) {
335 if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
336 return 0;
337 type = __IRQT_RISEDGE | __IRQT_FALEDGE;
338 }
339
340 if (type & __IRQT_RISEDGE)
341 GPIO_IRQ_rising_edge |= mask;
342 else
343 GPIO_IRQ_rising_edge &= ~mask;
344 if (type & __IRQT_FALEDGE)
345 GPIO_IRQ_falling_edge |= mask;
346 else
347 GPIO_IRQ_falling_edge &= ~mask;
348 locomo_writel(GPIO_IRQ_rising_edge, mapbase + LOCOMO_GRIE);
349 locomo_writel(GPIO_IRQ_falling_edge, mapbase + LOCOMO_GFIE);
350
351 return 0;
352}
353
324static struct irq_chip locomo_gpio_chip = { 354static struct irq_chip locomo_gpio_chip = {
325 .name = "LOCOMO-gpio", 355 .name = "LOCOMO-gpio",
326 .ack = locomo_gpio_ack_irq, 356 .ack = locomo_gpio_ack_irq,
327 .mask = locomo_gpio_mask_irq, 357 .mask = locomo_gpio_mask_irq,
328 .unmask = locomo_gpio_unmask_irq, 358 .unmask = locomo_gpio_unmask_irq,
359 .set_type = locomo_gpio_type,
329}; 360};
330 361
331static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc) 362static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc)
@@ -450,22 +481,18 @@ static void locomo_setup_irq(struct locomo *lchip)
450 set_irq_chip(IRQ_LOCOMO_KEY_BASE, &locomo_chip); 481 set_irq_chip(IRQ_LOCOMO_KEY_BASE, &locomo_chip);
451 set_irq_chip_data(IRQ_LOCOMO_KEY_BASE, irqbase); 482 set_irq_chip_data(IRQ_LOCOMO_KEY_BASE, irqbase);
452 set_irq_chained_handler(IRQ_LOCOMO_KEY_BASE, locomo_key_handler); 483 set_irq_chained_handler(IRQ_LOCOMO_KEY_BASE, locomo_key_handler);
453 set_irq_flags(IRQ_LOCOMO_KEY_BASE, IRQF_VALID | IRQF_PROBE);
454 484
455 set_irq_chip(IRQ_LOCOMO_GPIO_BASE, &locomo_chip); 485 set_irq_chip(IRQ_LOCOMO_GPIO_BASE, &locomo_chip);
456 set_irq_chip_data(IRQ_LOCOMO_GPIO_BASE, irqbase); 486 set_irq_chip_data(IRQ_LOCOMO_GPIO_BASE, irqbase);
457 set_irq_chained_handler(IRQ_LOCOMO_GPIO_BASE, locomo_gpio_handler); 487 set_irq_chained_handler(IRQ_LOCOMO_GPIO_BASE, locomo_gpio_handler);
458 set_irq_flags(IRQ_LOCOMO_GPIO_BASE, IRQF_VALID | IRQF_PROBE);
459 488
460 set_irq_chip(IRQ_LOCOMO_LT_BASE, &locomo_chip); 489 set_irq_chip(IRQ_LOCOMO_LT_BASE, &locomo_chip);
461 set_irq_chip_data(IRQ_LOCOMO_LT_BASE, irqbase); 490 set_irq_chip_data(IRQ_LOCOMO_LT_BASE, irqbase);
462 set_irq_chained_handler(IRQ_LOCOMO_LT_BASE, locomo_lt_handler); 491 set_irq_chained_handler(IRQ_LOCOMO_LT_BASE, locomo_lt_handler);
463 set_irq_flags(IRQ_LOCOMO_LT_BASE, IRQF_VALID | IRQF_PROBE);
464 492
465 set_irq_chip(IRQ_LOCOMO_SPI_BASE, &locomo_chip); 493 set_irq_chip(IRQ_LOCOMO_SPI_BASE, &locomo_chip);
466 set_irq_chip_data(IRQ_LOCOMO_SPI_BASE, irqbase); 494 set_irq_chip_data(IRQ_LOCOMO_SPI_BASE, irqbase);
467 set_irq_chained_handler(IRQ_LOCOMO_SPI_BASE, locomo_spi_handler); 495 set_irq_chained_handler(IRQ_LOCOMO_SPI_BASE, locomo_spi_handler);
468 set_irq_flags(IRQ_LOCOMO_SPI_BASE, IRQF_VALID | IRQF_PROBE);
469 496
470 /* install handlers for IRQ_LOCOMO_KEY_BASE generated interrupts */ 497 /* install handlers for IRQ_LOCOMO_KEY_BASE generated interrupts */
471 set_irq_chip(LOCOMO_IRQ_KEY_START, &locomo_key_chip); 498 set_irq_chip(LOCOMO_IRQ_KEY_START, &locomo_key_chip);
@@ -488,7 +515,7 @@ static void locomo_setup_irq(struct locomo *lchip)
488 set_irq_flags(LOCOMO_IRQ_LT_START, IRQF_VALID | IRQF_PROBE); 515 set_irq_flags(LOCOMO_IRQ_LT_START, IRQF_VALID | IRQF_PROBE);
489 516
490 /* install handlers for IRQ_LOCOMO_SPI_BASE generated interrupts */ 517 /* install handlers for IRQ_LOCOMO_SPI_BASE generated interrupts */
491 for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 3; irq++) { 518 for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 4; irq++) {
492 set_irq_chip(irq, &locomo_spi_chip); 519 set_irq_chip(irq, &locomo_spi_chip);
493 set_irq_chip_data(irq, irqbase); 520 set_irq_chip_data(irq, irqbase);
494 set_irq_handler(irq, handle_edge_irq); 521 set_irq_handler(irq, handle_edge_irq);
@@ -574,20 +601,20 @@ static int locomo_suspend(struct platform_device *dev, pm_message_t state)
574 601
575 save->LCM_GPO = locomo_readl(lchip->base + LOCOMO_GPO); /* GPIO */ 602 save->LCM_GPO = locomo_readl(lchip->base + LOCOMO_GPO); /* GPIO */
576 locomo_writel(0x00, lchip->base + LOCOMO_GPO); 603 locomo_writel(0x00, lchip->base + LOCOMO_GPO);
577 save->LCM_SPICT = locomo_readl(lchip->base + LOCOMO_SPICT); /* SPI */ 604 save->LCM_SPICT = locomo_readl(lchip->base + LOCOMO_SPI + LOCOMO_SPICT); /* SPI */
578 locomo_writel(0x40, lchip->base + LOCOMO_SPICT); 605 locomo_writel(0x40, lchip->base + LOCOMO_SPICT);
579 save->LCM_GPE = locomo_readl(lchip->base + LOCOMO_GPE); /* GPIO */ 606 save->LCM_GPE = locomo_readl(lchip->base + LOCOMO_GPE); /* GPIO */
580 locomo_writel(0x00, lchip->base + LOCOMO_GPE); 607 locomo_writel(0x00, lchip->base + LOCOMO_GPE);
581 save->LCM_ASD = locomo_readl(lchip->base + LOCOMO_ASD); /* ADSTART */ 608 save->LCM_ASD = locomo_readl(lchip->base + LOCOMO_ASD); /* ADSTART */
582 locomo_writel(0x00, lchip->base + LOCOMO_ASD); 609 locomo_writel(0x00, lchip->base + LOCOMO_ASD);
583 save->LCM_SPIMD = locomo_readl(lchip->base + LOCOMO_SPIMD); /* SPI */ 610 save->LCM_SPIMD = locomo_readl(lchip->base + LOCOMO_SPI + LOCOMO_SPIMD); /* SPI */
584 locomo_writel(0x3C14, lchip->base + LOCOMO_SPIMD); 611 locomo_writel(0x3C14, lchip->base + LOCOMO_SPI + LOCOMO_SPIMD);
585 612
586 locomo_writel(0x00, lchip->base + LOCOMO_PAIF); 613 locomo_writel(0x00, lchip->base + LOCOMO_PAIF);
587 locomo_writel(0x00, lchip->base + LOCOMO_DAC); 614 locomo_writel(0x00, lchip->base + LOCOMO_DAC);
588 locomo_writel(0x00, lchip->base + LOCOMO_BACKLIGHT + LOCOMO_TC); 615 locomo_writel(0x00, lchip->base + LOCOMO_BACKLIGHT + LOCOMO_TC);
589 616
590 if ( (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT0) & 0x88) && (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT1) & 0x88) ) 617 if ((locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT0) & 0x88) && (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT1) & 0x88))
591 locomo_writel(0x00, lchip->base + LOCOMO_C32K); /* CLK32 off */ 618 locomo_writel(0x00, lchip->base + LOCOMO_C32K); /* CLK32 off */
592 else 619 else
593 /* 18MHz already enabled, so no wait */ 620 /* 18MHz already enabled, so no wait */
@@ -616,10 +643,10 @@ static int locomo_resume(struct platform_device *dev)
616 spin_lock_irqsave(&lchip->lock, flags); 643 spin_lock_irqsave(&lchip->lock, flags);
617 644
618 locomo_writel(save->LCM_GPO, lchip->base + LOCOMO_GPO); 645 locomo_writel(save->LCM_GPO, lchip->base + LOCOMO_GPO);
619 locomo_writel(save->LCM_SPICT, lchip->base + LOCOMO_SPICT); 646 locomo_writel(save->LCM_SPICT, lchip->base + LOCOMO_SPI + LOCOMO_SPICT);
620 locomo_writel(save->LCM_GPE, lchip->base + LOCOMO_GPE); 647 locomo_writel(save->LCM_GPE, lchip->base + LOCOMO_GPE);
621 locomo_writel(save->LCM_ASD, lchip->base + LOCOMO_ASD); 648 locomo_writel(save->LCM_ASD, lchip->base + LOCOMO_ASD);
622 locomo_writel(save->LCM_SPIMD, lchip->base + LOCOMO_SPIMD); 649 locomo_writel(save->LCM_SPIMD, lchip->base + LOCOMO_SPI + LOCOMO_SPIMD);
623 650
624 locomo_writel(0x00, lchip->base + LOCOMO_C32K); 651 locomo_writel(0x00, lchip->base + LOCOMO_C32K);
625 locomo_writel(0x90, lchip->base + LOCOMO_TADC); 652 locomo_writel(0x90, lchip->base + LOCOMO_TADC);
@@ -688,9 +715,9 @@ __locomo_probe(struct device *me, struct resource *mem, int irq)
688 715
689 /* GPIO */ 716 /* GPIO */
690 locomo_writel(0, lchip->base + LOCOMO_GPO); 717 locomo_writel(0, lchip->base + LOCOMO_GPO);
691 locomo_writel( (LOCOMO_GPIO(2) | LOCOMO_GPIO(3) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14)) 718 locomo_writel((LOCOMO_GPIO(1) | LOCOMO_GPIO(2) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14))
692 , lchip->base + LOCOMO_GPE); 719 , lchip->base + LOCOMO_GPE);
693 locomo_writel( (LOCOMO_GPIO(2) | LOCOMO_GPIO(3) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14)) 720 locomo_writel((LOCOMO_GPIO(1) | LOCOMO_GPIO(2) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14))
694 , lchip->base + LOCOMO_GPD); 721 , lchip->base + LOCOMO_GPD);
695 locomo_writel(0, lchip->base + LOCOMO_GIE); 722 locomo_writel(0, lchip->base + LOCOMO_GIE);
696 723
@@ -833,7 +860,10 @@ void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir
833 spin_lock_irqsave(&lchip->lock, flags); 860 spin_lock_irqsave(&lchip->lock, flags);
834 861
835 r = locomo_readl(lchip->base + LOCOMO_GPD); 862 r = locomo_readl(lchip->base + LOCOMO_GPD);
836 r &= ~bits; 863 if (dir)
864 r |= bits;
865 else
866 r &= ~bits;
837 locomo_writel(r, lchip->base + LOCOMO_GPD); 867 locomo_writel(r, lchip->base + LOCOMO_GPD);
838 868
839 r = locomo_readl(lchip->base + LOCOMO_GPE); 869 r = locomo_readl(lchip->base + LOCOMO_GPE);
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index f73d62e8ab60..688b7b1ee416 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -179,3 +179,5 @@ EXPORT_SYMBOL(_find_next_zero_bit_be);
179EXPORT_SYMBOL(_find_first_bit_be); 179EXPORT_SYMBOL(_find_first_bit_be);
180EXPORT_SYMBOL(_find_next_bit_be); 180EXPORT_SYMBOL(_find_next_bit_be);
181#endif 181#endif
182
183EXPORT_SYMBOL(copy_page);
diff --git a/arch/arm/kernel/arthur.c b/arch/arm/kernel/arthur.c
index 0ee2e9819631..321c5291d05f 100644
--- a/arch/arm/kernel/arthur.c
+++ b/arch/arm/kernel/arthur.c
@@ -90,3 +90,5 @@ static void __exit arthur_exit(void)
90 90
91module_init(arthur_init); 91module_init(arthur_init);
92module_exit(arthur_exit); 92module_exit(arthur_exit);
93
94MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index ca1a4bf78a10..a0b16a7e8a04 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -63,7 +63,7 @@ static const int palmte_keymap[] = {
63 KEY(1, 1, KEY_DOWN), 63 KEY(1, 1, KEY_DOWN),
64 KEY(1, 2, KEY_UP), 64 KEY(1, 2, KEY_UP),
65 KEY(1, 3, KEY_RIGHT), 65 KEY(1, 3, KEY_RIGHT),
66 KEY(1, 4, KEY_CENTER), 66 KEY(1, 4, KEY_ENTER),
67 0, 67 0,
68}; 68};
69 69
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 156510777ffe..e020c2774606 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -65,7 +65,7 @@ static int palmz71_keymap[] = {
65 KEY(1, 1, KEY_DOWN), 65 KEY(1, 1, KEY_DOWN),
66 KEY(1, 2, KEY_UP), 66 KEY(1, 2, KEY_UP),
67 KEY(1, 3, KEY_RIGHT), 67 KEY(1, 3, KEY_RIGHT),
68 KEY(1, 4, KEY_CENTER), 68 KEY(1, 4, KEY_ENTER),
69 KEY(2, 0, KEY_CAMERA), 69 KEY(2, 0, KEY_CAMERA),
70 0, 70 0,
71}; 71};
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 1c12d7c6c7fc..1682eb77c46d 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -208,6 +208,7 @@ static void __init omap_2430sdp_init(void)
208 208
209static void __init omap_2430sdp_map_io(void) 209static void __init omap_2430sdp_map_io(void)
210{ 210{
211 omap2_set_globals_243x();
211 omap2_map_common_io(); 212 omap2_map_common_io();
212} 213}
213 214
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index a1e1e6765b5b..620fa0f120ee 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -394,6 +394,7 @@ static void __init omap_apollon_init(void)
394 394
395static void __init omap_apollon_map_io(void) 395static void __init omap_apollon_map_io(void)
396{ 396{
397 omap2_set_globals_242x();
397 omap2_map_common_io(); 398 omap2_map_common_io();
398} 399}
399 400
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 90938151bcf1..df8be081e159 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -65,6 +65,7 @@ static void __init omap_generic_init(void)
65 65
66static void __init omap_generic_map_io(void) 66static void __init omap_generic_map_io(void)
67{ 67{
68 omap2_set_globals_242x(); /* should be 242x, 243x, or 343x */
68 omap2_map_common_io(); 69 omap2_map_common_io();
69} 70}
70 71
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index d1915f99a5fa..0d28f6897c8e 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -420,6 +420,7 @@ static void __init omap_h4_init(void)
420 420
421static void __init omap_h4_map_io(void) 421static void __init omap_h4_map_io(void)
422{ 422{
423 omap2_set_globals_242x();
423 omap2_map_common_io(); 424 omap2_map_common_io();
424} 425}
425 426
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index b57ffb5a22a5..ab9fc57d25f1 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -205,7 +205,9 @@ static void omap2_clk_wait_ready(struct clk *clk)
205 /* REVISIT: What are the appropriate exclusions for 34XX? */ 205 /* REVISIT: What are the appropriate exclusions for 34XX? */
206 /* OMAP3: ignore DSS-mod clocks */ 206 /* OMAP3: ignore DSS-mod clocks */
207 if (cpu_is_omap34xx() && 207 if (cpu_is_omap34xx() &&
208 (((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0))) 208 (((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0) ||
209 ((((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(CORE_MOD, 0)) &&
210 clk->enable_bit == OMAP3430_EN_SSI_SHIFT)))
209 return; 211 return;
210 212
211 /* Check if both functional and interface clocks 213 /* Check if both functional and interface clocks
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index cf4644a94b9b..c9c5972a2e25 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -836,7 +836,8 @@ static struct clk dpll5_m2_ck = {
836 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5), 836 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5),
837 .clksel_mask = OMAP3430ES2_DIV_120M_MASK, 837 .clksel_mask = OMAP3430ES2_DIV_120M_MASK,
838 .clksel = div16_dpll5_clksel, 838 .clksel = div16_dpll5_clksel,
839 .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES, 839 .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES |
840 PARENT_CONTROLS_CLOCK,
840 .recalc = &omap2_clksel_recalc, 841 .recalc = &omap2_clksel_recalc,
841}; 842};
842 843
@@ -1046,12 +1047,13 @@ static struct clk iva2_ck = {
1046 .name = "iva2_ck", 1047 .name = "iva2_ck",
1047 .parent = &dpll2_m2_ck, 1048 .parent = &dpll2_m2_ck,
1048 .init = &omap2_init_clksel_parent, 1049 .init = &omap2_init_clksel_parent,
1050 .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN),
1051 .enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
1049 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, 1052 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD,
1050 OMAP3430_CM_IDLEST_PLL), 1053 OMAP3430_CM_IDLEST_PLL),
1051 .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, 1054 .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK,
1052 .clksel = iva2_clksel, 1055 .clksel = iva2_clksel,
1053 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 1056 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
1054 PARENT_CONTROLS_CLOCK,
1055 .recalc = &omap2_clksel_recalc, 1057 .recalc = &omap2_clksel_recalc,
1056}; 1058};
1057 1059
@@ -1836,7 +1838,8 @@ static struct clk omapctrl_ick = {
1836static struct clk ssi_l4_ick = { 1838static struct clk ssi_l4_ick = {
1837 .name = "ssi_l4_ick", 1839 .name = "ssi_l4_ick",
1838 .parent = &l4_ick, 1840 .parent = &l4_ick,
1839 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, 1841 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
1842 PARENT_CONTROLS_CLOCK,
1840 .recalc = &followparent_recalc, 1843 .recalc = &followparent_recalc,
1841}; 1844};
1842 1845
@@ -2344,7 +2347,7 @@ static struct clk gpio6_fck = {
2344 .name = "gpio6_fck", 2347 .name = "gpio6_fck",
2345 .parent = &per_32k_alwon_fck, 2348 .parent = &per_32k_alwon_fck,
2346 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2349 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2347 .enable_bit = OMAP3430_EN_GPT6_SHIFT, 2350 .enable_bit = OMAP3430_EN_GPIO6_SHIFT,
2348 .flags = CLOCK_IN_OMAP343X, 2351 .flags = CLOCK_IN_OMAP343X,
2349 .recalc = &followparent_recalc, 2352 .recalc = &followparent_recalc,
2350}; 2353};
@@ -2353,7 +2356,7 @@ static struct clk gpio5_fck = {
2353 .name = "gpio5_fck", 2356 .name = "gpio5_fck",
2354 .parent = &per_32k_alwon_fck, 2357 .parent = &per_32k_alwon_fck,
2355 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2358 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2356 .enable_bit = OMAP3430_EN_GPT5_SHIFT, 2359 .enable_bit = OMAP3430_EN_GPIO5_SHIFT,
2357 .flags = CLOCK_IN_OMAP343X, 2360 .flags = CLOCK_IN_OMAP343X,
2358 .recalc = &followparent_recalc, 2361 .recalc = &followparent_recalc,
2359}; 2362};
@@ -2362,7 +2365,7 @@ static struct clk gpio4_fck = {
2362 .name = "gpio4_fck", 2365 .name = "gpio4_fck",
2363 .parent = &per_32k_alwon_fck, 2366 .parent = &per_32k_alwon_fck,
2364 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2367 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2365 .enable_bit = OMAP3430_EN_GPT4_SHIFT, 2368 .enable_bit = OMAP3430_EN_GPIO4_SHIFT,
2366 .flags = CLOCK_IN_OMAP343X, 2369 .flags = CLOCK_IN_OMAP343X,
2367 .recalc = &followparent_recalc, 2370 .recalc = &followparent_recalc,
2368}; 2371};
@@ -2371,7 +2374,7 @@ static struct clk gpio3_fck = {
2371 .name = "gpio3_fck", 2374 .name = "gpio3_fck",
2372 .parent = &per_32k_alwon_fck, 2375 .parent = &per_32k_alwon_fck,
2373 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2376 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2374 .enable_bit = OMAP3430_EN_GPT3_SHIFT, 2377 .enable_bit = OMAP3430_EN_GPIO3_SHIFT,
2375 .flags = CLOCK_IN_OMAP343X, 2378 .flags = CLOCK_IN_OMAP343X,
2376 .recalc = &followparent_recalc, 2379 .recalc = &followparent_recalc,
2377}; 2380};
@@ -2380,7 +2383,7 @@ static struct clk gpio2_fck = {
2380 .name = "gpio2_fck", 2383 .name = "gpio2_fck",
2381 .parent = &per_32k_alwon_fck, 2384 .parent = &per_32k_alwon_fck,
2382 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2385 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2383 .enable_bit = OMAP3430_EN_GPT2_SHIFT, 2386 .enable_bit = OMAP3430_EN_GPIO2_SHIFT,
2384 .flags = CLOCK_IN_OMAP343X, 2387 .flags = CLOCK_IN_OMAP343X,
2385 .recalc = &followparent_recalc, 2388 .recalc = &followparent_recalc,
2386}; 2389};
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 9249129a5f46..3c38395f6442 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -56,6 +56,7 @@
56 56
57/* CM_FCLKEN_IVA2 */ 57/* CM_FCLKEN_IVA2 */
58#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2 (1 << 0) 58#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2 (1 << 0)
59#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0
59 60
60/* CM_CLKEN_PLL_IVA2 */ 61/* CM_CLKEN_PLL_IVA2 */
61#define OMAP3430_IVA2_DPLL_RAMPTIME_SHIFT 8 62#define OMAP3430_IVA2_DPLL_RAMPTIME_SHIFT 8
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index b03cd06e055b..4799561c5a9e 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -70,6 +70,9 @@ struct omap_mbox2_priv {
70 70
71static struct clk *mbox_ick_handle; 71static struct clk *mbox_ick_handle;
72 72
73static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
74 omap_mbox_type_t irq);
75
73static inline unsigned int mbox_read_reg(unsigned int reg) 76static inline unsigned int mbox_read_reg(unsigned int reg)
74{ 77{
75 return __raw_readl(mbox_base + reg); 78 return __raw_readl(mbox_base + reg);
@@ -81,7 +84,7 @@ static inline void mbox_write_reg(unsigned int val, unsigned int reg)
81} 84}
82 85
83/* Mailbox H/W preparations */ 86/* Mailbox H/W preparations */
84static inline int omap2_mbox_startup(struct omap_mbox *mbox) 87static int omap2_mbox_startup(struct omap_mbox *mbox)
85{ 88{
86 unsigned int l; 89 unsigned int l;
87 90
@@ -97,38 +100,40 @@ static inline int omap2_mbox_startup(struct omap_mbox *mbox)
97 l |= 0x00000011; 100 l |= 0x00000011;
98 mbox_write_reg(l, MAILBOX_SYSCONFIG); 101 mbox_write_reg(l, MAILBOX_SYSCONFIG);
99 102
103 omap2_mbox_enable_irq(mbox, IRQ_RX);
104
100 return 0; 105 return 0;
101} 106}
102 107
103static inline void omap2_mbox_shutdown(struct omap_mbox *mbox) 108static void omap2_mbox_shutdown(struct omap_mbox *mbox)
104{ 109{
105 clk_disable(mbox_ick_handle); 110 clk_disable(mbox_ick_handle);
106 clk_put(mbox_ick_handle); 111 clk_put(mbox_ick_handle);
107} 112}
108 113
109/* Mailbox FIFO handle functions */ 114/* Mailbox FIFO handle functions */
110static inline mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox) 115static mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox)
111{ 116{
112 struct omap_mbox2_fifo *fifo = 117 struct omap_mbox2_fifo *fifo =
113 &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; 118 &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
114 return (mbox_msg_t) mbox_read_reg(fifo->msg); 119 return (mbox_msg_t) mbox_read_reg(fifo->msg);
115} 120}
116 121
117static inline void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg) 122static void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
118{ 123{
119 struct omap_mbox2_fifo *fifo = 124 struct omap_mbox2_fifo *fifo =
120 &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; 125 &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
121 mbox_write_reg(msg, fifo->msg); 126 mbox_write_reg(msg, fifo->msg);
122} 127}
123 128
124static inline int omap2_mbox_fifo_empty(struct omap_mbox *mbox) 129static int omap2_mbox_fifo_empty(struct omap_mbox *mbox)
125{ 130{
126 struct omap_mbox2_fifo *fifo = 131 struct omap_mbox2_fifo *fifo =
127 &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo; 132 &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
128 return (mbox_read_reg(fifo->msg_stat) == 0); 133 return (mbox_read_reg(fifo->msg_stat) == 0);
129} 134}
130 135
131static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox) 136static int omap2_mbox_fifo_full(struct omap_mbox *mbox)
132{ 137{
133 struct omap_mbox2_fifo *fifo = 138 struct omap_mbox2_fifo *fifo =
134 &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo; 139 &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
@@ -136,7 +141,7 @@ static inline int omap2_mbox_fifo_full(struct omap_mbox *mbox)
136} 141}
137 142
138/* Mailbox IRQ handle functions */ 143/* Mailbox IRQ handle functions */
139static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox, 144static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
140 omap_mbox_type_t irq) 145 omap_mbox_type_t irq)
141{ 146{
142 struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; 147 struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
@@ -147,7 +152,7 @@ static inline void omap2_mbox_enable_irq(struct omap_mbox *mbox,
147 mbox_write_reg(l, p->irqenable); 152 mbox_write_reg(l, p->irqenable);
148} 153}
149 154
150static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox, 155static void omap2_mbox_disable_irq(struct omap_mbox *mbox,
151 omap_mbox_type_t irq) 156 omap_mbox_type_t irq)
152{ 157{
153 struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; 158 struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
@@ -158,7 +163,7 @@ static inline void omap2_mbox_disable_irq(struct omap_mbox *mbox,
158 mbox_write_reg(l, p->irqenable); 163 mbox_write_reg(l, p->irqenable);
159} 164}
160 165
161static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox, 166static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
162 omap_mbox_type_t irq) 167 omap_mbox_type_t irq)
163{ 168{
164 struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; 169 struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
@@ -167,7 +172,7 @@ static inline void omap2_mbox_ack_irq(struct omap_mbox *mbox,
167 mbox_write_reg(bit, p->irqstatus); 172 mbox_write_reg(bit, p->irqstatus);
168} 173}
169 174
170static inline int omap2_mbox_is_irq(struct omap_mbox *mbox, 175static int omap2_mbox_is_irq(struct omap_mbox *mbox,
171 omap_mbox_type_t irq) 176 omap_mbox_type_t irq)
172{ 177{
173 struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv; 178 struct omap_mbox2_priv *p = (struct omap_mbox2_priv *)mbox->priv;
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index ab7649afd891..618f8111658a 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -30,7 +30,7 @@
30 30
31/* 31/*
32 * Architecture-specific global PRM registers 32 * Architecture-specific global PRM registers
33 * Use prm_{read,write}_reg() with these registers. 33 * Use __raw_{read,write}l() with these registers.
34 * 34 *
35 * With a few exceptions, these are the register names beginning with 35 * With a few exceptions, these are the register names beginning with
36 * PRCM_* on 24xx, and PRM_* on 34xx. (The exceptions are the 36 * PRCM_* on 24xx, and PRM_* on 34xx. (The exceptions are the
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index f9430f5ca9a8..27ce967ab9e5 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -58,7 +58,7 @@ static int __init dns323_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
58} 58}
59 59
60static struct hw_pci dns323_pci __initdata = { 60static struct hw_pci dns323_pci __initdata = {
61 .nr_controllers = 1, 61 .nr_controllers = 2,
62 .swizzle = pci_std_swizzle, 62 .swizzle = pci_std_swizzle,
63 .setup = orion5x_pci_sys_setup, 63 .setup = orion5x_pci_sys_setup,
64 .scan = orion5x_pci_sys_scan_bus, 64 .scan = orion5x_pci_sys_scan_bus,
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index 88410862feef..f5074b877b7f 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -138,7 +138,7 @@ static int __init kurobox_pro_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
138} 138}
139 139
140static struct hw_pci kurobox_pro_pci __initdata = { 140static struct hw_pci kurobox_pro_pci __initdata = {
141 .nr_controllers = 1, 141 .nr_controllers = 2,
142 .swizzle = pci_std_swizzle, 142 .swizzle = pci_std_swizzle,
143 .setup = orion5x_pci_sys_setup, 143 .setup = orion5x_pci_sys_setup,
144 .scan = orion5x_pci_sys_scan_bus, 144 .scan = orion5x_pci_sys_scan_bus,
diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri.c
index 43bf5a183e90..574839d7c132 100644
--- a/arch/arm/mach-pxa/colibri.c
+++ b/arch/arm/mach-pxa/colibri.c
@@ -98,7 +98,7 @@ static struct resource dm9000_resources[] = {
98 [2] = { 98 [2] = {
99 .start = COLIBRI_ETH_IRQ, 99 .start = COLIBRI_ETH_IRQ,
100 .end = COLIBRI_ETH_IRQ, 100 .end = COLIBRI_ETH_IRQ,
101 .flags = IORESOURCE_IRQ, 101 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
102 }, 102 },
103}; 103};
104 104
@@ -119,7 +119,6 @@ static void __init colibri_init(void)
119 /* DM9000 LAN */ 119 /* DM9000 LAN */
120 pxa_gpio_mode(GPIO78_nCS_2_MD); 120 pxa_gpio_mode(GPIO78_nCS_2_MD);
121 pxa_gpio_mode(GPIO_DM9000 | GPIO_IN); 121 pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
122 set_irq_type(COLIBRI_ETH_IRQ, IRQT_FALLING);
123 122
124 platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices)); 123 platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices));
125} 124}
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index e7d0fcd9b43f..dace3820f1ee 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -38,6 +38,7 @@
38#include <asm/arch/pxa-regs.h> 38#include <asm/arch/pxa-regs.h>
39#include <asm/arch/pxa2xx-regs.h> 39#include <asm/arch/pxa2xx-regs.h>
40#include <asm/arch/pxa2xx-gpio.h> 40#include <asm/arch/pxa2xx-gpio.h>
41#include <asm/arch/pxa27x-udc.h>
41#include <asm/arch/irda.h> 42#include <asm/arch/irda.h>
42#include <asm/arch/mmc.h> 43#include <asm/arch/mmc.h>
43#include <asm/arch/ohci.h> 44#include <asm/arch/ohci.h>
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 065087afb772..d045812f3399 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -332,7 +332,7 @@ ENTRY(arm925_dma_flush_range)
332#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 332#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
333 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 333 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
334#else 334#else
335 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 335 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
336#endif 336#endif
337 add r0, r0, #CACHE_DLINESIZE 337 add r0, r0, #CACHE_DLINESIZE
338 cmp r0, r1 338 cmp r0, r1
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 997db8472b5c..4cd33169a7c9 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -295,7 +295,7 @@ ENTRY(arm926_dma_flush_range)
295#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 295#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
296 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 296 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
297#else 297#else
298 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 298 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
299#endif 299#endif
300 add r0, r0, #CACHE_DLINESIZE 300 add r0, r0, #CACHE_DLINESIZE
301 cmp r0, r1 301 cmp r0, r1
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index 44ead902bd54..1a3d63df8e90 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -222,7 +222,7 @@ ENTRY(arm940_dma_flush_range)
222#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 222#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
223 mcr p15, 0, r3, c7, c14, 2 @ clean/flush D entry 223 mcr p15, 0, r3, c7, c14, 2 @ clean/flush D entry
224#else 224#else
225 mcr p15, 0, r3, c7, c10, 2 @ clean D entry 225 mcr p15, 0, r3, c7, c6, 2 @ invalidate D entry
226#endif 226#endif
227 subs r3, r3, #1 << 26 227 subs r3, r3, #1 << 26
228 bcs 2b @ entries 63 to 0 228 bcs 2b @ entries 63 to 0
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index 2218b0c01330..82d579ac9b98 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -265,7 +265,7 @@ ENTRY(arm946_dma_flush_range)
265#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 265#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
266 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 266 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
267#else 267#else
268 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 268 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
269#endif 269#endif
270 add r0, r0, #CACHE_DLINESIZE 270 add r0, r0, #CACHE_DLINESIZE
271 cmp r0, r1 271 cmp r0, r1
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 72d34a23a2ec..2946c193a7d6 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -134,9 +134,17 @@ void clk_disable(struct clk *clk)
134 return; 134 return;
135 135
136 spin_lock_irqsave(&clockfw_lock, flags); 136 spin_lock_irqsave(&clockfw_lock, flags);
137 BUG_ON(clk->usecount == 0); 137 if (clk->usecount == 0) {
138 printk(KERN_ERR "Trying disable clock %s with 0 usecount\n",
139 clk->name);
140 WARN_ON(1);
141 goto out;
142 }
143
138 if (arch_clock->clk_disable) 144 if (arch_clock->clk_disable)
139 arch_clock->clk_disable(clk); 145 arch_clock->clk_disable(clk);
146
147out:
140 spin_unlock_irqrestore(&clockfw_lock, flags); 148 spin_unlock_irqrestore(&clockfw_lock, flags);
141} 149}
142EXPORT_SYMBOL(clk_disable); 150EXPORT_SYMBOL(clk_disable);
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 793740686be2..c00eda588cd8 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -604,6 +604,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
604 chan->data = data; 604 chan->data = data;
605#ifndef CONFIG_ARCH_OMAP1 605#ifndef CONFIG_ARCH_OMAP1
606 chan->chain_id = -1; 606 chan->chain_id = -1;
607 chan->next_linked_ch = -1;
607#endif 608#endif
608 chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ; 609 chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ;
609 610
@@ -1087,7 +1088,6 @@ int omap_request_dma_chain(int dev_id, const char *dev_name,
1087 printk(KERN_ERR "omap_dma: Request failed %d\n", err); 1088 printk(KERN_ERR "omap_dma: Request failed %d\n", err);
1088 return err; 1089 return err;
1089 } 1090 }
1090 dma_chan[channels[i]].next_linked_ch = -1;
1091 dma_chan[channels[i]].prev_linked_ch = -1; 1091 dma_chan[channels[i]].prev_linked_ch = -1;
1092 dma_chan[channels[i]].state = DMA_CH_NOTSTARTED; 1092 dma_chan[channels[i]].state = DMA_CH_NOTSTARTED;
1093 1093
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 1945ddfec18d..6f33f58bca45 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -355,7 +355,6 @@ static int omap_mbox_init(struct omap_mbox *mbox)
355 "failed to register mailbox interrupt:%d\n", ret); 355 "failed to register mailbox interrupt:%d\n", ret);
356 goto fail_request_irq; 356 goto fail_request_irq;
357 } 357 }
358 enable_mbox_irq(mbox, IRQ_RX);
359 358
360 mq = mbox_queue_alloc(mbox, mbox_txq_fn, mbox_tx_work); 359 mq = mbox_queue_alloc(mbox, mbox_txq_fn, mbox_tx_work);
361 if (!mq) { 360 if (!mq) {