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authorAndi Kleen <ak@suse.de>2006-09-26 04:52:41 -0400
committerAndi Kleen <andi@basil.nowhere.org>2006-09-26 04:52:41 -0400
commit27fbe5b28a2ffef171c6005f304ea4f80fcdcc01 (patch)
treef4eb0e75d54fd78570894d64ed8c4cfbff03bb48 /arch
parent35d534a3ff4905c0a7bddbad0fc9df55967742c7 (diff)
[PATCH] Use string instructions for Core2 copy/clear
It is faster than using a unrolled loop for the use cases the kernel cares about (cached, sizes typically < 4K) Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86_64/kernel/setup.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index e328e3eb8cbe..085f2e09b9dc 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -843,6 +843,8 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
843 if ((c->x86 == 0xf && c->x86_model >= 0x03) || 843 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
844 (c->x86 == 0x6 && c->x86_model >= 0x0e)) 844 (c->x86 == 0x6 && c->x86_model >= 0x0e))
845 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability); 845 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
846 if (c->x86 == 6)
847 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
846 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); 848 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
847 c->x86_max_cores = intel_num_cpu_cores(c); 849 c->x86_max_cores = intel_num_cpu_cores(c);
848 850