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authorMike Frysinger <michael.frysinger@analog.com>2007-07-24 23:19:14 -0400
committerBryan Wu <bryan.wu@analog.com>2007-07-24 23:19:14 -0400
commit1aafd9091226a02b481298315f959f777294684e (patch)
treeb09e0aaabb6aacd882499a69b28638cbd669dbba /arch
parent287050fe13bf34824f03b4351002b0e2db4ee5cb (diff)
Blackfin arch: revise anomaly handling by basing things on the compiler not the kconfig defines
revise anomaly handling by basing things on the compiler not the kconfig defines, so the header is stable and usable outside of the kernel. This also allows us to move some code from preprocessing to compiling (gcc culls dead code) which should help with code quality (readability, catch minor bugs, etc...). Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/blackfin/kernel/bfin_gpio.c10
-rw-r--r--arch/blackfin/kernel/cplbinit.c4
-rw-r--r--arch/blackfin/kernel/setup.c20
-rw-r--r--arch/blackfin/lib/memcmp.S2
-rw-r--r--arch/blackfin/lib/memcpy.S2
-rw-r--r--arch/blackfin/lib/memmove.S4
-rw-r--r--arch/blackfin/mach-bf533/head.S10
-rw-r--r--arch/blackfin/mach-bf537/head.S18
-rw-r--r--arch/blackfin/mach-bf548/head.S2
-rw-r--r--arch/blackfin/mach-bf561/head.S11
-rw-r--r--arch/blackfin/mach-common/cacheinit.S2
-rw-r--r--arch/blackfin/mach-common/cplbmgr.S2
-rw-r--r--arch/blackfin/mach-common/entry.S10
-rw-r--r--arch/blackfin/mach-common/interrupt.S6
14 files changed, 51 insertions, 52 deletions
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index 5d488ef965ce..b818a8da1215 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -330,7 +330,7 @@ EXPORT_SYMBOL(set_gpio_ ## name);
330SET_GPIO_SC(maska) 330SET_GPIO_SC(maska)
331SET_GPIO_SC(maskb) 331SET_GPIO_SC(maskb)
332 332
333#if defined(ANOMALY_05000311) 333#if ANOMALY_05000311
334void set_gpio_data(unsigned short gpio, unsigned short arg) 334void set_gpio_data(unsigned short gpio, unsigned short arg)
335{ 335{
336 unsigned long flags; 336 unsigned long flags;
@@ -349,7 +349,7 @@ SET_GPIO_SC(data)
349#endif 349#endif
350 350
351 351
352#if defined(ANOMALY_05000311) 352#if ANOMALY_05000311
353void set_gpio_toggle(unsigned short gpio) 353void set_gpio_toggle(unsigned short gpio)
354{ 354{
355 unsigned long flags; 355 unsigned long flags;
@@ -387,7 +387,7 @@ SET_GPIO_P(maska)
387SET_GPIO_P(maskb) 387SET_GPIO_P(maskb)
388 388
389 389
390#if defined(ANOMALY_05000311) 390#if ANOMALY_05000311
391void set_gpiop_data(unsigned short gpio, unsigned short arg) 391void set_gpiop_data(unsigned short gpio, unsigned short arg)
392{ 392{
393 unsigned long flags; 393 unsigned long flags;
@@ -421,7 +421,7 @@ GET_GPIO(maska)
421GET_GPIO(maskb) 421GET_GPIO(maskb)
422 422
423 423
424#if defined(ANOMALY_05000311) 424#if ANOMALY_05000311
425unsigned short get_gpio_data(unsigned short gpio) 425unsigned short get_gpio_data(unsigned short gpio)
426{ 426{
427 unsigned long flags; 427 unsigned long flags;
@@ -455,7 +455,7 @@ GET_GPIO_P(both)
455GET_GPIO_P(maska) 455GET_GPIO_P(maska)
456GET_GPIO_P(maskb) 456GET_GPIO_P(maskb)
457 457
458#if defined(ANOMALY_05000311) 458#if ANOMALY_05000311
459unsigned short get_gpiop_data(unsigned short gpio) 459unsigned short get_gpiop_data(unsigned short gpio)
460{ 460{
461 unsigned long flags; 461 unsigned long flags;
diff --git a/arch/blackfin/kernel/cplbinit.c b/arch/blackfin/kernel/cplbinit.c
index bbdb403fcb55..3b1c87c9fd51 100644
--- a/arch/blackfin/kernel/cplbinit.c
+++ b/arch/blackfin/kernel/cplbinit.c
@@ -230,8 +230,8 @@ static void __fill_code_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_en
230 cplb_data[i].psize, 230 cplb_data[i].psize,
231 cplb_data[i].i_conf); 231 cplb_data[i].i_conf);
232 } else { 232 } else {
233#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) 233#if defined(CONFIG_BLKFIN_CACHE)
234 if (i == SDRAM_KERN) { 234 if (ANOMALY_05000263 && i == SDRAM_KERN) {
235 fill_cplbtab(t, 235 fill_cplbtab(t,
236 cplb_data[i].start, 236 cplb_data[i].start,
237 cplb_data[i].end, 237 cplb_data[i].end,
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 88f221b89b33..02c15272f8ef 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -179,14 +179,16 @@ void __init setup_arch(char **cmdline_p)
179 cclk = get_cclk(); 179 cclk = get_cclk();
180 sclk = get_sclk(); 180 sclk = get_sclk();
181 181
182#if !defined(CONFIG_BFIN_KERNEL_CLOCK) && defined(ANOMALY_05000273) 182#if !defined(CONFIG_BFIN_KERNEL_CLOCK)
183 if (cclk == sclk) 183 if (ANOMALY_05000273 && cclk == sclk)
184 panic("ANOMALY 05000273, SCLK can not be same as CCLK"); 184 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
185#endif 185#endif
186 186
187#if defined(ANOMALY_05000266) 187#ifdef BF561_FAMILY
188 bfin_read_IMDMA_D0_IRQ_STATUS(); 188 if (ANOMALY_05000266) {
189 bfin_read_IMDMA_D1_IRQ_STATUS(); 189 bfin_read_IMDMA_D0_IRQ_STATUS();
190 bfin_read_IMDMA_D1_IRQ_STATUS();
191 }
190#endif 192#endif
191 193
192#ifdef DEBUG_SERIAL_EARLY_INIT 194#ifdef DEBUG_SERIAL_EARLY_INIT
@@ -260,7 +262,7 @@ void __init setup_arch(char **cmdline_p)
260 && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) 262 && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
261 mtd_size = 263 mtd_size =
262 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2])); 264 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
263# if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) 265# if (defined(CONFIG_BLKFIN_CACHE) && ANOMALY_05000263)
264 /* Due to a Hardware Anomaly we need to limit the size of usable 266 /* Due to a Hardware Anomaly we need to limit the size of usable
265 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on 267 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
266 * 05000263 - Hardware loop corrupted when taking an ICPLB exception 268 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
@@ -289,7 +291,7 @@ void __init setup_arch(char **cmdline_p)
289 _ebss = memory_mtd_start; /* define _ebss for compatible */ 291 _ebss = memory_mtd_start; /* define _ebss for compatible */
290#endif /* CONFIG_MTD_UCLINUX */ 292#endif /* CONFIG_MTD_UCLINUX */
291 293
292#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) 294#if (defined(CONFIG_BLKFIN_CACHE) && ANOMALY_05000263)
293 /* Due to a Hardware Anomaly we need to limit the size of usable 295 /* Due to a Hardware Anomaly we need to limit the size of usable
294 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on 296 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
295 * 05000263 - Hardware loop corrupted when taking an ICPLB exception 297 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
@@ -337,10 +339,8 @@ void __init setup_arch(char **cmdline_p)
337 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu Mhz System Clock\n", 339 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu Mhz System Clock\n",
338 cclk / 1000000, sclk / 1000000); 340 cclk / 1000000, sclk / 1000000);
339 341
340#if defined(ANOMALY_05000273) 342 if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
341 if ((cclk >> 1) <= sclk)
342 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n"); 343 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
343#endif
344 344
345 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20); 345 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
346 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20); 346 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
diff --git a/arch/blackfin/lib/memcmp.S b/arch/blackfin/lib/memcmp.S
index b88c5d2d1ebe..219fa2877c62 100644
--- a/arch/blackfin/lib/memcmp.S
+++ b/arch/blackfin/lib/memcmp.S
@@ -61,7 +61,7 @@ ENTRY(_memcmp)
61 61
62 LSETUP (.Lquad_loop_s, .Lquad_loop_e) LC0=P1; 62 LSETUP (.Lquad_loop_s, .Lquad_loop_e) LC0=P1;
63.Lquad_loop_s: 63.Lquad_loop_s:
64#ifdef ANOMALY_05000202 64#if ANOMALY_05000202
65 R0 = [P0++]; 65 R0 = [P0++];
66 R1 = [I0++]; 66 R1 = [I0++];
67#else 67#else
diff --git a/arch/blackfin/lib/memcpy.S b/arch/blackfin/lib/memcpy.S
index 14a5585bbd02..2e6336492b4b 100644
--- a/arch/blackfin/lib/memcpy.S
+++ b/arch/blackfin/lib/memcpy.S
@@ -98,7 +98,7 @@ ENTRY(_memcpy)
98 R0 = R1; 98 R0 = R1;
99 I1 = P1; 99 I1 = P1;
100 R3 = [I1++]; 100 R3 = [I1++];
101#ifdef ANOMALY_05000202 101#if ANOMALY_05000202
102.Lword_loops: 102.Lword_loops:
103 [P0++] = R3; 103 [P0++] = R3;
104.Lword_loope: 104.Lword_loope:
diff --git a/arch/blackfin/lib/memmove.S b/arch/blackfin/lib/memmove.S
index 6ee6e206e77c..33f8653145b7 100644
--- a/arch/blackfin/lib/memmove.S
+++ b/arch/blackfin/lib/memmove.S
@@ -70,7 +70,7 @@ ENTRY(_memmove)
70 R1 = [I0++]; 70 R1 = [I0++];
71 71
72 LSETUP (.Lquad_loops, .Lquad_loope) LC0=P1; 72 LSETUP (.Lquad_loops, .Lquad_loope) LC0=P1;
73#ifdef ANOMALY_05000202 73#if ANOMALY_05000202
74.Lquad_loops: 74.Lquad_loops:
75 [P0++] = R1; 75 [P0++] = R1;
76.Lquad_loope: 76.Lquad_loope:
@@ -102,7 +102,7 @@ ENTRY(_memmove)
102 R1 = B[P3--] (Z); 102 R1 = B[P3--] (Z);
103 CC = P2 == 0; 103 CC = P2 == 0;
104 IF CC JUMP .Lno_loop; 104 IF CC JUMP .Lno_loop;
105#ifdef ANOMALY_05000245 105#if ANOMALY_05000245
106 NOP; 106 NOP;
107 NOP; 107 NOP;
108#endif 108#endif
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S
index 7dd0e9c3a936..5aeffd06fe71 100644
--- a/arch/blackfin/mach-bf533/head.S
+++ b/arch/blackfin/mach-bf533/head.S
@@ -151,13 +151,13 @@ ENTRY(__start)
151 R0 = R0 & R1; 151 R0 = R0 & R1;
152 152
153 /* Anomaly 05000125 */ 153 /* Anomaly 05000125 */
154#ifdef ANOMALY_05000125 154#if ANOMALY_05000125
155 CLI R2; 155 CLI R2;
156 SSYNC; 156 SSYNC;
157#endif 157#endif
158 [p0] = R0; 158 [p0] = R0;
159 SSYNC; 159 SSYNC;
160#ifdef ANOMALY_05000125 160#if ANOMALY_05000125
161 STI R2; 161 STI R2;
162#endif 162#endif
163 163
@@ -169,13 +169,13 @@ ENTRY(__start)
169 R0 = R0 & R1; 169 R0 = R0 & R1;
170 170
171 /* Anomaly 05000125 */ 171 /* Anomaly 05000125 */
172#ifdef ANOMALY_05000125 172#if ANOMALY_05000125
173 CLI R2; 173 CLI R2;
174 SSYNC; 174 SSYNC;
175#endif 175#endif
176 [p0] = R0; 176 [p0] = R0;
177 SSYNC; 177 SSYNC;
178#ifdef ANOMALY_05000125 178#if ANOMALY_05000125
179 STI R2; 179 STI R2;
180#endif 180#endif
181 181
@@ -264,7 +264,7 @@ ENTRY(__start)
264 p0.l = .LWAIT_HERE; 264 p0.l = .LWAIT_HERE;
265 p0.h = .LWAIT_HERE; 265 p0.h = .LWAIT_HERE;
266 reti = p0; 266 reti = p0;
267#if defined(ANOMALY_05000281) 267#if ANOMALY_05000281
268 nop; nop; nop; 268 nop; nop; nop;
269#endif 269#endif
270 rti; 270 rti;
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index 429c8a1019da..d9b411adf6a7 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -107,13 +107,13 @@ ENTRY(__start)
107 R0 = R0 & R1; 107 R0 = R0 & R1;
108 108
109 /* Anomaly 05000125 */ 109 /* Anomaly 05000125 */
110#ifdef ANOMALY_05000125 110#if ANOMALY_05000125
111 CLI R2; 111 CLI R2;
112 SSYNC; 112 SSYNC;
113#endif 113#endif
114 [p0] = R0; 114 [p0] = R0;
115 SSYNC; 115 SSYNC;
116#ifdef ANOMALY_05000125 116#if ANOMALY_05000125
117 STI R2; 117 STI R2;
118#endif 118#endif
119 119
@@ -125,13 +125,13 @@ ENTRY(__start)
125 R0 = R0 & R1; 125 R0 = R0 & R1;
126 126
127 /* Anomaly 05000125 */ 127 /* Anomaly 05000125 */
128#ifdef ANOMALY_05000125 128#if ANOMALY_05000125
129 CLI R2; 129 CLI R2;
130 SSYNC; 130 SSYNC;
131#endif 131#endif
132 [p0] = R0; 132 [p0] = R0;
133 SSYNC; 133 SSYNC;
134#ifdef ANOMALY_05000125 134#if ANOMALY_05000125
135 STI R2; 135 STI R2;
136#endif 136#endif
137 137
@@ -141,12 +141,12 @@ ENTRY(__start)
141 */ 141 */
142 p0.h = hi(BFIN_PORT_MUX); 142 p0.h = hi(BFIN_PORT_MUX);
143 p0.l = lo(BFIN_PORT_MUX); 143 p0.l = lo(BFIN_PORT_MUX);
144#ifdef ANOMALY_05000212 144#if ANOMALY_05000212
145 R0.L = W[P0]; /* Read */ 145 R0.L = W[P0]; /* Read */
146 SSYNC; 146 SSYNC;
147#endif 147#endif
148 R0 = (PGDE_UART | PFTE_UART)(Z); 148 R0 = (PGDE_UART | PFTE_UART)(Z);
149#ifdef ANOMALY_05000212 149#if ANOMALY_05000212
150 W[P0] = R0.L; /* Write */ 150 W[P0] = R0.L; /* Write */
151 SSYNC; 151 SSYNC;
152#endif 152#endif
@@ -155,12 +155,12 @@ ENTRY(__start)
155 155
156 p0.h = hi(PORTF_FER); 156 p0.h = hi(PORTF_FER);
157 p0.l = lo(PORTF_FER); 157 p0.l = lo(PORTF_FER);
158#ifdef ANOMALY_05000212 158#if ANOMALY_05000212
159 R0.L = W[P0]; /* Read */ 159 R0.L = W[P0]; /* Read */
160 SSYNC; 160 SSYNC;
161#endif 161#endif
162 R0 = 0x000F(Z); 162 R0 = 0x000F(Z);
163#ifdef ANOMALY_05000212 163#if ANOMALY_05000212
164 W[P0] = R0.L; /* Write */ 164 W[P0] = R0.L; /* Write */
165 SSYNC; 165 SSYNC;
166#endif 166#endif
@@ -274,7 +274,7 @@ ENTRY(__start)
274 p0.l = .LWAIT_HERE; 274 p0.l = .LWAIT_HERE;
275 p0.h = .LWAIT_HERE; 275 p0.h = .LWAIT_HERE;
276 reti = p0; 276 reti = p0;
277#if defined(ANOMALY_05000281) 277#if ANOMALY_05000281
278 nop; nop; nop; 278 nop; nop; nop;
279#endif 279#endif
280 rti; 280 rti;
diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S
index 06751ae8b857..e5e56df3bf46 100644
--- a/arch/blackfin/mach-bf548/head.S
+++ b/arch/blackfin/mach-bf548/head.S
@@ -172,7 +172,7 @@ ENTRY(__stext)
172 p0.l = .LWAIT_HERE; 172 p0.l = .LWAIT_HERE;
173 p0.h = .LWAIT_HERE; 173 p0.h = .LWAIT_HERE;
174 reti = p0; 174 reti = p0;
175#if defined (ANOMALY_05000281) 175#if ANOMALY_05000281
176 nop; 176 nop;
177 nop; 177 nop;
178 nop; 178 nop;
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index 38650a628980..b1d0e54a97a9 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -106,14 +106,13 @@ ENTRY(__start)
106 R0 = ~ENICPLB; 106 R0 = ~ENICPLB;
107 R0 = R0 & R1; 107 R0 = R0 & R1;
108 108
109 /* Anomaly 05000125 */ 109#if ANOMALY_05000125
110#ifdef ANOMALY_05000125
111 CLI R2; 110 CLI R2;
112 SSYNC; 111 SSYNC;
113#endif 112#endif
114 [p0] = R0; 113 [p0] = R0;
115 SSYNC; 114 SSYNC;
116#ifdef ANOMALY_05000125 115#if ANOMALY_05000125
117 STI R2; 116 STI R2;
118#endif 117#endif
119 118
@@ -125,13 +124,13 @@ ENTRY(__start)
125 R0 = R0 & R1; 124 R0 = R0 & R1;
126 125
127 /* Anomaly 05000125 */ 126 /* Anomaly 05000125 */
128#ifdef ANOMALY_05000125 127#if ANOMALY_05000125
129 CLI R2; 128 CLI R2;
130 SSYNC; 129 SSYNC;
131#endif 130#endif
132 [p0] = R0; 131 [p0] = R0;
133 SSYNC; 132 SSYNC;
134#ifdef ANOMALY_05000125 133#if ANOMALY_05000125
135 STI R2; 134 STI R2;
136#endif 135#endif
137 136
@@ -220,7 +219,7 @@ ENTRY(__start)
220 p0.l = .LWAIT_HERE; 219 p0.l = .LWAIT_HERE;
221 p0.h = .LWAIT_HERE; 220 p0.h = .LWAIT_HERE;
222 reti = p0; 221 reti = p0;
223#if defined(ANOMALY_05000281) 222#if ANOMALY_05000281
224 nop; nop; nop; 223 nop; nop; nop;
225#endif 224#endif
226 rti; 225 rti;
diff --git a/arch/blackfin/mach-common/cacheinit.S b/arch/blackfin/mach-common/cacheinit.S
index 5be6b975ae4a..05c0c77510b2 100644
--- a/arch/blackfin/mach-common/cacheinit.S
+++ b/arch/blackfin/mach-common/cacheinit.S
@@ -38,7 +38,7 @@
38 38
39.text 39.text
40 40
41#ifdef ANOMALY_05000125 41#if ANOMALY_05000125
42#if defined(CONFIG_BLKFIN_CACHE) 42#if defined(CONFIG_BLKFIN_CACHE)
43ENTRY(_bfin_write_IMEM_CONTROL) 43ENTRY(_bfin_write_IMEM_CONTROL)
44 44
diff --git a/arch/blackfin/mach-common/cplbmgr.S b/arch/blackfin/mach-common/cplbmgr.S
index e4b47e09cf13..6c256baf087d 100644
--- a/arch/blackfin/mach-common/cplbmgr.S
+++ b/arch/blackfin/mach-common/cplbmgr.S
@@ -405,7 +405,7 @@ ENTRY(_cplb_mgr)
405 P3.L = _page_size_table; /* retrieve end address */ 405 P3.L = _page_size_table; /* retrieve end address */
406 P3.H = _page_size_table; /* retrieve end address */ 406 P3.H = _page_size_table; /* retrieve end address */
407 R3 = 0x1002; /* 16th - position, 2 bits -length */ 407 R3 = 0x1002; /* 16th - position, 2 bits -length */
408#ifdef ANOMALY_05000209 408#if ANOMALY_05000209
409 nop; /* Anomaly 05000209 */ 409 nop; /* Anomaly 05000209 */
410#endif 410#endif
411 R7 = EXTRACT(R1,R3.l); 411 R7 = EXTRACT(R1,R3.l);
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 960458808344..207e69786b40 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -69,7 +69,7 @@
69 * patch up CPLB misses on the kernel stack. 69 * patch up CPLB misses on the kernel stack.
70 */ 70 */
71ENTRY(_ex_dcplb) 71ENTRY(_ex_dcplb)
72#if defined(ANOMALY_05000261) 72#if ANOMALY_05000261
73 /* 73 /*
74 * Work around an anomaly: if we see a new DCPLB fault, return 74 * Work around an anomaly: if we see a new DCPLB fault, return
75 * without doing anything. Then, if we get the same fault again, 75 * without doing anything. Then, if we get the same fault again,
@@ -137,7 +137,7 @@ ENTRY(_ex_single_step)
137 137
138_return_from_exception: 138_return_from_exception:
139 DEBUG_START_HWTRACE(p5, r7) 139 DEBUG_START_HWTRACE(p5, r7)
140#ifdef ANOMALY_05000257 140#if ANOMALY_05000257
141 R7=LC0; 141 R7=LC0;
142 LC0=R7; 142 LC0=R7;
143 R7=LC1; 143 R7=LC1;
@@ -634,7 +634,7 @@ ENTRY(_return_from_int)
634 p1.h = _schedule_and_signal_from_int; 634 p1.h = _schedule_and_signal_from_int;
635 [p0] = p1; 635 [p0] = p1;
636 csync; 636 csync;
637#if defined(ANOMALY_05000281) 637#if ANOMALY_05000281
638 r0.l = lo(CONFIG_BOOT_LOAD); 638 r0.l = lo(CONFIG_BOOT_LOAD);
639 r0.h = hi(CONFIG_BOOT_LOAD); 639 r0.h = hi(CONFIG_BOOT_LOAD);
640 reti = r0; 640 reti = r0;
@@ -648,7 +648,7 @@ ENTRY(_return_from_int)
648ENDPROC(_return_from_int) 648ENDPROC(_return_from_int)
649 649
650ENTRY(_lower_to_irq14) 650ENTRY(_lower_to_irq14)
651#if defined(ANOMALY_05000281) 651#if ANOMALY_05000281
652 r0.l = lo(CONFIG_BOOT_LOAD); 652 r0.l = lo(CONFIG_BOOT_LOAD);
653 r0.h = hi(CONFIG_BOOT_LOAD); 653 r0.h = hi(CONFIG_BOOT_LOAD);
654 reti = r0; 654 reti = r0;
@@ -1184,7 +1184,7 @@ _exception_stack:
1184 .endr 1184 .endr
1185_exception_stack_top: 1185_exception_stack_top:
1186 1186
1187#if defined(ANOMALY_05000261) 1187#if ANOMALY_05000261
1188/* Used by the assembly entry point to work around an anomaly. */ 1188/* Used by the assembly entry point to work around an anomaly. */
1189_last_cplb_fault_retx: 1189_last_cplb_fault_retx:
1190 .long 0; 1190 .long 0;
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 203e20709163..14ef800a564d 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -140,7 +140,7 @@ __common_int_entry:
140 fp = 0; 140 fp = 0;
141#endif 141#endif
142 142
143#if defined (ANOMALY_05000283) || defined (ANOMALY_05000315) 143#if ANOMALY_05000283 || ANOMALY_05000315
144 cc = r7 == r7; 144 cc = r7 == r7;
145 p5.h = 0xffc0; 145 p5.h = 0xffc0;
146 p5.l = 0x0014; 146 p5.l = 0x0014;
@@ -163,7 +163,7 @@ ENTRY(_evt_ivhw)
163#ifdef CONFIG_FRAME_POINTER 163#ifdef CONFIG_FRAME_POINTER
164 fp = 0; 164 fp = 0;
165#endif 165#endif
166#ifdef ANOMALY_05000283 166#if ANOMALY_05000283
167 cc = r7 == r7; 167 cc = r7 == r7;
168 p5.h = 0xffc0; 168 p5.h = 0xffc0;
169 p5.l = 0x0014; 169 p5.l = 0x0014;
@@ -207,7 +207,7 @@ ENTRY(_evt_evt2)
207#ifdef CONFIG_FRAME_POINTER 207#ifdef CONFIG_FRAME_POINTER
208 fp = 0; 208 fp = 0;
209#endif 209#endif
210#ifdef ANOMALY_05000283 210#if ANOMALY_05000283
211 cc = r7 == r7; 211 cc = r7 == r7;
212 p5.h = 0xffc0; 212 p5.h = 0xffc0;
213 p5.l = 0x0014; 213 p5.l = 0x0014;