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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-26 13:03:40 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-26 13:03:40 -0400
commitf99d055398d53c8f769d5153b3fdce1d2556e7ff (patch)
tree3f0fb0b13b70179bf2c58d6fb5bfc7641c925de7 /arch
parent2c518959f082c549d6c6dd9b5380aec40c3eb07f (diff)
parent24cecc1be62c37231fda15054a3d4d235ada38c5 (diff)
Merge branch 'for_linus' of git://github.com/at91linux/linux-2.6-at91
* 'for_linus' of git://github.com/at91linux/linux-2.6-at91: AT91: rtc: enable built-in RTC in Kconfig for at91sam9g45 family at91/atmel-mci: inclusion of sd/mmc driver in at91sam9g45 chip and board AT91: pm: make sure that r0 is 0 when dealing with cache operations AT91: pm: use plain cpu_do_idle() for "wait for interrupt" AT91: reset: extend alternate reset procedure to several chips AT91: reset routine cleanup, remove not needed icache flush AT91: trivial: align comment of at91sam9g20_reset with one more tab AT91: Fix AT91SAM9G20 reset as per the errata in the data sheet AT91: add board support for Pcontrol_G20
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/configs/pcontrol_g20_defconfig175
-rw-r--r--arch/arm/mach-at91/Kconfig6
-rw-r--r--arch/arm/mach-at91/Makefile13
-rw-r--r--arch/arm/mach-at91/at91sam9260.c7
-rw-r--r--arch/arm/mach-at91/at91sam9261.c7
-rw-r--r--arch/arm/mach-at91/at91sam9263.c7
-rw-r--r--arch/arm/mach-at91/at91sam9_alt_reset.S48
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c165
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c7
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c322
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c24
-rw-r--r--arch/arm/mach-at91/generic.h3
-rw-r--r--arch/arm/mach-at91/pm.c15
-rw-r--r--arch/arm/mach-at91/pm.h5
-rw-r--r--arch/arm/mach-at91/pm_slowclock.S1
15 files changed, 771 insertions, 34 deletions
diff --git a/arch/arm/configs/pcontrol_g20_defconfig b/arch/arm/configs/pcontrol_g20_defconfig
new file mode 100644
index 000000000000..b42ee62c4d77
--- /dev/null
+++ b/arch/arm/configs/pcontrol_g20_defconfig
@@ -0,0 +1,175 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_CROSS_COMPILE="/opt/arm-2010q1/bin/arm-none-linux-gnueabi-"
3# CONFIG_LOCALVERSION_AUTO is not set
4# CONFIG_SWAP is not set
5CONFIG_SYSVIPC=y
6CONFIG_POSIX_MQUEUE=y
7CONFIG_TREE_PREEMPT_RCU=y
8CONFIG_IKCONFIG=y
9CONFIG_IKCONFIG_PROC=y
10CONFIG_LOG_BUF_SHIFT=14
11CONFIG_NAMESPACES=y
12CONFIG_BLK_DEV_INITRD=y
13CONFIG_EMBEDDED=y
14# CONFIG_SYSCTL_SYSCALL is not set
15# CONFIG_KALLSYMS is not set
16# CONFIG_VM_EVENT_COUNTERS is not set
17# CONFIG_COMPAT_BRK is not set
18CONFIG_SLAB=y
19CONFIG_MODULES=y
20CONFIG_MODULE_UNLOAD=y
21# CONFIG_LBDAF is not set
22# CONFIG_BLK_DEV_BSG is not set
23CONFIG_DEFAULT_DEADLINE=y
24CONFIG_ARCH_AT91=y
25CONFIG_ARCH_AT91SAM9G20=y
26CONFIG_MACH_PCONTROL_G20=y
27CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
28CONFIG_NO_HZ=y
29CONFIG_HIGH_RES_TIMERS=y
30CONFIG_PREEMPT=y
31CONFIG_AEABI=y
32# CONFIG_OABI_COMPAT is not set
33CONFIG_ZBOOT_ROM_TEXT=0x0
34CONFIG_ZBOOT_ROM_BSS=0x0
35CONFIG_CMDLINE="console=ttyS0,115200 mem=128M mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) root=/dev/mmcblk0p1 rootwait rw"
36CONFIG_VFP=y
37CONFIG_BINFMT_MISC=y
38CONFIG_NET=y
39CONFIG_PACKET=y
40CONFIG_UNIX=y
41CONFIG_INET=y
42# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
43# CONFIG_INET_XFRM_MODE_TUNNEL is not set
44# CONFIG_INET_XFRM_MODE_BEET is not set
45# CONFIG_INET_LRO is not set
46# CONFIG_IPV6 is not set
47CONFIG_VLAN_8021Q=y
48# CONFIG_WIRELESS is not set
49CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
50# CONFIG_FW_LOADER is not set
51CONFIG_MTD=y
52CONFIG_MTD_PARTITIONS=y
53CONFIG_MTD_CMDLINE_PARTS=y
54CONFIG_MTD_CHAR=y
55CONFIG_MTD_BLOCK=y
56CONFIG_MTD_COMPLEX_MAPPINGS=y
57CONFIG_MTD_PHRAM=m
58CONFIG_MTD_NAND=y
59CONFIG_MTD_NAND_ATMEL=y
60CONFIG_BLK_DEV_LOOP=y
61CONFIG_BLK_DEV_RAM=y
62CONFIG_BLK_DEV_RAM_SIZE=8192
63CONFIG_ATMEL_TCLIB=y
64CONFIG_EEPROM_AT24=m
65CONFIG_SCSI=m
66# CONFIG_SCSI_PROC_FS is not set
67CONFIG_BLK_DEV_SD=m
68CONFIG_SCSI_MULTI_LUN=y
69# CONFIG_SCSI_LOWLEVEL is not set
70CONFIG_NETDEVICES=y
71CONFIG_MACVLAN=m
72CONFIG_TUN=m
73CONFIG_SMSC_PHY=m
74CONFIG_BROADCOM_PHY=m
75CONFIG_NET_ETHERNET=y
76CONFIG_MII=y
77CONFIG_MACB=y
78CONFIG_SMSC911X=m
79# CONFIG_NETDEV_1000 is not set
80# CONFIG_NETDEV_10000 is not set
81# CONFIG_WLAN is not set
82CONFIG_PPP=m
83CONFIG_PPP_ASYNC=m
84CONFIG_PPP_DEFLATE=m
85CONFIG_PPP_MPPE=m
86CONFIG_INPUT_POLLDEV=y
87CONFIG_INPUT_SPARSEKMAP=y
88# CONFIG_INPUT_MOUSEDEV is not set
89CONFIG_INPUT_EVDEV=m
90CONFIG_INPUT_EVBUG=m
91# CONFIG_KEYBOARD_ATKBD is not set
92CONFIG_KEYBOARD_GPIO=m
93CONFIG_KEYBOARD_MATRIX=m
94# CONFIG_INPUT_MOUSE is not set
95CONFIG_INPUT_TOUCHSCREEN=y
96CONFIG_INPUT_MISC=y
97CONFIG_INPUT_UINPUT=m
98CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
99# CONFIG_SERIO is not set
100# CONFIG_DEVKMEM is not set
101CONFIG_SERIAL_ATMEL=y
102CONFIG_SERIAL_ATMEL_CONSOLE=y
103CONFIG_SERIAL_MAX3100=m
104# CONFIG_LEGACY_PTYS is not set
105# CONFIG_HW_RANDOM is not set
106CONFIG_R3964=m
107CONFIG_I2C=m
108CONFIG_I2C_CHARDEV=m
109# CONFIG_I2C_HELPER_AUTO is not set
110CONFIG_I2C_GPIO=m
111CONFIG_SPI=y
112CONFIG_SPI_ATMEL=m
113CONFIG_SPI_SPIDEV=m
114CONFIG_GPIO_SYSFS=y
115CONFIG_W1=m
116CONFIG_W1_MASTER_GPIO=m
117CONFIG_W1_SLAVE_DS2431=m
118# CONFIG_HWMON is not set
119CONFIG_WATCHDOG=y
120CONFIG_AT91SAM9X_WATCHDOG=y
121# CONFIG_MFD_SUPPORT is not set
122# CONFIG_HID_SUPPORT is not set
123CONFIG_USB=y
124# CONFIG_USB_DEVICE_CLASS is not set
125CONFIG_USB_OHCI_HCD=y
126CONFIG_USB_STORAGE=m
127CONFIG_USB_LIBUSUAL=y
128CONFIG_USB_SERIAL=m
129CONFIG_USB_SERIAL_GENERIC=y
130CONFIG_USB_SERIAL_FTDI_SIO=m
131CONFIG_USB_SERIAL_PL2303=m
132CONFIG_USB_GADGET=y
133CONFIG_USB_ZERO=m
134CONFIG_USB_ETH=m
135CONFIG_USB_FILE_STORAGE=m
136CONFIG_USB_G_SERIAL=m
137CONFIG_USB_G_HID=m
138CONFIG_MMC=y
139CONFIG_MMC_UNSAFE_RESUME=y
140CONFIG_MMC_ATMELMCI=y
141CONFIG_NEW_LEDS=y
142CONFIG_LEDS_CLASS=y
143CONFIG_LEDS_GPIO=y
144CONFIG_LEDS_TRIGGERS=y
145CONFIG_LEDS_TRIGGER_TIMER=y
146CONFIG_LEDS_TRIGGER_HEARTBEAT=y
147CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
148CONFIG_RTC_CLASS=y
149CONFIG_RTC_DRV_AT91SAM9=y
150CONFIG_AUXDISPLAY=y
151CONFIG_UIO=y
152CONFIG_UIO_PDRV=y
153CONFIG_STAGING=y
154# CONFIG_STAGING_EXCLUDE_BUILD is not set
155CONFIG_IIO=y
156CONFIG_EXT2_FS=y
157CONFIG_EXT3_FS=y
158# CONFIG_EXT3_FS_XATTR is not set
159CONFIG_VFAT_FS=y
160CONFIG_TMPFS=y
161CONFIG_JFFS2_FS=y
162CONFIG_NFS_FS=y
163CONFIG_NFS_V3=y
164CONFIG_NFS_V4=y
165CONFIG_PARTITION_ADVANCED=y
166CONFIG_NLS_CODEPAGE_437=y
167CONFIG_NLS_CODEPAGE_850=y
168CONFIG_NLS_ISO8859_1=y
169CONFIG_NLS_ISO8859_15=y
170CONFIG_NLS_UTF8=y
171# CONFIG_RCU_CPU_STALL_DETECTOR is not set
172CONFIG_CRYPTO=y
173CONFIG_CRYPTO_ANSI_CPRNG=y
174# CONFIG_CRYPTO_HW is not set
175CONFIG_CRC_CCITT=y
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index abed4d15a7fd..c015b684b4fe 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -375,6 +375,12 @@ config MACH_STAMP9G20
375 evaluation board. 375 evaluation board.
376 <http://www.taskit.de/en/> 376 <http://www.taskit.de/en/>
377 377
378config MACH_PCONTROL_G20
379 bool "PControl G20 CPU module"
380 help
381 Select this if you are using taskit's Stamp9G20 CPU module on this
382 carrier board, beeing the decentralized unit of a building automation
383 system; featuring nvram, eth-switch, iso-rs485, display, io
378endif 384endif
379 385
380if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20) 386if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20)
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 412b3a471a4b..821eb842795f 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -11,12 +11,12 @@ obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
11 11
12# CPU-specific support 12# CPU-specific support
13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o 13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o 14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o 15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
16obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o 16obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o at91sam9_alt_reset.o
17obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o 17obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o at91sam9_alt_reset.o
18obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o 18obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o at91sam9_alt_reset.o
19obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o 19obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o at91sam9_alt_reset.o
20obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o 20obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
21obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o 21obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
22obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o 22obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o
@@ -65,6 +65,7 @@ obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
65obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o 65obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o
66obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o 66obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o
67obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o 67obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o
68obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o
68 69
69# AT91SAM9260/AT91SAM9G20 board-specific support 70# AT91SAM9260/AT91SAM9G20 board-specific support
70obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o 71obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 0894f1077be7..195208b30024 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -279,11 +279,6 @@ static struct at91_gpio_bank at91sam9260_gpio[] = {
279 } 279 }
280}; 280};
281 281
282static void at91sam9260_reset(void)
283{
284 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
285}
286
287static void at91sam9260_poweroff(void) 282static void at91sam9260_poweroff(void)
288{ 283{
289 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); 284 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
@@ -327,7 +322,7 @@ void __init at91sam9260_initialize(unsigned long main_clock)
327 else 322 else
328 iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc)); 323 iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
329 324
330 at91_arch_reset = at91sam9260_reset; 325 at91_arch_reset = at91sam9_alt_reset;
331 pm_power_off = at91sam9260_poweroff; 326 pm_power_off = at91sam9260_poweroff;
332 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) 327 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
333 | (1 << AT91SAM9260_ID_IRQ2); 328 | (1 << AT91SAM9260_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 4ecf37996c77..fcad88668504 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -257,11 +257,6 @@ static struct at91_gpio_bank at91sam9261_gpio[] = {
257 } 257 }
258}; 258};
259 259
260static void at91sam9261_reset(void)
261{
262 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
263}
264
265static void at91sam9261_poweroff(void) 260static void at91sam9261_poweroff(void)
266{ 261{
267 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); 262 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
@@ -283,7 +278,7 @@ void __init at91sam9261_initialize(unsigned long main_clock)
283 iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc)); 278 iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc));
284 279
285 280
286 at91_arch_reset = at91sam9261_reset; 281 at91_arch_reset = at91sam9_alt_reset;
287 pm_power_off = at91sam9261_poweroff; 282 pm_power_off = at91sam9261_poweroff;
288 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) 283 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
289 | (1 << AT91SAM9261_ID_IRQ2); 284 | (1 << AT91SAM9261_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 942792d630d8..249f900954d8 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -269,11 +269,6 @@ static struct at91_gpio_bank at91sam9263_gpio[] = {
269 } 269 }
270}; 270};
271 271
272static void at91sam9263_reset(void)
273{
274 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
275}
276
277static void at91sam9263_poweroff(void) 272static void at91sam9263_poweroff(void)
278{ 273{
279 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); 274 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
@@ -289,7 +284,7 @@ void __init at91sam9263_initialize(unsigned long main_clock)
289 /* Map peripherals */ 284 /* Map peripherals */
290 iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc)); 285 iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
291 286
292 at91_arch_reset = at91sam9263_reset; 287 at91_arch_reset = at91sam9_alt_reset;
293 pm_power_off = at91sam9263_poweroff; 288 pm_power_off = at91sam9263_poweroff;
294 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); 289 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
295 290
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
new file mode 100644
index 000000000000..e0256deb91fb
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -0,0 +1,48 @@
1/*
2 * reset AT91SAM9G20 as per errata
3 *
4 * (C) BitBox Ltd 2010
5 *
6 * unless the SDRAM is cleanly shutdown before we hit the
7 * reset register it can be left driving the data bus and
8 * killing the chance of a subsequent boot from NAND
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#include <linux/linkage.h>
17#include <asm/system.h>
18#include <mach/hardware.h>
19#include <mach/at91sam9_sdramc.h>
20#include <mach/at91_rstc.h>
21
22 .arm
23
24 .globl at91sam9_alt_reset
25
26at91sam9_alt_reset: mrc p15, 0, r0, c1, c0, 0
27 orr r0, r0, #CR_I
28 mcr p15, 0, r0, c1, c0, 0 @ enable I-cache
29
30 ldr r0, .at91_va_base_sdramc @ preload constants
31 ldr r1, .at91_va_base_rstc_cr
32
33 mov r2, #1
34 mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN
35 ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
36
37 .balign 32 @ align to cache line
38
39 str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access
40 str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM
41 str r4, [r1] @ reset processor
42
43 b .
44
45.at91_va_base_sdramc:
46 .word AT91_VA_BASE_SYS + AT91_SDRAMC0
47.at91_va_base_rstc_cr:
48 .word AT91_VA_BASE_SYS + AT91_RSTC_CR
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 1276babf84d5..1e8f275c17f6 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -15,6 +15,7 @@
15#include <linux/dma-mapping.h> 15#include <linux/dma-mapping.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/i2c-gpio.h> 17#include <linux/i2c-gpio.h>
18#include <linux/atmel-mci.h>
18 19
19#include <linux/fb.h> 20#include <linux/fb.h>
20#include <video/atmel_lcdc.h> 21#include <video/atmel_lcdc.h>
@@ -25,6 +26,7 @@
25#include <mach/at91sam9g45_matrix.h> 26#include <mach/at91sam9g45_matrix.h>
26#include <mach/at91sam9_smc.h> 27#include <mach/at91sam9_smc.h>
27#include <mach/at_hdmac.h> 28#include <mach/at_hdmac.h>
29#include <mach/atmel-mci.h>
28 30
29#include "generic.h" 31#include "generic.h"
30 32
@@ -350,6 +352,169 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {}
350 352
351 353
352/* -------------------------------------------------------------------- 354/* --------------------------------------------------------------------
355 * MMC / SD
356 * -------------------------------------------------------------------- */
357
358#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
359static u64 mmc_dmamask = DMA_BIT_MASK(32);
360static struct mci_platform_data mmc0_data, mmc1_data;
361
362static struct resource mmc0_resources[] = {
363 [0] = {
364 .start = AT91SAM9G45_BASE_MCI0,
365 .end = AT91SAM9G45_BASE_MCI0 + SZ_16K - 1,
366 .flags = IORESOURCE_MEM,
367 },
368 [1] = {
369 .start = AT91SAM9G45_ID_MCI0,
370 .end = AT91SAM9G45_ID_MCI0,
371 .flags = IORESOURCE_IRQ,
372 },
373};
374
375static struct platform_device at91sam9g45_mmc0_device = {
376 .name = "atmel_mci",
377 .id = 0,
378 .dev = {
379 .dma_mask = &mmc_dmamask,
380 .coherent_dma_mask = DMA_BIT_MASK(32),
381 .platform_data = &mmc0_data,
382 },
383 .resource = mmc0_resources,
384 .num_resources = ARRAY_SIZE(mmc0_resources),
385};
386
387static struct resource mmc1_resources[] = {
388 [0] = {
389 .start = AT91SAM9G45_BASE_MCI1,
390 .end = AT91SAM9G45_BASE_MCI1 + SZ_16K - 1,
391 .flags = IORESOURCE_MEM,
392 },
393 [1] = {
394 .start = AT91SAM9G45_ID_MCI1,
395 .end = AT91SAM9G45_ID_MCI1,
396 .flags = IORESOURCE_IRQ,
397 },
398};
399
400static struct platform_device at91sam9g45_mmc1_device = {
401 .name = "atmel_mci",
402 .id = 1,
403 .dev = {
404 .dma_mask = &mmc_dmamask,
405 .coherent_dma_mask = DMA_BIT_MASK(32),
406 .platform_data = &mmc1_data,
407 },
408 .resource = mmc1_resources,
409 .num_resources = ARRAY_SIZE(mmc1_resources),
410};
411
412/* Consider only one slot : slot 0 */
413void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
414{
415
416 if (!data)
417 return;
418
419 /* Must have at least one usable slot */
420 if (!data->slot[0].bus_width)
421 return;
422
423#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
424 {
425 struct at_dma_slave *atslave;
426 struct mci_dma_data *alt_atslave;
427
428 alt_atslave = kzalloc(sizeof(struct mci_dma_data), GFP_KERNEL);
429 atslave = &alt_atslave->sdata;
430
431 /* DMA slave channel configuration */
432 atslave->dma_dev = &at_hdmac_device.dev;
433 atslave->reg_width = AT_DMA_SLAVE_WIDTH_32BIT;
434 atslave->cfg = ATC_FIFOCFG_HALFFIFO
435 | ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW;
436 atslave->ctrla = ATC_SCSIZE_16 | ATC_DCSIZE_16;
437 if (mmc_id == 0) /* MCI0 */
438 atslave->cfg |= ATC_SRC_PER(AT_DMA_ID_MCI0)
439 | ATC_DST_PER(AT_DMA_ID_MCI0);
440
441 else /* MCI1 */
442 atslave->cfg |= ATC_SRC_PER(AT_DMA_ID_MCI1)
443 | ATC_DST_PER(AT_DMA_ID_MCI1);
444
445 data->dma_slave = alt_atslave;
446 }
447#endif
448
449
450 /* input/irq */
451 if (data->slot[0].detect_pin) {
452 at91_set_gpio_input(data->slot[0].detect_pin, 1);
453 at91_set_deglitch(data->slot[0].detect_pin, 1);
454 }
455 if (data->slot[0].wp_pin)
456 at91_set_gpio_input(data->slot[0].wp_pin, 1);
457
458 if (mmc_id == 0) { /* MCI0 */
459
460 /* CLK */
461 at91_set_A_periph(AT91_PIN_PA0, 0);
462
463 /* CMD */
464 at91_set_A_periph(AT91_PIN_PA1, 1);
465
466 /* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
467 at91_set_A_periph(AT91_PIN_PA2, 1);
468 if (data->slot[0].bus_width == 4) {
469 at91_set_A_periph(AT91_PIN_PA3, 1);
470 at91_set_A_periph(AT91_PIN_PA4, 1);
471 at91_set_A_periph(AT91_PIN_PA5, 1);
472 if (data->slot[0].bus_width == 8) {
473 at91_set_A_periph(AT91_PIN_PA6, 1);
474 at91_set_A_periph(AT91_PIN_PA7, 1);
475 at91_set_A_periph(AT91_PIN_PA8, 1);
476 at91_set_A_periph(AT91_PIN_PA9, 1);
477 }
478 }
479
480 mmc0_data = *data;
481 at91_clock_associate("mci0_clk", &at91sam9g45_mmc0_device.dev, "mci_clk");
482 platform_device_register(&at91sam9g45_mmc0_device);
483
484 } else { /* MCI1 */
485
486 /* CLK */
487 at91_set_A_periph(AT91_PIN_PA31, 0);
488
489 /* CMD */
490 at91_set_A_periph(AT91_PIN_PA22, 1);
491
492 /* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
493 at91_set_A_periph(AT91_PIN_PA23, 1);
494 if (data->slot[0].bus_width == 4) {
495 at91_set_A_periph(AT91_PIN_PA24, 1);
496 at91_set_A_periph(AT91_PIN_PA25, 1);
497 at91_set_A_periph(AT91_PIN_PA26, 1);
498 if (data->slot[0].bus_width == 8) {
499 at91_set_A_periph(AT91_PIN_PA27, 1);
500 at91_set_A_periph(AT91_PIN_PA28, 1);
501 at91_set_A_periph(AT91_PIN_PA29, 1);
502 at91_set_A_periph(AT91_PIN_PA30, 1);
503 }
504 }
505
506 mmc1_data = *data;
507 at91_clock_associate("mci1_clk", &at91sam9g45_mmc1_device.dev, "mci_clk");
508 platform_device_register(&at91sam9g45_mmc1_device);
509
510 }
511}
512#else
513void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
514#endif
515
516
517/* --------------------------------------------------------------------
353 * NAND / SmartMedia 518 * NAND / SmartMedia
354 * -------------------------------------------------------------------- */ 519 * -------------------------------------------------------------------- */
355 520
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 211c5c14a1e6..6a9d24e5ed8e 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -242,11 +242,6 @@ static struct at91_gpio_bank at91sam9rl_gpio[] = {
242 } 242 }
243}; 243};
244 244
245static void at91sam9rl_reset(void)
246{
247 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
248}
249
250static void at91sam9rl_poweroff(void) 245static void at91sam9rl_poweroff(void)
251{ 246{
252 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); 247 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
@@ -281,7 +276,7 @@ void __init at91sam9rl_initialize(unsigned long main_clock)
281 /* Map SRAM */ 276 /* Map SRAM */
282 iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc)); 277 iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
283 278
284 at91_arch_reset = at91sam9rl_reset; 279 at91_arch_reset = at91sam9_alt_reset;
285 pm_power_off = at91sam9rl_poweroff; 280 pm_power_off = at91sam9rl_poweroff;
286 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); 281 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
287 282
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
new file mode 100644
index 000000000000..bba5a560e02b
--- /dev/null
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -0,0 +1,322 @@
1/*
2 * Copyright (C) 2010 Christian Glindkamp <christian.glindkamp@taskit.de>
3 * taskit GmbH
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19/*
20 * copied and adjusted from board-stamp9g20.c
21 * by Peter Gsellmann <pgsellmann@portner-elektronik.at>
22 */
23
24#include <linux/mm.h>
25#include <linux/platform_device.h>
26#include <linux/gpio.h>
27#include <linux/w1-gpio.h>
28
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31
32#include <mach/board.h>
33#include <mach/at91sam9_smc.h>
34
35#include "sam9_smc.h"
36#include "generic.h"
37
38
39static void __init pcontrol_g20_map_io(void)
40{
41 /* Initialize processor: 18.432 MHz crystal */
42 at91sam9260_initialize(18432000);
43
44 /* DGBU on ttyS0. (Rx, Tx) only TTL -> JTAG connector X7 17,19 ) */
45 at91_register_uart(0, 0, 0);
46
47 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */
48 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
49 | ATMEL_UART_RTS);
50
51 /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) isolated RS485 X5 */
52 at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS
53 | ATMEL_UART_RTS);
54
55 /* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */
56 at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
57
58 /* set serial console to ttyS0 (ie, DBGU) */
59 at91_set_serial_console(0);
60}
61
62
63static void __init init_irq(void)
64{
65 at91sam9260_init_interrupts(NULL);
66}
67
68
69/*
70 * NAND flash 512MiB 1,8V 8-bit, sector size 128 KiB
71 */
72static struct atmel_nand_data __initdata nand_data = {
73 .ale = 21,
74 .cle = 22,
75 .rdy_pin = AT91_PIN_PC13,
76 .enable_pin = AT91_PIN_PC14,
77};
78
79/*
80 * Bus timings; unit = 7.57ns
81 */
82static struct sam9_smc_config __initdata nand_smc_config = {
83 .ncs_read_setup = 0,
84 .nrd_setup = 2,
85 .ncs_write_setup = 0,
86 .nwe_setup = 2,
87
88 .ncs_read_pulse = 4,
89 .nrd_pulse = 4,
90 .ncs_write_pulse = 4,
91 .nwe_pulse = 4,
92
93 .read_cycle = 7,
94 .write_cycle = 7,
95
96 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
97 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
98 .tdf_cycles = 3,
99};
100
101static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
102 .ncs_read_setup = 16,
103 .nrd_setup = 18,
104 .ncs_write_setup = 16,
105 .nwe_setup = 18,
106
107 .ncs_read_pulse = 63,
108 .nrd_pulse = 55,
109 .ncs_write_pulse = 63,
110 .nwe_pulse = 55,
111
112 .read_cycle = 127,
113 .write_cycle = 127,
114
115 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
116 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_SELECT
117 | AT91_SMC_DBW_8 | AT91_SMC_PS_4
118 | AT91_SMC_TDFMODE,
119 .tdf_cycles = 3,
120}, {
121 .ncs_read_setup = 0,
122 .nrd_setup = 0,
123 .ncs_write_setup = 0,
124 .nwe_setup = 1,
125
126 .ncs_read_pulse = 8,
127 .nrd_pulse = 8,
128 .ncs_write_pulse = 5,
129 .nwe_pulse = 4,
130
131 .read_cycle = 8,
132 .write_cycle = 7,
133
134 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
135 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_SELECT
136 | AT91_SMC_DBW_16 | AT91_SMC_PS_8
137 | AT91_SMC_TDFMODE,
138 .tdf_cycles = 1,
139} };
140
141static void __init add_device_nand(void)
142{
143 /* configure chip-select 3 (NAND) */
144 sam9_smc_configure(3, &nand_smc_config);
145 at91_add_device_nand(&nand_data);
146}
147
148
149static void __init add_device_pcontrol(void)
150{
151 /* configure chip-select 4 (IO compatible to 8051 X4 ) */
152 sam9_smc_configure(4, &pcontrol_smc_config[0]);
153 /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */
154 sam9_smc_configure(7, &pcontrol_smc_config[1]);
155}
156
157
158/*
159 * MCI (SD/MMC)
160 * det_pin, wp_pin and vcc_pin are not connected
161 */
162#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
163static struct mci_platform_data __initdata mmc_data = {
164 .slot[0] = {
165 .bus_width = 4,
166 },
167};
168#else
169static struct at91_mmc_data __initdata mmc_data = {
170 .wire4 = 1,
171};
172#endif
173
174
175/*
176 * USB Host port
177 */
178static struct at91_usbh_data __initdata usbh_data = {
179 .ports = 2,
180};
181
182
183/*
184 * USB Device port
185 */
186static struct at91_udc_data __initdata pcontrol_g20_udc_data = {
187 .vbus_pin = AT91_PIN_PA22, /* Detect +5V bus voltage */
188 .pullup_pin = AT91_PIN_PA4, /* K-state, active low */
189};
190
191
192/*
193 * MACB Ethernet device
194 */
195static struct at91_eth_data __initdata macb_data = {
196 .phy_irq_pin = AT91_PIN_PA28,
197 .is_rmii = 1,
198};
199
200
201/*
202 * I2C devices: eeprom and phy/switch
203 */
204static struct i2c_board_info __initdata pcontrol_g20_i2c_devices[] = {
205{ /* D7 address width=2, 8KiB */
206 I2C_BOARD_INFO("24c64", 0x50)
207}, { /* D8 address width=1, 1 byte has 32 bits! */
208 I2C_BOARD_INFO("lan9303", 0x0a)
209}, };
210
211
212/*
213 * LEDs
214 */
215static struct gpio_led pcontrol_g20_leds[] = {
216 {
217 .name = "LED1", /* red H5 */
218 .gpio = AT91_PIN_PB18,
219 .active_low = 1,
220 .default_trigger = "none", /* supervisor */
221 }, {
222 .name = "LED2", /* yellow H7 */
223 .gpio = AT91_PIN_PB19,
224 .active_low = 1,
225 .default_trigger = "mmc0", /* SD-card activity */
226 }, {
227 .name = "LED3", /* green H2 */
228 .gpio = AT91_PIN_PB20,
229 .active_low = 1,
230 .default_trigger = "heartbeat", /* blinky */
231 }, {
232 .name = "LED4", /* red H3 */
233 .gpio = AT91_PIN_PC6,
234 .active_low = 1,
235 .default_trigger = "none", /* connection lost */
236 }, {
237 .name = "LED5", /* yellow H6 */
238 .gpio = AT91_PIN_PC7,
239 .active_low = 1,
240 .default_trigger = "none", /* unsent data */
241 }, {
242 .name = "LED6", /* green H1 */
243 .gpio = AT91_PIN_PC9,
244 .active_low = 1,
245 .default_trigger = "none", /* snafu */
246 }
247};
248
249
250/*
251 * SPI devices
252 */
253static struct spi_board_info pcontrol_g20_spi_devices[] = {
254 {
255 .modalias = "spidev", /* HMI port X4 */
256 .chip_select = 1,
257 .max_speed_hz = 50 * 1000 * 1000,
258 .bus_num = 0,
259 }, {
260 .modalias = "spidev", /* piggyback A2 */
261 .chip_select = 0,
262 .max_speed_hz = 50 * 1000 * 1000,
263 .bus_num = 1,
264 },
265};
266
267
268/*
269 * Dallas 1-Wire DS2431
270 */
271static struct w1_gpio_platform_data w1_gpio_pdata = {
272 .pin = AT91_PIN_PA29,
273 .is_open_drain = 1,
274};
275
276static struct platform_device w1_device = {
277 .name = "w1-gpio",
278 .id = -1,
279 .dev.platform_data = &w1_gpio_pdata,
280};
281
282static void add_wire1(void)
283{
284 at91_set_GPIO_periph(w1_gpio_pdata.pin, 1);
285 at91_set_multi_drive(w1_gpio_pdata.pin, 1);
286 platform_device_register(&w1_device);
287}
288
289
290static void __init pcontrol_g20_board_init(void)
291{
292 at91_add_device_serial();
293 add_device_nand();
294#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
295 at91_add_device_mci(0, &mmc_data);
296#else
297 at91_add_device_mmc(0, &mmc_data);
298#endif
299 at91_add_device_usbh(&usbh_data);
300 at91_add_device_eth(&macb_data);
301 at91_add_device_i2c(pcontrol_g20_i2c_devices,
302 ARRAY_SIZE(pcontrol_g20_i2c_devices));
303 add_wire1();
304 add_device_pcontrol();
305 at91_add_device_spi(pcontrol_g20_spi_devices,
306 ARRAY_SIZE(pcontrol_g20_spi_devices));
307 at91_add_device_udc(&pcontrol_g20_udc_data);
308 at91_gpio_leds(pcontrol_g20_leds,
309 ARRAY_SIZE(pcontrol_g20_leds));
310 /* piggyback A2 */
311 at91_set_gpio_output(AT91_PIN_PB31, 1);
312}
313
314
315MACHINE_START(PCONTROL_G20, "PControl G20")
316 /* Maintainer: pgsellmann@portner-elektronik.at */
317 .boot_params = AT91_SDRAM_BASE + 0x100,
318 .timer = &at91sam926x_timer,
319 .map_io = pcontrol_g20_map_io,
320 .init_irq = init_irq,
321 .init_machine = pcontrol_g20_board_init,
322MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 7913984f6de9..86ff4b52db32 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -24,7 +24,9 @@
24#include <linux/input.h> 24#include <linux/input.h>
25#include <linux/leds.h> 25#include <linux/leds.h>
26#include <linux/clk.h> 26#include <linux/clk.h>
27#include <linux/atmel-mci.h>
27 28
29#include <mach/hardware.h>
28#include <video/atmel_lcdc.h> 30#include <video/atmel_lcdc.h>
29 31
30#include <asm/setup.h> 32#include <asm/setup.h>
@@ -98,6 +100,25 @@ static struct spi_board_info ek_spi_devices[] = {
98 100
99 101
100/* 102/*
103 * MCI (SD/MMC)
104 */
105static struct mci_platform_data __initdata mci0_data = {
106 .slot[0] = {
107 .bus_width = 4,
108 .detect_pin = AT91_PIN_PD10,
109 },
110};
111
112static struct mci_platform_data __initdata mci1_data = {
113 .slot[0] = {
114 .bus_width = 4,
115 .detect_pin = AT91_PIN_PD11,
116 .wp_pin = AT91_PIN_PD29,
117 },
118};
119
120
121/*
101 * MACB Ethernet device 122 * MACB Ethernet device
102 */ 123 */
103static struct at91_eth_data __initdata ek_macb_data = { 124static struct at91_eth_data __initdata ek_macb_data = {
@@ -380,6 +401,9 @@ static void __init ek_board_init(void)
380 at91_add_device_usba(&ek_usba_udc_data); 401 at91_add_device_usba(&ek_usba_udc_data);
381 /* SPI */ 402 /* SPI */
382 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 403 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
404 /* MMC */
405 at91_add_device_mci(0, &mci0_data);
406 at91_add_device_mci(1, &mci1_data);
383 /* Ethernet */ 407 /* Ethernet */
384 at91_add_device_eth(&ek_macb_data); 408 at91_add_device_eth(&ek_macb_data);
385 /* NAND */ 409 /* NAND */
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 65c3dc5ba0d0..0c66deb2db39 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -46,6 +46,9 @@ extern void __init at91_clock_associate(const char *id, struct device *dev, cons
46extern void at91_irq_suspend(void); 46extern void at91_irq_suspend(void);
47extern void at91_irq_resume(void); 47extern void at91_irq_resume(void);
48 48
49/* reset */
50extern void at91sam9_alt_reset(void);
51
49 /* GPIO */ 52 /* GPIO */
50#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ 53#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
51#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ 54#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 615668986480..dafbacc25eb1 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -258,16 +258,23 @@ static int at91_pm_enter(suspend_state_t state)
258 * NOTE: the Wait-for-Interrupt instruction needs to be 258 * NOTE: the Wait-for-Interrupt instruction needs to be
259 * in icache so no SDRAM accesses are needed until the 259 * in icache so no SDRAM accesses are needed until the
260 * wakeup IRQ occurs and self-refresh is terminated. 260 * wakeup IRQ occurs and self-refresh is terminated.
261 * For ARM 926 based chips, this requirement is weaker
262 * as at91sam9 can access a RAM in self-refresh mode.
261 */ 263 */
262 asm("b 1f; .align 5; 1:"); 264 asm volatile ( "mov r0, #0\n\t"
263 asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ 265 "b 1f\n\t"
266 ".align 5\n\t"
267 "1: mcr p15, 0, r0, c7, c10, 4\n\t"
268 : /* no output */
269 : /* no input */
270 : "r0");
264 saved_lpr = sdram_selfrefresh_enable(); 271 saved_lpr = sdram_selfrefresh_enable();
265 asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ 272 wait_for_interrupt_enable();
266 sdram_selfrefresh_disable(saved_lpr); 273 sdram_selfrefresh_disable(saved_lpr);
267 break; 274 break;
268 275
269 case PM_SUSPEND_ON: 276 case PM_SUSPEND_ON:
270 asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ 277 cpu_do_idle();
271 break; 278 break;
272 279
273 default: 280 default:
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 8c87d0c1b8f8..ce9a20699111 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -21,6 +21,8 @@ static inline u32 sdram_selfrefresh_enable(void)
21} 21}
22 22
23#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) 23#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
24#define wait_for_interrupt_enable() asm volatile ("mcr p15, 0, %0, c7, c0, 4" \
25 : : "r" (0))
24 26
25#elif defined(CONFIG_ARCH_AT91CAP9) 27#elif defined(CONFIG_ARCH_AT91CAP9)
26#include <mach/at91cap9_ddrsdr.h> 28#include <mach/at91cap9_ddrsdr.h>
@@ -38,6 +40,7 @@ static inline u32 sdram_selfrefresh_enable(void)
38} 40}
39 41
40#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr) 42#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr)
43#define wait_for_interrupt_enable() cpu_do_idle()
41 44
42#elif defined(CONFIG_ARCH_AT91SAM9G45) 45#elif defined(CONFIG_ARCH_AT91SAM9G45)
43#include <mach/at91sam9_ddrsdr.h> 46#include <mach/at91sam9_ddrsdr.h>
@@ -74,6 +77,7 @@ static inline u32 sdram_selfrefresh_enable(void)
74 at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \ 77 at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \
75 at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \ 78 at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \
76 } while (0) 79 } while (0)
80#define wait_for_interrupt_enable() cpu_do_idle()
77 81
78#else 82#else
79#include <mach/at91sam9_sdramc.h> 83#include <mach/at91sam9_sdramc.h>
@@ -98,5 +102,6 @@ static inline u32 sdram_selfrefresh_enable(void)
98} 102}
99 103
100#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr) 104#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr)
105#define wait_for_interrupt_enable() cpu_do_idle()
101 106
102#endif 107#endif
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index b6b00a1f6125..f7922a436172 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -124,6 +124,7 @@ ENTRY(at91_slow_clock)
124 ldr r5, .at91_va_base_ramc1 124 ldr r5, .at91_va_base_ramc1
125 125
126 /* Drain write buffer */ 126 /* Drain write buffer */
127 mov r0, #0
127 mcr p15, 0, r0, c7, c10, 4 128 mcr p15, 0, r0, c7, c10, 4
128 129
129#ifdef CONFIG_ARCH_AT91RM9200 130#ifdef CONFIG_ARCH_AT91RM9200
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 13:33:35 -0500