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authorLinus Torvalds <torvalds@linux-foundation.org>2008-08-15 18:31:23 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-08-15 18:31:23 -0400
commitd121db94eb50b29a202b5f6a8671cbebdf2c4142 (patch)
tree755094002f612dd2f018dca12e973c56e05312e3 /arch
parent40a342664078ebcb4006a89af96f7982fac36032 (diff)
parenta4b7b6d7d3f4f71e741a878bcca6226d8d326a34 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (33 commits) Blackfin arch: hook up some missing new system calls Blackfin arch: fix missing digit in SCLK range checking Blackfin arch: do not muck with the UART during boot -- let the serial driver worry about it Blackfin arch: clear EMAC_SYSTAT during IRQ init rather than early head.S as we dont need it setup that early Blackfin arch: use %pF when printing out the double fault address so we get symbol names Blackfin arch: add support for the BlackStamp board Blackfin arch: Allow ins functions to have a low latency version Blackfin arch: Print out doublefault addresses, so debug can occur Blackfin arch: shuffle related prototypes together -- no functional changes Blackfin arch: move fixed code defines into fixed_code.h as very few things actually need to know these details Blackfin arch: mark some functions as __init as they are only called from __init functions Blackfin arch: delete dead prototypes Blackfin arch: cleanup cache lock code Blackfin arch: workaround SIC_IWR1 reset bug, by keeping MDMA0/1 always enabled in SIC_IWR1. Blackfin arch: Fix bug - when expanding the trace buffer, it does not print out the decoded instruction. Blackfin arch: Fix Bug - System with EMAC driver enabled - Core not idling Blackfin arch: delete unused cache functions Blackfin arch: convert L2 defines to be the same as the L1 defines Blackfin arch: unify the duplicated portions of __start and split mach-specific pieces into _mach_early_start where they will be easier to trim over time Blackfin arch: add asm/thread_info.h for THREAD_SIZE define ...
Diffstat (limited to 'arch')
-rw-r--r--arch/blackfin/Kconfig69
-rw-r--r--arch/blackfin/configs/BlackStamp_defconfig1195
-rw-r--r--arch/blackfin/configs/TCM-BF537_defconfig693
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cacheinit.c4
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cacheinit.c4
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c6
-rw-r--r--arch/blackfin/kernel/setup.c33
-rw-r--r--arch/blackfin/kernel/traps.c90
-rw-r--r--arch/blackfin/kernel/vmlinux.lds.S11
-rw-r--r--arch/blackfin/lib/ins.S109
-rw-r--r--arch/blackfin/mach-bf527/boards/cm_bf527.c60
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c60
-rw-r--r--arch/blackfin/mach-bf527/head.S289
-rw-r--r--arch/blackfin/mach-bf527/ints-priority.c2
-rw-r--r--arch/blackfin/mach-bf533/boards/H8606.c7
-rw-r--r--arch/blackfin/mach-bf533/boards/Kconfig6
-rw-r--r--arch/blackfin/mach-bf533/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf533/boards/blackstamp.c401
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c52
-rw-r--r--arch/blackfin/mach-bf533/boards/ezkit.c52
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c58
-rw-r--r--arch/blackfin/mach-bf533/head.S290
-rw-r--r--arch/blackfin/mach-bf533/ints-priority.c2
-rw-r--r--arch/blackfin/mach-bf537/boards/Kconfig6
-rw-r--r--arch/blackfin/mach-bf537/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c62
-rw-r--r--arch/blackfin/mach-bf537/boards/generic_board.c51
-rw-r--r--arch/blackfin/mach-bf537/boards/minotaur.c6
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c6
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c18
-rw-r--r--arch/blackfin/mach-bf537/boards/tcm_bf537.c590
-rw-r--r--arch/blackfin/mach-bf537/head.S321
-rw-r--r--arch/blackfin/mach-bf537/ints-priority.c2
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c8
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c14
-rw-r--r--arch/blackfin/mach-bf548/head.S259
-rw-r--r--arch/blackfin/mach-bf548/ints-priority.c2
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c8
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c52
-rw-r--r--arch/blackfin/mach-bf561/head.S275
-rw-r--r--arch/blackfin/mach-bf561/ints-priority.c2
-rw-r--r--arch/blackfin/mach-common/Makefile5
-rw-r--r--arch/blackfin/mach-common/arch_checks.c9
-rw-r--r--arch/blackfin/mach-common/cache.S115
-rw-r--r--arch/blackfin/mach-common/cacheinit.S77
-rw-r--r--arch/blackfin/mach-common/dpmc_modes.S56
-rw-r--r--arch/blackfin/mach-common/entry.S34
-rw-r--r--arch/blackfin/mach-common/head.S207
-rw-r--r--arch/blackfin/mach-common/ints-priority.c68
-rw-r--r--arch/blackfin/mach-common/lock.S45
-rw-r--r--arch/blackfin/mach-common/pm.c35
-rw-r--r--arch/blackfin/mm/blackfin_sram.c12
52 files changed, 3605 insertions, 2235 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 5a097c46bc46..f64d25973a37 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -249,7 +249,7 @@ config MEM_MT48LC8M32B2B5_7
249 249
250config MEM_MT48LC32M16A2TG_75 250config MEM_MT48LC32M16A2TG_75
251 bool 251 bool
252 depends on (BFIN527_EZKIT || BFIN532_IP0X) 252 depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP)
253 default y 253 default y
254 254
255source "arch/blackfin/mach-bf527/Kconfig" 255source "arch/blackfin/mach-bf527/Kconfig"
@@ -292,7 +292,7 @@ config CLKIN_HZ
292 int "Frequency of the crystal on the board in Hz" 292 int "Frequency of the crystal on the board in Hz"
293 default "11059200" if BFIN533_STAMP 293 default "11059200" if BFIN533_STAMP
294 default "27000000" if BFIN533_EZKIT 294 default "27000000" if BFIN533_EZKIT
295 default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS) 295 default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP)
296 default "30000000" if BFIN561_EZKIT 296 default "30000000" if BFIN561_EZKIT
297 default "24576000" if PNAV10 297 default "24576000" if PNAV10
298 default "10000000" if BFIN532_IP0X 298 default "10000000" if BFIN532_IP0X
@@ -332,7 +332,7 @@ config VCO_MULT
332 default "22" if BFIN533_BLUETECHNIX_CM 332 default "22" if BFIN533_BLUETECHNIX_CM
333 default "20" if (BFIN537_BLUETECHNIX_CM || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM) 333 default "20" if (BFIN537_BLUETECHNIX_CM || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM)
334 default "20" if BFIN561_EZKIT 334 default "20" if BFIN561_EZKIT
335 default "16" if H8606_HVSISTEMAS 335 default "16" if (H8606_HVSISTEMAS || BLACKSTAMP)
336 help 336 help
337 This controls the frequency of the on-chip PLL. This can be between 1 and 64. 337 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
338 PLL Frequency = (Crystal Frequency) * (this setting) 338 PLL Frequency = (Crystal Frequency) * (this setting)
@@ -622,6 +622,33 @@ config CPLB_SWITCH_TAB_L1
622 If enabled, the CPLB Switch Tables are linked 622 If enabled, the CPLB Switch Tables are linked
623 into L1 data memory. (less latency) 623 into L1 data memory. (less latency)
624 624
625comment "Speed Optimizations"
626config BFIN_INS_LOWOVERHEAD
627 bool "ins[bwl] low overhead, higher interrupt latency"
628 default y
629 help
630 Reads on the Blackfin are speculative. In Blackfin terms, this means
631 they can be interrupted at any time (even after they have been issued
632 on to the external bus), and re-issued after the interrupt occurs.
633 For memory - this is not a big deal, since memory does not change if
634 it sees a read.
635
636 If a FIFO is sitting on the end of the read, it will see two reads,
637 when the core only sees one since the FIFO receives both the read
638 which is cancelled (and not delivered to the core) and the one which
639 is re-issued (which is delivered to the core).
640
641 To solve this, interrupts are turned off before reads occur to
642 I/O space. This option controls which the overhead/latency of
643 controlling interrupts during this time
644 "n" turns interrupts off every read
645 (higher overhead, but lower interrupt latency)
646 "y" turns interrupts off every loop
647 (low overhead, but longer interrupt latency)
648
649 default behavior is to leave this set to on (type "Y"). If you are experiencing
650 interrupt latency issues, it is safe and OK to turn this off.
651
625endmenu 652endmenu
626 653
627 654
@@ -933,13 +960,6 @@ endchoice
933comment "Possible Suspend Mem / Hibernate Wake-Up Sources" 960comment "Possible Suspend Mem / Hibernate Wake-Up Sources"
934 depends on PM 961 depends on PM
935 962
936config PM_BFIN_WAKE_RTC
937 bool "Allow Wake-Up from RESET and on-chip RTC"
938 depends on PM
939 default n
940 help
941 Enable RTC Wake-Up (Voltage Regulator Power-Up)
942
943config PM_BFIN_WAKE_PH6 963config PM_BFIN_WAKE_PH6
944 bool "Allow Wake-Up from on-chip PHY or PH6 GP" 964 bool "Allow Wake-Up from on-chip PHY or PH6 GP"
945 depends on PM && (BF52x || BF534 || BF536 || BF537) 965 depends on PM && (BF52x || BF534 || BF536 || BF537)
@@ -947,41 +967,12 @@ config PM_BFIN_WAKE_PH6
947 help 967 help
948 Enable PHY and PH6 GP Wake-Up (Voltage Regulator Power-Up) 968 Enable PHY and PH6 GP Wake-Up (Voltage Regulator Power-Up)
949 969
950config PM_BFIN_WAKE_CAN
951 bool "Allow Wake-Up from on-chip CAN0/1"
952 depends on PM && (BF54x || BF534 || BF536 || BF537)
953 default n
954 help
955 Enable CAN0/1 Wake-Up (Voltage Regulator Power-Up)
956
957config PM_BFIN_WAKE_GP 970config PM_BFIN_WAKE_GP
958 bool "Allow Wake-Up from GPIOs" 971 bool "Allow Wake-Up from GPIOs"
959 depends on PM && BF54x 972 depends on PM && BF54x
960 default n 973 default n
961 help 974 help
962 Enable General-Purpose Wake-Up (Voltage Regulator Power-Up) 975 Enable General-Purpose Wake-Up (Voltage Regulator Power-Up)
963
964config PM_BFIN_WAKE_USB
965 bool "Allow Wake-Up from on-chip USB"
966 depends on PM && (BF54x || BF52x)
967 default n
968 help
969 Enable USB Wake-Up (Voltage Regulator Power-Up)
970
971config PM_BFIN_WAKE_KEYPAD
972 bool "Allow Wake-Up from on-chip Keypad"
973 depends on PM && BF54x
974 default n
975 help
976 Enable Keypad Wake-Up (Voltage Regulator Power-Up)
977
978config PM_BFIN_WAKE_ROTARY
979 bool "Allow Wake-Up from on-chip Rotary"
980 depends on PM && BF54x
981 default n
982 help
983 Enable Rotary Wake-Up (Voltage Regulator Power-Up)
984
985endmenu 976endmenu
986 977
987menu "CPU Frequency scaling" 978menu "CPU Frequency scaling"
diff --git a/arch/blackfin/configs/BlackStamp_defconfig b/arch/blackfin/configs/BlackStamp_defconfig
new file mode 100644
index 000000000000..2921f9952d5f
--- /dev/null
+++ b/arch/blackfin/configs/BlackStamp_defconfig
@@ -0,0 +1,1195 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26.2
4#
5# CONFIG_MMU is not set
6# CONFIG_FPU is not set
7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
9CONFIG_BLACKFIN=y
10CONFIG_ZONE_DMA=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_GENERIC_IRQ_PROBE=y
15CONFIG_GENERIC_GPIO=y
16CONFIG_FORCE_MAX_ZONEORDER=14
17CONFIG_GENERIC_CALIBRATE_DELAY=y
18CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
19
20#
21# General setup
22#
23CONFIG_EXPERIMENTAL=y
24CONFIG_BROKEN_ON_SMP=y
25CONFIG_INIT_ENV_ARG_LIMIT=32
26CONFIG_LOCALVERSION=""
27CONFIG_LOCALVERSION_AUTO=y
28CONFIG_SYSVIPC=y
29CONFIG_SYSVIPC_SYSCTL=y
30# CONFIG_POSIX_MQUEUE is not set
31# CONFIG_BSD_PROCESS_ACCT is not set
32# CONFIG_TASKSTATS is not set
33# CONFIG_AUDIT is not set
34CONFIG_IKCONFIG=y
35CONFIG_IKCONFIG_PROC=y
36CONFIG_LOG_BUF_SHIFT=14
37# CONFIG_CGROUPS is not set
38# CONFIG_GROUP_SCHED is not set
39CONFIG_SYSFS_DEPRECATED=y
40CONFIG_SYSFS_DEPRECATED_V2=y
41# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE=""
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y
47CONFIG_EMBEDDED=y
48CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y
50CONFIG_SYSCTL_SYSCALL_CHECK=y
51CONFIG_KALLSYMS=y
52# CONFIG_KALLSYMS_EXTRA_PASS is not set
53CONFIG_HOTPLUG=y
54CONFIG_PRINTK=y
55CONFIG_BUG=y
56CONFIG_ELF_CORE=y
57CONFIG_COMPAT_BRK=y
58CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y
60CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y
63CONFIG_TIMERFD=y
64CONFIG_EVENTFD=y
65CONFIG_VM_EVENT_COUNTERS=y
66CONFIG_SLAB=y
67# CONFIG_SLUB is not set
68# CONFIG_SLOB is not set
69# CONFIG_PROFILING is not set
70# CONFIG_MARKERS is not set
71CONFIG_HAVE_OPROFILE=y
72# CONFIG_HAVE_KPROBES is not set
73# CONFIG_HAVE_KRETPROBES is not set
74# CONFIG_HAVE_DMA_ATTRS is not set
75CONFIG_SLABINFO=y
76CONFIG_RT_MUTEXES=y
77CONFIG_TINY_SHMEM=y
78CONFIG_BASE_SMALL=0
79CONFIG_MODULES=y
80# CONFIG_MODULE_FORCE_LOAD is not set
81CONFIG_MODULE_UNLOAD=y
82CONFIG_MODULE_FORCE_UNLOAD=y
83# CONFIG_MODVERSIONS is not set
84# CONFIG_MODULE_SRCVERSION_ALL is not set
85CONFIG_KMOD=y
86CONFIG_BLOCK=y
87# CONFIG_LBD is not set
88# CONFIG_BLK_DEV_IO_TRACE is not set
89# CONFIG_LSF is not set
90# CONFIG_BLK_DEV_BSG is not set
91
92#
93# IO Schedulers
94#
95CONFIG_IOSCHED_NOOP=y
96CONFIG_IOSCHED_AS=y
97# CONFIG_IOSCHED_DEADLINE is not set
98CONFIG_IOSCHED_CFQ=y
99CONFIG_DEFAULT_AS=y
100# CONFIG_DEFAULT_DEADLINE is not set
101# CONFIG_DEFAULT_CFQ is not set
102# CONFIG_DEFAULT_NOOP is not set
103CONFIG_DEFAULT_IOSCHED="anticipatory"
104CONFIG_CLASSIC_RCU=y
105# CONFIG_PREEMPT_NONE is not set
106CONFIG_PREEMPT_VOLUNTARY=y
107# CONFIG_PREEMPT is not set
108
109#
110# Blackfin Processor Options
111#
112
113#
114# Processor and Board Settings
115#
116# CONFIG_BF522 is not set
117# CONFIG_BF523 is not set
118# CONFIG_BF524 is not set
119# CONFIG_BF525 is not set
120# CONFIG_BF526 is not set
121# CONFIG_BF527 is not set
122# CONFIG_BF531 is not set
123CONFIG_BF532=y
124# CONFIG_BF533 is not set
125# CONFIG_BF534 is not set
126# CONFIG_BF536 is not set
127# CONFIG_BF537 is not set
128# CONFIG_BF542 is not set
129# CONFIG_BF544 is not set
130# CONFIG_BF547 is not set
131# CONFIG_BF548 is not set
132# CONFIG_BF549 is not set
133# CONFIG_BF561 is not set
134# CONFIG_BF_REV_0_0 is not set
135# CONFIG_BF_REV_0_1 is not set
136# CONFIG_BF_REV_0_2 is not set
137# CONFIG_BF_REV_0_3 is not set
138# CONFIG_BF_REV_0_4 is not set
139CONFIG_BF_REV_0_5=y
140# CONFIG_BF_REV_ANY is not set
141# CONFIG_BF_REV_NONE is not set
142CONFIG_BF53x=y
143CONFIG_MEM_MT48LC32M16A2TG_75=y
144# CONFIG_BFIN533_EZKIT is not set
145# CONFIG_BFIN533_STAMP is not set
146# CONFIG_BFIN533_BLUETECHNIX_CM is not set
147# CONFIG_H8606_HVSISTEMAS is not set
148# CONFIG_BFIN532_IP0X is not set
149CONFIG_BLACKSTAMP=y
150# CONFIG_GENERIC_BF533_BOARD is not set
151
152#
153# BF533/2/1 Specific Configuration
154#
155
156#
157# Interrupt Priority Assignment
158#
159
160#
161# Priority
162#
163CONFIG_UART_ERROR=7
164CONFIG_SPORT0_ERROR=7
165CONFIG_SPI_ERROR=7
166CONFIG_SPORT1_ERROR=7
167CONFIG_PPI_ERROR=7
168CONFIG_DMA_ERROR=7
169CONFIG_PLLWAKE_ERROR=7
170CONFIG_RTC_ERROR=8
171CONFIG_DMA0_PPI=8
172CONFIG_DMA1_SPORT0RX=9
173CONFIG_DMA2_SPORT0TX=9
174CONFIG_DMA3_SPORT1RX=9
175CONFIG_DMA4_SPORT1TX=9
176CONFIG_DMA5_SPI=10
177CONFIG_DMA6_UARTRX=10
178CONFIG_DMA7_UARTTX=10
179CONFIG_TIMER0=11
180CONFIG_TIMER1=11
181CONFIG_TIMER2=11
182CONFIG_PFA=12
183CONFIG_PFB=12
184CONFIG_MEMDMA0=13
185CONFIG_MEMDMA1=13
186CONFIG_WDTIMER=13
187
188#
189# Board customizations
190#
191# CONFIG_CMDLINE_BOOL is not set
192CONFIG_BOOT_LOAD=0x1000
193
194#
195# Clock/PLL Setup
196#
197CONFIG_CLKIN_HZ=25000000
198# CONFIG_BFIN_KERNEL_CLOCK is not set
199# CONFIG_PLL_BYPASS is not set
200# CONFIG_CLKIN_HALF is not set
201CONFIG_VCO_MULT=16
202CONFIG_CCLK_DIV_1=y
203# CONFIG_CCLK_DIV_2 is not set
204# CONFIG_CCLK_DIV_4 is not set
205# CONFIG_CCLK_DIV_8 is not set
206CONFIG_SCLK_DIV=3
207CONFIG_MAX_MEM_SIZE=64
208CONFIG_MAX_VCO_HZ=400000000
209CONFIG_MIN_VCO_HZ=50000000
210CONFIG_MAX_SCLK_HZ=133333333
211CONFIG_MIN_SCLK_HZ=27000000
212
213#
214# Kernel Timer/Scheduler
215#
216# CONFIG_HZ_100 is not set
217CONFIG_HZ_250=y
218# CONFIG_HZ_300 is not set
219# CONFIG_HZ_1000 is not set
220CONFIG_HZ=250
221# CONFIG_SCHED_HRTICK is not set
222CONFIG_GENERIC_TIME=y
223CONFIG_GENERIC_CLOCKEVENTS=y
224# CONFIG_CYCLES_CLOCKSOURCE is not set
225CONFIG_TICK_ONESHOT=y
226# CONFIG_NO_HZ is not set
227CONFIG_HIGH_RES_TIMERS=y
228CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
229
230#
231# Memory Setup
232#
233
234#
235# Misc
236#
237CONFIG_BFIN_SCRATCH_REG_RETN=y
238# CONFIG_BFIN_SCRATCH_REG_RETE is not set
239# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
240
241#
242# Blackfin Kernel Optimizations
243#
244
245#
246# Memory Optimizations
247#
248CONFIG_I_ENTRY_L1=y
249CONFIG_EXCPT_IRQ_SYSC_L1=y
250CONFIG_DO_IRQ_L1=y
251CONFIG_CORE_TIMER_IRQ_L1=y
252CONFIG_IDLE_L1=y
253CONFIG_SCHEDULE_L1=y
254CONFIG_ARITHMETIC_OPS_L1=y
255CONFIG_ACCESS_OK_L1=y
256CONFIG_MEMSET_L1=y
257CONFIG_MEMCPY_L1=y
258CONFIG_SYS_BFIN_SPINLOCK_L1=y
259# CONFIG_IP_CHECKSUM_L1 is not set
260CONFIG_CACHELINE_ALIGNED_L1=y
261# CONFIG_SYSCALL_TAB_L1 is not set
262# CONFIG_CPLB_SWITCH_TAB_L1 is not set
263# CONFIG_RAMKERNEL is not set
264CONFIG_ROMKERNEL=y
265CONFIG_SELECT_MEMORY_MODEL=y
266CONFIG_FLATMEM_MANUAL=y
267# CONFIG_DISCONTIGMEM_MANUAL is not set
268# CONFIG_SPARSEMEM_MANUAL is not set
269CONFIG_FLATMEM=y
270CONFIG_FLAT_NODE_MEM_MAP=y
271# CONFIG_SPARSEMEM_STATIC is not set
272# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
273CONFIG_PAGEFLAGS_EXTENDED=y
274CONFIG_SPLIT_PTLOCK_CPUS=4
275# CONFIG_RESOURCES_64BIT is not set
276CONFIG_ZONE_DMA_FLAG=1
277CONFIG_VIRT_TO_BUS=y
278CONFIG_BFIN_GPTIMERS=y
279CONFIG_BFIN_DMA_5XX=y
280# CONFIG_DMA_UNCACHED_4M is not set
281# CONFIG_DMA_UNCACHED_2M is not set
282CONFIG_DMA_UNCACHED_1M=y
283# CONFIG_DMA_UNCACHED_NONE is not set
284
285#
286# Cache Support
287#
288CONFIG_BFIN_ICACHE=y
289CONFIG_BFIN_DCACHE=y
290# CONFIG_BFIN_DCACHE_BANKA is not set
291# CONFIG_BFIN_ICACHE_LOCK is not set
292# CONFIG_BFIN_WB is not set
293CONFIG_BFIN_WT=y
294# CONFIG_MPU is not set
295
296#
297# Asynchonous Memory Configuration
298#
299
300#
301# EBIU_AMGCTL Global Control
302#
303CONFIG_C_AMCKEN=y
304CONFIG_C_CDPRIO=y
305# CONFIG_C_AMBEN is not set
306# CONFIG_C_AMBEN_B0 is not set
307# CONFIG_C_AMBEN_B0_B1 is not set
308# CONFIG_C_AMBEN_B0_B1_B2 is not set
309CONFIG_C_AMBEN_ALL=y
310
311#
312# EBIU_AMBCTL Control
313#
314CONFIG_BANK_0=0x7BB0
315CONFIG_BANK_1=0x7BB0
316CONFIG_BANK_2=0x7BB0
317CONFIG_BANK_3=0xAAC2
318
319#
320# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
321#
322# CONFIG_PCI is not set
323# CONFIG_ARCH_SUPPORTS_MSI is not set
324# CONFIG_PCCARD is not set
325
326#
327# Executable file formats
328#
329CONFIG_BINFMT_ELF_FDPIC=y
330CONFIG_BINFMT_FLAT=y
331CONFIG_BINFMT_ZFLAT=y
332CONFIG_BINFMT_SHARED_FLAT=y
333# CONFIG_BINFMT_MISC is not set
334
335#
336# Power management options
337#
338CONFIG_PM=y
339# CONFIG_PM_DEBUG is not set
340CONFIG_PM_SLEEP=y
341CONFIG_SUSPEND=y
342CONFIG_SUSPEND_FREEZER=y
343CONFIG_ARCH_SUSPEND_POSSIBLE=y
344CONFIG_PM_BFIN_SLEEP_DEEPER=y
345# CONFIG_PM_BFIN_SLEEP is not set
346# CONFIG_PM_WAKEUP_BY_GPIO is not set
347
348#
349# Possible Suspend Mem / Hibernate Wake-Up Sources
350#
351
352#
353# CPU Frequency scaling
354#
355# CONFIG_CPU_FREQ is not set
356
357#
358# Networking
359#
360CONFIG_NET=y
361
362#
363# Networking options
364#
365CONFIG_PACKET=y
366# CONFIG_PACKET_MMAP is not set
367CONFIG_UNIX=y
368CONFIG_XFRM=y
369# CONFIG_XFRM_USER is not set
370# CONFIG_XFRM_SUB_POLICY is not set
371# CONFIG_XFRM_MIGRATE is not set
372# CONFIG_XFRM_STATISTICS is not set
373# CONFIG_NET_KEY is not set
374CONFIG_INET=y
375# CONFIG_IP_MULTICAST is not set
376# CONFIG_IP_ADVANCED_ROUTER is not set
377CONFIG_IP_FIB_HASH=y
378CONFIG_IP_PNP=y
379# CONFIG_IP_PNP_DHCP is not set
380# CONFIG_IP_PNP_BOOTP is not set
381# CONFIG_IP_PNP_RARP is not set
382# CONFIG_NET_IPIP is not set
383# CONFIG_NET_IPGRE is not set
384# CONFIG_ARPD is not set
385CONFIG_SYN_COOKIES=y
386# CONFIG_INET_AH is not set
387# CONFIG_INET_ESP is not set
388# CONFIG_INET_IPCOMP is not set
389# CONFIG_INET_XFRM_TUNNEL is not set
390# CONFIG_INET_TUNNEL is not set
391CONFIG_INET_XFRM_MODE_TRANSPORT=y
392CONFIG_INET_XFRM_MODE_TUNNEL=y
393CONFIG_INET_XFRM_MODE_BEET=y
394# CONFIG_INET_LRO is not set
395CONFIG_INET_DIAG=y
396CONFIG_INET_TCP_DIAG=y
397# CONFIG_TCP_CONG_ADVANCED is not set
398CONFIG_TCP_CONG_CUBIC=y
399CONFIG_DEFAULT_TCP_CONG="cubic"
400# CONFIG_TCP_MD5SIG is not set
401# CONFIG_IPV6 is not set
402# CONFIG_NETLABEL is not set
403# CONFIG_NETWORK_SECMARK is not set
404# CONFIG_NETFILTER is not set
405# CONFIG_IP_DCCP is not set
406# CONFIG_IP_SCTP is not set
407# CONFIG_TIPC is not set
408# CONFIG_ATM is not set
409# CONFIG_BRIDGE is not set
410# CONFIG_VLAN_8021Q is not set
411# CONFIG_DECNET is not set
412# CONFIG_LLC2 is not set
413# CONFIG_IPX is not set
414# CONFIG_ATALK is not set
415# CONFIG_X25 is not set
416# CONFIG_LAPB is not set
417# CONFIG_ECONET is not set
418# CONFIG_WAN_ROUTER is not set
419# CONFIG_NET_SCHED is not set
420
421#
422# Network testing
423#
424# CONFIG_NET_PKTGEN is not set
425# CONFIG_HAMRADIO is not set
426# CONFIG_CAN is not set
427# CONFIG_IRDA is not set
428# CONFIG_BT is not set
429# CONFIG_AF_RXRPC is not set
430
431#
432# Wireless
433#
434# CONFIG_CFG80211 is not set
435# CONFIG_WIRELESS_EXT is not set
436# CONFIG_MAC80211 is not set
437# CONFIG_IEEE80211 is not set
438# CONFIG_RFKILL is not set
439# CONFIG_NET_9P is not set
440
441#
442# Device Drivers
443#
444
445#
446# Generic Driver Options
447#
448CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
449CONFIG_STANDALONE=y
450CONFIG_PREVENT_FIRMWARE_BUILD=y
451# CONFIG_FW_LOADER is not set
452# CONFIG_SYS_HYPERVISOR is not set
453# CONFIG_CONNECTOR is not set
454CONFIG_MTD=y
455# CONFIG_MTD_DEBUG is not set
456# CONFIG_MTD_CONCAT is not set
457CONFIG_MTD_PARTITIONS=y
458# CONFIG_MTD_REDBOOT_PARTS is not set
459CONFIG_MTD_CMDLINE_PARTS=y
460# CONFIG_MTD_AR7_PARTS is not set
461
462#
463# User Modules And Translation Layers
464#
465CONFIG_MTD_CHAR=m
466CONFIG_MTD_BLKDEVS=y
467CONFIG_MTD_BLOCK=y
468# CONFIG_FTL is not set
469# CONFIG_NFTL is not set
470# CONFIG_INFTL is not set
471# CONFIG_RFD_FTL is not set
472# CONFIG_SSFDC is not set
473# CONFIG_MTD_OOPS is not set
474
475#
476# RAM/ROM/Flash chip drivers
477#
478CONFIG_MTD_CFI=m
479# CONFIG_MTD_JEDECPROBE is not set
480CONFIG_MTD_GEN_PROBE=m
481# CONFIG_MTD_CFI_ADV_OPTIONS is not set
482CONFIG_MTD_MAP_BANK_WIDTH_1=y
483CONFIG_MTD_MAP_BANK_WIDTH_2=y
484CONFIG_MTD_MAP_BANK_WIDTH_4=y
485# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
486# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
487# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
488CONFIG_MTD_CFI_I1=y
489CONFIG_MTD_CFI_I2=y
490# CONFIG_MTD_CFI_I4 is not set
491# CONFIG_MTD_CFI_I8 is not set
492# CONFIG_MTD_CFI_INTELEXT is not set
493CONFIG_MTD_CFI_AMDSTD=m
494# CONFIG_MTD_CFI_STAA is not set
495CONFIG_MTD_CFI_UTIL=m
496CONFIG_MTD_RAM=y
497CONFIG_MTD_ROM=m
498# CONFIG_MTD_ABSENT is not set
499
500#
501# Mapping drivers for chip access
502#
503CONFIG_MTD_COMPLEX_MAPPINGS=y
504# CONFIG_MTD_PHYSMAP is not set
505# CONFIG_MTD_GPIO_ADDR is not set
506# CONFIG_MTD_UCLINUX is not set
507# CONFIG_MTD_PLATRAM is not set
508
509#
510# Self-contained MTD device drivers
511#
512# CONFIG_MTD_DATAFLASH is not set
513CONFIG_MTD_M25P80=y
514# CONFIG_M25PXX_USE_FAST_READ is not set
515# CONFIG_MTD_SLRAM is not set
516# CONFIG_MTD_PHRAM is not set
517# CONFIG_MTD_MTDRAM is not set
518# CONFIG_MTD_BLOCK2MTD is not set
519
520#
521# Disk-On-Chip Device Drivers
522#
523# CONFIG_MTD_DOC2000 is not set
524# CONFIG_MTD_DOC2001 is not set
525# CONFIG_MTD_DOC2001PLUS is not set
526# CONFIG_MTD_NAND is not set
527# CONFIG_MTD_ONENAND is not set
528
529#
530# UBI - Unsorted block images
531#
532# CONFIG_MTD_UBI is not set
533# CONFIG_PARPORT is not set
534CONFIG_BLK_DEV=y
535# CONFIG_BLK_DEV_COW_COMMON is not set
536CONFIG_BLK_DEV_LOOP=y
537# CONFIG_BLK_DEV_CRYPTOLOOP is not set
538CONFIG_BLK_DEV_NBD=y
539CONFIG_BLK_DEV_RAM=y
540CONFIG_BLK_DEV_RAM_COUNT=16
541CONFIG_BLK_DEV_RAM_SIZE=4096
542# CONFIG_BLK_DEV_XIP is not set
543# CONFIG_CDROM_PKTCDVD is not set
544# CONFIG_ATA_OVER_ETH is not set
545CONFIG_MISC_DEVICES=y
546# CONFIG_EEPROM_93CX6 is not set
547# CONFIG_ENCLOSURE_SERVICES is not set
548CONFIG_HAVE_IDE=y
549# CONFIG_IDE is not set
550
551#
552# SCSI device support
553#
554# CONFIG_RAID_ATTRS is not set
555# CONFIG_SCSI is not set
556# CONFIG_SCSI_DMA is not set
557# CONFIG_SCSI_NETLINK is not set
558# CONFIG_ATA is not set
559# CONFIG_MD is not set
560CONFIG_NETDEVICES=y
561# CONFIG_NETDEVICES_MULTIQUEUE is not set
562# CONFIG_DUMMY is not set
563# CONFIG_BONDING is not set
564# CONFIG_MACVLAN is not set
565# CONFIG_EQUALIZER is not set
566# CONFIG_TUN is not set
567# CONFIG_VETH is not set
568# CONFIG_PHYLIB is not set
569CONFIG_NET_ETHERNET=y
570CONFIG_MII=y
571CONFIG_SMC91X=y
572# CONFIG_SMSC911X is not set
573# CONFIG_DM9000 is not set
574# CONFIG_ENC28J60 is not set
575# CONFIG_IBM_NEW_EMAC_ZMII is not set
576# CONFIG_IBM_NEW_EMAC_RGMII is not set
577# CONFIG_IBM_NEW_EMAC_TAH is not set
578# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
579# CONFIG_B44 is not set
580# CONFIG_NETDEV_1000 is not set
581# CONFIG_NETDEV_10000 is not set
582
583#
584# Wireless LAN
585#
586# CONFIG_WLAN_PRE80211 is not set
587# CONFIG_WLAN_80211 is not set
588# CONFIG_IWLWIFI_LEDS is not set
589# CONFIG_WAN is not set
590# CONFIG_PPP is not set
591# CONFIG_SLIP is not set
592# CONFIG_NETCONSOLE is not set
593# CONFIG_NETPOLL is not set
594# CONFIG_NET_POLL_CONTROLLER is not set
595# CONFIG_ISDN is not set
596# CONFIG_PHONE is not set
597
598#
599# Input device support
600#
601CONFIG_INPUT=y
602# CONFIG_INPUT_FF_MEMLESS is not set
603# CONFIG_INPUT_POLLDEV is not set
604
605#
606# Userland interfaces
607#
608# CONFIG_INPUT_MOUSEDEV is not set
609# CONFIG_INPUT_JOYDEV is not set
610CONFIG_INPUT_EVDEV=m
611# CONFIG_INPUT_EVBUG is not set
612
613#
614# Input Device Drivers
615#
616# CONFIG_INPUT_KEYBOARD is not set
617# CONFIG_INPUT_MOUSE is not set
618# CONFIG_INPUT_JOYSTICK is not set
619# CONFIG_INPUT_TABLET is not set
620# CONFIG_INPUT_TOUCHSCREEN is not set
621# CONFIG_INPUT_MISC is not set
622
623#
624# Hardware I/O ports
625#
626# CONFIG_SERIO is not set
627# CONFIG_GAMEPORT is not set
628
629#
630# Character devices
631#
632# CONFIG_AD9960 is not set
633# CONFIG_SPI_ADC_BF533 is not set
634# CONFIG_BF5xx_PPIFCD is not set
635# CONFIG_BFIN_SIMPLE_TIMER is not set
636CONFIG_BF5xx_PPI=y
637CONFIG_BFIN_SPORT=y
638# CONFIG_BFIN_TIMER_LATENCY is not set
639# CONFIG_TWI_LCD is not set
640CONFIG_SIMPLE_GPIO=m
641# CONFIG_VT is not set
642CONFIG_DEVKMEM=y
643# CONFIG_SERIAL_NONSTANDARD is not set
644
645#
646# Serial drivers
647#
648# CONFIG_SERIAL_8250 is not set
649
650#
651# Non-8250 serial port support
652#
653CONFIG_SERIAL_BFIN=y
654CONFIG_SERIAL_BFIN_CONSOLE=y
655CONFIG_SERIAL_BFIN_DMA=y
656# CONFIG_SERIAL_BFIN_PIO is not set
657CONFIG_SERIAL_BFIN_UART0=y
658# CONFIG_BFIN_UART0_CTSRTS is not set
659CONFIG_SERIAL_CORE=y
660CONFIG_SERIAL_CORE_CONSOLE=y
661# CONFIG_SERIAL_BFIN_SPORT is not set
662CONFIG_UNIX98_PTYS=y
663# CONFIG_LEGACY_PTYS is not set
664
665#
666# CAN, the car bus and industrial fieldbus
667#
668# CONFIG_CAN4LINUX is not set
669# CONFIG_IPMI_HANDLER is not set
670CONFIG_HW_RANDOM=y
671# CONFIG_R3964 is not set
672# CONFIG_RAW_DRIVER is not set
673# CONFIG_TCG_TPM is not set
674CONFIG_I2C=m
675CONFIG_I2C_BOARDINFO=y
676CONFIG_I2C_CHARDEV=m
677CONFIG_I2C_ALGOBIT=m
678
679#
680# I2C Hardware Bus support
681#
682CONFIG_I2C_GPIO=m
683# CONFIG_I2C_OCORES is not set
684# CONFIG_I2C_PARPORT_LIGHT is not set
685# CONFIG_I2C_SIMTEC is not set
686# CONFIG_I2C_TAOS_EVM is not set
687# CONFIG_I2C_STUB is not set
688# CONFIG_I2C_PCA_PLATFORM is not set
689
690#
691# Miscellaneous I2C Chip support
692#
693# CONFIG_DS1682 is not set
694# CONFIG_SENSORS_AD5252 is not set
695# CONFIG_SENSORS_EEPROM is not set
696# CONFIG_SENSORS_PCF8574 is not set
697# CONFIG_PCF8575 is not set
698# CONFIG_SENSORS_PCF8591 is not set
699# CONFIG_SENSORS_MAX6875 is not set
700# CONFIG_SENSORS_TSL2550 is not set
701# CONFIG_I2C_DEBUG_CORE is not set
702# CONFIG_I2C_DEBUG_ALGO is not set
703# CONFIG_I2C_DEBUG_BUS is not set
704# CONFIG_I2C_DEBUG_CHIP is not set
705CONFIG_SPI=y
706CONFIG_SPI_MASTER=y
707
708#
709# SPI Master Controller Drivers
710#
711CONFIG_SPI_BFIN=y
712# CONFIG_SPI_BITBANG is not set
713
714#
715# SPI Protocol Masters
716#
717CONFIG_SPI_AT25=y
718CONFIG_SPI_SPIDEV=m
719# CONFIG_SPI_TLE62X0 is not set
720# CONFIG_W1 is not set
721# CONFIG_POWER_SUPPLY is not set
722# CONFIG_HWMON is not set
723# CONFIG_HWMON_VID is not set
724# CONFIG_SENSORS_AD7418 is not set
725# CONFIG_SENSORS_ADM1021 is not set
726# CONFIG_SENSORS_ADM1025 is not set
727# CONFIG_SENSORS_ADM1026 is not set
728# CONFIG_SENSORS_ADM1029 is not set
729# CONFIG_SENSORS_ADM1031 is not set
730# CONFIG_SENSORS_ADM9240 is not set
731# CONFIG_SENSORS_ADT7470 is not set
732# CONFIG_SENSORS_ADT7473 is not set
733# CONFIG_SENSORS_ATXP1 is not set
734# CONFIG_SENSORS_DS1621 is not set
735# CONFIG_SENSORS_F71805F is not set
736# CONFIG_SENSORS_F71882FG is not set
737# CONFIG_SENSORS_F75375S is not set
738# CONFIG_SENSORS_GL518SM is not set
739# CONFIG_SENSORS_GL520SM is not set
740# CONFIG_SENSORS_IT87 is not set
741# CONFIG_SENSORS_LM63 is not set
742# CONFIG_SENSORS_LM70 is not set
743# CONFIG_SENSORS_LM75 is not set
744# CONFIG_SENSORS_LM77 is not set
745# CONFIG_SENSORS_LM78 is not set
746# CONFIG_SENSORS_LM80 is not set
747# CONFIG_SENSORS_LM83 is not set
748# CONFIG_SENSORS_LM85 is not set
749# CONFIG_SENSORS_LM87 is not set
750# CONFIG_SENSORS_LM90 is not set
751# CONFIG_SENSORS_LM92 is not set
752# CONFIG_SENSORS_LM93 is not set
753# CONFIG_SENSORS_MAX1619 is not set
754# CONFIG_SENSORS_MAX6650 is not set
755# CONFIG_SENSORS_PC87360 is not set
756# CONFIG_SENSORS_PC87427 is not set
757# CONFIG_SENSORS_DME1737 is not set
758# CONFIG_SENSORS_SMSC47M1 is not set
759# CONFIG_SENSORS_SMSC47M192 is not set
760# CONFIG_SENSORS_SMSC47B397 is not set
761# CONFIG_SENSORS_ADS7828 is not set
762# CONFIG_SENSORS_THMC50 is not set
763# CONFIG_SENSORS_VT1211 is not set
764# CONFIG_SENSORS_W83781D is not set
765# CONFIG_SENSORS_W83791D is not set
766# CONFIG_SENSORS_W83792D is not set
767# CONFIG_SENSORS_W83793 is not set
768# CONFIG_SENSORS_W83L785TS is not set
769# CONFIG_SENSORS_W83L786NG is not set
770# CONFIG_SENSORS_W83627HF is not set
771# CONFIG_SENSORS_W83627EHF is not set
772# CONFIG_HWMON_DEBUG_CHIP is not set
773# CONFIG_THERMAL is not set
774# CONFIG_THERMAL_HWMON is not set
775CONFIG_WATCHDOG=y
776# CONFIG_WATCHDOG_NOWAYOUT is not set
777
778#
779# Watchdog Device Drivers
780#
781# CONFIG_SOFT_WATCHDOG is not set
782CONFIG_BFIN_WDT=y
783
784#
785# Sonics Silicon Backplane
786#
787CONFIG_SSB_POSSIBLE=y
788# CONFIG_SSB is not set
789
790#
791# Multifunction device drivers
792#
793# CONFIG_MFD_SM501 is not set
794# CONFIG_HTC_PASIC3 is not set
795
796#
797# Multimedia devices
798#
799
800#
801# Multimedia core support
802#
803# CONFIG_VIDEO_DEV is not set
804# CONFIG_DVB_CORE is not set
805# CONFIG_VIDEO_MEDIA is not set
806
807#
808# Multimedia drivers
809#
810# CONFIG_DAB is not set
811
812#
813# Graphics support
814#
815# CONFIG_VGASTATE is not set
816# CONFIG_VIDEO_OUTPUT_CONTROL is not set
817# CONFIG_FB is not set
818# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
819
820#
821# Display device support
822#
823# CONFIG_DISPLAY_SUPPORT is not set
824
825#
826# Sound
827#
828# CONFIG_SOUND is not set
829CONFIG_HID_SUPPORT=y
830CONFIG_HID=y
831# CONFIG_HID_DEBUG is not set
832# CONFIG_HIDRAW is not set
833# CONFIG_USB_SUPPORT is not set
834CONFIG_MMC=y
835# CONFIG_MMC_DEBUG is not set
836# CONFIG_MMC_UNSAFE_RESUME is not set
837
838#
839# MMC/SD Card Drivers
840#
841CONFIG_MMC_BLOCK=y
842CONFIG_MMC_BLOCK_BOUNCE=y
843# CONFIG_SDIO_UART is not set
844# CONFIG_MMC_TEST is not set
845
846#
847# MMC/SD Host Controller Drivers
848#
849CONFIG_MMC_SPI=y
850# CONFIG_SPI_MMC is not set
851# CONFIG_MEMSTICK is not set
852# CONFIG_NEW_LEDS is not set
853# CONFIG_ACCESSIBILITY is not set
854CONFIG_RTC_LIB=y
855CONFIG_RTC_CLASS=y
856CONFIG_RTC_HCTOSYS=y
857CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
858# CONFIG_RTC_DEBUG is not set
859
860#
861# RTC interfaces
862#
863CONFIG_RTC_INTF_SYSFS=y
864CONFIG_RTC_INTF_PROC=y
865CONFIG_RTC_INTF_DEV=y
866# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
867# CONFIG_RTC_DRV_TEST is not set
868
869#
870# I2C RTC drivers
871#
872# CONFIG_RTC_DRV_DS1307 is not set
873# CONFIG_RTC_DRV_DS1374 is not set
874# CONFIG_RTC_DRV_DS1672 is not set
875# CONFIG_RTC_DRV_MAX6900 is not set
876# CONFIG_RTC_DRV_RS5C372 is not set
877# CONFIG_RTC_DRV_ISL1208 is not set
878# CONFIG_RTC_DRV_X1205 is not set
879# CONFIG_RTC_DRV_PCF8563 is not set
880# CONFIG_RTC_DRV_PCF8583 is not set
881# CONFIG_RTC_DRV_M41T80 is not set
882# CONFIG_RTC_DRV_S35390A is not set
883# CONFIG_RTC_DRV_FM3130 is not set
884
885#
886# SPI RTC drivers
887#
888# CONFIG_RTC_DRV_MAX6902 is not set
889# CONFIG_RTC_DRV_R9701 is not set
890# CONFIG_RTC_DRV_RS5C348 is not set
891
892#
893# Platform RTC drivers
894#
895# CONFIG_RTC_DRV_DS1511 is not set
896# CONFIG_RTC_DRV_DS1553 is not set
897# CONFIG_RTC_DRV_DS1742 is not set
898# CONFIG_RTC_DRV_STK17TA8 is not set
899# CONFIG_RTC_DRV_M48T86 is not set
900# CONFIG_RTC_DRV_M48T59 is not set
901# CONFIG_RTC_DRV_V3020 is not set
902
903#
904# on-CPU RTC drivers
905#
906CONFIG_RTC_DRV_BFIN=y
907# CONFIG_UIO is not set
908
909#
910# File systems
911#
912# CONFIG_EXT2_FS is not set
913# CONFIG_EXT3_FS is not set
914# CONFIG_EXT4DEV_FS is not set
915# CONFIG_REISERFS_FS is not set
916# CONFIG_JFS_FS is not set
917# CONFIG_FS_POSIX_ACL is not set
918# CONFIG_XFS_FS is not set
919# CONFIG_OCFS2_FS is not set
920# CONFIG_DNOTIFY is not set
921CONFIG_INOTIFY=y
922CONFIG_INOTIFY_USER=y
923# CONFIG_QUOTA is not set
924# CONFIG_AUTOFS_FS is not set
925# CONFIG_AUTOFS4_FS is not set
926# CONFIG_FUSE_FS is not set
927
928#
929# CD-ROM/DVD Filesystems
930#
931# CONFIG_ISO9660_FS is not set
932# CONFIG_UDF_FS is not set
933
934#
935# DOS/FAT/NT Filesystems
936#
937CONFIG_FAT_FS=y
938CONFIG_MSDOS_FS=y
939CONFIG_VFAT_FS=y
940CONFIG_FAT_DEFAULT_CODEPAGE=437
941CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
942# CONFIG_NTFS_FS is not set
943
944#
945# Pseudo filesystems
946#
947CONFIG_PROC_FS=y
948CONFIG_PROC_SYSCTL=y
949CONFIG_SYSFS=y
950# CONFIG_TMPFS is not set
951# CONFIG_HUGETLB_PAGE is not set
952# CONFIG_CONFIGFS_FS is not set
953
954#
955# Miscellaneous filesystems
956#
957# CONFIG_ADFS_FS is not set
958# CONFIG_AFFS_FS is not set
959# CONFIG_HFS_FS is not set
960# CONFIG_HFSPLUS_FS is not set
961# CONFIG_BEFS_FS is not set
962# CONFIG_BFS_FS is not set
963# CONFIG_EFS_FS is not set
964CONFIG_YAFFS_FS=m
965CONFIG_YAFFS_YAFFS1=y
966# CONFIG_YAFFS_9BYTE_TAGS is not set
967# CONFIG_YAFFS_DOES_ECC is not set
968CONFIG_YAFFS_YAFFS2=y
969CONFIG_YAFFS_AUTO_YAFFS2=y
970# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
971# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
972# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
973CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
974CONFIG_JFFS2_FS=y
975CONFIG_JFFS2_FS_DEBUG=0
976CONFIG_JFFS2_FS_WRITEBUFFER=y
977# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
978# CONFIG_JFFS2_SUMMARY is not set
979# CONFIG_JFFS2_FS_XATTR is not set
980# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
981CONFIG_JFFS2_ZLIB=y
982# CONFIG_JFFS2_LZO is not set
983CONFIG_JFFS2_RTIME=y
984# CONFIG_JFFS2_RUBIN is not set
985# CONFIG_CRAMFS is not set
986# CONFIG_VXFS_FS is not set
987# CONFIG_MINIX_FS is not set
988# CONFIG_HPFS_FS is not set
989# CONFIG_QNX4FS_FS is not set
990# CONFIG_ROMFS_FS is not set
991# CONFIG_SYSV_FS is not set
992# CONFIG_UFS_FS is not set
993CONFIG_NETWORK_FILESYSTEMS=y
994CONFIG_NFS_FS=y
995CONFIG_NFS_V3=y
996# CONFIG_NFS_V3_ACL is not set
997CONFIG_NFS_V4=y
998# CONFIG_NFSD is not set
999# CONFIG_ROOT_NFS is not set
1000CONFIG_LOCKD=y
1001CONFIG_LOCKD_V4=y
1002CONFIG_NFS_COMMON=y
1003CONFIG_SUNRPC=y
1004CONFIG_SUNRPC_GSS=y
1005# CONFIG_SUNRPC_BIND34 is not set
1006CONFIG_RPCSEC_GSS_KRB5=y
1007# CONFIG_RPCSEC_GSS_SPKM3 is not set
1008CONFIG_SMB_FS=y
1009# CONFIG_SMB_NLS_DEFAULT is not set
1010CONFIG_CIFS=y
1011# CONFIG_CIFS_STATS is not set
1012# CONFIG_CIFS_WEAK_PW_HASH is not set
1013# CONFIG_CIFS_XATTR is not set
1014# CONFIG_CIFS_DEBUG2 is not set
1015# CONFIG_CIFS_EXPERIMENTAL is not set
1016# CONFIG_NCP_FS is not set
1017# CONFIG_CODA_FS is not set
1018# CONFIG_AFS_FS is not set
1019
1020#
1021# Partition Types
1022#
1023# CONFIG_PARTITION_ADVANCED is not set
1024CONFIG_MSDOS_PARTITION=y
1025CONFIG_NLS=y
1026CONFIG_NLS_DEFAULT="iso8859-1"
1027CONFIG_NLS_CODEPAGE_437=y
1028# CONFIG_NLS_CODEPAGE_737 is not set
1029# CONFIG_NLS_CODEPAGE_775 is not set
1030# CONFIG_NLS_CODEPAGE_850 is not set
1031# CONFIG_NLS_CODEPAGE_852 is not set
1032# CONFIG_NLS_CODEPAGE_855 is not set
1033# CONFIG_NLS_CODEPAGE_857 is not set
1034# CONFIG_NLS_CODEPAGE_860 is not set
1035# CONFIG_NLS_CODEPAGE_861 is not set
1036# CONFIG_NLS_CODEPAGE_862 is not set
1037# CONFIG_NLS_CODEPAGE_863 is not set
1038# CONFIG_NLS_CODEPAGE_864 is not set
1039# CONFIG_NLS_CODEPAGE_865 is not set
1040# CONFIG_NLS_CODEPAGE_866 is not set
1041# CONFIG_NLS_CODEPAGE_869 is not set
1042# CONFIG_NLS_CODEPAGE_936 is not set
1043# CONFIG_NLS_CODEPAGE_950 is not set
1044# CONFIG_NLS_CODEPAGE_932 is not set
1045# CONFIG_NLS_CODEPAGE_949 is not set
1046# CONFIG_NLS_CODEPAGE_874 is not set
1047# CONFIG_NLS_ISO8859_8 is not set
1048# CONFIG_NLS_CODEPAGE_1250 is not set
1049# CONFIG_NLS_CODEPAGE_1251 is not set
1050CONFIG_NLS_ASCII=y
1051# CONFIG_NLS_ISO8859_1 is not set
1052# CONFIG_NLS_ISO8859_2 is not set
1053# CONFIG_NLS_ISO8859_3 is not set
1054# CONFIG_NLS_ISO8859_4 is not set
1055# CONFIG_NLS_ISO8859_5 is not set
1056# CONFIG_NLS_ISO8859_6 is not set
1057# CONFIG_NLS_ISO8859_7 is not set
1058# CONFIG_NLS_ISO8859_9 is not set
1059# CONFIG_NLS_ISO8859_13 is not set
1060# CONFIG_NLS_ISO8859_14 is not set
1061# CONFIG_NLS_ISO8859_15 is not set
1062# CONFIG_NLS_KOI8_R is not set
1063# CONFIG_NLS_KOI8_U is not set
1064CONFIG_NLS_UTF8=y
1065# CONFIG_DLM is not set
1066
1067#
1068# Kernel hacking
1069#
1070# CONFIG_PRINTK_TIME is not set
1071CONFIG_ENABLE_WARN_DEPRECATED=y
1072CONFIG_ENABLE_MUST_CHECK=y
1073CONFIG_FRAME_WARN=1024
1074# CONFIG_MAGIC_SYSRQ is not set
1075# CONFIG_UNUSED_SYMBOLS is not set
1076CONFIG_DEBUG_FS=y
1077# CONFIG_HEADERS_CHECK is not set
1078# CONFIG_DEBUG_KERNEL is not set
1079# CONFIG_DEBUG_BUGVERBOSE is not set
1080# CONFIG_SAMPLES is not set
1081CONFIG_DEBUG_MMRS=y
1082CONFIG_DEBUG_HUNT_FOR_ZERO=y
1083CONFIG_DEBUG_BFIN_HWTRACE_ON=y
1084CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
1085# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
1086# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
1087CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
1088# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
1089# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
1090CONFIG_EARLY_PRINTK=y
1091CONFIG_CPLB_INFO=y
1092CONFIG_ACCESS_CHECK=y
1093
1094#
1095# Security options
1096#
1097# CONFIG_KEYS is not set
1098CONFIG_SECURITY=y
1099# CONFIG_SECURITY_NETWORK is not set
1100# CONFIG_SECURITY_CAPABILITIES is not set
1101CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
1102CONFIG_CRYPTO=y
1103
1104#
1105# Crypto core or helper
1106#
1107CONFIG_CRYPTO_ALGAPI=y
1108CONFIG_CRYPTO_BLKCIPHER=y
1109CONFIG_CRYPTO_MANAGER=y
1110# CONFIG_CRYPTO_GF128MUL is not set
1111# CONFIG_CRYPTO_NULL is not set
1112# CONFIG_CRYPTO_CRYPTD is not set
1113# CONFIG_CRYPTO_AUTHENC is not set
1114# CONFIG_CRYPTO_TEST is not set
1115
1116#
1117# Authenticated Encryption with Associated Data
1118#
1119# CONFIG_CRYPTO_CCM is not set
1120# CONFIG_CRYPTO_GCM is not set
1121# CONFIG_CRYPTO_SEQIV is not set
1122
1123#
1124# Block modes
1125#
1126CONFIG_CRYPTO_CBC=y
1127# CONFIG_CRYPTO_CTR is not set
1128# CONFIG_CRYPTO_CTS is not set
1129# CONFIG_CRYPTO_ECB is not set
1130# CONFIG_CRYPTO_LRW is not set
1131# CONFIG_CRYPTO_PCBC is not set
1132# CONFIG_CRYPTO_XTS is not set
1133
1134#
1135# Hash modes
1136#
1137# CONFIG_CRYPTO_HMAC is not set
1138# CONFIG_CRYPTO_XCBC is not set
1139
1140#
1141# Digest
1142#
1143# CONFIG_CRYPTO_CRC32C is not set
1144# CONFIG_CRYPTO_MD4 is not set
1145CONFIG_CRYPTO_MD5=y
1146# CONFIG_CRYPTO_MICHAEL_MIC is not set
1147# CONFIG_CRYPTO_SHA1 is not set
1148# CONFIG_CRYPTO_SHA256 is not set
1149# CONFIG_CRYPTO_SHA512 is not set
1150# CONFIG_CRYPTO_TGR192 is not set
1151# CONFIG_CRYPTO_WP512 is not set
1152
1153#
1154# Ciphers
1155#
1156# CONFIG_CRYPTO_AES is not set
1157# CONFIG_CRYPTO_ANUBIS is not set
1158# CONFIG_CRYPTO_ARC4 is not set
1159# CONFIG_CRYPTO_BLOWFISH is not set
1160# CONFIG_CRYPTO_CAMELLIA is not set
1161# CONFIG_CRYPTO_CAST5 is not set
1162# CONFIG_CRYPTO_CAST6 is not set
1163CONFIG_CRYPTO_DES=y
1164# CONFIG_CRYPTO_FCRYPT is not set
1165# CONFIG_CRYPTO_KHAZAD is not set
1166# CONFIG_CRYPTO_SALSA20 is not set
1167# CONFIG_CRYPTO_SEED is not set
1168# CONFIG_CRYPTO_SERPENT is not set
1169# CONFIG_CRYPTO_TEA is not set
1170# CONFIG_CRYPTO_TWOFISH is not set
1171
1172#
1173# Compression
1174#
1175# CONFIG_CRYPTO_DEFLATE is not set
1176# CONFIG_CRYPTO_LZO is not set
1177CONFIG_CRYPTO_HW=y
1178
1179#
1180# Library routines
1181#
1182CONFIG_BITREVERSE=y
1183# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1184CONFIG_CRC_CCITT=m
1185# CONFIG_CRC16 is not set
1186CONFIG_CRC_ITU_T=y
1187CONFIG_CRC32=y
1188CONFIG_CRC7=y
1189# CONFIG_LIBCRC32C is not set
1190CONFIG_ZLIB_INFLATE=y
1191CONFIG_ZLIB_DEFLATE=y
1192CONFIG_PLIST=y
1193CONFIG_HAS_IOMEM=y
1194CONFIG_HAS_IOPORT=y
1195CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/TCM-BF537_defconfig b/arch/blackfin/configs/TCM-BF537_defconfig
new file mode 100644
index 000000000000..c482ee171f9e
--- /dev/null
+++ b/arch/blackfin/configs/TCM-BF537_defconfig
@@ -0,0 +1,693 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24.7
4# Thu Jul 31 00:53:15 2008
5#
6# CONFIG_MMU is not set
7# CONFIG_FPU is not set
8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
10CONFIG_BLACKFIN=y
11CONFIG_ZONE_DMA=y
12CONFIG_SEMAPHORE_SLEEPERS=y
13CONFIG_GENERIC_FIND_NEXT_BIT=y
14CONFIG_GENERIC_HWEIGHT=y
15CONFIG_GENERIC_HARDIRQS=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_GENERIC_GPIO=y
18CONFIG_FORCE_MAX_ZONEORDER=14
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
21
22#
23# General setup
24#
25CONFIG_EXPERIMENTAL=y
26CONFIG_BROKEN_ON_SMP=y
27CONFIG_INIT_ENV_ARG_LIMIT=32
28CONFIG_LOCALVERSION=""
29CONFIG_LOCALVERSION_AUTO=y
30CONFIG_SYSVIPC=y
31CONFIG_SYSVIPC_SYSCTL=y
32# CONFIG_BSD_PROCESS_ACCT is not set
33# CONFIG_USER_NS is not set
34# CONFIG_PID_NS is not set
35CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y
37CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39CONFIG_FAIR_GROUP_SCHED=y
40CONFIG_FAIR_USER_SCHED=y
41# CONFIG_FAIR_CGROUP_SCHED is not set
42CONFIG_SYSFS_DEPRECATED=y
43# CONFIG_RELAY is not set
44# CONFIG_BLK_DEV_INITRD is not set
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y
47CONFIG_EMBEDDED=y
48# CONFIG_UID16 is not set
49CONFIG_SYSCTL_SYSCALL=y
50CONFIG_KALLSYMS=y
51# CONFIG_KALLSYMS_EXTRA_PASS is not set
52# CONFIG_HOTPLUG is not set
53CONFIG_PRINTK=y
54CONFIG_BUG=y
55CONFIG_ELF_CORE=y
56CONFIG_BASE_FULL=y
57CONFIG_FUTEX=y
58CONFIG_ANON_INODES=y
59CONFIG_EPOLL=y
60CONFIG_SIGNALFD=y
61CONFIG_EVENTFD=y
62CONFIG_VM_EVENT_COUNTERS=y
63CONFIG_SLAB=y
64# CONFIG_SLUB is not set
65# CONFIG_SLOB is not set
66CONFIG_SLABINFO=y
67CONFIG_RT_MUTEXES=y
68CONFIG_TINY_SHMEM=y
69CONFIG_BASE_SMALL=0
70CONFIG_MODULES=y
71CONFIG_MODULE_UNLOAD=y
72# CONFIG_MODULE_FORCE_UNLOAD is not set
73# CONFIG_MODVERSIONS is not set
74# CONFIG_MODULE_SRCVERSION_ALL is not set
75CONFIG_KMOD=y
76CONFIG_BLOCK=y
77# CONFIG_LBD is not set
78# CONFIG_BLK_DEV_IO_TRACE is not set
79# CONFIG_LSF is not set
80# CONFIG_BLK_DEV_BSG is not set
81
82#
83# IO Schedulers
84#
85CONFIG_IOSCHED_NOOP=y
86# CONFIG_IOSCHED_AS is not set
87# CONFIG_IOSCHED_DEADLINE is not set
88CONFIG_IOSCHED_CFQ=y
89# CONFIG_DEFAULT_AS is not set
90# CONFIG_DEFAULT_DEADLINE is not set
91# CONFIG_DEFAULT_CFQ is not set
92CONFIG_DEFAULT_NOOP=y
93CONFIG_DEFAULT_IOSCHED="noop"
94CONFIG_PREEMPT_NONE=y
95# CONFIG_PREEMPT_VOLUNTARY is not set
96# CONFIG_PREEMPT is not set
97
98#
99# Blackfin Processor Options
100#
101
102#
103# Processor and Board Settings
104#
105# CONFIG_BF522 is not set
106# CONFIG_BF523 is not set
107# CONFIG_BF524 is not set
108# CONFIG_BF525 is not set
109# CONFIG_BF526 is not set
110# CONFIG_BF527 is not set
111# CONFIG_BF531 is not set
112# CONFIG_BF532 is not set
113# CONFIG_BF533 is not set
114# CONFIG_BF534 is not set
115# CONFIG_BF536 is not set
116CONFIG_BF537=y
117# CONFIG_BF542 is not set
118# CONFIG_BF544 is not set
119# CONFIG_BF547 is not set
120# CONFIG_BF548 is not set
121# CONFIG_BF549 is not set
122# CONFIG_BF561 is not set
123# CONFIG_BF_REV_0_0 is not set
124# CONFIG_BF_REV_0_1 is not set
125CONFIG_BF_REV_0_2=y
126# CONFIG_BF_REV_0_3 is not set
127# CONFIG_BF_REV_0_4 is not set
128# CONFIG_BF_REV_0_5 is not set
129# CONFIG_BF_REV_ANY is not set
130# CONFIG_BF_REV_NONE is not set
131CONFIG_BF53x=y
132CONFIG_IRQ_PLL_WAKEUP=7
133CONFIG_IRQ_RTC=8
134CONFIG_IRQ_PPI=8
135CONFIG_IRQ_SPORT0_RX=9
136CONFIG_IRQ_SPORT0_TX=9
137CONFIG_IRQ_SPORT1_RX=9
138CONFIG_IRQ_SPORT1_TX=9
139CONFIG_IRQ_TWI=10
140CONFIG_IRQ_SPI=10
141CONFIG_IRQ_UART0_RX=10
142CONFIG_IRQ_UART0_TX=10
143CONFIG_IRQ_UART1_RX=10
144CONFIG_IRQ_UART1_TX=10
145CONFIG_IRQ_MAC_RX=11
146CONFIG_IRQ_MAC_TX=11
147CONFIG_IRQ_TMR0=12
148CONFIG_IRQ_TMR1=12
149CONFIG_IRQ_TMR2=12
150CONFIG_IRQ_TMR3=12
151CONFIG_IRQ_TMR4=12
152CONFIG_IRQ_TMR5=12
153CONFIG_IRQ_TMR6=12
154CONFIG_IRQ_TMR7=12
155CONFIG_IRQ_PORTG_INTB=12
156CONFIG_IRQ_MEM_DMA0=13
157CONFIG_IRQ_MEM_DMA1=13
158CONFIG_IRQ_WATCH=13
159# CONFIG_BFIN537_STAMP is not set
160# CONFIG_BFIN537_BLUETECHNIX_CM is not set
161CONFIG_BFIN537_BLUETECHNIX_TCM=y
162# CONFIG_PNAV10 is not set
163# CONFIG_CAMSIG_MINOTAUR is not set
164# CONFIG_GENERIC_BF537_BOARD is not set
165
166#
167# BF537 Specific Configuration
168#
169
170#
171# Interrupt Priority Assignment
172#
173
174#
175# Priority
176#
177CONFIG_IRQ_DMA_ERROR=7
178CONFIG_IRQ_ERROR=7
179CONFIG_IRQ_CAN_RX=11
180CONFIG_IRQ_CAN_TX=11
181CONFIG_IRQ_PROG_INTA=12
182
183#
184# Board customizations
185#
186# CONFIG_CMDLINE_BOOL is not set
187CONFIG_BOOT_LOAD=0x1000
188
189#
190# Clock/PLL Setup
191#
192CONFIG_CLKIN_HZ=25000000
193# CONFIG_BFIN_KERNEL_CLOCK is not set
194CONFIG_MAX_MEM_SIZE=32
195CONFIG_MAX_VCO_HZ=600000000
196CONFIG_MIN_VCO_HZ=50000000
197CONFIG_MAX_SCLK_HZ=133333333
198CONFIG_MIN_SCLK_HZ=27000000
199
200#
201# Kernel Timer/Scheduler
202#
203# CONFIG_HZ_100 is not set
204CONFIG_HZ_250=y
205# CONFIG_HZ_300 is not set
206# CONFIG_HZ_1000 is not set
207CONFIG_HZ=250
208CONFIG_GENERIC_TIME=y
209CONFIG_GENERIC_CLOCKEVENTS=y
210# CONFIG_CYCLES_CLOCKSOURCE is not set
211# CONFIG_TICK_ONESHOT is not set
212# CONFIG_NO_HZ is not set
213# CONFIG_HIGH_RES_TIMERS is not set
214CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
215
216#
217# Misc
218#
219CONFIG_BFIN_SCRATCH_REG_RETN=y
220# CONFIG_BFIN_SCRATCH_REG_RETE is not set
221# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
222
223#
224# Blackfin Kernel Optimizations
225#
226
227#
228# Memory Optimizations
229#
230CONFIG_I_ENTRY_L1=y
231CONFIG_EXCPT_IRQ_SYSC_L1=y
232CONFIG_DO_IRQ_L1=y
233CONFIG_CORE_TIMER_IRQ_L1=y
234CONFIG_IDLE_L1=y
235CONFIG_SCHEDULE_L1=y
236CONFIG_ARITHMETIC_OPS_L1=y
237CONFIG_ACCESS_OK_L1=y
238CONFIG_MEMSET_L1=y
239CONFIG_MEMCPY_L1=y
240CONFIG_SYS_BFIN_SPINLOCK_L1=y
241CONFIG_IP_CHECKSUM_L1=y
242CONFIG_CACHELINE_ALIGNED_L1=y
243CONFIG_SYSCALL_TAB_L1=y
244CONFIG_CPLB_SWITCH_TAB_L1=y
245CONFIG_RAMKERNEL=y
246# CONFIG_ROMKERNEL is not set
247CONFIG_SELECT_MEMORY_MODEL=y
248CONFIG_FLATMEM_MANUAL=y
249# CONFIG_DISCONTIGMEM_MANUAL is not set
250# CONFIG_SPARSEMEM_MANUAL is not set
251CONFIG_FLATMEM=y
252CONFIG_FLAT_NODE_MEM_MAP=y
253# CONFIG_SPARSEMEM_STATIC is not set
254# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
255CONFIG_SPLIT_PTLOCK_CPUS=4
256# CONFIG_RESOURCES_64BIT is not set
257CONFIG_ZONE_DMA_FLAG=1
258CONFIG_VIRT_TO_BUS=y
259# CONFIG_BFIN_GPTIMERS is not set
260CONFIG_BFIN_DMA_5XX=y
261# CONFIG_DMA_UNCACHED_4M is not set
262# CONFIG_DMA_UNCACHED_2M is not set
263CONFIG_DMA_UNCACHED_1M=y
264# CONFIG_DMA_UNCACHED_NONE is not set
265
266#
267# Cache Support
268#
269CONFIG_BFIN_ICACHE=y
270CONFIG_BFIN_DCACHE=y
271# CONFIG_BFIN_DCACHE_BANKA is not set
272# CONFIG_BFIN_ICACHE_LOCK is not set
273CONFIG_BFIN_WB=y
274# CONFIG_BFIN_WT is not set
275# CONFIG_MPU is not set
276
277#
278# Asynchonous Memory Configuration
279#
280
281#
282# EBIU_AMGCTL Global Control
283#
284CONFIG_C_AMCKEN=y
285CONFIG_C_CDPRIO=y
286# CONFIG_C_AMBEN is not set
287# CONFIG_C_AMBEN_B0 is not set
288# CONFIG_C_AMBEN_B0_B1 is not set
289# CONFIG_C_AMBEN_B0_B1_B2 is not set
290CONFIG_C_AMBEN_ALL=y
291
292#
293# EBIU_AMBCTL Control
294#
295CONFIG_BANK_0=0x7BB0
296CONFIG_BANK_1=0x7BB0
297CONFIG_BANK_2=0x7BB0
298CONFIG_BANK_3=0xFFC2
299
300#
301# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
302#
303# CONFIG_PCI is not set
304# CONFIG_ARCH_SUPPORTS_MSI is not set
305
306#
307# Executable file formats
308#
309CONFIG_BINFMT_ELF_FDPIC=y
310CONFIG_BINFMT_FLAT=y
311CONFIG_BINFMT_ZFLAT=y
312CONFIG_BINFMT_SHARED_FLAT=y
313# CONFIG_BINFMT_MISC is not set
314
315#
316# Power management options
317#
318# CONFIG_PM is not set
319CONFIG_SUSPEND_UP_POSSIBLE=y
320# CONFIG_PM_WAKEUP_BY_GPIO is not set
321
322#
323# CPU Frequency scaling
324#
325# CONFIG_CPU_FREQ is not set
326
327#
328# Networking
329#
330# CONFIG_NET is not set
331
332#
333# Device Drivers
334#
335
336#
337# Generic Driver Options
338#
339CONFIG_STANDALONE=y
340CONFIG_PREVENT_FIRMWARE_BUILD=y
341# CONFIG_SYS_HYPERVISOR is not set
342CONFIG_MTD=y
343# CONFIG_MTD_DEBUG is not set
344# CONFIG_MTD_CONCAT is not set
345CONFIG_MTD_PARTITIONS=y
346# CONFIG_MTD_REDBOOT_PARTS is not set
347# CONFIG_MTD_CMDLINE_PARTS is not set
348
349#
350# User Modules And Translation Layers
351#
352CONFIG_MTD_CHAR=y
353CONFIG_MTD_BLKDEVS=y
354CONFIG_MTD_BLOCK=y
355# CONFIG_FTL is not set
356# CONFIG_NFTL is not set
357# CONFIG_INFTL is not set
358# CONFIG_RFD_FTL is not set
359# CONFIG_SSFDC is not set
360# CONFIG_MTD_OOPS is not set
361
362#
363# RAM/ROM/Flash chip drivers
364#
365# CONFIG_MTD_CFI is not set
366# CONFIG_MTD_JEDECPROBE is not set
367CONFIG_MTD_MAP_BANK_WIDTH_1=y
368CONFIG_MTD_MAP_BANK_WIDTH_2=y
369CONFIG_MTD_MAP_BANK_WIDTH_4=y
370# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
371# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
372# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
373CONFIG_MTD_CFI_I1=y
374CONFIG_MTD_CFI_I2=y
375# CONFIG_MTD_CFI_I4 is not set
376# CONFIG_MTD_CFI_I8 is not set
377CONFIG_MTD_RAM=y
378# CONFIG_MTD_ROM is not set
379# CONFIG_MTD_ABSENT is not set
380
381#
382# Mapping drivers for chip access
383#
384# CONFIG_MTD_COMPLEX_MAPPINGS is not set
385# CONFIG_MTD_GPIO_ADDR is not set
386CONFIG_MTD_UCLINUX=y
387# CONFIG_MTD_PLATRAM is not set
388
389#
390# Self-contained MTD device drivers
391#
392# CONFIG_MTD_DATAFLASH is not set
393# CONFIG_MTD_M25P80 is not set
394# CONFIG_MTD_SLRAM is not set
395# CONFIG_MTD_PHRAM is not set
396# CONFIG_MTD_MTDRAM is not set
397# CONFIG_MTD_BLOCK2MTD is not set
398
399#
400# Disk-On-Chip Device Drivers
401#
402# CONFIG_MTD_DOC2000 is not set
403# CONFIG_MTD_DOC2001 is not set
404# CONFIG_MTD_DOC2001PLUS is not set
405# CONFIG_MTD_NAND is not set
406# CONFIG_MTD_ONENAND is not set
407
408#
409# UBI - Unsorted block images
410#
411# CONFIG_MTD_UBI is not set
412# CONFIG_PARPORT is not set
413CONFIG_BLK_DEV=y
414# CONFIG_BLK_DEV_COW_COMMON is not set
415# CONFIG_BLK_DEV_LOOP is not set
416CONFIG_BLK_DEV_RAM=y
417CONFIG_BLK_DEV_RAM_COUNT=16
418CONFIG_BLK_DEV_RAM_SIZE=4096
419CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
420# CONFIG_CDROM_PKTCDVD is not set
421CONFIG_MISC_DEVICES=y
422# CONFIG_EEPROM_93CX6 is not set
423# CONFIG_IDE is not set
424
425#
426# SCSI device support
427#
428# CONFIG_RAID_ATTRS is not set
429# CONFIG_SCSI is not set
430# CONFIG_SCSI_DMA is not set
431# CONFIG_SCSI_NETLINK is not set
432# CONFIG_ATA is not set
433# CONFIG_MD is not set
434# CONFIG_PHONE is not set
435
436#
437# Input device support
438#
439# CONFIG_INPUT is not set
440
441#
442# Hardware I/O ports
443#
444# CONFIG_SERIO is not set
445# CONFIG_GAMEPORT is not set
446
447#
448# Character devices
449#
450# CONFIG_AD9960 is not set
451# CONFIG_SPI_ADC_BF533 is not set
452# CONFIG_BF5xx_PPIFCD is not set
453# CONFIG_BFIN_SIMPLE_TIMER is not set
454# CONFIG_BF5xx_PPI is not set
455CONFIG_BFIN_SPORT=y
456# CONFIG_BFIN_TIMER_LATENCY is not set
457# CONFIG_SIMPLE_GPIO is not set
458# CONFIG_VT is not set
459# CONFIG_SERIAL_NONSTANDARD is not set
460
461#
462# Serial drivers
463#
464# CONFIG_SERIAL_8250 is not set
465
466#
467# Non-8250 serial port support
468#
469CONFIG_SERIAL_BFIN=y
470CONFIG_SERIAL_BFIN_CONSOLE=y
471CONFIG_SERIAL_BFIN_DMA=y
472# CONFIG_SERIAL_BFIN_PIO is not set
473CONFIG_SERIAL_BFIN_UART0=y
474# CONFIG_BFIN_UART0_CTSRTS is not set
475CONFIG_SERIAL_BFIN_UART1=y
476# CONFIG_BFIN_UART1_CTSRTS is not set
477CONFIG_SERIAL_CORE=y
478CONFIG_SERIAL_CORE_CONSOLE=y
479# CONFIG_SERIAL_BFIN_SPORT is not set
480CONFIG_UNIX98_PTYS=y
481# CONFIG_LEGACY_PTYS is not set
482
483#
484# CAN, the car bus and industrial fieldbus
485#
486# CONFIG_CAN4LINUX is not set
487# CONFIG_IPMI_HANDLER is not set
488# CONFIG_HW_RANDOM is not set
489# CONFIG_GEN_RTC is not set
490# CONFIG_R3964 is not set
491# CONFIG_RAW_DRIVER is not set
492# CONFIG_TCG_TPM is not set
493# CONFIG_I2C is not set
494
495#
496# SPI support
497#
498CONFIG_SPI=y
499CONFIG_SPI_MASTER=y
500
501#
502# SPI Master Controller Drivers
503#
504CONFIG_SPI_BFIN=y
505# CONFIG_SPI_BITBANG is not set
506
507#
508# SPI Protocol Masters
509#
510# CONFIG_SPI_AT25 is not set
511# CONFIG_SPI_SPIDEV is not set
512# CONFIG_SPI_TLE62X0 is not set
513# CONFIG_W1 is not set
514# CONFIG_POWER_SUPPLY is not set
515# CONFIG_HWMON is not set
516CONFIG_WATCHDOG=y
517# CONFIG_WATCHDOG_NOWAYOUT is not set
518
519#
520# Watchdog Device Drivers
521#
522# CONFIG_SOFT_WATCHDOG is not set
523CONFIG_BFIN_WDT=y
524
525#
526# Sonics Silicon Backplane
527#
528CONFIG_SSB_POSSIBLE=y
529# CONFIG_SSB is not set
530
531#
532# Multifunction device drivers
533#
534# CONFIG_MFD_SM501 is not set
535
536#
537# Multimedia devices
538#
539# CONFIG_VIDEO_DEV is not set
540# CONFIG_DAB is not set
541
542#
543# Graphics support
544#
545# CONFIG_VGASTATE is not set
546# CONFIG_VIDEO_OUTPUT_CONTROL is not set
547# CONFIG_FB is not set
548# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
549
550#
551# Display device support
552#
553# CONFIG_DISPLAY_SUPPORT is not set
554
555#
556# Sound
557#
558# CONFIG_SOUND is not set
559# CONFIG_USB_SUPPORT is not set
560# CONFIG_MMC is not set
561# CONFIG_NEW_LEDS is not set
562# CONFIG_RTC_CLASS is not set
563
564#
565# Userspace I/O
566#
567# CONFIG_UIO is not set
568
569#
570# File systems
571#
572CONFIG_EXT2_FS=y
573CONFIG_EXT2_FS_XATTR=y
574# CONFIG_EXT2_FS_POSIX_ACL is not set
575# CONFIG_EXT2_FS_SECURITY is not set
576# CONFIG_EXT3_FS is not set
577# CONFIG_EXT4DEV_FS is not set
578CONFIG_FS_MBCACHE=y
579# CONFIG_REISERFS_FS is not set
580# CONFIG_JFS_FS is not set
581# CONFIG_FS_POSIX_ACL is not set
582# CONFIG_XFS_FS is not set
583# CONFIG_GFS2_FS is not set
584# CONFIG_MINIX_FS is not set
585# CONFIG_ROMFS_FS is not set
586CONFIG_INOTIFY=y
587CONFIG_INOTIFY_USER=y
588# CONFIG_QUOTA is not set
589# CONFIG_DNOTIFY is not set
590# CONFIG_AUTOFS_FS is not set
591# CONFIG_AUTOFS4_FS is not set
592# CONFIG_FUSE_FS is not set
593
594#
595# CD-ROM/DVD Filesystems
596#
597# CONFIG_ISO9660_FS is not set
598# CONFIG_UDF_FS is not set
599
600#
601# DOS/FAT/NT Filesystems
602#
603# CONFIG_MSDOS_FS is not set
604# CONFIG_VFAT_FS is not set
605# CONFIG_NTFS_FS is not set
606
607#
608# Pseudo filesystems
609#
610CONFIG_PROC_FS=y
611CONFIG_PROC_SYSCTL=y
612CONFIG_SYSFS=y
613# CONFIG_TMPFS is not set
614# CONFIG_HUGETLB_PAGE is not set
615# CONFIG_CONFIGFS_FS is not set
616
617#
618# Miscellaneous filesystems
619#
620# CONFIG_ADFS_FS is not set
621# CONFIG_AFFS_FS is not set
622# CONFIG_HFS_FS is not set
623# CONFIG_HFSPLUS_FS is not set
624# CONFIG_BEFS_FS is not set
625# CONFIG_BFS_FS is not set
626# CONFIG_EFS_FS is not set
627# CONFIG_YAFFS_FS is not set
628# CONFIG_JFFS2_FS is not set
629# CONFIG_CRAMFS is not set
630# CONFIG_VXFS_FS is not set
631# CONFIG_HPFS_FS is not set
632# CONFIG_QNX4FS_FS is not set
633# CONFIG_SYSV_FS is not set
634# CONFIG_UFS_FS is not set
635
636#
637# Partition Types
638#
639# CONFIG_PARTITION_ADVANCED is not set
640CONFIG_MSDOS_PARTITION=y
641# CONFIG_NLS is not set
642# CONFIG_INSTRUMENTATION is not set
643
644#
645# Kernel hacking
646#
647# CONFIG_PRINTK_TIME is not set
648CONFIG_ENABLE_WARN_DEPRECATED=y
649CONFIG_ENABLE_MUST_CHECK=y
650# CONFIG_MAGIC_SYSRQ is not set
651# CONFIG_UNUSED_SYMBOLS is not set
652CONFIG_DEBUG_FS=y
653# CONFIG_HEADERS_CHECK is not set
654# CONFIG_DEBUG_KERNEL is not set
655# CONFIG_DEBUG_BUGVERBOSE is not set
656# CONFIG_SAMPLES is not set
657CONFIG_DEBUG_MMRS=y
658CONFIG_DEBUG_HUNT_FOR_ZERO=y
659CONFIG_DEBUG_BFIN_HWTRACE_ON=y
660CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
661# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
662# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
663CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
664# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
665# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
666# CONFIG_EARLY_PRINTK is not set
667CONFIG_CPLB_INFO=y
668CONFIG_ACCESS_CHECK=y
669
670#
671# Security options
672#
673# CONFIG_KEYS is not set
674CONFIG_SECURITY=y
675# CONFIG_SECURITY_NETWORK is not set
676CONFIG_SECURITY_CAPABILITIES=y
677# CONFIG_SECURITY_FILE_CAPABILITIES is not set
678# CONFIG_CRYPTO is not set
679
680#
681# Library routines
682#
683# CONFIG_CRC_CCITT is not set
684# CONFIG_CRC16 is not set
685# CONFIG_CRC_ITU_T is not set
686# CONFIG_CRC32 is not set
687# CONFIG_CRC7 is not set
688# CONFIG_LIBCRC32C is not set
689CONFIG_ZLIB_INFLATE=y
690CONFIG_PLIST=y
691CONFIG_HAS_IOMEM=y
692CONFIG_HAS_IOPORT=y
693CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/kernel/cplb-mpu/cacheinit.c b/arch/blackfin/kernel/cplb-mpu/cacheinit.c
index 9eecfa403187..a8b712a24c59 100644
--- a/arch/blackfin/kernel/cplb-mpu/cacheinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cacheinit.c
@@ -25,7 +25,7 @@
25#include <asm/cplbinit.h> 25#include <asm/cplbinit.h>
26 26
27#if defined(CONFIG_BFIN_ICACHE) 27#if defined(CONFIG_BFIN_ICACHE)
28void bfin_icache_init(void) 28void __init bfin_icache_init(void)
29{ 29{
30 unsigned long ctrl; 30 unsigned long ctrl;
31 int i; 31 int i;
@@ -43,7 +43,7 @@ void bfin_icache_init(void)
43#endif 43#endif
44 44
45#if defined(CONFIG_BFIN_DCACHE) 45#if defined(CONFIG_BFIN_DCACHE)
46void bfin_dcache_init(void) 46void __init bfin_dcache_init(void)
47{ 47{
48 unsigned long ctrl; 48 unsigned long ctrl;
49 int i; 49 int i;
diff --git a/arch/blackfin/kernel/cplb-nompu/cacheinit.c b/arch/blackfin/kernel/cplb-nompu/cacheinit.c
index 8a18399f6072..bd0831592c2c 100644
--- a/arch/blackfin/kernel/cplb-nompu/cacheinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cacheinit.c
@@ -25,7 +25,7 @@
25#include <asm/cplbinit.h> 25#include <asm/cplbinit.h>
26 26
27#if defined(CONFIG_BFIN_ICACHE) 27#if defined(CONFIG_BFIN_ICACHE)
28void bfin_icache_init(void) 28void __init bfin_icache_init(void)
29{ 29{
30 unsigned long *table = icplb_table; 30 unsigned long *table = icplb_table;
31 unsigned long ctrl; 31 unsigned long ctrl;
@@ -47,7 +47,7 @@ void bfin_icache_init(void)
47#endif 47#endif
48 48
49#if defined(CONFIG_BFIN_DCACHE) 49#if defined(CONFIG_BFIN_DCACHE)
50void bfin_dcache_init(void) 50void __init bfin_dcache_init(void)
51{ 51{
52 unsigned long *table = dcplb_table; 52 unsigned long *table = dcplb_table;
53 unsigned long ctrl; 53 unsigned long ctrl;
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index 224e7cc30bc5..728f708d3981 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -164,17 +164,13 @@ static struct cplb_desc cplb_data[] = {
164 .name = "Asynchronous Memory Banks", 164 .name = "Asynchronous Memory Banks",
165 }, 165 },
166 { 166 {
167#ifdef L2_START
168 .start = L2_START, 167 .start = L2_START,
169 .end = L2_START + L2_LENGTH, 168 .end = L2_START + L2_LENGTH,
170 .psize = SIZE_1M, 169 .psize = SIZE_1M,
171 .attr = SWITCH_T | I_CPLB | D_CPLB, 170 .attr = SWITCH_T | I_CPLB | D_CPLB,
172 .i_conf = L2_MEMORY, 171 .i_conf = L2_MEMORY,
173 .d_conf = L2_MEMORY, 172 .d_conf = L2_MEMORY,
174 .valid = 1, 173 .valid = (L2_LENGTH > 0),
175#else
176 .valid = 0,
177#endif
178 .name = "L2 Memory", 174 .name = "L2 Memory",
179 }, 175 },
180 { 176 {
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 23e637eb78da..7a82d10b4ebf 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -52,6 +52,7 @@ EXPORT_SYMBOL(mtd_size);
52#endif 52#endif
53 53
54char __initdata command_line[COMMAND_LINE_SIZE]; 54char __initdata command_line[COMMAND_LINE_SIZE];
55unsigned int __initdata *__retx;
55 56
56/* boot memmap, for parsing "memmap=" */ 57/* boot memmap, for parsing "memmap=" */
57#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */ 58#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
@@ -131,14 +132,14 @@ void __init bf53x_relocate_l1_mem(void)
131 dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length + 132 dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
132 l1_data_a_length, l1_data_b_length); 133 l1_data_a_length, l1_data_b_length);
133 134
134#ifdef L2_LENGTH 135 if (L2_LENGTH != 0) {
135 l2_length = _ebss_l2 - _stext_l2; 136 l2_length = _ebss_l2 - _stext_l2;
136 if (l2_length > L2_LENGTH) 137 if (l2_length > L2_LENGTH)
137 panic("L2 SRAM Overflow\n"); 138 panic("L2 SRAM Overflow\n");
138 139
139 /* Copy _stext_l2 to _edata_l2 to L2 SRAM */ 140 /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
140 dma_memcpy(_stext_l2, _l2_lma_start, l2_length); 141 dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
141#endif 142 }
142} 143}
143 144
144/* add_memory_region to memmap */ 145/* add_memory_region to memmap */
@@ -738,6 +739,16 @@ void __init setup_arch(char **cmdline_p)
738 739
739 memory_setup(); 740 memory_setup();
740 741
742 /* Initialize Async memory banks */
743 bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
744 bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
745 bfin_write_EBIU_AMGCTL(AMGCTLVAL);
746#ifdef CONFIG_EBIU_MBSCTLVAL
747 bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
748 bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
749 bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
750#endif
751
741 cclk = get_cclk(); 752 cclk = get_cclk();
742 sclk = get_sclk(); 753 sclk = get_sclk();
743 754
@@ -775,7 +786,11 @@ void __init setup_arch(char **cmdline_p)
775 bfin_write_SWRST(DOUBLE_FAULT); 786 bfin_write_SWRST(DOUBLE_FAULT);
776 787
777 if (_bfin_swrst & RESET_DOUBLE) 788 if (_bfin_swrst & RESET_DOUBLE)
778 printk(KERN_INFO "Recovering from Double Fault event\n"); 789 /*
790 * don't decode the address, since you don't know if this
791 * kernel's symbol map is the same as the crashing kernel
792 */
793 printk(KERN_INFO "Recovering from Double Fault event at %pF\n", __retx);
779 else if (_bfin_swrst & RESET_WDOG) 794 else if (_bfin_swrst & RESET_WDOG)
780 printk(KERN_INFO "Recovering from Watchdog event\n"); 795 printk(KERN_INFO "Recovering from Watchdog event\n");
781 else if (_bfin_swrst & RESET_SOFTWARE) 796 else if (_bfin_swrst & RESET_SOFTWARE)
@@ -1049,7 +1064,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
1049 dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS, 1064 dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1050 BFIN_DLINES); 1065 BFIN_DLINES);
1051#ifdef CONFIG_BFIN_ICACHE_LOCK 1066#ifdef CONFIG_BFIN_ICACHE_LOCK
1052 switch (read_iloc()) { 1067 switch ((bfin_read_IMEM_CONTROL() >> 3) & WAYALL_L) {
1053 case WAY0_L: 1068 case WAY0_L:
1054 seq_printf(m, "Way0 Locked-Down\n"); 1069 seq_printf(m, "Way0 Locked-Down\n");
1055 break; 1070 break;
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index ad922ab91543..9a9d5083acfd 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -567,7 +567,7 @@ bool get_instruction(unsigned short *val, unsigned short *address)
567 * we don't read something in the async space that can hang forever 567 * we don't read something in the async space that can hang forever
568 */ 568 */
569 if ((addr >= FIXED_CODE_START && (addr + 2) <= physical_mem_end) || 569 if ((addr >= FIXED_CODE_START && (addr + 2) <= physical_mem_end) ||
570#ifdef L2_START 570#if L2_LENGTH != 0
571 (addr >= L2_START && (addr + 2) <= (L2_START + L2_LENGTH)) || 571 (addr >= L2_START && (addr + 2) <= (L2_START + L2_LENGTH)) ||
572#endif 572#endif
573 (addr >= BOOT_ROM_START && (addr + 2) <= (BOOT_ROM_START + BOOT_ROM_LENGTH)) || 573 (addr >= BOOT_ROM_START && (addr + 2) <= (BOOT_ROM_START + BOOT_ROM_LENGTH)) ||
@@ -601,12 +601,55 @@ bool get_instruction(unsigned short *val, unsigned short *address)
601 return false; 601 return false;
602} 602}
603 603
604/*
605 * decode the instruction if we are printing out the trace, as it
606 * makes things easier to follow, without running it through objdump
607 * These are the normal instructions which cause change of flow, which
608 * would be at the source of the trace buffer
609 */
610void decode_instruction(unsigned short *address)
611{
612 unsigned short opcode;
613
614 if (get_instruction(&opcode, address)) {
615 if (opcode == 0x0010)
616 printk("RTS");
617 else if (opcode == 0x0011)
618 printk("RTI");
619 else if (opcode == 0x0012)
620 printk("RTX");
621 else if (opcode >= 0x0050 && opcode <= 0x0057)
622 printk("JUMP (P%i)", opcode & 7);
623 else if (opcode >= 0x0060 && opcode <= 0x0067)
624 printk("CALL (P%i)", opcode & 7);
625 else if (opcode >= 0x0070 && opcode <= 0x0077)
626 printk("CALL (PC+P%i)", opcode & 7);
627 else if (opcode >= 0x0080 && opcode <= 0x0087)
628 printk("JUMP (PC+P%i)", opcode & 7);
629 else if ((opcode >= 0x1000 && opcode <= 0x13FF) || (opcode >= 0x1800 && opcode <= 0x1BFF))
630 printk("IF !CC JUMP");
631 else if ((opcode >= 0x1400 && opcode <= 0x17ff) || (opcode >= 0x1c00 && opcode <= 0x1fff))
632 printk("IF CC JUMP");
633 else if (opcode >= 0x2000 && opcode <= 0x2fff)
634 printk("JUMP.S");
635 else if (opcode >= 0xe080 && opcode <= 0xe0ff)
636 printk("LSETUP");
637 else if (opcode >= 0xe200 && opcode <= 0xe2ff)
638 printk("JUMP.L");
639 else if (opcode >= 0xe300 && opcode <= 0xe3ff)
640 printk("CALL pcrel");
641 else
642 printk("0x%04x", opcode);
643 }
644
645}
646
604void dump_bfin_trace_buffer(void) 647void dump_bfin_trace_buffer(void)
605{ 648{
606#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON 649#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
607 int tflags, i = 0; 650 int tflags, i = 0;
608 char buf[150]; 651 char buf[150];
609 unsigned short val = 0, *addr; 652 unsigned short *addr;
610#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND 653#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
611 int j, index; 654 int j, index;
612#endif 655#endif
@@ -615,6 +658,10 @@ void dump_bfin_trace_buffer(void)
615 658
616 printk(KERN_NOTICE "Hardware Trace:\n"); 659 printk(KERN_NOTICE "Hardware Trace:\n");
617 660
661#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
662 printk(KERN_NOTICE "WARNING: Expanded trace turned on - can not trace exceptions\n");
663#endif
664
618 if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) { 665 if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) {
619 for (; bfin_read_TBUFSTAT() & TBUFCNT; i++) { 666 for (; bfin_read_TBUFSTAT() & TBUFCNT; i++) {
620 decode_address(buf, (unsigned long)bfin_read_TBUF()); 667 decode_address(buf, (unsigned long)bfin_read_TBUF());
@@ -622,45 +669,14 @@ void dump_bfin_trace_buffer(void)
622 addr = (unsigned short *)bfin_read_TBUF(); 669 addr = (unsigned short *)bfin_read_TBUF();
623 decode_address(buf, (unsigned long)addr); 670 decode_address(buf, (unsigned long)addr);
624 printk(KERN_NOTICE " Source : %s ", buf); 671 printk(KERN_NOTICE " Source : %s ", buf);
625 if (get_instruction(&val, addr)) { 672 decode_instruction(addr);
626 if (val == 0x0010)
627 printk("RTS");
628 else if (val == 0x0011)
629 printk("RTI");
630 else if (val == 0x0012)
631 printk("RTX");
632 else if (val >= 0x0050 && val <= 0x0057)
633 printk("JUMP (P%i)", val & 7);
634 else if (val >= 0x0060 && val <= 0x0067)
635 printk("CALL (P%i)", val & 7);
636 else if (val >= 0x0070 && val <= 0x0077)
637 printk("CALL (PC+P%i)", val & 7);
638 else if (val >= 0x0080 && val <= 0x0087)
639 printk("JUMP (PC+P%i)", val & 7);
640 else if ((val >= 0x1000 && val <= 0x13FF) ||
641 (val >= 0x1800 && val <= 0x1BFF))
642 printk("IF !CC JUMP");
643 else if ((val >= 0x1400 && val <= 0x17ff) ||
644 (val >= 0x1c00 && val <= 0x1fff))
645 printk("IF CC JUMP");
646 else if (val >= 0x2000 && val <= 0x2fff)
647 printk("JUMP.S");
648 else if (val >= 0xe080 && val <= 0xe0ff)
649 printk("LSETUP");
650 else if (val >= 0xe200 && val <= 0xe2ff)
651 printk("JUMP.L");
652 else if (val >= 0xe300 && val <= 0xe3ff)
653 printk("CALL pcrel");
654 else
655 printk("0x%04x", val);
656 }
657 printk("\n"); 673 printk("\n");
658 } 674 }
659 } 675 }
660 676
661#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND 677#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
662 if (trace_buff_offset) 678 if (trace_buff_offset)
663 index = trace_buff_offset/4 - 1; 679 index = trace_buff_offset / 4;
664 else 680 else
665 index = EXPAND_LEN; 681 index = EXPAND_LEN;
666 682
@@ -672,7 +688,9 @@ void dump_bfin_trace_buffer(void)
672 if (index < 0 ) 688 if (index < 0 )
673 index = EXPAND_LEN; 689 index = EXPAND_LEN;
674 decode_address(buf, software_trace_buff[index]); 690 decode_address(buf, software_trace_buff[index]);
675 printk(KERN_NOTICE " Source : %s\n", buf); 691 printk(KERN_NOTICE " Source : %s ", buf);
692 decode_instruction((unsigned short *)software_trace_buff[index]);
693 printk("\n");
676 index -= 1; 694 index -= 1;
677 if (index < 0) 695 if (index < 0)
678 index = EXPAND_LEN; 696 index = EXPAND_LEN;
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index 0896e38d6108..7d12c6692a65 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -83,6 +83,7 @@ SECTIONS
83#if !L1_DATA_B_LENGTH 83#if !L1_DATA_B_LENGTH
84 *(.l1.bss.B) 84 *(.l1.bss.B)
85#endif 85#endif
86 . = ALIGN(4);
86 ___bss_stop = .; 87 ___bss_stop = .;
87 } 88 }
88 89
@@ -101,7 +102,7 @@ SECTIONS
101#if !L1_DATA_B_LENGTH 102#if !L1_DATA_B_LENGTH
102 *(.l1.data.B) 103 *(.l1.data.B)
103#endif 104#endif
104#ifndef L2_LENGTH 105#if !L2_LENGTH
105 . = ALIGN(32); 106 . = ALIGN(32);
106 *(.data_l2.cacheline_aligned) 107 *(.data_l2.cacheline_aligned)
107 *(.l2.data) 108 *(.l2.data)
@@ -211,20 +212,19 @@ SECTIONS
211 __ebss_b_l1 = .; 212 __ebss_b_l1 = .;
212 } 213 }
213 214
214#ifdef L2_LENGTH
215 __l2_lma_start = .; 215 __l2_lma_start = .;
216 216
217 .text_data_l2 L2_START : AT(LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1)) 217 .text_data_l2 L2_START : AT(LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1))
218 { 218 {
219 . = ALIGN(4); 219 . = ALIGN(4);
220 __stext_l2 = .; 220 __stext_l2 = .;
221 *(.l1.text) 221 *(.l2.text)
222 . = ALIGN(4); 222 . = ALIGN(4);
223 __etext_l2 = .; 223 __etext_l2 = .;
224 224
225 . = ALIGN(4); 225 . = ALIGN(4);
226 __sdata_l2 = .; 226 __sdata_l2 = .;
227 *(.l1.data) 227 *(.l2.data)
228 __edata_l2 = .; 228 __edata_l2 = .;
229 229
230 . = ALIGN(32); 230 . = ALIGN(32);
@@ -232,11 +232,10 @@ SECTIONS
232 232
233 . = ALIGN(4); 233 . = ALIGN(4);
234 __sbss_l2 = .; 234 __sbss_l2 = .;
235 *(.l1.bss) 235 *(.l2.bss)
236 . = ALIGN(4); 236 . = ALIGN(4);
237 __ebss_l2 = .; 237 __ebss_l2 = .;
238 } 238 }
239#endif
240 239
241 /* Force trailing alignment of our init section so that when we 240 /* Force trailing alignment of our init section so that when we
242 * free our init memory, we don't leave behind a partial page. 241 * free our init memory, we don't leave behind a partial page.
diff --git a/arch/blackfin/lib/ins.S b/arch/blackfin/lib/ins.S
index eba2343b1b59..d60554dce87b 100644
--- a/arch/blackfin/lib/ins.S
+++ b/arch/blackfin/lib/ins.S
@@ -33,7 +33,28 @@
33 33
34.align 2 34.align 2
35 35
36/*
37 * Reads on the Blackfin are speculative. In Blackfin terms, this means they
38 * can be interrupted at any time (even after they have been issued on to the
39 * external bus), and re-issued after the interrupt occurs.
40 *
41 * If a FIFO is sitting on the end of the read, it will see two reads,
42 * when the core only sees one. The FIFO receives the read which is cancelled,
43 * and not delivered to the core.
44 *
45 * To solve this, interrupts are turned off before reads occur to I/O space.
46 * There are 3 versions of all these functions
47 * - turns interrupts off every read (higher overhead, but lower latency)
48 * - turns interrupts off every loop (low overhead, but longer latency)
49 * - DMA version, which do not suffer from this issue. DMA versions have
50 * different name (prefixed by dma_ ), and are located in
51 * ../kernel/bfin_dma_5xx.c
52 * Using the dma related functions are recommended for transfering large
53 * buffers in/out of FIFOs.
54 */
55
36ENTRY(_insl) 56ENTRY(_insl)
57#ifdef CONFIG_BFIN_INS_LOWOVERHEAD
37 P0 = R0; /* P0 = port */ 58 P0 = R0; /* P0 = port */
38 cli R3; 59 cli R3;
39 P1 = R1; /* P1 = address */ 60 P1 = R1; /* P1 = address */
@@ -46,9 +67,26 @@ ENTRY(_insl)
46.Llong_loop_e: NOP; 67.Llong_loop_e: NOP;
47 sti R3; 68 sti R3;
48 RTS; 69 RTS;
70#else
71 P0 = R0; /* P0 = port */
72 P1 = R1; /* P1 = address */
73 P2 = R2; /* P2 = count */
74 SSYNC;
75 LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2;
76.Llong_loop_s:
77 CLI R3;
78 NOP; NOP; NOP;
79 R0 = [P0];
80 [P1++] = R0;
81.Llong_loop_e:
82 STI R3;
83
84 RTS;
85#endif
49ENDPROC(_insl) 86ENDPROC(_insl)
50 87
51ENTRY(_insw) 88ENTRY(_insw)
89#ifdef CONFIG_BFIN_INS_LOWOVERHEAD
52 P0 = R0; /* P0 = port */ 90 P0 = R0; /* P0 = port */
53 cli R3; 91 cli R3;
54 P1 = R1; /* P1 = address */ 92 P1 = R1; /* P1 = address */
@@ -61,9 +99,26 @@ ENTRY(_insw)
61.Lword_loop_e: NOP; 99.Lword_loop_e: NOP;
62 sti R3; 100 sti R3;
63 RTS; 101 RTS;
102#else
103 P0 = R0; /* P0 = port */
104 P1 = R1; /* P1 = address */
105 P2 = R2; /* P2 = count */
106 SSYNC;
107 LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2;
108.Lword_loop_s:
109 CLI R3;
110 NOP; NOP; NOP;
111 R0 = W[P0];
112 W[P1++] = R0;
113.Lword_loop_e:
114 STI R3;
115 RTS;
116
117#endif
64ENDPROC(_insw) 118ENDPROC(_insw)
65 119
66ENTRY(_insw_8) 120ENTRY(_insw_8)
121#ifdef CONFIG_BFIN_INS_LOWOVERHEAD
67 P0 = R0; /* P0 = port */ 122 P0 = R0; /* P0 = port */
68 cli R3; 123 cli R3;
69 P1 = R1; /* P1 = address */ 124 P1 = R1; /* P1 = address */
@@ -78,9 +133,29 @@ ENTRY(_insw_8)
78.Lword8_loop_e: NOP; 133.Lword8_loop_e: NOP;
79 sti R3; 134 sti R3;
80 RTS; 135 RTS;
136#else
137 P0 = R0; /* P0 = port */
138 P1 = R1; /* P1 = address */
139 P2 = R2; /* P2 = count */
140 SSYNC;
141 LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2;
142.Lword8_loop_s:
143 CLI R3;
144 NOP; NOP; NOP;
145 R0 = W[P0];
146 B[P1++] = R0;
147 R0 = R0 >> 8;
148 B[P1++] = R0;
149 NOP;
150.Lword8_loop_e:
151 STI R3;
152
153 RTS;
154#endif
81ENDPROC(_insw_8) 155ENDPROC(_insw_8)
82 156
83ENTRY(_insb) 157ENTRY(_insb)
158#ifdef CONFIG_BFIN_INS_LOWOVERHEAD
84 P0 = R0; /* P0 = port */ 159 P0 = R0; /* P0 = port */
85 cli R3; 160 cli R3;
86 P1 = R1; /* P1 = address */ 161 P1 = R1; /* P1 = address */
@@ -93,9 +168,26 @@ ENTRY(_insb)
93.Lbyte_loop_e: NOP; 168.Lbyte_loop_e: NOP;
94 sti R3; 169 sti R3;
95 RTS; 170 RTS;
171#else
172 P0 = R0; /* P0 = port */
173 P1 = R1; /* P1 = address */
174 P2 = R2; /* P2 = count */
175 SSYNC;
176 LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2;
177.Lbyte_loop_s:
178 CLI R3;
179 NOP; NOP; NOP;
180 R0 = B[P0];
181 B[P1++] = R0;
182.Lbyte_loop_e:
183 STI R3;
184
185 RTS;
186#endif
96ENDPROC(_insb) 187ENDPROC(_insb)
97 188
98ENTRY(_insl_16) 189ENTRY(_insl_16)
190#ifdef CONFIG_BFIN_INS_LOWOVERHEAD
99 P0 = R0; /* P0 = port */ 191 P0 = R0; /* P0 = port */
100 cli R3; 192 cli R3;
101 P1 = R1; /* P1 = address */ 193 P1 = R1; /* P1 = address */
@@ -110,4 +202,21 @@ ENTRY(_insl_16)
110.Llong16_loop_e: NOP; 202.Llong16_loop_e: NOP;
111 sti R3; 203 sti R3;
112 RTS; 204 RTS;
205#else
206 P0 = R0; /* P0 = port */
207 P1 = R1; /* P1 = address */
208 P2 = R2; /* P2 = count */
209 SSYNC;
210 LSETUP( .Llong16_loop_s, .Llong16_loop_e) LC0 = P2;
211.Llong16_loop_s:
212 CLI R3;
213 NOP; NOP; NOP;
214 R0 = [P0];
215 W[P1++] = R0;
216 R0 = R0 >> 16;
217 W[P1++] = R0;
218.Llong16_loop_e:
219 STI R3;
220 RTS;
221#endif
113ENDPROC(_insl_16) 222ENDPROC(_insl_16)
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index 0b26ae2de5ee..d22bc7773717 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -39,7 +39,6 @@
39#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 39#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
40#include <linux/usb/isp1362.h> 40#include <linux/usb/isp1362.h>
41#endif 41#endif
42#include <linux/pata_platform.h>
43#include <linux/i2c.h> 42#include <linux/i2c.h>
44#include <linux/irq.h> 43#include <linux/irq.h>
45#include <linux/interrupt.h> 44#include <linux/interrupt.h>
@@ -160,15 +159,15 @@ static struct platform_device musb_device = {
160#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 159#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
161static struct mtd_partition ezkit_partitions[] = { 160static struct mtd_partition ezkit_partitions[] = {
162 { 161 {
163 .name = "Bootloader", 162 .name = "bootloader(nor)",
164 .size = 0x40000, 163 .size = 0x40000,
165 .offset = 0, 164 .offset = 0,
166 }, { 165 }, {
167 .name = "Kernel", 166 .name = "linux kernel(nor)",
168 .size = 0x1C0000, 167 .size = 0x1C0000,
169 .offset = MTDPART_OFS_APPEND, 168 .offset = MTDPART_OFS_APPEND,
170 }, { 169 }, {
171 .name = "RootFS", 170 .name = "file system(nor)",
172 .size = MTDPART_SIZ_FULL, 171 .size = MTDPART_SIZ_FULL,
173 .offset = MTDPART_OFS_APPEND, 172 .offset = MTDPART_OFS_APPEND,
174 } 173 }
@@ -200,12 +199,12 @@ static struct platform_device ezkit_flash_device = {
200#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 199#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
201static struct mtd_partition partition_info[] = { 200static struct mtd_partition partition_info[] = {
202 { 201 {
203 .name = "Linux Kernel", 202 .name = "linux kernel(nand)",
204 .offset = 0, 203 .offset = 0,
205 .size = 4 * SIZE_1M, 204 .size = 4 * SIZE_1M,
206 }, 205 },
207 { 206 {
208 .name = "File System", 207 .name = "file system(nand)",
209 .offset = MTDPART_OFS_APPEND, 208 .offset = MTDPART_OFS_APPEND,
210 .size = MTDPART_SIZ_FULL, 209 .size = MTDPART_SIZ_FULL,
211 }, 210 },
@@ -438,12 +437,12 @@ static struct platform_device net2272_bfin_device = {
438 || defined(CONFIG_MTD_M25P80_MODULE) 437 || defined(CONFIG_MTD_M25P80_MODULE)
439static struct mtd_partition bfin_spi_flash_partitions[] = { 438static struct mtd_partition bfin_spi_flash_partitions[] = {
440 { 439 {
441 .name = "bootloader", 440 .name = "bootloader(spi)",
442 .size = 0x00040000, 441 .size = 0x00040000,
443 .offset = 0, 442 .offset = 0,
444 .mask_flags = MTD_CAP_ROM 443 .mask_flags = MTD_CAP_ROM
445 }, { 444 }, {
446 .name = "linux kernel", 445 .name = "linux kernel(spi)",
447 .size = MTDPART_SIZ_FULL, 446 .size = MTDPART_SIZ_FULL,
448 .offset = MTDPART_OFS_APPEND, 447 .offset = MTDPART_OFS_APPEND,
449 } 448 }
@@ -799,43 +798,6 @@ static struct platform_device bfin_sport1_uart_device = {
799}; 798};
800#endif 799#endif
801 800
802#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
803#define PATA_INT 55
804
805static struct pata_platform_info bfin_pata_platform_data = {
806 .ioport_shift = 1,
807 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
808};
809
810static struct resource bfin_pata_resources[] = {
811 {
812 .start = 0x20314020,
813 .end = 0x2031403F,
814 .flags = IORESOURCE_MEM,
815 },
816 {
817 .start = 0x2031401C,
818 .end = 0x2031401F,
819 .flags = IORESOURCE_MEM,
820 },
821 {
822 .start = PATA_INT,
823 .end = PATA_INT,
824 .flags = IORESOURCE_IRQ,
825 },
826};
827
828static struct platform_device bfin_pata_device = {
829 .name = "pata_platform",
830 .id = -1,
831 .num_resources = ARRAY_SIZE(bfin_pata_resources),
832 .resource = bfin_pata_resources,
833 .dev = {
834 .platform_data = &bfin_pata_platform_data,
835 }
836};
837#endif
838
839#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 801#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
840#include <linux/input.h> 802#include <linux/input.h>
841#include <linux/gpio_keys.h> 803#include <linux/gpio_keys.h>
@@ -961,10 +923,6 @@ static struct platform_device *stamp_devices[] __initdata = {
961 &bfin_sport1_uart_device, 923 &bfin_sport1_uart_device,
962#endif 924#endif
963 925
964#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
965 &bfin_pata_device,
966#endif
967
968#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 926#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
969 &bfin_device_gpiokeys, 927 &bfin_device_gpiokeys,
970#endif 928#endif
@@ -987,10 +945,6 @@ static int __init stamp_init(void)
987 945
988 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); 946 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
989 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 947 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
990
991#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
992 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
993#endif
994 return 0; 948 return 0;
995} 949}
996 950
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 689b69c98ee4..762f754c06cc 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -38,7 +38,6 @@
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
39#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
40#endif 40#endif
41#include <linux/ata_platform.h>
42#include <linux/i2c.h> 41#include <linux/i2c.h>
43#include <linux/irq.h> 42#include <linux/irq.h>
44#include <linux/interrupt.h> 43#include <linux/interrupt.h>
@@ -177,15 +176,15 @@ static struct platform_device bf52x_t350mcqb_device = {
177#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 176#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
178static struct mtd_partition ezkit_partitions[] = { 177static struct mtd_partition ezkit_partitions[] = {
179 { 178 {
180 .name = "Bootloader", 179 .name = "bootloader(nor)",
181 .size = 0x40000, 180 .size = 0x40000,
182 .offset = 0, 181 .offset = 0,
183 }, { 182 }, {
184 .name = "Kernel", 183 .name = "linux kernel(nor)",
185 .size = 0x1C0000, 184 .size = 0x1C0000,
186 .offset = MTDPART_OFS_APPEND, 185 .offset = MTDPART_OFS_APPEND,
187 }, { 186 }, {
188 .name = "RootFS", 187 .name = "file system(nor)",
189 .size = MTDPART_SIZ_FULL, 188 .size = MTDPART_SIZ_FULL,
190 .offset = MTDPART_OFS_APPEND, 189 .offset = MTDPART_OFS_APPEND,
191 } 190 }
@@ -217,12 +216,12 @@ static struct platform_device ezkit_flash_device = {
217#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 216#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
218static struct mtd_partition partition_info[] = { 217static struct mtd_partition partition_info[] = {
219 { 218 {
220 .name = "Linux Kernel", 219 .name = "linux kernel(nand)",
221 .offset = 0, 220 .offset = 0,
222 .size = 4 * SIZE_1M, 221 .size = 4 * SIZE_1M,
223 }, 222 },
224 { 223 {
225 .name = "File System", 224 .name = "file system(nand)",
226 .offset = MTDPART_OFS_APPEND, 225 .offset = MTDPART_OFS_APPEND,
227 .size = MTDPART_SIZ_FULL, 226 .size = MTDPART_SIZ_FULL,
228 }, 227 },
@@ -460,12 +459,12 @@ static struct platform_device net2272_bfin_device = {
460 || defined(CONFIG_MTD_M25P80_MODULE) 459 || defined(CONFIG_MTD_M25P80_MODULE)
461static struct mtd_partition bfin_spi_flash_partitions[] = { 460static struct mtd_partition bfin_spi_flash_partitions[] = {
462 { 461 {
463 .name = "bootloader", 462 .name = "bootloader(spi)",
464 .size = 0x00040000, 463 .size = 0x00040000,
465 .offset = 0, 464 .offset = 0,
466 .mask_flags = MTD_CAP_ROM 465 .mask_flags = MTD_CAP_ROM
467 }, { 466 }, {
468 .name = "linux kernel", 467 .name = "linux kernel(spi)",
469 .size = MTDPART_SIZ_FULL, 468 .size = MTDPART_SIZ_FULL,
470 .offset = MTDPART_OFS_APPEND, 469 .offset = MTDPART_OFS_APPEND,
471 } 470 }
@@ -825,43 +824,6 @@ static struct platform_device bfin_sport1_uart_device = {
825}; 824};
826#endif 825#endif
827 826
828#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
829#define PATA_INT 55
830
831static struct pata_platform_info bfin_pata_platform_data = {
832 .ioport_shift = 1,
833 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
834};
835
836static struct resource bfin_pata_resources[] = {
837 {
838 .start = 0x20314020,
839 .end = 0x2031403F,
840 .flags = IORESOURCE_MEM,
841 },
842 {
843 .start = 0x2031401C,
844 .end = 0x2031401F,
845 .flags = IORESOURCE_MEM,
846 },
847 {
848 .start = PATA_INT,
849 .end = PATA_INT,
850 .flags = IORESOURCE_IRQ,
851 },
852};
853
854static struct platform_device bfin_pata_device = {
855 .name = "pata_platform",
856 .id = -1,
857 .num_resources = ARRAY_SIZE(bfin_pata_resources),
858 .resource = bfin_pata_resources,
859 .dev = {
860 .platform_data = &bfin_pata_platform_data,
861 }
862};
863#endif
864
865#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 827#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
866#include <linux/input.h> 828#include <linux/input.h>
867#include <linux/gpio_keys.h> 829#include <linux/gpio_keys.h>
@@ -996,10 +958,6 @@ static struct platform_device *stamp_devices[] __initdata = {
996 &bfin_sport1_uart_device, 958 &bfin_sport1_uart_device,
997#endif 959#endif
998 960
999#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1000 &bfin_pata_device,
1001#endif
1002
1003#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 961#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1004 &bfin_device_gpiokeys, 962 &bfin_device_gpiokeys,
1005#endif 963#endif
@@ -1022,10 +980,6 @@ static int __init stamp_init(void)
1022 980
1023 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); 981 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
1024 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 982 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1025
1026#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1027 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
1028#endif
1029 return 0; 983 return 0;
1030} 984}
1031 985
diff --git a/arch/blackfin/mach-bf527/head.S b/arch/blackfin/mach-bf527/head.S
index fe05cc1ef174..c3334cc5bcb7 100644
--- a/arch/blackfin/mach-bf527/head.S
+++ b/arch/blackfin/mach-bf527/head.S
@@ -30,293 +30,11 @@
30#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33#include <asm/trace.h>
34
35#ifdef CONFIG_BFIN_KERNEL_CLOCK 33#ifdef CONFIG_BFIN_KERNEL_CLOCK
36#include <asm/mach-common/clocks.h> 34#include <asm/mach-common/clocks.h>
37#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
38#endif 36#endif
39 37
40.extern ___bss_stop
41.extern ___bss_start
42.extern _bf53x_relocate_l1_mem
43
44#define INITIAL_STACK 0xFFB01000
45
46__INIT
47
48ENTRY(__start)
49 /* R0: argument of command line string, passed from uboot, save it */
50 R7 = R0;
51 /* Enable Cycle Counter and Nesting Of Interrupts */
52#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
53 R0 = SYSCFG_SNEN;
54#else
55 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
56#endif
57 SYSCFG = R0;
58 R0 = 0;
59
60 /* Clear Out All the data and pointer Registers */
61 R1 = R0;
62 R2 = R0;
63 R3 = R0;
64 R4 = R0;
65 R5 = R0;
66 R6 = R0;
67
68 P0 = R0;
69 P1 = R0;
70 P2 = R0;
71 P3 = R0;
72 P4 = R0;
73 P5 = R0;
74
75 LC0 = r0;
76 LC1 = r0;
77 L0 = r0;
78 L1 = r0;
79 L2 = r0;
80 L3 = r0;
81
82 /* Clear Out All the DAG Registers */
83 B0 = r0;
84 B1 = r0;
85 B2 = r0;
86 B3 = r0;
87
88 I0 = r0;
89 I1 = r0;
90 I2 = r0;
91 I3 = r0;
92
93 M0 = r0;
94 M1 = r0;
95 M2 = r0;
96 M3 = r0;
97
98 trace_buffer_init(p0,r0);
99 P0 = R1;
100 R0 = R1;
101
102 /* Turn off the icache */
103 p0.l = LO(IMEM_CONTROL);
104 p0.h = HI(IMEM_CONTROL);
105 R1 = [p0];
106 R0 = ~ENICPLB;
107 R0 = R0 & R1;
108
109 /* Anomaly 05000125 */
110#if ANOMALY_05000125
111 CLI R2;
112 SSYNC;
113#endif
114 [p0] = R0;
115 SSYNC;
116#if ANOMALY_05000125
117 STI R2;
118#endif
119
120 /* Turn off the dcache */
121 p0.l = LO(DMEM_CONTROL);
122 p0.h = HI(DMEM_CONTROL);
123 R1 = [p0];
124 R0 = ~ENDCPLB;
125 R0 = R0 & R1;
126
127 /* Anomaly 05000125 */
128#if ANOMALY_05000125
129 CLI R2;
130 SSYNC;
131#endif
132 [p0] = R0;
133 SSYNC;
134#if ANOMALY_05000125
135 STI R2;
136#endif
137
138
139#if defined(CONFIG_BF527)
140 p0.h = hi(EMAC_SYSTAT);
141 p0.l = lo(EMAC_SYSTAT);
142 R0.h = 0xFFFF; /* Clear EMAC Interrupt Status bits */
143 R0.l = 0xFFFF;
144 [P0] = R0;
145 SSYNC;
146#endif
147
148 /* Initialise UART - when booting from u-boot, the UART is not disabled
149 * so if we dont initalize here, our serial console gets hosed */
150 p0.h = hi(UART1_LCR);
151 p0.l = lo(UART1_LCR);
152 r0 = 0x0(Z);
153 w[p0] = r0.L; /* To enable DLL writes */
154 ssync;
155
156 p0.h = hi(UART1_DLL);
157 p0.l = lo(UART1_DLL);
158 r0 = 0x0(Z);
159 w[p0] = r0.L;
160 ssync;
161
162 p0.h = hi(UART1_DLH);
163 p0.l = lo(UART1_DLH);
164 r0 = 0x00(Z);
165 w[p0] = r0.L;
166 ssync;
167
168 p0.h = hi(UART1_GCTL);
169 p0.l = lo(UART1_GCTL);
170 r0 = 0x0(Z);
171 w[p0] = r0.L; /* To enable UART clock */
172 ssync;
173
174 /* Initialize stack pointer */
175 sp.l = lo(INITIAL_STACK);
176 sp.h = hi(INITIAL_STACK);
177 fp = sp;
178 usp = sp;
179
180#ifdef CONFIG_EARLY_PRINTK
181 SP += -12;
182 call _init_early_exception_vectors;
183 SP += 12;
184#endif
185
186 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
187 call _bf53x_relocate_l1_mem;
188#ifdef CONFIG_BFIN_KERNEL_CLOCK
189 call _start_dma_code;
190#endif
191
192 /* Code for initializing Async memory banks */
193
194 p2.h = hi(EBIU_AMBCTL1);
195 p2.l = lo(EBIU_AMBCTL1);
196 r0.h = hi(AMBCTL1VAL);
197 r0.l = lo(AMBCTL1VAL);
198 [p2] = r0;
199 ssync;
200
201 p2.h = hi(EBIU_AMBCTL0);
202 p2.l = lo(EBIU_AMBCTL0);
203 r0.h = hi(AMBCTL0VAL);
204 r0.l = lo(AMBCTL0VAL);
205 [p2] = r0;
206 ssync;
207
208 p2.h = hi(EBIU_AMGCTL);
209 p2.l = lo(EBIU_AMGCTL);
210 r0 = AMGCTLVAL;
211 w[p2] = r0;
212 ssync;
213
214 /* This section keeps the processor in supervisor mode
215 * during kernel boot. Switches to user mode at end of boot.
216 * See page 3-9 of Hardware Reference manual for documentation.
217 */
218
219 /* EVT15 = _real_start */
220
221 p0.l = lo(EVT15);
222 p0.h = hi(EVT15);
223 p1.l = _real_start;
224 p1.h = _real_start;
225 [p0] = p1;
226 csync;
227
228 p0.l = lo(IMASK);
229 p0.h = hi(IMASK);
230 p1.l = IMASK_IVG15;
231 p1.h = 0x0;
232 [p0] = p1;
233 csync;
234
235 raise 15;
236 p0.l = .LWAIT_HERE;
237 p0.h = .LWAIT_HERE;
238 reti = p0;
239#if ANOMALY_05000281
240 nop; nop; nop;
241#endif
242 rti;
243
244.LWAIT_HERE:
245 jump .LWAIT_HERE;
246ENDPROC(__start)
247
248ENTRY(_real_start)
249 [ -- sp ] = reti;
250 p0.l = lo(WDOG_CTL);
251 p0.h = hi(WDOG_CTL);
252 r0 = 0xAD6(z);
253 w[p0] = r0; /* watchdog off for now */
254 ssync;
255
256 /* Code update for BSS size == 0
257 * Zero out the bss region.
258 */
259
260 p1.l = ___bss_start;
261 p1.h = ___bss_start;
262 p2.l = ___bss_stop;
263 p2.h = ___bss_stop;
264 r0 = 0;
265 p2 -= p1;
266 lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
267.L_clear_bss:
268 B[p1++] = r0;
269
270 /* In case there is a NULL pointer reference
271 * Zero out region before stext
272 */
273
274 p1.l = 0x0;
275 p1.h = 0x0;
276 r0.l = __stext;
277 r0.h = __stext;
278 r0 = r0 >> 1;
279 p2 = r0;
280 r0 = 0;
281 lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
282.L_clear_zero:
283 W[p1++] = r0;
284
285 /* pass the uboot arguments to the global value command line */
286 R0 = R7;
287 call _cmdline_init;
288
289 p1.l = __rambase;
290 p1.h = __rambase;
291 r0.l = __sdata;
292 r0.h = __sdata;
293 [p1] = r0;
294
295 p1.l = __ramstart;
296 p1.h = __ramstart;
297 p3.l = ___bss_stop;
298 p3.h = ___bss_stop;
299
300 r1 = p3;
301 [p1] = r1;
302
303 /*
304 * load the current thread pointer and stack
305 */
306 r1.l = _init_thread_union;
307 r1.h = _init_thread_union;
308
309 r2.l = 0x2000;
310 r2.h = 0x0000;
311 r1 = r1 + r2;
312 sp = r1;
313 usp = sp;
314 fp = sp;
315 jump.l _start_kernel;
316ENDPROC(_real_start)
317
318__FINIT
319
320.section .l1.text 38.section .l1.text
321#ifdef CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
322ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
@@ -420,13 +138,6 @@ ENTRY(_start_dma_code)
420 [P2] = R1; 138 [P2] = R1;
421 SSYNC; 139 SSYNC;
422 140
423 p0.h = hi(SIC_IWR0);
424 p0.l = lo(SIC_IWR0);
425 r0.l = lo(IWR_ENABLE_ALL);
426 r0.h = hi(IWR_ENABLE_ALL);
427 [p0] = r0;
428 SSYNC;
429
430 RTS; 141 RTS;
431ENDPROC(_start_dma_code) 142ENDPROC(_start_dma_code)
432#endif /* CONFIG_BFIN_KERNEL_CLOCK */ 143#endif /* CONFIG_BFIN_KERNEL_CLOCK */
diff --git a/arch/blackfin/mach-bf527/ints-priority.c b/arch/blackfin/mach-bf527/ints-priority.c
index 1fa389793968..8a2367403d2b 100644
--- a/arch/blackfin/mach-bf527/ints-priority.c
+++ b/arch/blackfin/mach-bf527/ints-priority.c
@@ -31,7 +31,7 @@
31#include <linux/irq.h> 31#include <linux/irq.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33 33
34void program_IAR(void) 34void __init program_IAR(void)
35{ 35{
36 /* Program the IAR0 Register with the configured priority */ 36 /* Program the IAR0 Register with the configured priority */
37 bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) | 37 bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) |
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c
index 4103a97c1a70..c66a68f30239 100644
--- a/arch/blackfin/mach-bf533/boards/H8606.c
+++ b/arch/blackfin/mach-bf533/boards/H8606.c
@@ -38,7 +38,6 @@
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
39#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
40#endif 40#endif
41#include <linux/ata_platform.h>
42#include <linux/irq.h> 41#include <linux/irq.h>
43 42
44#include <asm/dma.h> 43#include <asm/dma.h>
@@ -141,16 +140,16 @@ static struct platform_device net2272_bfin_device = {
141#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 140#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
142static struct mtd_partition bfin_spi_flash_partitions[] = { 141static struct mtd_partition bfin_spi_flash_partitions[] = {
143 { 142 {
144 .name = "bootloader", 143 .name = "bootloader(spi)",
145 .size = 0x00060000, 144 .size = 0x00060000,
146 .offset = 0, 145 .offset = 0,
147 .mask_flags = MTD_CAP_ROM 146 .mask_flags = MTD_CAP_ROM
148 }, { 147 }, {
149 .name = "kernel", 148 .name = "linux kernel(spi)",
150 .size = 0x100000, 149 .size = 0x100000,
151 .offset = 0x60000 150 .offset = 0x60000
152 }, { 151 }, {
153 .name = "file system", 152 .name = "file system(spi)",
154 .size = 0x6a0000, 153 .size = 0x6a0000,
155 .offset = 0x00160000, 154 .offset = 0x00160000,
156 } 155 }
diff --git a/arch/blackfin/mach-bf533/boards/Kconfig b/arch/blackfin/mach-bf533/boards/Kconfig
index 840059241fbe..308c98dc5aba 100644
--- a/arch/blackfin/mach-bf533/boards/Kconfig
+++ b/arch/blackfin/mach-bf533/boards/Kconfig
@@ -14,6 +14,12 @@ config BFIN533_STAMP
14 help 14 help
15 BF533-STAMP board support. 15 BF533-STAMP board support.
16 16
17config BLACKSTAMP
18 bool "BlackStamp"
19 help
20 Support for the BlackStamp board. Hardware info available at
21 http://blackfin.uclinux.org/gf/project/blackstamp/
22
17config BFIN533_BLUETECHNIX_CM 23config BFIN533_BLUETECHNIX_CM
18 bool "Bluetechnix CM-BF533" 24 bool "Bluetechnix CM-BF533"
19 depends on (BF533) 25 depends on (BF533)
diff --git a/arch/blackfin/mach-bf533/boards/Makefile b/arch/blackfin/mach-bf533/boards/Makefile
index b7a1a1d79bda..9afbe72b484f 100644
--- a/arch/blackfin/mach-bf533/boards/Makefile
+++ b/arch/blackfin/mach-bf533/boards/Makefile
@@ -7,4 +7,5 @@ obj-$(CONFIG_BFIN533_STAMP) += stamp.o
7obj-$(CONFIG_BFIN532_IP0X) += ip0x.o 7obj-$(CONFIG_BFIN532_IP0X) += ip0x.o
8obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o 8obj-$(CONFIG_BFIN533_EZKIT) += ezkit.o
9obj-$(CONFIG_BFIN533_BLUETECHNIX_CM) += cm_bf533.o 9obj-$(CONFIG_BFIN533_BLUETECHNIX_CM) += cm_bf533.o
10obj-$(CONFIG_BLACKSTAMP) += blackstamp.o
10obj-$(CONFIG_H8606_HVSISTEMAS) += H8606.o 11obj-$(CONFIG_H8606_HVSISTEMAS) += H8606.o
diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c
new file mode 100644
index 000000000000..d064ded87719
--- /dev/null
+++ b/arch/blackfin/mach-bf533/boards/blackstamp.c
@@ -0,0 +1,401 @@
1/*
2 * File: arch/blackfin/mach-bf533/blackstamp.c
3 * Based on: arch/blackfin/mach-bf533/stamp.c
4 * Author: Benjamin Matthews <bmat@lle.rochester.edu>
5 * Aidan Williams <aidan@nicta.com.au>
6 *
7 * Created: 2008
8 * Description: Board Info File for the BlackStamp
9 *
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Enter bugs at http://blackfin.uclinux.org/
14 *
15 * More info about the BlackStamp at:
16 * http://blackfin.uclinux.org/gf/project/blackstamp/
17 *
18 * Licensed under the GPL-2 or later.
19 */
20
21#include <linux/device.h>
22#include <linux/platform_device.h>
23#include <linux/mtd/mtd.h>
24#include <linux/mtd/partitions.h>
25#include <linux/mtd/physmap.h>
26#include <linux/spi/spi.h>
27#include <linux/spi/flash.h>
28#include <linux/irq.h>
29#include <linux/i2c.h>
30#include <asm/dma.h>
31#include <asm/bfin5xx_spi.h>
32#include <asm/portmux.h>
33#include <asm/dpmc.h>
34
35/*
36 * Name the Board for the /proc/cpuinfo
37 */
38const char bfin_board_name[] = "BlackStamp";
39
40#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
41static struct platform_device rtc_device = {
42 .name = "rtc-bfin",
43 .id = -1,
44};
45#endif
46
47/*
48 * Driver needs to know address, irq and flag pin.
49 */
50#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
51static struct resource smc91x_resources[] = {
52 {
53 .name = "smc91x-regs",
54 .start = 0x20300300,
55 .end = 0x20300300 + 16,
56 .flags = IORESOURCE_MEM,
57 }, {
58 .start = IRQ_PF3,
59 .end = IRQ_PF3,
60 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
61 },
62};
63
64static struct platform_device smc91x_device = {
65 .name = "smc91x",
66 .id = 0,
67 .num_resources = ARRAY_SIZE(smc91x_resources),
68 .resource = smc91x_resources,
69};
70#endif
71
72#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
73static struct mtd_partition bfin_spi_flash_partitions[] = {
74 {
75 .name = "bootloader(spi)",
76 .size = 0x00040000,
77 .offset = 0,
78 .mask_flags = MTD_CAP_ROM
79 }, {
80 .name = "linux kernel(spi)",
81 .size = 0x180000,
82 .offset = MTDPART_OFS_APPEND,
83 }, {
84 .name = "file system(spi)",
85 .size = MTDPART_SIZ_FULL,
86 .offset = MTDPART_OFS_APPEND,
87 }
88};
89
90static struct flash_platform_data bfin_spi_flash_data = {
91 .name = "m25p80",
92 .parts = bfin_spi_flash_partitions,
93 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
94 .type = "m25p64",
95};
96
97/* SPI flash chip (m25p64) */
98static struct bfin5xx_spi_chip spi_flash_chip_info = {
99 .enable_dma = 0, /* use dma transfer with this chip*/
100 .bits_per_word = 8,
101};
102#endif
103
104#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
105static struct bfin5xx_spi_chip spi_mmc_chip_info = {
106 .enable_dma = 1,
107 .bits_per_word = 8,
108};
109#endif
110
111#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
112static struct bfin5xx_spi_chip spidev_chip_info = {
113 .enable_dma = 0,
114 .bits_per_word = 8,
115};
116#endif
117
118static struct spi_board_info bfin_spi_board_info[] __initdata = {
119#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
120 {
121 /* the modalias must be the same as spi device driver name */
122 .modalias = "m25p80", /* Name of spi_driver for this device */
123 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
124 .bus_num = 0, /* Framework bus number */
125 .chip_select = 2, /* Framework chip select. */
126 .platform_data = &bfin_spi_flash_data,
127 .controller_data = &spi_flash_chip_info,
128 .mode = SPI_MODE_3,
129 },
130#endif
131
132#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
133 {
134 .modalias = "spi_mmc_dummy",
135 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
136 .bus_num = 0,
137 .chip_select = 0,
138 .platform_data = NULL,
139 .controller_data = &spi_mmc_chip_info,
140 .mode = SPI_MODE_3,
141 },
142 {
143 .modalias = "spi_mmc",
144 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
145 .bus_num = 0,
146 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
147 .platform_data = NULL,
148 .controller_data = &spi_mmc_chip_info,
149 .mode = SPI_MODE_3,
150 },
151#endif
152
153#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
154 {
155 .modalias = "spidev",
156 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
157 .bus_num = 0,
158 .chip_select = 7,
159 .controller_data = &spidev_chip_info,
160 },
161#endif
162};
163
164#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
165/* SPI (0) */
166static struct resource bfin_spi0_resource[] = {
167 [0] = {
168 .start = SPI0_REGBASE,
169 .end = SPI0_REGBASE + 0xFF,
170 .flags = IORESOURCE_MEM,
171 },
172 [1] = {
173 .start = CH_SPI,
174 .end = CH_SPI,
175 .flags = IORESOURCE_IRQ,
176 }
177};
178
179/* SPI controller data */
180static struct bfin5xx_spi_master bfin_spi0_info = {
181 .num_chipselect = 8,
182 .enable_dma = 1, /* master has the ability to do dma transfer */
183 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
184};
185
186static struct platform_device bfin_spi0_device = {
187 .name = "bfin-spi",
188 .id = 0, /* Bus number */
189 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
190 .resource = bfin_spi0_resource,
191 .dev = {
192 .platform_data = &bfin_spi0_info, /* Passed to driver */
193 },
194};
195#endif /* spi master and devices */
196
197#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
198static struct resource bfin_uart_resources[] = {
199 {
200 .start = 0xFFC00400,
201 .end = 0xFFC004FF,
202 .flags = IORESOURCE_MEM,
203 },
204};
205
206static struct platform_device bfin_uart_device = {
207 .name = "bfin-uart",
208 .id = 1,
209 .num_resources = ARRAY_SIZE(bfin_uart_resources),
210 .resource = bfin_uart_resources,
211};
212#endif
213
214#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
215static struct resource bfin_sir_resources[] = {
216#ifdef CONFIG_BFIN_SIR0
217 {
218 .start = 0xFFC00400,
219 .end = 0xFFC004FF,
220 .flags = IORESOURCE_MEM,
221 },
222#endif
223};
224
225static struct platform_device bfin_sir_device = {
226 .name = "bfin_sir",
227 .id = 0,
228 .num_resources = ARRAY_SIZE(bfin_sir_resources),
229 .resource = bfin_sir_resources,
230};
231#endif
232
233#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
234static struct platform_device bfin_sport0_uart_device = {
235 .name = "bfin-sport-uart",
236 .id = 0,
237};
238
239static struct platform_device bfin_sport1_uart_device = {
240 .name = "bfin-sport-uart",
241 .id = 1,
242};
243#endif
244
245#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
246#include <linux/input.h>
247#include <linux/gpio_keys.h>
248
249static struct gpio_keys_button bfin_gpio_keys_table[] = {
250 {BTN_0, GPIO_PF4, 0, "gpio-keys: BTN0"},
251 {BTN_1, GPIO_PF5, 0, "gpio-keys: BTN1"},
252 {BTN_2, GPIO_PF6, 0, "gpio-keys: BTN2"},
253}; /* Mapped to the first three PF Test Points */
254
255static struct gpio_keys_platform_data bfin_gpio_keys_data = {
256 .buttons = bfin_gpio_keys_table,
257 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
258};
259
260static struct platform_device bfin_device_gpiokeys = {
261 .name = "gpio-keys",
262 .dev = {
263 .platform_data = &bfin_gpio_keys_data,
264 },
265};
266#endif
267
268static struct resource bfin_gpios_resources = {
269 .start = 0,
270 .end = MAX_BLACKFIN_GPIOS - 1,
271 .flags = IORESOURCE_IRQ,
272};
273
274static struct platform_device bfin_gpios_device = {
275 .name = "simple-gpio",
276 .id = -1,
277 .num_resources = 1,
278 .resource = &bfin_gpios_resources,
279};
280
281#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
282#include <linux/i2c-gpio.h>
283
284static struct i2c_gpio_platform_data i2c_gpio_data = {
285 .sda_pin = 8,
286 .scl_pin = 9,
287 .sda_is_open_drain = 0,
288 .scl_is_open_drain = 0,
289 .udelay = 40,
290}; /* This hasn't actually been used these pins
291 * are (currently) free pins on the expansion connector */
292
293static struct platform_device i2c_gpio_device = {
294 .name = "i2c-gpio",
295 .id = 0,
296 .dev = {
297 .platform_data = &i2c_gpio_data,
298 },
299};
300#endif
301
302#ifdef CONFIG_I2C_BOARDINFO
303static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
304};
305#endif
306
307static const unsigned int cclk_vlev_datasheet[] =
308{
309 VRPAIR(VLEV_085, 250000000),
310 VRPAIR(VLEV_090, 376000000),
311 VRPAIR(VLEV_095, 426000000),
312 VRPAIR(VLEV_100, 426000000),
313 VRPAIR(VLEV_105, 476000000),
314 VRPAIR(VLEV_110, 476000000),
315 VRPAIR(VLEV_115, 476000000),
316 VRPAIR(VLEV_120, 600000000),
317 VRPAIR(VLEV_125, 600000000),
318 VRPAIR(VLEV_130, 600000000),
319};
320
321static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
322 .tuple_tab = cclk_vlev_datasheet,
323 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
324 .vr_settling_time = 25 /* us */,
325};
326
327static struct platform_device bfin_dpmc = {
328 .name = "bfin dpmc",
329 .dev = {
330 .platform_data = &bfin_dmpc_vreg_data,
331 },
332};
333
334static struct platform_device *stamp_devices[] __initdata = {
335
336 &bfin_dpmc,
337
338#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
339 &rtc_device,
340#endif
341
342#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
343 &smc91x_device,
344#endif
345
346
347#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
348 &bfin_spi0_device,
349#endif
350
351#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
352 &bfin_uart_device,
353#endif
354
355#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
356 &bfin_sir_device,
357#endif
358
359#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
360 &bfin_sport0_uart_device,
361 &bfin_sport1_uart_device,
362#endif
363
364#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
365 &bfin_device_gpiokeys,
366#endif
367
368#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
369 &i2c_gpio_device,
370#endif
371
372 &bfin_gpios_device,
373};
374
375static int __init blackstamp_init(void)
376{
377 int ret;
378
379 printk(KERN_INFO "%s(): registering device resources\n", __func__);
380
381#ifdef CONFIG_I2C_BOARDINFO
382 i2c_register_board_info(0, bfin_i2c_board_info,
383 ARRAY_SIZE(bfin_i2c_board_info));
384#endif
385
386 ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
387 if (ret < 0)
388 return ret;
389
390#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
391 /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */
392 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF0);
393 bfin_write_FIO_FLAG_S(PF0);
394 SSYNC();
395#endif
396
397 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
398 return 0;
399}
400
401arch_initcall(blackstamp_init);
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index ed2b0b8f5dc9..575843f6d9ef 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -36,7 +36,6 @@
36#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 36#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
37#include <linux/usb/isp1362.h> 37#include <linux/usb/isp1362.h>
38#endif 38#endif
39#include <linux/ata_platform.h>
40#include <linux/irq.h> 39#include <linux/irq.h>
41#include <asm/dma.h> 40#include <asm/dma.h>
42#include <asm/bfin5xx_spi.h> 41#include <asm/bfin5xx_spi.h>
@@ -53,16 +52,16 @@ const char bfin_board_name[] = "Bluetechnix CM BF533";
53#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 52#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
54static struct mtd_partition bfin_spi_flash_partitions[] = { 53static struct mtd_partition bfin_spi_flash_partitions[] = {
55 { 54 {
56 .name = "bootloader", 55 .name = "bootloader(spi)",
57 .size = 0x00020000, 56 .size = 0x00020000,
58 .offset = 0, 57 .offset = 0,
59 .mask_flags = MTD_CAP_ROM 58 .mask_flags = MTD_CAP_ROM
60 }, { 59 }, {
61 .name = "kernel", 60 .name = "linux kernel(spi)",
62 .size = 0xe0000, 61 .size = 0xe0000,
63 .offset = 0x20000 62 .offset = 0x20000
64 }, { 63 }, {
65 .name = "file system", 64 .name = "file system(spi)",
66 .size = 0x700000, 65 .size = 0x700000,
67 .offset = 0x00100000, 66 .offset = 0x00100000,
68 } 67 }
@@ -307,43 +306,6 @@ static struct platform_device isp1362_hcd_device = {
307}; 306};
308#endif 307#endif
309 308
310#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
311#define PATA_INT 38
312
313static struct pata_platform_info bfin_pata_platform_data = {
314 .ioport_shift = 2,
315 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
316};
317
318static struct resource bfin_pata_resources[] = {
319 {
320 .start = 0x2030C000,
321 .end = 0x2030C01F,
322 .flags = IORESOURCE_MEM,
323 },
324 {
325 .start = 0x2030D018,
326 .end = 0x2030D01B,
327 .flags = IORESOURCE_MEM,
328 },
329 {
330 .start = PATA_INT,
331 .end = PATA_INT,
332 .flags = IORESOURCE_IRQ,
333 },
334};
335
336static struct platform_device bfin_pata_device = {
337 .name = "pata_platform",
338 .id = -1,
339 .num_resources = ARRAY_SIZE(bfin_pata_resources),
340 .resource = bfin_pata_resources,
341 .dev = {
342 .platform_data = &bfin_pata_platform_data,
343 }
344};
345#endif
346
347static const unsigned int cclk_vlev_datasheet[] = 309static const unsigned int cclk_vlev_datasheet[] =
348{ 310{
349 VRPAIR(VLEV_085, 250000000), 311 VRPAIR(VLEV_085, 250000000),
@@ -403,10 +365,6 @@ static struct platform_device *cm_bf533_devices[] __initdata = {
403#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 365#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
404 &bfin_spi0_device, 366 &bfin_spi0_device,
405#endif 367#endif
406
407#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
408 &bfin_pata_device,
409#endif
410}; 368};
411 369
412static int __init cm_bf533_init(void) 370static int __init cm_bf533_init(void)
@@ -416,10 +374,6 @@ static int __init cm_bf533_init(void)
416#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 374#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
417 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 375 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
418#endif 376#endif
419
420#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
421 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
422#endif
423 return 0; 377 return 0;
424} 378}
425 379
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 079389cbd859..cc2e7eeb1d5a 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -37,7 +37,6 @@
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb/isp1362.h> 38#include <linux/usb/isp1362.h>
39#endif 39#endif
40#include <linux/ata_platform.h>
41#include <linux/irq.h> 40#include <linux/irq.h>
42#include <asm/dma.h> 41#include <asm/dma.h>
43#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
@@ -90,16 +89,16 @@ static struct platform_device smc91x_device = {
90#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 89#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
91static struct mtd_partition bfin_spi_flash_partitions[] = { 90static struct mtd_partition bfin_spi_flash_partitions[] = {
92 { 91 {
93 .name = "bootloader", 92 .name = "bootloader(spi)",
94 .size = 0x00020000, 93 .size = 0x00020000,
95 .offset = 0, 94 .offset = 0,
96 .mask_flags = MTD_CAP_ROM 95 .mask_flags = MTD_CAP_ROM
97 }, { 96 }, {
98 .name = "kernel", 97 .name = "linux kernel(spi)",
99 .size = 0xe0000, 98 .size = 0xe0000,
100 .offset = MTDPART_OFS_APPEND, 99 .offset = MTDPART_OFS_APPEND,
101 }, { 100 }, {
102 .name = "file system", 101 .name = "file system(spi)",
103 .size = MTDPART_SIZ_FULL, 102 .size = MTDPART_SIZ_FULL,
104 .offset = MTDPART_OFS_APPEND, 103 .offset = MTDPART_OFS_APPEND,
105 } 104 }
@@ -255,43 +254,6 @@ static struct platform_device bfin_sir_device = {
255}; 254};
256#endif 255#endif
257 256
258#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
259#define PATA_INT 55
260
261static struct pata_platform_info bfin_pata_platform_data = {
262 .ioport_shift = 1,
263 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
264};
265
266static struct resource bfin_pata_resources[] = {
267 {
268 .start = 0x20314020,
269 .end = 0x2031403F,
270 .flags = IORESOURCE_MEM,
271 },
272 {
273 .start = 0x2031401C,
274 .end = 0x2031401F,
275 .flags = IORESOURCE_MEM,
276 },
277 {
278 .start = PATA_INT,
279 .end = PATA_INT,
280 .flags = IORESOURCE_IRQ,
281 },
282};
283
284static struct platform_device bfin_pata_device = {
285 .name = "pata_platform",
286 .id = -1,
287 .num_resources = ARRAY_SIZE(bfin_pata_resources),
288 .resource = bfin_pata_resources,
289 .dev = {
290 .platform_data = &bfin_pata_platform_data,
291 }
292};
293#endif
294
295#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 257#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
296#include <linux/input.h> 258#include <linux/input.h>
297#include <linux/gpio_keys.h> 259#include <linux/gpio_keys.h>
@@ -404,10 +366,6 @@ static struct platform_device *ezkit_devices[] __initdata = {
404 &bfin_sir_device, 366 &bfin_sir_device,
405#endif 367#endif
406 368
407#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
408 &bfin_pata_device,
409#endif
410
411#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 369#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
412 &bfin_device_gpiokeys, 370 &bfin_device_gpiokeys,
413#endif 371#endif
@@ -424,10 +382,6 @@ static int __init ezkit_init(void)
424 printk(KERN_INFO "%s(): registering device resources\n", __func__); 382 printk(KERN_INFO "%s(): registering device resources\n", __func__);
425 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices)); 383 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
426 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 384 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
427
428#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
429 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
430#endif
431 return 0; 385 return 0;
432} 386}
433 387
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 13ae49515f73..050ffca53530 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -38,7 +38,6 @@
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
39#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
40#endif 40#endif
41#include <linux/ata_platform.h>
42#include <linux/irq.h> 41#include <linux/irq.h>
43#include <linux/i2c.h> 42#include <linux/i2c.h>
44#include <asm/dma.h> 43#include <asm/dma.h>
@@ -114,15 +113,15 @@ static struct platform_device net2272_bfin_device = {
114#if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE) 113#if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
115static struct mtd_partition stamp_partitions[] = { 114static struct mtd_partition stamp_partitions[] = {
116 { 115 {
117 .name = "Bootloader", 116 .name = "bootloader(nor)",
118 .size = 0x40000, 117 .size = 0x40000,
119 .offset = 0, 118 .offset = 0,
120 }, { 119 }, {
121 .name = "Kernel", 120 .name = "linux kernel(nor)",
122 .size = 0xE0000, 121 .size = 0xE0000,
123 .offset = MTDPART_OFS_APPEND, 122 .offset = MTDPART_OFS_APPEND,
124 }, { 123 }, {
125 .name = "RootFS", 124 .name = "file system(nor)",
126 .size = MTDPART_SIZ_FULL, 125 .size = MTDPART_SIZ_FULL,
127 .offset = MTDPART_OFS_APPEND, 126 .offset = MTDPART_OFS_APPEND,
128 } 127 }
@@ -164,16 +163,16 @@ static struct platform_device stamp_flash_device = {
164#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 163#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
165static struct mtd_partition bfin_spi_flash_partitions[] = { 164static struct mtd_partition bfin_spi_flash_partitions[] = {
166 { 165 {
167 .name = "bootloader", 166 .name = "bootloader(spi)",
168 .size = 0x00040000, 167 .size = 0x00040000,
169 .offset = 0, 168 .offset = 0,
170 .mask_flags = MTD_CAP_ROM 169 .mask_flags = MTD_CAP_ROM
171 }, { 170 }, {
172 .name = "kernel", 171 .name = "linux kernel(spi)",
173 .size = 0xe0000, 172 .size = 0xe0000,
174 .offset = MTDPART_OFS_APPEND, 173 .offset = MTDPART_OFS_APPEND,
175 }, { 174 }, {
176 .name = "file system", 175 .name = "file system(spi)",
177 .size = MTDPART_SIZ_FULL, 176 .size = MTDPART_SIZ_FULL,
178 .offset = MTDPART_OFS_APPEND, 177 .offset = MTDPART_OFS_APPEND,
179 } 178 }
@@ -404,43 +403,6 @@ static struct platform_device bfin_sport1_uart_device = {
404}; 403};
405#endif 404#endif
406 405
407#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
408#define PATA_INT 55
409
410static struct pata_platform_info bfin_pata_platform_data = {
411 .ioport_shift = 1,
412 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
413};
414
415static struct resource bfin_pata_resources[] = {
416 {
417 .start = 0x20314020,
418 .end = 0x2031403F,
419 .flags = IORESOURCE_MEM,
420 },
421 {
422 .start = 0x2031401C,
423 .end = 0x2031401F,
424 .flags = IORESOURCE_MEM,
425 },
426 {
427 .start = PATA_INT,
428 .end = PATA_INT,
429 .flags = IORESOURCE_IRQ,
430 },
431};
432
433static struct platform_device bfin_pata_device = {
434 .name = "pata_platform",
435 .id = -1,
436 .num_resources = ARRAY_SIZE(bfin_pata_resources),
437 .resource = bfin_pata_resources,
438 .dev = {
439 .platform_data = &bfin_pata_platform_data,
440 }
441};
442#endif
443
444#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 406#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
445#include <linux/input.h> 407#include <linux/input.h>
446#include <linux/gpio_keys.h> 408#include <linux/gpio_keys.h>
@@ -583,10 +545,6 @@ static struct platform_device *stamp_devices[] __initdata = {
583 &bfin_sport1_uart_device, 545 &bfin_sport1_uart_device,
584#endif 546#endif
585 547
586#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
587 &bfin_pata_device,
588#endif
589
590#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 548#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
591 &bfin_device_gpiokeys, 549 &bfin_device_gpiokeys,
592#endif 550#endif
@@ -625,10 +583,6 @@ static int __init stamp_init(void)
625#endif 583#endif
626 584
627 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 585 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
628
629#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
630 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
631#endif
632 return 0; 586 return 0;
633} 587}
634 588
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S
index c671e8549b17..d59db86195b6 100644
--- a/arch/blackfin/mach-bf533/head.S
+++ b/arch/blackfin/mach-bf533/head.S
@@ -30,294 +30,11 @@
30#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33#include <asm/trace.h>
34#ifdef CONFIG_BFIN_KERNEL_CLOCK 33#ifdef CONFIG_BFIN_KERNEL_CLOCK
35#include <asm/mach-common/clocks.h> 34#include <asm/mach-common/clocks.h>
36#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
37#endif 36#endif
38 37
39.extern ___bss_stop
40.extern ___bss_start
41.extern _bf53x_relocate_l1_mem
42
43#define INITIAL_STACK 0xFFB01000
44
45__INIT
46
47ENTRY(__start)
48 /* R0: argument of command line string, passed from uboot, save it */
49 R7 = R0;
50 /* Enable Cycle Counter and Nesting Of Interrupts */
51#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
52 R0 = SYSCFG_SNEN;
53#else
54 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
55#endif
56 SYSCFG = R0;
57 R0 = 0;
58
59 /* Clear Out All the data and pointer Registers */
60 R1 = R0;
61 R2 = R0;
62 R3 = R0;
63 R4 = R0;
64 R5 = R0;
65 R6 = R0;
66
67 P0 = R0;
68 P1 = R0;
69 P2 = R0;
70 P3 = R0;
71 P4 = R0;
72 P5 = R0;
73
74 LC0 = r0;
75 LC1 = r0;
76 L0 = r0;
77 L1 = r0;
78 L2 = r0;
79 L3 = r0;
80
81 /* Clear Out All the DAG Registers */
82 B0 = r0;
83 B1 = r0;
84 B2 = r0;
85 B3 = r0;
86
87 I0 = r0;
88 I1 = r0;
89 I2 = r0;
90 I3 = r0;
91
92 M0 = r0;
93 M1 = r0;
94 M2 = r0;
95 M3 = r0;
96
97 trace_buffer_init(p0,r0);
98 P0 = R1;
99 R0 = R1;
100
101 p0.h = hi(FIO_MASKA_C);
102 p0.l = lo(FIO_MASKA_C);
103 r0 = 0xFFFF(Z);
104 w[p0] = r0.L; /* Disable all interrupts */
105 ssync;
106
107 p0.h = hi(FIO_MASKB_C);
108 p0.l = lo(FIO_MASKB_C);
109 r0 = 0xFFFF(Z);
110 w[p0] = r0.L; /* Disable all interrupts */
111 ssync;
112
113 /* Turn off the icache */
114 p0.l = LO(IMEM_CONTROL);
115 p0.h = HI(IMEM_CONTROL);
116 R1 = [p0];
117 R0 = ~ENICPLB;
118 R0 = R0 & R1;
119
120 /* Anomaly 05000125 */
121#if ANOMALY_05000125
122 CLI R2;
123 SSYNC;
124#endif
125 [p0] = R0;
126 SSYNC;
127#if ANOMALY_05000125
128 STI R2;
129#endif
130
131 /* Turn off the dcache */
132 p0.l = LO(DMEM_CONTROL);
133 p0.h = HI(DMEM_CONTROL);
134 R1 = [p0];
135 R0 = ~ENDCPLB;
136 R0 = R0 & R1;
137
138 /* Anomaly 05000125 */
139#if ANOMALY_05000125
140 CLI R2;
141 SSYNC;
142#endif
143 [p0] = R0;
144 SSYNC;
145#if ANOMALY_05000125
146 STI R2;
147#endif
148
149 /* Initialise UART - when booting from u-boot, the UART is not disabled
150 * so if we dont initalize here, our serial console gets hosed */
151 p0.h = hi(BFIN_UART_LCR);
152 p0.l = lo(BFIN_UART_LCR);
153 r0 = 0x0(Z);
154 w[p0] = r0.L; /* To enable DLL writes */
155 ssync;
156
157 p0.h = hi(BFIN_UART_DLL);
158 p0.l = lo(BFIN_UART_DLL);
159 r0 = 0x0(Z);
160 w[p0] = r0.L;
161 ssync;
162
163 p0.h = hi(BFIN_UART_DLH);
164 p0.l = lo(BFIN_UART_DLH);
165 r0 = 0x00(Z);
166 w[p0] = r0.L;
167 ssync;
168
169 p0.h = hi(BFIN_UART_GCTL);
170 p0.l = lo(BFIN_UART_GCTL);
171 r0 = 0x0(Z);
172 w[p0] = r0.L; /* To enable UART clock */
173 ssync;
174
175 /* Initialize stack pointer */
176 sp.l = lo(INITIAL_STACK);
177 sp.h = hi(INITIAL_STACK);
178 fp = sp;
179 usp = sp;
180
181#ifdef CONFIG_EARLY_PRINTK
182 SP += -12;
183 call _init_early_exception_vectors;
184 SP += 12;
185#endif
186
187 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
188 call _bf53x_relocate_l1_mem;
189#ifdef CONFIG_BFIN_KERNEL_CLOCK
190 call _start_dma_code;
191#endif
192
193 /* Code for initializing Async memory banks */
194
195 p2.h = hi(EBIU_AMBCTL1);
196 p2.l = lo(EBIU_AMBCTL1);
197 r0.h = hi(AMBCTL1VAL);
198 r0.l = lo(AMBCTL1VAL);
199 [p2] = r0;
200 ssync;
201
202 p2.h = hi(EBIU_AMBCTL0);
203 p2.l = lo(EBIU_AMBCTL0);
204 r0.h = hi(AMBCTL0VAL);
205 r0.l = lo(AMBCTL0VAL);
206 [p2] = r0;
207 ssync;
208
209 p2.h = hi(EBIU_AMGCTL);
210 p2.l = lo(EBIU_AMGCTL);
211 r0 = AMGCTLVAL;
212 w[p2] = r0;
213 ssync;
214
215 /* This section keeps the processor in supervisor mode
216 * during kernel boot. Switches to user mode at end of boot.
217 * See page 3-9 of Hardware Reference manual for documentation.
218 */
219
220 /* EVT15 = _real_start */
221
222 p0.l = lo(EVT15);
223 p0.h = hi(EVT15);
224 p1.l = _real_start;
225 p1.h = _real_start;
226 [p0] = p1;
227 csync;
228
229 p0.l = lo(IMASK);
230 p0.h = hi(IMASK);
231 p1.l = IMASK_IVG15;
232 p1.h = 0x0;
233 [p0] = p1;
234 csync;
235
236 raise 15;
237 p0.l = .LWAIT_HERE;
238 p0.h = .LWAIT_HERE;
239 reti = p0;
240#if ANOMALY_05000281
241 nop; nop; nop;
242#endif
243 rti;
244
245.LWAIT_HERE:
246 jump .LWAIT_HERE;
247ENDPROC(__start)
248
249ENTRY(_real_start)
250 [ -- sp ] = reti;
251 p0.l = lo(WDOG_CTL);
252 p0.h = hi(WDOG_CTL);
253 r0 = 0xAD6(z);
254 w[p0] = r0; /* watchdog off for now */
255 ssync;
256
257 /* Code update for BSS size == 0
258 * Zero out the bss region.
259 */
260
261 p1.l = ___bss_start;
262 p1.h = ___bss_start;
263 p2.l = ___bss_stop;
264 p2.h = ___bss_stop;
265 r0 = 0;
266 p2 -= p1;
267 lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
268.L_clear_bss:
269 B[p1++] = r0;
270
271 /* In case there is a NULL pointer reference
272 * Zero out region before stext
273 */
274
275 p1.l = 0x0;
276 p1.h = 0x0;
277 r0.l = __stext;
278 r0.h = __stext;
279 r0 = r0 >> 1;
280 p2 = r0;
281 r0 = 0;
282 lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
283.L_clear_zero:
284 W[p1++] = r0;
285
286 /* pass the uboot arguments to the global value command line */
287 R0 = R7;
288 call _cmdline_init;
289
290 p1.l = __rambase;
291 p1.h = __rambase;
292 r0.l = __sdata;
293 r0.h = __sdata;
294 [p1] = r0;
295
296 p1.l = __ramstart;
297 p1.h = __ramstart;
298 p3.l = ___bss_stop;
299 p3.h = ___bss_stop;
300
301 r1 = p3;
302 [p1] = r1;
303
304 /*
305 * load the current thread pointer and stack
306 */
307 r1.l = _init_thread_union;
308 r1.h = _init_thread_union;
309
310 r2.l = 0x2000;
311 r2.h = 0x0000;
312 r1 = r1 + r2;
313 sp = r1;
314 usp = sp;
315 fp = sp;
316 jump.l _start_kernel;
317ENDPROC(_real_start)
318
319__FINIT
320
321.section .l1.text 38.section .l1.text
322#ifdef CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
323ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
@@ -412,13 +129,6 @@ ENTRY(_start_dma_code)
412 [P2] = R1; 129 [P2] = R1;
413 SSYNC; 130 SSYNC;
414 131
415 p0.h = hi(SIC_IWR);
416 p0.l = lo(SIC_IWR);
417 r0.l = lo(IWR_ENABLE_ALL);
418 r0.h = hi(IWR_ENABLE_ALL);
419 [p0] = r0;
420 SSYNC;
421
422 RTS; 132 RTS;
423ENDPROC(_start_dma_code) 133ENDPROC(_start_dma_code)
424#endif /* CONFIG_BFIN_KERNEL_CLOCK */ 134#endif /* CONFIG_BFIN_KERNEL_CLOCK */
diff --git a/arch/blackfin/mach-bf533/ints-priority.c b/arch/blackfin/mach-bf533/ints-priority.c
index 7d79e0f9503d..f51994b7a2b9 100644
--- a/arch/blackfin/mach-bf533/ints-priority.c
+++ b/arch/blackfin/mach-bf533/ints-priority.c
@@ -31,7 +31,7 @@
31#include <linux/irq.h> 31#include <linux/irq.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33 33
34void program_IAR(void) 34void __init program_IAR(void)
35{ 35{
36 /* Program the IAR0 Register with the configured priority */ 36 /* Program the IAR0 Register with the configured priority */
37 bfin_write_SIC_IAR0(((CONFIG_PLLWAKE_ERROR - 7) << PLLWAKE_ERROR_POS) | 37 bfin_write_SIC_IAR0(((CONFIG_PLLWAKE_ERROR - 7) << PLLWAKE_ERROR_POS) |
diff --git a/arch/blackfin/mach-bf537/boards/Kconfig b/arch/blackfin/mach-bf537/boards/Kconfig
index 7e789dbef036..42a57b0acb29 100644
--- a/arch/blackfin/mach-bf537/boards/Kconfig
+++ b/arch/blackfin/mach-bf537/boards/Kconfig
@@ -15,6 +15,12 @@ config BFIN537_BLUETECHNIX_CM
15 help 15 help
16 CM-BF537 support for EVAL- and DEV-Board. 16 CM-BF537 support for EVAL- and DEV-Board.
17 17
18config BFIN537_BLUETECHNIX_TCM
19 bool "Bluetechnix TCM-BF537"
20 depends on (BF537)
21 help
22 TCM-BF537 support for EVAL- and DEV-Board.
23
18config PNAV10 24config PNAV10
19 bool "PNAV board" 25 bool "PNAV board"
20 depends on (BF537) 26 depends on (BF537)
diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile
index c94f7a5b8211..7168cc14afd8 100644
--- a/arch/blackfin/mach-bf537/boards/Makefile
+++ b/arch/blackfin/mach-bf537/boards/Makefile
@@ -5,5 +5,6 @@
5obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o 5obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o
6obj-$(CONFIG_BFIN537_STAMP) += stamp.o 6obj-$(CONFIG_BFIN537_STAMP) += stamp.o
7obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o 7obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o
8obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o
8obj-$(CONFIG_PNAV10) += pnav10.o 9obj-$(CONFIG_PNAV10) += pnav10.o
9obj-$(CONFIG_CAMSIG_MINOTAUR) += minotaur.o 10obj-$(CONFIG_CAMSIG_MINOTAUR) += minotaur.o
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index 73f2142875e2..dde14720b0ea 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -33,6 +33,7 @@
33#include <linux/platform_device.h> 33#include <linux/platform_device.h>
34#include <linux/mtd/mtd.h> 34#include <linux/mtd/mtd.h>
35#include <linux/mtd/partitions.h> 35#include <linux/mtd/partitions.h>
36#include <linux/mtd/physmap.h>
36#include <linux/spi/spi.h> 37#include <linux/spi/spi.h>
37#include <linux/spi/flash.h> 38#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 39#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
@@ -56,16 +57,16 @@ const char bfin_board_name[] = "Bluetechnix CM BF537";
56#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 57#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
57static struct mtd_partition bfin_spi_flash_partitions[] = { 58static struct mtd_partition bfin_spi_flash_partitions[] = {
58 { 59 {
59 .name = "bootloader", 60 .name = "bootloader(spi)",
60 .size = 0x00020000, 61 .size = 0x00020000,
61 .offset = 0, 62 .offset = 0,
62 .mask_flags = MTD_CAP_ROM 63 .mask_flags = MTD_CAP_ROM
63 }, { 64 }, {
64 .name = "kernel", 65 .name = "linux kernel(spi)",
65 .size = 0xe0000, 66 .size = 0xe0000,
66 .offset = 0x20000 67 .offset = 0x20000
67 }, { 68 }, {
68 .name = "file system", 69 .name = "file system(spi)",
69 .size = 0x700000, 70 .size = 0x700000,
70 .offset = 0x00100000, 71 .offset = 0x00100000,
71 } 72 }
@@ -307,6 +308,55 @@ static struct platform_device net2272_bfin_device = {
307}; 308};
308#endif 309#endif
309 310
311#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
312static struct mtd_partition cm_partitions[] = {
313 {
314 .name = "bootloader(nor)",
315 .size = 0x40000,
316 .offset = 0,
317 }, {
318 .name = "linux kernel(nor)",
319 .size = 0xE0000,
320 .offset = MTDPART_OFS_APPEND,
321 }, {
322 .name = "file system(nor)",
323 .size = MTDPART_SIZ_FULL,
324 .offset = MTDPART_OFS_APPEND,
325 }
326};
327
328static struct physmap_flash_data cm_flash_data = {
329 .width = 2,
330 .parts = cm_partitions,
331 .nr_parts = ARRAY_SIZE(cm_partitions),
332};
333
334static unsigned cm_flash_gpios[] = { GPIO_PF4 };
335
336static struct resource cm_flash_resource[] = {
337 {
338 .name = "cfi_probe",
339 .start = 0x20000000,
340 .end = 0x201fffff,
341 .flags = IORESOURCE_MEM,
342 }, {
343 .start = (unsigned long)cm_flash_gpios,
344 .end = ARRAY_SIZE(cm_flash_gpios),
345 .flags = IORESOURCE_IRQ,
346 }
347};
348
349static struct platform_device cm_flash_device = {
350 .name = "gpio-addr-flash",
351 .id = 0,
352 .dev = {
353 .platform_data = &cm_flash_data,
354 },
355 .num_resources = ARRAY_SIZE(cm_flash_resource),
356 .resource = cm_flash_resource,
357};
358#endif
359
310#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 360#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
311static struct resource bfin_uart_resources[] = { 361static struct resource bfin_uart_resources[] = {
312 { 362 {
@@ -395,7 +445,7 @@ static struct platform_device bfin_mac_device = {
395#endif 445#endif
396 446
397#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 447#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
398#define PATA_INT 64 448#define PATA_INT IRQ_PF14
399 449
400static struct pata_platform_info bfin_pata_platform_data = { 450static struct pata_platform_info bfin_pata_platform_data = {
401 .ioport_shift = 2, 451 .ioport_shift = 2,
@@ -510,6 +560,10 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
510#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 560#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
511 &bfin_pata_device, 561 &bfin_pata_device,
512#endif 562#endif
563
564#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
565 &cm_flash_device,
566#endif
513}; 567};
514 568
515static int __init cm_bf537_init(void) 569static int __init cm_bf537_init(void)
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c
index 01b63e2ec18f..78a13d5bfd55 100644
--- a/arch/blackfin/mach-bf537/boards/generic_board.c
+++ b/arch/blackfin/mach-bf537/boards/generic_board.c
@@ -38,7 +38,6 @@
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
39#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
40#endif 40#endif
41#include <linux/ata_platform.h>
42#include <linux/irq.h> 41#include <linux/irq.h>
43#include <linux/interrupt.h> 42#include <linux/interrupt.h>
44#include <linux/usb/sl811.h> 43#include <linux/usb/sl811.h>
@@ -307,16 +306,16 @@ static struct platform_device net2272_bfin_device = {
307 || defined(CONFIG_MTD_M25P80_MODULE) 306 || defined(CONFIG_MTD_M25P80_MODULE)
308static struct mtd_partition bfin_spi_flash_partitions[] = { 307static struct mtd_partition bfin_spi_flash_partitions[] = {
309 { 308 {
310 .name = "bootloader", 309 .name = "bootloader(spi)",
311 .size = 0x00020000, 310 .size = 0x00020000,
312 .offset = 0, 311 .offset = 0,
313 .mask_flags = MTD_CAP_ROM 312 .mask_flags = MTD_CAP_ROM
314 }, { 313 }, {
315 .name = "kernel", 314 .name = "linux kernel(spi)",
316 .size = 0xe0000, 315 .size = 0xe0000,
317 .offset = 0x20000 316 .offset = 0x20000
318 }, { 317 }, {
319 .name = "file system", 318 .name = "file system(spi)",
320 .size = 0x700000, 319 .size = 0x700000,
321 .offset = 0x00100000, 320 .offset = 0x00100000,
322 } 321 }
@@ -619,43 +618,6 @@ static struct platform_device bfin_sport1_uart_device = {
619}; 618};
620#endif 619#endif
621 620
622#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
623#define PATA_INT 55
624
625static struct pata_platform_info bfin_pata_platform_data = {
626 .ioport_shift = 1,
627 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
628};
629
630static struct resource bfin_pata_resources[] = {
631 {
632 .start = 0x20314020,
633 .end = 0x2031403F,
634 .flags = IORESOURCE_MEM,
635 },
636 {
637 .start = 0x2031401C,
638 .end = 0x2031401F,
639 .flags = IORESOURCE_MEM,
640 },
641 {
642 .start = PATA_INT,
643 .end = PATA_INT,
644 .flags = IORESOURCE_IRQ,
645 },
646};
647
648static struct platform_device bfin_pata_device = {
649 .name = "pata_platform",
650 .id = -1,
651 .num_resources = ARRAY_SIZE(bfin_pata_resources),
652 .resource = bfin_pata_resources,
653 .dev = {
654 .platform_data = &bfin_pata_platform_data,
655 }
656};
657#endif
658
659static struct platform_device *stamp_devices[] __initdata = { 621static struct platform_device *stamp_devices[] __initdata = {
660#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 622#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
661 &bfin_pcmcia_cf_device, 623 &bfin_pcmcia_cf_device,
@@ -717,10 +679,6 @@ static struct platform_device *stamp_devices[] __initdata = {
717 &bfin_sport0_uart_device, 679 &bfin_sport0_uart_device,
718 &bfin_sport1_uart_device, 680 &bfin_sport1_uart_device,
719#endif 681#endif
720
721#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
722 &bfin_pata_device,
723#endif
724}; 682};
725 683
726static int __init stamp_init(void) 684static int __init stamp_init(void)
@@ -732,9 +690,6 @@ static int __init stamp_init(void)
732 ARRAY_SIZE(bfin_spi_board_info)); 690 ARRAY_SIZE(bfin_spi_board_info));
733#endif 691#endif
734 692
735#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
736 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
737#endif
738 return 0; 693 return 0;
739} 694}
740 695
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
index 18ddf7a52005..48c4cd2d1be6 100644
--- a/arch/blackfin/mach-bf537/boards/minotaur.c
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -100,16 +100,16 @@ static struct platform_device net2272_bfin_device = {
100 100
101static struct mtd_partition bfin_spi_flash_partitions[] = { 101static struct mtd_partition bfin_spi_flash_partitions[] = {
102 { 102 {
103 .name = "uboot", 103 .name = "bootloader(spi)",
104 .size = PSIZE_UBOOT, 104 .size = PSIZE_UBOOT,
105 .offset = 0x000000, 105 .offset = 0x000000,
106 .mask_flags = MTD_CAP_ROM 106 .mask_flags = MTD_CAP_ROM
107 }, { 107 }, {
108 .name = "initramfs", 108 .name = "initramfs(spi)",
109 .size = PSIZE_INITRAMFS, 109 .size = PSIZE_INITRAMFS,
110 .offset = PSIZE_UBOOT 110 .offset = PSIZE_UBOOT
111 }, { 111 }, {
112 .name = "opt", 112 .name = "opt(spi)",
113 .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS), 113 .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
114 .offset = PSIZE_UBOOT + PSIZE_INITRAMFS, 114 .offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
115 } 115 }
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 51c3bab14a69..f9174c11cbd4 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -231,16 +231,16 @@ static struct platform_device net2272_bfin_device = {
231 || defined(CONFIG_MTD_M25P80_MODULE) 231 || defined(CONFIG_MTD_M25P80_MODULE)
232static struct mtd_partition bfin_spi_flash_partitions[] = { 232static struct mtd_partition bfin_spi_flash_partitions[] = {
233 { 233 {
234 .name = "bootloader", 234 .name = "bootloader(spi)",
235 .size = 0x00020000, 235 .size = 0x00020000,
236 .offset = 0, 236 .offset = 0,
237 .mask_flags = MTD_CAP_ROM 237 .mask_flags = MTD_CAP_ROM
238 }, { 238 }, {
239 .name = "kernel", 239 .name = "linux kernel(spi)",
240 .size = 0xe0000, 240 .size = 0xe0000,
241 .offset = 0x20000 241 .offset = 0x20000
242 }, { 242 }, {
243 .name = "file system", 243 .name = "file system(spi)",
244 .size = 0x700000, 244 .size = 0x700000,
245 .offset = 0x00100000, 245 .offset = 0x00100000,
246 } 246 }
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 6dbc76fb080b..e93964fdb432 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -364,11 +364,11 @@ const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
364 364
365static struct mtd_partition bfin_plat_nand_partitions[] = { 365static struct mtd_partition bfin_plat_nand_partitions[] = {
366 { 366 {
367 .name = "linux kernel", 367 .name = "linux kernel(nand)",
368 .size = 0x400000, 368 .size = 0x400000,
369 .offset = 0, 369 .offset = 0,
370 }, { 370 }, {
371 .name = "file system", 371 .name = "file system(nand)",
372 .size = MTDPART_SIZ_FULL, 372 .size = MTDPART_SIZ_FULL,
373 .offset = MTDPART_OFS_APPEND, 373 .offset = MTDPART_OFS_APPEND,
374 }, 374 },
@@ -439,19 +439,19 @@ static void bfin_plat_nand_init(void) {}
439#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 439#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
440static struct mtd_partition stamp_partitions[] = { 440static struct mtd_partition stamp_partitions[] = {
441 { 441 {
442 .name = "Bootloader", 442 .name = "bootloader(nor)",
443 .size = 0x40000, 443 .size = 0x40000,
444 .offset = 0, 444 .offset = 0,
445 }, { 445 }, {
446 .name = "Kernel", 446 .name = "linux kernel(nor)",
447 .size = 0xE0000, 447 .size = 0xE0000,
448 .offset = MTDPART_OFS_APPEND, 448 .offset = MTDPART_OFS_APPEND,
449 }, { 449 }, {
450 .name = "RootFS", 450 .name = "file system(nor)",
451 .size = 0x400000 - 0x40000 - 0xE0000 - 0x10000, 451 .size = 0x400000 - 0x40000 - 0xE0000 - 0x10000,
452 .offset = MTDPART_OFS_APPEND, 452 .offset = MTDPART_OFS_APPEND,
453 }, { 453 }, {
454 .name = "MAC Address", 454 .name = "MAC Address(nor)",
455 .size = MTDPART_SIZ_FULL, 455 .size = MTDPART_SIZ_FULL,
456 .offset = 0x3F0000, 456 .offset = 0x3F0000,
457 .mask_flags = MTD_WRITEABLE, 457 .mask_flags = MTD_WRITEABLE,
@@ -485,16 +485,16 @@ static struct platform_device stamp_flash_device = {
485 || defined(CONFIG_MTD_M25P80_MODULE) 485 || defined(CONFIG_MTD_M25P80_MODULE)
486static struct mtd_partition bfin_spi_flash_partitions[] = { 486static struct mtd_partition bfin_spi_flash_partitions[] = {
487 { 487 {
488 .name = "bootloader", 488 .name = "bootloader(spi)",
489 .size = 0x00040000, 489 .size = 0x00040000,
490 .offset = 0, 490 .offset = 0,
491 .mask_flags = MTD_CAP_ROM 491 .mask_flags = MTD_CAP_ROM
492 }, { 492 }, {
493 .name = "kernel", 493 .name = "linux kernel(spi)",
494 .size = 0xe0000, 494 .size = 0xe0000,
495 .offset = MTDPART_OFS_APPEND, 495 .offset = MTDPART_OFS_APPEND,
496 }, { 496 }, {
497 .name = "file system", 497 .name = "file system(spi)",
498 .size = MTDPART_SIZ_FULL, 498 .size = MTDPART_SIZ_FULL,
499 .offset = MTDPART_OFS_APPEND, 499 .offset = MTDPART_OFS_APPEND,
500 } 500 }
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
new file mode 100644
index 000000000000..d5ff705a5129
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -0,0 +1,590 @@
1/*
2 * File: arch/blackfin/mach-bf537/boards/tcm_bf537.c
3 * Based on: arch/blackfin/mach-bf533/boards/cm_bf537.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created: 2005
7 * Description: Board description file
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/etherdevice.h>
33#include <linux/platform_device.h>
34#include <linux/mtd/mtd.h>
35#include <linux/mtd/partitions.h>
36#include <linux/mtd/physmap.h>
37#include <linux/spi/spi.h>
38#include <linux/spi/flash.h>
39#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
40#include <linux/usb/isp1362.h>
41#endif
42#include <linux/ata_platform.h>
43#include <linux/irq.h>
44#include <asm/dma.h>
45#include <asm/bfin5xx_spi.h>
46#include <asm/portmux.h>
47#include <asm/dpmc.h>
48
49/*
50 * Name the Board for the /proc/cpuinfo
51 */
52const char bfin_board_name[] = "Bluetechnix TCM BF537";
53
54#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
55/* all SPI peripherals info goes here */
56
57#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
58static struct mtd_partition bfin_spi_flash_partitions[] = {
59 {
60 .name = "bootloader(spi)",
61 .size = 0x00020000,
62 .offset = 0,
63 .mask_flags = MTD_CAP_ROM
64 }, {
65 .name = "linux kernel(spi)",
66 .size = 0xe0000,
67 .offset = 0x20000
68 }, {
69 .name = "file system(spi)",
70 .size = 0x700000,
71 .offset = 0x00100000,
72 }
73};
74
75static struct flash_platform_data bfin_spi_flash_data = {
76 .name = "m25p80",
77 .parts = bfin_spi_flash_partitions,
78 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
79 .type = "m25p64",
80};
81
82/* SPI flash chip (m25p64) */
83static struct bfin5xx_spi_chip spi_flash_chip_info = {
84 .enable_dma = 0, /* use dma transfer with this chip*/
85 .bits_per_word = 8,
86};
87#endif
88
89#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
90/* SPI ADC chip */
91static struct bfin5xx_spi_chip spi_adc_chip_info = {
92 .enable_dma = 1, /* use dma transfer with this chip*/
93 .bits_per_word = 16,
94};
95#endif
96
97#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
98static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
99 .enable_dma = 0,
100 .bits_per_word = 16,
101};
102#endif
103
104#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
105static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
106 .enable_dma = 0,
107 .bits_per_word = 16,
108};
109#endif
110
111#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
112static struct bfin5xx_spi_chip spi_mmc_chip_info = {
113 .enable_dma = 1,
114 .bits_per_word = 8,
115};
116#endif
117
118static struct spi_board_info bfin_spi_board_info[] __initdata = {
119#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
120 {
121 /* the modalias must be the same as spi device driver name */
122 .modalias = "m25p80", /* Name of spi_driver for this device */
123 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
124 .bus_num = 0, /* Framework bus number */
125 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
126 .platform_data = &bfin_spi_flash_data,
127 .controller_data = &spi_flash_chip_info,
128 .mode = SPI_MODE_3,
129 },
130#endif
131
132#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
133 {
134 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
135 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
136 .bus_num = 0, /* Framework bus number */
137 .chip_select = 1, /* Framework chip select. */
138 .platform_data = NULL, /* No spi_driver specific config */
139 .controller_data = &spi_adc_chip_info,
140 },
141#endif
142
143#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
144 {
145 .modalias = "ad1836-spi",
146 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
147 .bus_num = 0,
148 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
149 .controller_data = &ad1836_spi_chip_info,
150 },
151#endif
152
153#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
154 {
155 .modalias = "ad9960-spi",
156 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
157 .bus_num = 0,
158 .chip_select = 1,
159 .controller_data = &ad9960_spi_chip_info,
160 },
161#endif
162
163#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
164 {
165 .modalias = "spi_mmc_dummy",
166 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
167 .bus_num = 0,
168 .chip_select = 7,
169 .platform_data = NULL,
170 .controller_data = &spi_mmc_chip_info,
171 .mode = SPI_MODE_3,
172 },
173 {
174 .modalias = "spi_mmc",
175 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
176 .bus_num = 0,
177 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
178 .platform_data = NULL,
179 .controller_data = &spi_mmc_chip_info,
180 .mode = SPI_MODE_3,
181 },
182#endif
183};
184
185/* SPI (0) */
186static struct resource bfin_spi0_resource[] = {
187 [0] = {
188 .start = SPI0_REGBASE,
189 .end = SPI0_REGBASE + 0xFF,
190 .flags = IORESOURCE_MEM,
191 },
192 [1] = {
193 .start = CH_SPI,
194 .end = CH_SPI,
195 .flags = IORESOURCE_IRQ,
196 }
197};
198
199/* SPI controller data */
200static struct bfin5xx_spi_master bfin_spi0_info = {
201 .num_chipselect = 8,
202 .enable_dma = 1, /* master has the ability to do dma transfer */
203 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
204};
205
206static struct platform_device bfin_spi0_device = {
207 .name = "bfin-spi",
208 .id = 0, /* Bus number */
209 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
210 .resource = bfin_spi0_resource,
211 .dev = {
212 .platform_data = &bfin_spi0_info, /* Passed to driver */
213 },
214};
215#endif /* spi master and devices */
216
217#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
218static struct platform_device rtc_device = {
219 .name = "rtc-bfin",
220 .id = -1,
221};
222#endif
223
224#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
225static struct platform_device hitachi_fb_device = {
226 .name = "hitachi-tx09",
227};
228#endif
229
230#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
231static struct resource smc91x_resources[] = {
232 {
233 .start = 0x20200300,
234 .end = 0x20200300 + 16,
235 .flags = IORESOURCE_MEM,
236 }, {
237 .start = IRQ_PF14,
238 .end = IRQ_PF14,
239 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
240 },
241};
242
243static struct platform_device smc91x_device = {
244 .name = "smc91x",
245 .id = 0,
246 .num_resources = ARRAY_SIZE(smc91x_resources),
247 .resource = smc91x_resources,
248};
249#endif
250
251#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
252static struct resource isp1362_hcd_resources[] = {
253 {
254 .start = 0x20308000,
255 .end = 0x20308000,
256 .flags = IORESOURCE_MEM,
257 }, {
258 .start = 0x20308004,
259 .end = 0x20308004,
260 .flags = IORESOURCE_MEM,
261 }, {
262 .start = IRQ_PG15,
263 .end = IRQ_PG15,
264 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
265 },
266};
267
268static struct isp1362_platform_data isp1362_priv = {
269 .sel15Kres = 1,
270 .clknotstop = 0,
271 .oc_enable = 0,
272 .int_act_high = 0,
273 .int_edge_triggered = 0,
274 .remote_wakeup_connected = 0,
275 .no_power_switching = 1,
276 .power_switching_mode = 0,
277};
278
279static struct platform_device isp1362_hcd_device = {
280 .name = "isp1362-hcd",
281 .id = 0,
282 .dev = {
283 .platform_data = &isp1362_priv,
284 },
285 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
286 .resource = isp1362_hcd_resources,
287};
288#endif
289
290#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
291static struct resource net2272_bfin_resources[] = {
292 {
293 .start = 0x20200000,
294 .end = 0x20200000 + 0x100,
295 .flags = IORESOURCE_MEM,
296 }, {
297 .start = IRQ_PH14,
298 .end = IRQ_PH14,
299 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
300 },
301};
302
303static struct platform_device net2272_bfin_device = {
304 .name = "net2272",
305 .id = -1,
306 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
307 .resource = net2272_bfin_resources,
308};
309#endif
310
311#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
312static struct mtd_partition cm_partitions[] = {
313 {
314 .name = "bootloader(nor)",
315 .size = 0x40000,
316 .offset = 0,
317 }, {
318 .name = "linux kernel(nor)",
319 .size = 0xE0000,
320 .offset = MTDPART_OFS_APPEND,
321 }, {
322 .name = "file system(nor)",
323 .size = MTDPART_SIZ_FULL,
324 .offset = MTDPART_OFS_APPEND,
325 }
326};
327
328static struct physmap_flash_data cm_flash_data = {
329 .width = 2,
330 .parts = cm_partitions,
331 .nr_parts = ARRAY_SIZE(cm_partitions),
332};
333
334static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
335
336static struct resource cm_flash_resource[] = {
337 {
338 .name = "cfi_probe",
339 .start = 0x20000000,
340 .end = 0x201fffff,
341 .flags = IORESOURCE_MEM,
342 }, {
343 .start = (unsigned long)cm_flash_gpios,
344 .end = ARRAY_SIZE(cm_flash_gpios),
345 .flags = IORESOURCE_IRQ,
346 }
347};
348
349static struct platform_device cm_flash_device = {
350 .name = "gpio-addr-flash",
351 .id = 0,
352 .dev = {
353 .platform_data = &cm_flash_data,
354 },
355 .num_resources = ARRAY_SIZE(cm_flash_resource),
356 .resource = cm_flash_resource,
357};
358#endif
359
360#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
361static struct resource bfin_uart_resources[] = {
362 {
363 .start = 0xFFC00400,
364 .end = 0xFFC004FF,
365 .flags = IORESOURCE_MEM,
366 }, {
367 .start = 0xFFC02000,
368 .end = 0xFFC020FF,
369 .flags = IORESOURCE_MEM,
370 },
371};
372
373static struct platform_device bfin_uart_device = {
374 .name = "bfin-uart",
375 .id = 1,
376 .num_resources = ARRAY_SIZE(bfin_uart_resources),
377 .resource = bfin_uart_resources,
378};
379#endif
380
381#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
382static struct resource bfin_sir_resources[] = {
383#ifdef CONFIG_BFIN_SIR0
384 {
385 .start = 0xFFC00400,
386 .end = 0xFFC004FF,
387 .flags = IORESOURCE_MEM,
388 },
389#endif
390#ifdef CONFIG_BFIN_SIR1
391 {
392 .start = 0xFFC02000,
393 .end = 0xFFC020FF,
394 .flags = IORESOURCE_MEM,
395 },
396#endif
397};
398
399static struct platform_device bfin_sir_device = {
400 .name = "bfin_sir",
401 .id = 0,
402 .num_resources = ARRAY_SIZE(bfin_sir_resources),
403 .resource = bfin_sir_resources,
404};
405#endif
406
407#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
408static struct resource bfin_twi0_resource[] = {
409 [0] = {
410 .start = TWI0_REGBASE,
411 .end = TWI0_REGBASE,
412 .flags = IORESOURCE_MEM,
413 },
414 [1] = {
415 .start = IRQ_TWI,
416 .end = IRQ_TWI,
417 .flags = IORESOURCE_IRQ,
418 },
419};
420
421static struct platform_device i2c_bfin_twi_device = {
422 .name = "i2c-bfin-twi",
423 .id = 0,
424 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
425 .resource = bfin_twi0_resource,
426};
427#endif
428
429#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
430static struct platform_device bfin_sport0_uart_device = {
431 .name = "bfin-sport-uart",
432 .id = 0,
433};
434
435static struct platform_device bfin_sport1_uart_device = {
436 .name = "bfin-sport-uart",
437 .id = 1,
438};
439#endif
440
441#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
442static struct platform_device bfin_mac_device = {
443 .name = "bfin_mac",
444};
445#endif
446
447#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
448#define PATA_INT IRQ_PF14
449
450static struct pata_platform_info bfin_pata_platform_data = {
451 .ioport_shift = 2,
452 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
453};
454
455static struct resource bfin_pata_resources[] = {
456 {
457 .start = 0x2030C000,
458 .end = 0x2030C01F,
459 .flags = IORESOURCE_MEM,
460 },
461 {
462 .start = 0x2030D018,
463 .end = 0x2030D01B,
464 .flags = IORESOURCE_MEM,
465 },
466 {
467 .start = PATA_INT,
468 .end = PATA_INT,
469 .flags = IORESOURCE_IRQ,
470 },
471};
472
473static struct platform_device bfin_pata_device = {
474 .name = "pata_platform",
475 .id = -1,
476 .num_resources = ARRAY_SIZE(bfin_pata_resources),
477 .resource = bfin_pata_resources,
478 .dev = {
479 .platform_data = &bfin_pata_platform_data,
480 }
481};
482#endif
483
484static const unsigned int cclk_vlev_datasheet[] =
485{
486 VRPAIR(VLEV_085, 250000000),
487 VRPAIR(VLEV_090, 376000000),
488 VRPAIR(VLEV_095, 426000000),
489 VRPAIR(VLEV_100, 426000000),
490 VRPAIR(VLEV_105, 476000000),
491 VRPAIR(VLEV_110, 476000000),
492 VRPAIR(VLEV_115, 476000000),
493 VRPAIR(VLEV_120, 500000000),
494 VRPAIR(VLEV_125, 533000000),
495 VRPAIR(VLEV_130, 600000000),
496};
497
498static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
499 .tuple_tab = cclk_vlev_datasheet,
500 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
501 .vr_settling_time = 25 /* us */,
502};
503
504static struct platform_device bfin_dpmc = {
505 .name = "bfin dpmc",
506 .dev = {
507 .platform_data = &bfin_dmpc_vreg_data,
508 },
509};
510
511static struct platform_device *cm_bf537_devices[] __initdata = {
512
513 &bfin_dpmc,
514
515#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
516 &hitachi_fb_device,
517#endif
518
519#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
520 &rtc_device,
521#endif
522
523#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
524 &bfin_uart_device,
525#endif
526
527#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
528 &bfin_sir_device,
529#endif
530
531#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
532 &i2c_bfin_twi_device,
533#endif
534
535#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
536 &bfin_sport0_uart_device,
537 &bfin_sport1_uart_device,
538#endif
539
540#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
541 &isp1362_hcd_device,
542#endif
543
544#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
545 &smc91x_device,
546#endif
547
548#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
549 &bfin_mac_device,
550#endif
551
552#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
553 &net2272_bfin_device,
554#endif
555
556#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
557 &bfin_spi0_device,
558#endif
559
560#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
561 &bfin_pata_device,
562#endif
563
564#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
565 &cm_flash_device,
566#endif
567};
568
569static int __init cm_bf537_init(void)
570{
571 printk(KERN_INFO "%s(): registering device resources\n", __func__);
572 platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
573#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
574 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
575#endif
576
577#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
578 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
579#endif
580 return 0;
581}
582
583arch_initcall(cm_bf537_init);
584
585void bfin_get_ether_addr(char *addr)
586{
587 random_ether_addr(addr);
588 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
589}
590EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index 6b019eaee0b6..64e0287ab266 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -30,325 +30,11 @@
30#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33#include <asm/trace.h>
34
35#ifdef CONFIG_BFIN_KERNEL_CLOCK 33#ifdef CONFIG_BFIN_KERNEL_CLOCK
36#include <asm/mach-common/clocks.h> 34#include <asm/mach-common/clocks.h>
37#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
38#endif 36#endif
39 37
40.extern ___bss_stop
41.extern ___bss_start
42.extern _bf53x_relocate_l1_mem
43
44#define INITIAL_STACK 0xFFB01000
45
46__INIT
47
48ENTRY(__start)
49 /* R0: argument of command line string, passed from uboot, save it */
50 R7 = R0;
51 /* Enable Cycle Counter and Nesting Of Interrupts */
52#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
53 R0 = SYSCFG_SNEN;
54#else
55 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
56#endif
57 SYSCFG = R0;
58 R0 = 0;
59
60 /* Clear Out All the data and pointer Registers */
61 R1 = R0;
62 R2 = R0;
63 R3 = R0;
64 R4 = R0;
65 R5 = R0;
66 R6 = R0;
67
68 P0 = R0;
69 P1 = R0;
70 P2 = R0;
71 P3 = R0;
72 P4 = R0;
73 P5 = R0;
74
75 LC0 = r0;
76 LC1 = r0;
77 L0 = r0;
78 L1 = r0;
79 L2 = r0;
80 L3 = r0;
81
82 /* Clear Out All the DAG Registers */
83 B0 = r0;
84 B1 = r0;
85 B2 = r0;
86 B3 = r0;
87
88 I0 = r0;
89 I1 = r0;
90 I2 = r0;
91 I3 = r0;
92
93 M0 = r0;
94 M1 = r0;
95 M2 = r0;
96 M3 = r0;
97
98 trace_buffer_init(p0,r0);
99 P0 = R1;
100 R0 = R1;
101
102 /* Turn off the icache */
103 p0.l = LO(IMEM_CONTROL);
104 p0.h = HI(IMEM_CONTROL);
105 R1 = [p0];
106 R0 = ~ENICPLB;
107 R0 = R0 & R1;
108
109 /* Anomaly 05000125 */
110#if ANOMALY_05000125
111 CLI R2;
112 SSYNC;
113#endif
114 [p0] = R0;
115 SSYNC;
116#if ANOMALY_05000125
117 STI R2;
118#endif
119
120 /* Turn off the dcache */
121 p0.l = LO(DMEM_CONTROL);
122 p0.h = HI(DMEM_CONTROL);
123 R1 = [p0];
124 R0 = ~ENDCPLB;
125 R0 = R0 & R1;
126
127 /* Anomaly 05000125 */
128#if ANOMALY_05000125
129 CLI R2;
130 SSYNC;
131#endif
132 [p0] = R0;
133 SSYNC;
134#if ANOMALY_05000125
135 STI R2;
136#endif
137
138 /* Initialise General-Purpose I/O Modules on BF537 */
139 /* Rev 0.0 Anomaly 05000212 - PORTx_FER,
140 * PORT_MUX Registers Do Not accept "writes" correctly:
141 */
142 p0.h = hi(BFIN_PORT_MUX);
143 p0.l = lo(BFIN_PORT_MUX);
144#if ANOMALY_05000212
145 R0.L = W[P0]; /* Read */
146 SSYNC;
147#endif
148 R0 = (PGDE_UART | PFTE_UART)(Z);
149#if ANOMALY_05000212
150 W[P0] = R0.L; /* Write */
151 SSYNC;
152#endif
153 W[P0] = R0.L; /* Enable both UARTS */
154 SSYNC;
155
156 p0.h = hi(PORTF_FER);
157 p0.l = lo(PORTF_FER);
158#if ANOMALY_05000212
159 R0.L = W[P0]; /* Read */
160 SSYNC;
161#endif
162 R0 = 0x000F(Z);
163#if ANOMALY_05000212
164 W[P0] = R0.L; /* Write */
165 SSYNC;
166#endif
167 /* Enable peripheral function of PORTF for UART0 and UART1 */
168 W[P0] = R0.L;
169 SSYNC;
170
171#if !defined(CONFIG_BF534)
172 p0.h = hi(EMAC_SYSTAT);
173 p0.l = lo(EMAC_SYSTAT);
174 R0.h = 0xFFFF; /* Clear EMAC Interrupt Status bits */
175 R0.l = 0xFFFF;
176 [P0] = R0;
177 SSYNC;
178#endif
179
180 /* Initialise UART - when booting from u-boot, the UART is not disabled
181 * so if we dont initalize here, our serial console gets hosed */
182 p0.h = hi(BFIN_UART_LCR);
183 p0.l = lo(BFIN_UART_LCR);
184 r0 = 0x0(Z);
185 w[p0] = r0.L; /* To enable DLL writes */
186 ssync;
187
188 p0.h = hi(BFIN_UART_DLL);
189 p0.l = lo(BFIN_UART_DLL);
190 r0 = 0x0(Z);
191 w[p0] = r0.L;
192 ssync;
193
194 p0.h = hi(BFIN_UART_DLH);
195 p0.l = lo(BFIN_UART_DLH);
196 r0 = 0x00(Z);
197 w[p0] = r0.L;
198 ssync;
199
200 p0.h = hi(BFIN_UART_GCTL);
201 p0.l = lo(BFIN_UART_GCTL);
202 r0 = 0x0(Z);
203 w[p0] = r0.L; /* To enable UART clock */
204 ssync;
205
206 /* Initialize stack pointer */
207 sp.l = lo(INITIAL_STACK);
208 sp.h = hi(INITIAL_STACK);
209 fp = sp;
210 usp = sp;
211
212#ifdef CONFIG_EARLY_PRINTK
213 SP += -12;
214 call _init_early_exception_vectors;
215 SP += 12;
216#endif
217
218 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
219 call _bf53x_relocate_l1_mem;
220#ifdef CONFIG_BFIN_KERNEL_CLOCK
221 call _start_dma_code;
222#endif
223
224 /* Code for initializing Async memory banks */
225
226 p2.h = hi(EBIU_AMBCTL1);
227 p2.l = lo(EBIU_AMBCTL1);
228 r0.h = hi(AMBCTL1VAL);
229 r0.l = lo(AMBCTL1VAL);
230 [p2] = r0;
231 ssync;
232
233 p2.h = hi(EBIU_AMBCTL0);
234 p2.l = lo(EBIU_AMBCTL0);
235 r0.h = hi(AMBCTL0VAL);
236 r0.l = lo(AMBCTL0VAL);
237 [p2] = r0;
238 ssync;
239
240 p2.h = hi(EBIU_AMGCTL);
241 p2.l = lo(EBIU_AMGCTL);
242 r0 = AMGCTLVAL;
243 w[p2] = r0;
244 ssync;
245
246 /* This section keeps the processor in supervisor mode
247 * during kernel boot. Switches to user mode at end of boot.
248 * See page 3-9 of Hardware Reference manual for documentation.
249 */
250
251 /* EVT15 = _real_start */
252
253 p0.l = lo(EVT15);
254 p0.h = hi(EVT15);
255 p1.l = _real_start;
256 p1.h = _real_start;
257 [p0] = p1;
258 csync;
259
260 p0.l = lo(IMASK);
261 p0.h = hi(IMASK);
262 p1.l = IMASK_IVG15;
263 p1.h = 0x0;
264 [p0] = p1;
265 csync;
266
267 raise 15;
268 p0.l = .LWAIT_HERE;
269 p0.h = .LWAIT_HERE;
270 reti = p0;
271#if ANOMALY_05000281
272 nop; nop; nop;
273#endif
274 rti;
275
276.LWAIT_HERE:
277 jump .LWAIT_HERE;
278ENDPROC(__start)
279
280ENTRY(_real_start)
281 [ -- sp ] = reti;
282 p0.l = lo(WDOG_CTL);
283 p0.h = hi(WDOG_CTL);
284 r0 = 0xAD6(z);
285 w[p0] = r0; /* watchdog off for now */
286 ssync;
287
288 /* Code update for BSS size == 0
289 * Zero out the bss region.
290 */
291
292 p1.l = ___bss_start;
293 p1.h = ___bss_start;
294 p2.l = ___bss_stop;
295 p2.h = ___bss_stop;
296 r0 = 0;
297 p2 -= p1;
298 lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
299.L_clear_bss:
300 B[p1++] = r0;
301
302 /* In case there is a NULL pointer reference
303 * Zero out region before stext
304 */
305
306 p1.l = 0x0;
307 p1.h = 0x0;
308 r0.l = __stext;
309 r0.h = __stext;
310 r0 = r0 >> 1;
311 p2 = r0;
312 r0 = 0;
313 lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
314.L_clear_zero:
315 W[p1++] = r0;
316
317 /* pass the uboot arguments to the global value command line */
318 R0 = R7;
319 call _cmdline_init;
320
321 p1.l = __rambase;
322 p1.h = __rambase;
323 r0.l = __sdata;
324 r0.h = __sdata;
325 [p1] = r0;
326
327 p1.l = __ramstart;
328 p1.h = __ramstart;
329 p3.l = ___bss_stop;
330 p3.h = ___bss_stop;
331
332 r1 = p3;
333 [p1] = r1;
334
335 /*
336 * load the current thread pointer and stack
337 */
338 r1.l = _init_thread_union;
339 r1.h = _init_thread_union;
340
341 r2.l = 0x2000;
342 r2.h = 0x0000;
343 r1 = r1 + r2;
344 sp = r1;
345 usp = sp;
346 fp = sp;
347 jump.l _start_kernel;
348ENDPROC(_real_start)
349
350__FINIT
351
352.section .l1.text 38.section .l1.text
353#ifdef CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
354ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
@@ -452,13 +138,6 @@ ENTRY(_start_dma_code)
452 [P2] = R1; 138 [P2] = R1;
453 SSYNC; 139 SSYNC;
454 140
455 p0.h = hi(SIC_IWR);
456 p0.l = lo(SIC_IWR);
457 r0.l = lo(IWR_ENABLE_ALL);
458 r0.h = hi(IWR_ENABLE_ALL);
459 [p0] = r0;
460 SSYNC;
461
462 RTS; 141 RTS;
463ENDPROC(_start_dma_code) 142ENDPROC(_start_dma_code)
464#endif /* CONFIG_BFIN_KERNEL_CLOCK */ 143#endif /* CONFIG_BFIN_KERNEL_CLOCK */
diff --git a/arch/blackfin/mach-bf537/ints-priority.c b/arch/blackfin/mach-bf537/ints-priority.c
index a8b915f202ec..b1300b3f1812 100644
--- a/arch/blackfin/mach-bf537/ints-priority.c
+++ b/arch/blackfin/mach-bf537/ints-priority.c
@@ -31,7 +31,7 @@
31#include <linux/irq.h> 31#include <linux/irq.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33 33
34void program_IAR(void) 34void __init program_IAR(void)
35{ 35{
36 /* Program the IAR0 Register with the configured priority */ 36 /* Program the IAR0 Register with the configured priority */
37 bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) | 37 bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) |
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index 4f4ae8787edf..58abbed0a225 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -319,12 +319,12 @@ static struct platform_device bfin_atapi_device = {
319#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 319#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
320static struct mtd_partition partition_info[] = { 320static struct mtd_partition partition_info[] = {
321 { 321 {
322 .name = "Linux Kernel", 322 .name = "linux kernel(nand)",
323 .offset = 0, 323 .offset = 0,
324 .size = 4 * SIZE_1M, 324 .size = 4 * SIZE_1M,
325 }, 325 },
326 { 326 {
327 .name = "File System", 327 .name = "file system(nand)",
328 .offset = 4 * SIZE_1M, 328 .offset = 4 * SIZE_1M,
329 .size = (256 - 4) * SIZE_1M, 329 .size = (256 - 4) * SIZE_1M,
330 }, 330 },
@@ -377,12 +377,12 @@ static struct platform_device bf54x_sdh_device = {
377/* SPI flash chip (m25p16) */ 377/* SPI flash chip (m25p16) */
378static struct mtd_partition bfin_spi_flash_partitions[] = { 378static struct mtd_partition bfin_spi_flash_partitions[] = {
379 { 379 {
380 .name = "bootloader", 380 .name = "bootloader(spi)",
381 .size = 0x00040000, 381 .size = 0x00040000,
382 .offset = 0, 382 .offset = 0,
383 .mask_flags = MTD_CAP_ROM 383 .mask_flags = MTD_CAP_ROM
384 }, { 384 }, {
385 .name = "linux kernel", 385 .name = "linux kernel(spi)",
386 .size = 0x1c0000, 386 .size = 0x1c0000,
387 .offset = 0x40000 387 .offset = 0x40000
388 } 388 }
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 166fa2201ee7..0d6333ada1d9 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -365,12 +365,12 @@ static struct platform_device bfin_atapi_device = {
365#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 365#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
366static struct mtd_partition partition_info[] = { 366static struct mtd_partition partition_info[] = {
367 { 367 {
368 .name = "Linux Kernel", 368 .name = "linux kernel(nand)",
369 .offset = 0, 369 .offset = 0,
370 .size = 4 * SIZE_1M, 370 .size = 4 * SIZE_1M,
371 }, 371 },
372 { 372 {
373 .name = "File System", 373 .name = "file system(nand)",
374 .offset = MTDPART_OFS_APPEND, 374 .offset = MTDPART_OFS_APPEND,
375 .size = MTDPART_SIZ_FULL, 375 .size = MTDPART_SIZ_FULL,
376 }, 376 },
@@ -419,15 +419,15 @@ static struct platform_device bf54x_sdh_device = {
419#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 419#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
420static struct mtd_partition ezkit_partitions[] = { 420static struct mtd_partition ezkit_partitions[] = {
421 { 421 {
422 .name = "Bootloader", 422 .name = "bootloader(nor)",
423 .size = 0x40000, 423 .size = 0x40000,
424 .offset = 0, 424 .offset = 0,
425 }, { 425 }, {
426 .name = "Kernel", 426 .name = "linux kernel(nor)",
427 .size = 0x1C0000, 427 .size = 0x1C0000,
428 .offset = MTDPART_OFS_APPEND, 428 .offset = MTDPART_OFS_APPEND,
429 }, { 429 }, {
430 .name = "RootFS", 430 .name = "file system(nor)",
431 .size = MTDPART_SIZ_FULL, 431 .size = MTDPART_SIZ_FULL,
432 .offset = MTDPART_OFS_APPEND, 432 .offset = MTDPART_OFS_APPEND,
433 } 433 }
@@ -461,12 +461,12 @@ static struct platform_device ezkit_flash_device = {
461/* SPI flash chip (m25p16) */ 461/* SPI flash chip (m25p16) */
462static struct mtd_partition bfin_spi_flash_partitions[] = { 462static struct mtd_partition bfin_spi_flash_partitions[] = {
463 { 463 {
464 .name = "bootloader", 464 .name = "bootloader(spi)",
465 .size = 0x00040000, 465 .size = 0x00040000,
466 .offset = 0, 466 .offset = 0,
467 .mask_flags = MTD_CAP_ROM 467 .mask_flags = MTD_CAP_ROM
468 }, { 468 }, {
469 .name = "linux kernel", 469 .name = "linux kernel(spi)",
470 .size = MTDPART_SIZ_FULL, 470 .size = MTDPART_SIZ_FULL,
471 .offset = MTDPART_OFS_APPEND, 471 .offset = MTDPART_OFS_APPEND,
472 } 472 }
diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S
index 06b9178cfcfe..e3000f70a26e 100644
--- a/arch/blackfin/mach-bf548/head.S
+++ b/arch/blackfin/mach-bf548/head.S
@@ -30,263 +30,11 @@
30#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33#include <asm/trace.h>
34#ifdef CONFIG_BFIN_KERNEL_CLOCK 33#ifdef CONFIG_BFIN_KERNEL_CLOCK
35#include <asm/mach-common/clocks.h> 34#include <asm/mach-common/clocks.h>
36#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
37#endif 36#endif
38 37
39.extern ___bss_stop
40.extern ___bss_start
41.extern _bf53x_relocate_l1_mem
42
43#define INITIAL_STACK 0xFFB01000
44
45__INIT
46
47ENTRY(__start)
48 /* R0: argument of command line string, passed from uboot, save it */
49 R7 = R0;
50 /* Enable Cycle Counter and Nesting Of Interrupts */
51#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
52 R0 = SYSCFG_SNEN;
53#else
54 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
55#endif
56 SYSCFG = R0;
57 R0 = 0;
58
59 /* Clear Out All the data and pointer Registers*/
60 R1 = R0;
61 R2 = R0;
62 R3 = R0;
63 R4 = R0;
64 R5 = R0;
65 R6 = R0;
66
67 P0 = R0;
68 P1 = R0;
69 P2 = R0;
70 P3 = R0;
71 P4 = R0;
72 P5 = R0;
73
74 LC0 = r0;
75 LC1 = r0;
76 L0 = r0;
77 L1 = r0;
78 L2 = r0;
79 L3 = r0;
80
81 /* Clear Out All the DAG Registers*/
82 B0 = r0;
83 B1 = r0;
84 B2 = r0;
85 B3 = r0;
86
87 I0 = r0;
88 I1 = r0;
89 I2 = r0;
90 I3 = r0;
91
92 M0 = r0;
93 M1 = r0;
94 M2 = r0;
95 M3 = r0;
96
97 trace_buffer_init(p0,r0);
98 P0 = R1;
99 R0 = R1;
100
101 /* Turn off the icache */
102 p0.l = LO(IMEM_CONTROL);
103 p0.h = HI(IMEM_CONTROL);
104 R1 = [p0];
105 R0 = ~ENICPLB;
106 R0 = R0 & R1;
107 [p0] = R0;
108 SSYNC;
109
110 /* Turn off the dcache */
111 p0.l = LO(DMEM_CONTROL);
112 p0.h = HI(DMEM_CONTROL);
113 R1 = [p0];
114 R0 = ~ENDCPLB;
115 R0 = R0 & R1;
116 [p0] = R0;
117 SSYNC;
118
119 /* Initialize stack pointer */
120 SP.L = LO(INITIAL_STACK);
121 SP.H = HI(INITIAL_STACK);
122 FP = SP;
123 USP = SP;
124
125#ifdef CONFIG_EARLY_PRINTK
126 SP += -12;
127 call _init_early_exception_vectors;
128 SP += 12;
129#endif
130
131 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
132 call _bf53x_relocate_l1_mem;
133#ifdef CONFIG_BFIN_KERNEL_CLOCK
134 call _start_dma_code;
135#endif
136 /* Code for initializing Async memory banks */
137
138 p2.h = hi(EBIU_AMBCTL1);
139 p2.l = lo(EBIU_AMBCTL1);
140 r0.h = hi(AMBCTL1VAL);
141 r0.l = lo(AMBCTL1VAL);
142 [p2] = r0;
143 ssync;
144
145 p2.h = hi(EBIU_AMBCTL0);
146 p2.l = lo(EBIU_AMBCTL0);
147 r0.h = hi(AMBCTL0VAL);
148 r0.l = lo(AMBCTL0VAL);
149 [p2] = r0;
150 ssync;
151
152 p2.h = hi(EBIU_AMGCTL);
153 p2.l = lo(EBIU_AMGCTL);
154 r0 = AMGCTLVAL;
155 w[p2] = r0;
156 ssync;
157
158 p2.h = hi(EBIU_MBSCTL);
159 p2.l = lo(EBIU_MBSCTL);
160 r0.h = hi(CONFIG_EBIU_MBSCTLVAL);
161 r0.l = lo(CONFIG_EBIU_MBSCTLVAL);
162 [p2] = r0;
163 ssync;
164
165 p2.h = hi(EBIU_MODE);
166 p2.l = lo(EBIU_MODE);
167 r0.h = hi(CONFIG_EBIU_MODEVAL);
168 r0.l = lo(CONFIG_EBIU_MODEVAL);
169 [p2] = r0;
170 ssync;
171
172 p2.h = hi(EBIU_FCTL);
173 p2.l = lo(EBIU_FCTL);
174 r0.h = hi(CONFIG_EBIU_FCTLVAL);
175 r0.l = lo(CONFIG_EBIU_FCTLVAL);
176 [p2] = r0;
177 ssync;
178
179 /* This section keeps the processor in supervisor mode
180 * during kernel boot. Switches to user mode at end of boot.
181 * See page 3-9 of Hardware Reference manual for documentation.
182 */
183
184 /* EVT15 = _real_start */
185
186 p0.l = lo(EVT15);
187 p0.h = hi(EVT15);
188 p1.l = _real_start;
189 p1.h = _real_start;
190 [p0] = p1;
191 csync;
192
193 p0.l = lo(IMASK);
194 p0.h = hi(IMASK);
195 p1.l = IMASK_IVG15;
196 p1.h = 0x0;
197 [p0] = p1;
198 csync;
199
200 raise 15;
201 p0.l = .LWAIT_HERE;
202 p0.h = .LWAIT_HERE;
203 reti = p0;
204#if ANOMALY_05000281
205 nop;
206 nop;
207 nop;
208#endif
209 rti;
210
211.LWAIT_HERE:
212 jump .LWAIT_HERE;
213ENDPROC(__start)
214
215ENTRY(_real_start)
216 [ -- sp ] = reti;
217 p0.l = lo(WDOG_CTL);
218 p0.h = hi(WDOG_CTL);
219 r0 = 0xAD6(z);
220 w[p0] = r0; /* watchdog off for now */
221 ssync;
222
223 /* Code update for BSS size == 0
224 * Zero out the bss region.
225 */
226
227 p1.l = ___bss_start;
228 p1.h = ___bss_start;
229 p2.l = ___bss_stop;
230 p2.h = ___bss_stop;
231 r0 = 0;
232 p2 -= p1;
233 lsetup (.L_clear_bss, .L_clear_bss ) lc0 = p2;
234.L_clear_bss:
235 B[p1++] = r0;
236
237 /* In case there is a NULL pointer reference
238 * Zero out region before stext
239 */
240
241 p1.l = 0x0;
242 p1.h = 0x0;
243 r0.l = __stext;
244 r0.h = __stext;
245 r0 = r0 >> 1;
246 p2 = r0;
247 r0 = 0;
248 lsetup (.L_clear_zero, .L_clear_zero ) lc0 = p2;
249.L_clear_zero:
250 W[p1++] = r0;
251
252 /* pass the uboot arguments to the global value command line */
253 R0 = R7;
254 call _cmdline_init;
255
256 p1.l = __rambase;
257 p1.h = __rambase;
258 r0.l = __sdata;
259 r0.h = __sdata;
260 [p1] = r0;
261
262 p1.l = __ramstart;
263 p1.h = __ramstart;
264 p3.l = ___bss_stop;
265 p3.h = ___bss_stop;
266
267 r1 = p3;
268 [p1] = r1;
269
270
271 /*
272 * load the current thread pointer and stack
273 */
274 r1.l = _init_thread_union;
275 r1.h = _init_thread_union;
276
277 r2.l = 0x2000;
278 r2.h = 0x0000;
279 r1 = r1 + r2;
280 sp = r1;
281 usp = sp;
282 fp = sp;
283 call _start_kernel;
284.L_exit:
285 jump.s .L_exit;
286ENDPROC(_real_start)
287
288__FINIT
289
290.section .l1.text 38.section .l1.text
291#ifdef CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
292ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
@@ -443,13 +191,6 @@ ENTRY(_start_dma_code)
443 SSYNC; 191 SSYNC;
444#endif 192#endif
445 193
446 p0.h = hi(SIC_IWR0);
447 p0.l = lo(SIC_IWR0);
448 r0.l = lo(IWR_ENABLE_ALL);
449 r0.h = hi(IWR_ENABLE_ALL);
450 [p0] = r0;
451 SSYNC;
452
453 RTS; 194 RTS;
454ENDPROC(_start_dma_code) 195ENDPROC(_start_dma_code)
455#endif /* CONFIG_BFIN_KERNEL_CLOCK */ 196#endif /* CONFIG_BFIN_KERNEL_CLOCK */
diff --git a/arch/blackfin/mach-bf548/ints-priority.c b/arch/blackfin/mach-bf548/ints-priority.c
index 2665653cee37..9dd0fa3ac4de 100644
--- a/arch/blackfin/mach-bf548/ints-priority.c
+++ b/arch/blackfin/mach-bf548/ints-priority.c
@@ -31,7 +31,7 @@
31#include <linux/irq.h> 31#include <linux/irq.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33 33
34void program_IAR(void) 34void __init program_IAR(void)
35{ 35{
36 /* Program the IAR0 Register with the configured priority */ 36 /* Program the IAR0 Register with the configured priority */
37 bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) | 37 bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) |
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 466ef5929a25..8f40990eea2f 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -54,16 +54,16 @@ const char bfin_board_name[] = "Bluetechnix CM BF561";
54#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 54#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
55static struct mtd_partition bfin_spi_flash_partitions[] = { 55static struct mtd_partition bfin_spi_flash_partitions[] = {
56 { 56 {
57 .name = "bootloader", 57 .name = "bootloader(spi)",
58 .size = 0x00020000, 58 .size = 0x00020000,
59 .offset = 0, 59 .offset = 0,
60 .mask_flags = MTD_CAP_ROM 60 .mask_flags = MTD_CAP_ROM
61 }, { 61 }, {
62 .name = "kernel", 62 .name = "linux kernel(spi)",
63 .size = 0xe0000, 63 .size = 0xe0000,
64 .offset = 0x20000 64 .offset = 0x20000
65 }, { 65 }, {
66 .name = "file system", 66 .name = "file system(spi)",
67 .size = 0x700000, 67 .size = 0x700000,
68 .offset = 0x00100000, 68 .offset = 0x00100000,
69 } 69 }
@@ -306,7 +306,7 @@ static struct platform_device bfin_sir_device = {
306#endif 306#endif
307 307
308#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 308#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
309#define PATA_INT 119 309#define PATA_INT IRQ_PF46
310 310
311static struct pata_platform_info bfin_pata_platform_data = { 311static struct pata_platform_info bfin_pata_platform_data = {
312 .ioport_shift = 2, 312 .ioport_shift = 2,
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index bc6feded8569..50b4cdceccfe 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -35,7 +35,6 @@
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/irq.h> 36#include <linux/irq.h>
37#include <linux/interrupt.h> 37#include <linux/interrupt.h>
38#include <linux/ata_platform.h>
39#include <asm/dma.h> 38#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 39#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 40#include <asm/portmux.h>
@@ -243,15 +242,15 @@ static struct platform_device bfin_sir_device = {
243#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 242#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
244static struct mtd_partition ezkit_partitions[] = { 243static struct mtd_partition ezkit_partitions[] = {
245 { 244 {
246 .name = "Bootloader", 245 .name = "bootloader(nor)",
247 .size = 0x40000, 246 .size = 0x40000,
248 .offset = 0, 247 .offset = 0,
249 }, { 248 }, {
250 .name = "Kernel", 249 .name = "linux kernel(nor)",
251 .size = 0x1C0000, 250 .size = 0x1C0000,
252 .offset = MTDPART_OFS_APPEND, 251 .offset = MTDPART_OFS_APPEND,
253 }, { 252 }, {
254 .name = "RootFS", 253 .name = "file system(nor)",
255 .size = MTDPART_SIZ_FULL, 254 .size = MTDPART_SIZ_FULL,
256 .offset = MTDPART_OFS_APPEND, 255 .offset = MTDPART_OFS_APPEND,
257 } 256 }
@@ -350,43 +349,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
350#endif 349#endif
351}; 350};
352 351
353#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
354#define PATA_INT 55
355
356static struct pata_platform_info bfin_pata_platform_data = {
357 .ioport_shift = 1,
358 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
359};
360
361static struct resource bfin_pata_resources[] = {
362 {
363 .start = 0x20314020,
364 .end = 0x2031403F,
365 .flags = IORESOURCE_MEM,
366 },
367 {
368 .start = 0x2031401C,
369 .end = 0x2031401F,
370 .flags = IORESOURCE_MEM,
371 },
372 {
373 .start = PATA_INT,
374 .end = PATA_INT,
375 .flags = IORESOURCE_IRQ,
376 },
377};
378
379static struct platform_device bfin_pata_device = {
380 .name = "pata_platform",
381 .id = -1,
382 .num_resources = ARRAY_SIZE(bfin_pata_resources),
383 .resource = bfin_pata_resources,
384 .dev = {
385 .platform_data = &bfin_pata_platform_data,
386 }
387};
388#endif
389
390#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 352#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
391#include <linux/input.h> 353#include <linux/input.h>
392#include <linux/gpio_keys.h> 354#include <linux/gpio_keys.h>
@@ -499,10 +461,6 @@ static struct platform_device *ezkit_devices[] __initdata = {
499 &bfin_sir_device, 461 &bfin_sir_device,
500#endif 462#endif
501 463
502#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
503 &bfin_pata_device,
504#endif
505
506#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 464#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
507 &bfin_device_gpiokeys, 465 &bfin_device_gpiokeys,
508#endif 466#endif
@@ -538,10 +496,6 @@ static int __init ezkit_init(void)
538#endif 496#endif
539 497
540 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 498 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
541
542#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
543 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
544#endif
545 return 0; 499 return 0;
546} 500}
547 501
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index cf1a2dff01e7..c7a81e34703d 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -30,284 +30,13 @@
30#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33#include <asm/trace.h> 33#ifdef CONFIG_BFIN_KERNEL_CLOCK
34
35#if CONFIG_BFIN_KERNEL_CLOCK
36#include <asm/mach-common/clocks.h> 34#include <asm/mach-common/clocks.h>
37#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
38#endif 36#endif
39 37
40.extern ___bss_stop
41.extern ___bss_start
42.extern _bf53x_relocate_l1_mem
43
44#define INITIAL_STACK 0xFFB01000
45
46__INIT
47
48ENTRY(__start)
49 /* R0: argument of command line string, passed from uboot, save it */
50 R7 = R0;
51 /* Enable Cycle Counter and Nesting Of Interrupts */
52#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
53 R0 = SYSCFG_SNEN;
54#else
55 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
56#endif
57 SYSCFG = R0;
58 R0 = 0;
59
60 /* Clear Out All the data and pointer Registers */
61 R1 = R0;
62 R2 = R0;
63 R3 = R0;
64 R4 = R0;
65 R5 = R0;
66 R6 = R0;
67
68 P0 = R0;
69 P1 = R0;
70 P2 = R0;
71 P3 = R0;
72 P4 = R0;
73 P5 = R0;
74
75 LC0 = r0;
76 LC1 = r0;
77 L0 = r0;
78 L1 = r0;
79 L2 = r0;
80 L3 = r0;
81
82 /* Clear Out All the DAG Registers */
83 B0 = r0;
84 B1 = r0;
85 B2 = r0;
86 B3 = r0;
87
88 I0 = r0;
89 I1 = r0;
90 I2 = r0;
91 I3 = r0;
92
93 M0 = r0;
94 M1 = r0;
95 M2 = r0;
96 M3 = r0;
97
98 trace_buffer_init(p0,r0);
99 P0 = R1;
100 R0 = R1;
101
102 /* Turn off the icache */
103 p0.l = LO(IMEM_CONTROL);
104 p0.h = HI(IMEM_CONTROL);
105 R1 = [p0];
106 R0 = ~ENICPLB;
107 R0 = R0 & R1;
108
109#if ANOMALY_05000125
110 CLI R2;
111 SSYNC;
112#endif
113 [p0] = R0;
114 SSYNC;
115#if ANOMALY_05000125
116 STI R2;
117#endif
118
119 /* Turn off the dcache */
120 p0.l = LO(DMEM_CONTROL);
121 p0.h = HI(DMEM_CONTROL);
122 R1 = [p0];
123 R0 = ~ENDCPLB;
124 R0 = R0 & R1;
125
126 /* Anomaly 05000125 */
127#if ANOMALY_05000125
128 CLI R2;
129 SSYNC;
130#endif
131 [p0] = R0;
132 SSYNC;
133#if ANOMALY_05000125
134 STI R2;
135#endif
136
137 /* Initialise UART - when booting from u-boot, the UART is not disabled
138 * so if we dont initalize here, our serial console gets hosed */
139 p0.h = hi(BFIN_UART_LCR);
140 p0.l = lo(BFIN_UART_LCR);
141 r0 = 0x0(Z);
142 w[p0] = r0.L; /* To enable DLL writes */
143 ssync;
144
145 p0.h = hi(BFIN_UART_DLL);
146 p0.l = lo(BFIN_UART_DLL);
147 r0 = 0x0(Z);
148 w[p0] = r0.L;
149 ssync;
150
151 p0.h = hi(BFIN_UART_DLH);
152 p0.l = lo(BFIN_UART_DLH);
153 r0 = 0x00(Z);
154 w[p0] = r0.L;
155 ssync;
156
157 p0.h = hi(BFIN_UART_GCTL);
158 p0.l = lo(BFIN_UART_GCTL);
159 r0 = 0x0(Z);
160 w[p0] = r0.L; /* To enable UART clock */
161 ssync;
162
163 /* Initialize stack pointer */
164 sp.l = lo(INITIAL_STACK);
165 sp.h = hi(INITIAL_STACK);
166 fp = sp;
167 usp = sp;
168
169#ifdef CONFIG_EARLY_PRINTK
170 SP += -12;
171 call _init_early_exception_vectors;
172 SP += 12;
173#endif
174
175 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
176 call _bf53x_relocate_l1_mem;
177#if CONFIG_BFIN_KERNEL_CLOCK
178 call _start_dma_code;
179#endif
180
181 /* Code for initializing Async memory banks */
182
183 p2.h = hi(EBIU_AMBCTL1);
184 p2.l = lo(EBIU_AMBCTL1);
185 r0.h = hi(AMBCTL1VAL);
186 r0.l = lo(AMBCTL1VAL);
187 [p2] = r0;
188 ssync;
189
190 p2.h = hi(EBIU_AMBCTL0);
191 p2.l = lo(EBIU_AMBCTL0);
192 r0.h = hi(AMBCTL0VAL);
193 r0.l = lo(AMBCTL0VAL);
194 [p2] = r0;
195 ssync;
196
197 p2.h = hi(EBIU_AMGCTL);
198 p2.l = lo(EBIU_AMGCTL);
199 r0 = AMGCTLVAL;
200 w[p2] = r0;
201 ssync;
202
203 /* This section keeps the processor in supervisor mode
204 * during kernel boot. Switches to user mode at end of boot.
205 * See page 3-9 of Hardware Reference manual for documentation.
206 */
207
208 /* EVT15 = _real_start */
209
210 p0.l = lo(EVT15);
211 p0.h = hi(EVT15);
212 p1.l = _real_start;
213 p1.h = _real_start;
214 [p0] = p1;
215 csync;
216
217 p0.l = lo(IMASK);
218 p0.h = hi(IMASK);
219 p1.l = IMASK_IVG15;
220 p1.h = 0x0;
221 [p0] = p1;
222 csync;
223
224 raise 15;
225 p0.l = .LWAIT_HERE;
226 p0.h = .LWAIT_HERE;
227 reti = p0;
228#if ANOMALY_05000281
229 nop; nop; nop;
230#endif
231 rti;
232
233.LWAIT_HERE:
234 jump .LWAIT_HERE;
235ENDPROC(__start)
236
237ENTRY(_real_start)
238 [ -- sp ] = reti;
239 p0.l = lo(WDOGA_CTL);
240 p0.h = hi(WDOGA_CTL);
241 r0 = 0xAD6(z);
242 w[p0] = r0; /* watchdog off for now */
243 ssync;
244
245 /* Code update for BSS size == 0
246 * Zero out the bss region.
247 */
248
249 p1.l = ___bss_start;
250 p1.h = ___bss_start;
251 p2.l = ___bss_stop;
252 p2.h = ___bss_stop;
253 r0 = 0;
254 p2 -= p1;
255 lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
256.L_clear_bss:
257 B[p1++] = r0;
258
259 /* In case there is a NULL pointer reference
260 * Zero out region before stext
261 */
262
263 p1.l = 0x0;
264 p1.h = 0x0;
265 r0.l = __stext;
266 r0.h = __stext;
267 r0 = r0 >> 1;
268 p2 = r0;
269 r0 = 0;
270 lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
271.L_clear_zero:
272 W[p1++] = r0;
273
274 /* pass the uboot arguments to the global value command line */
275 R0 = R7;
276 call _cmdline_init;
277
278 p1.l = __rambase;
279 p1.h = __rambase;
280 r0.l = __sdata;
281 r0.h = __sdata;
282 [p1] = r0;
283
284 p1.l = __ramstart;
285 p1.h = __ramstart;
286 p3.l = ___bss_stop;
287 p3.h = ___bss_stop;
288
289 r1 = p3;
290 [p1] = r1;
291
292 /*
293 * load the current thread pointer and stack
294 */
295 r1.l = _init_thread_union;
296 r1.h = _init_thread_union;
297
298 r2.l = 0x2000;
299 r2.h = 0x0000;
300 r1 = r1 + r2;
301 sp = r1;
302 usp = sp;
303 fp = sp;
304 jump.l _start_kernel;
305ENDPROC(_real_start)
306
307__FINIT
308
309.section .l1.text 38.section .l1.text
310#if CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
311ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
312 p0.h = hi(SICA_IWR0); 41 p0.h = hi(SICA_IWR0);
313 p0.l = lo(SICA_IWR0); 42 p0.l = lo(SICA_IWR0);
diff --git a/arch/blackfin/mach-bf561/ints-priority.c b/arch/blackfin/mach-bf561/ints-priority.c
index 09b541b0f7c2..9d2f23344720 100644
--- a/arch/blackfin/mach-bf561/ints-priority.c
+++ b/arch/blackfin/mach-bf561/ints-priority.c
@@ -31,7 +31,7 @@
31#include <linux/irq.h> 31#include <linux/irq.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33 33
34void program_IAR(void) 34void __init program_IAR(void)
35{ 35{
36 /* Program the IAR0 Register with the configured priority */ 36 /* Program the IAR0 Register with the configured priority */
37 bfin_write_SICA_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) | 37 bfin_write_SICA_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) |
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index 422bfee34adc..e6ed57c56d4b 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -3,9 +3,10 @@
3# 3#
4 4
5obj-y := \ 5obj-y := \
6 cache.o cacheinit.o entry.o \ 6 cache.o entry.o head.o \
7 interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o 7 interrupt.o irqpanic.o arch_checks.o ints-priority.o
8 8
9obj-$(CONFIG_BFIN_ICACHE_LOCK) += lock.o
9obj-$(CONFIG_PM) += pm.o dpmc_modes.o 10obj-$(CONFIG_PM) += pm.o dpmc_modes.o
10obj-$(CONFIG_CPU_FREQ) += cpufreq.o 11obj-$(CONFIG_CPU_FREQ) += cpufreq.o
11obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o 12obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c
index f9160d83b91f..5986758b2752 100644
--- a/arch/blackfin/mach-common/arch_checks.c
+++ b/arch/blackfin/mach-common/arch_checks.c
@@ -27,6 +27,7 @@
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 28 */
29 29
30#include <asm/fixed_code.h>
30#include <asm/mach/anomaly.h> 31#include <asm/mach/anomaly.h>
31#include <asm/mach-common/clocks.h> 32#include <asm/mach-common/clocks.h>
32 33
@@ -53,3 +54,11 @@
53# endif 54# endif
54 55
55#endif /* CONFIG_BFIN_KERNEL_CLOCK */ 56#endif /* CONFIG_BFIN_KERNEL_CLOCK */
57
58#if CONFIG_BOOT_LOAD < FIXED_CODE_END
59# error "The kernel load address must be after the fixed code section"
60#endif
61
62#if (CONFIG_BOOT_LOAD & 0x3)
63# error "The kernel load address must be 4 byte aligned"
64#endif
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index 0521b1588204..85f8c79b3c37 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -34,81 +34,6 @@
34#include <asm/cache.h> 34#include <asm/cache.h>
35 35
36.text 36.text
37.align 2
38ENTRY(_cache_invalidate)
39
40 /*
41 * Icache or DcacheA or DcacheB Invalidation
42 * or any combination thereof
43 * R0 has bits
44 * CPLB_ENABLE_ICACHE_P,CPLB_ENABLE_DCACHE_P,CPLB_ENABLE_DCACHE2_P
45 * set as required
46 */
47 [--SP] = R7;
48
49 R7 = R0;
50 CC = BITTST(R7,CPLB_ENABLE_ICACHE_P);
51 IF !CC JUMP .Lno_icache;
52 [--SP] = RETS;
53 CALL _icache_invalidate;
54 RETS = [SP++];
55.Lno_icache:
56 CC = BITTST(R7,CPLB_ENABLE_DCACHE_P);
57 IF !CC JUMP .Lno_dcache_a;
58 R0 = 0; /* specifies bank A */
59 [--SP] = RETS;
60 CALL _dcache_invalidate;
61 RETS = [SP++];
62.Lno_dcache_a:
63 CC = BITTST(R7,CPLB_ENABLE_DCACHE2_P);
64 IF !CC JUMP .Lno_dcache_b;
65 R0 = 0;
66 BITSET(R0, 23); /* specifies bank B */
67 [--SP] = RETS;
68 CALL _dcache_invalidate;
69 RETS = [SP++];
70.Lno_dcache_b:
71 R7 = [SP++];
72 RTS;
73ENDPROC(_cache_invalidate)
74
75/* Invalidate the Entire Instruction cache by
76 * disabling IMC bit
77 */
78ENTRY(_icache_invalidate)
79ENTRY(_invalidate_entire_icache)
80 [--SP] = ( R7:5);
81
82 P0.L = LO(IMEM_CONTROL);
83 P0.H = HI(IMEM_CONTROL);
84 R7 = [P0];
85
86 /* Clear the IMC bit , All valid bits in the instruction
87 * cache are set to the invalid state
88 */
89 BITCLR(R7,IMC_P);
90 CLI R6;
91 SSYNC; /* SSYNC required before invalidating cache. */
92 .align 8;
93 [P0] = R7;
94 SSYNC;
95 STI R6;
96
97 /* Configures the instruction cache agian */
98 R6 = (IMC | ENICPLB);
99 R7 = R7 | R6;
100
101 CLI R6;
102 SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
103 .align 8;
104 [P0] = R7;
105 SSYNC;
106 STI R6;
107
108 ( R7:5) = [SP++];
109 RTS;
110ENDPROC(_invalidate_entire_icache)
111ENDPROC(_icache_invalidate)
112 37
113/* 38/*
114 * blackfin_cache_flush_range(start, end) 39 * blackfin_cache_flush_range(start, end)
@@ -190,46 +115,6 @@ ENTRY(_blackfin_dcache_invalidate_range)
190 RTS; 115 RTS;
191ENDPROC(_blackfin_dcache_invalidate_range) 116ENDPROC(_blackfin_dcache_invalidate_range)
192 117
193/* Invalidate the Entire Data cache by
194 * clearing DMC[1:0] bits
195 */
196ENTRY(_invalidate_entire_dcache)
197ENTRY(_dcache_invalidate)
198 [--SP] = ( R7:6);
199
200 P0.L = LO(DMEM_CONTROL);
201 P0.H = HI(DMEM_CONTROL);
202 R7 = [P0];
203
204 /* Clear the DMC[1:0] bits, All valid bits in the data
205 * cache are set to the invalid state
206 */
207 BITCLR(R7,DMC0_P);
208 BITCLR(R7,DMC1_P);
209 CLI R6;
210 SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
211 .align 8;
212 [P0] = R7;
213 SSYNC;
214 STI R6;
215
216 /* Configures the data cache again */
217
218 R6 = DMEM_CNTR;
219 R7 = R7 | R6;
220
221 CLI R6;
222 SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
223 .align 8;
224 [P0] = R7;
225 SSYNC;
226 STI R6;
227
228 ( R7:6) = [SP++];
229 RTS;
230ENDPROC(_dcache_invalidate)
231ENDPROC(_invalidate_entire_dcache)
232
233ENTRY(_blackfin_dcache_flush_range) 118ENTRY(_blackfin_dcache_flush_range)
234 R2 = -L1_CACHE_BYTES; 119 R2 = -L1_CACHE_BYTES;
235 R2 = R0 & R2; 120 R2 = R0 & R2;
diff --git a/arch/blackfin/mach-common/cacheinit.S b/arch/blackfin/mach-common/cacheinit.S
deleted file mode 100644
index 22fada0c1cb3..000000000000
--- a/arch/blackfin/mach-common/cacheinit.S
+++ /dev/null
@@ -1,77 +0,0 @@
1/*
2 * File: arch/blackfin/mach-common/cacheinit.S
3 * Based on:
4 * Author: LG Soft India
5 *
6 * Created: ?
7 * Description: cache initialization
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30/* This function sets up the data and instruction cache. The
31 * tables like icplb table, dcplb table and Page Descriptor table
32 * are defined in cplbtab.h. You can configure those tables for
33 * your suitable requirements
34 */
35
36#include <linux/linkage.h>
37#include <asm/blackfin.h>
38
39.text
40
41#if ANOMALY_05000125
42#if defined(CONFIG_BFIN_ICACHE)
43ENTRY(_bfin_write_IMEM_CONTROL)
44
45 /* Enable Instruction Cache */
46 P0.l = LO(IMEM_CONTROL);
47 P0.h = HI(IMEM_CONTROL);
48
49 /* Anomaly 05000125 */
50 CLI R1;
51 SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
52 .align 8;
53 [P0] = R0;
54 SSYNC;
55 STI R1;
56 RTS;
57
58ENDPROC(_bfin_write_IMEM_CONTROL)
59#endif
60
61#if defined(CONFIG_BFIN_DCACHE)
62ENTRY(_bfin_write_DMEM_CONTROL)
63 P0.l = LO(DMEM_CONTROL);
64 P0.h = HI(DMEM_CONTROL);
65
66 CLI R1;
67 SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
68 .align 8;
69 [P0] = R0;
70 SSYNC;
71 STI R1;
72 RTS;
73
74ENDPROC(_bfin_write_DMEM_CONTROL)
75#endif
76
77#endif
diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S
index 5e3f1d8a4fb8..838b0b2ce9a5 100644
--- a/arch/blackfin/mach-common/dpmc_modes.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -78,62 +78,6 @@ ENTRY(_hibernate_mode)
78 jump .Lforever; 78 jump .Lforever;
79ENDPROC(_hibernate_mode) 79ENDPROC(_hibernate_mode)
80 80
81ENTRY(_deep_sleep)
82 [--SP] = ( R7:0, P5:0 );
83 [--SP] = RETS;
84
85 CLI R4;
86
87 R0 = IWR_ENABLE(0);
88 R1 = IWR_DISABLE_ALL;
89 R2 = IWR_DISABLE_ALL;
90
91 call _set_sic_iwr;
92
93 call _set_dram_srfs;
94
95 /* Clear all the interrupts,bits sticky */
96 R0 = 0xFFFF (Z);
97 call _set_rtc_istat
98
99 P0.H = hi(PLL_CTL);
100 P0.L = lo(PLL_CTL);
101 R0 = W[P0](z);
102 BITSET (R0, 5);
103 W[P0] = R0.L;
104
105 call _test_pll_locked;
106
107 SSYNC;
108 IDLE;
109
110 call _unset_dram_srfs;
111
112 call _test_pll_locked;
113
114 R0 = IWR_ENABLE(0);
115 R1 = IWR_DISABLE_ALL;
116 R2 = IWR_DISABLE_ALL;
117
118 call _set_sic_iwr;
119
120 P0.H = hi(PLL_CTL);
121 P0.L = lo(PLL_CTL);
122 R0 = w[p0](z);
123 BITCLR (R0, 3);
124 BITCLR (R0, 5);
125 BITCLR (R0, 8);
126 w[p0] = R0;
127 IDLE;
128 call _test_pll_locked;
129
130 STI R4;
131
132 RETS = [SP++];
133 ( R7:0, P5:0 ) = [SP++];
134 RTS;
135ENDPROC(_deep_sleep)
136
137ENTRY(_sleep_deeper) 81ENTRY(_sleep_deeper)
138 [--SP] = ( R7:0, P5:0 ); 82 [--SP] = ( R7:0, P5:0 );
139 [--SP] = RETS; 83 [--SP] = RETS;
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index eceb484d90f9..117c01c2c6b0 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -158,14 +158,16 @@ ENTRY(_ex_single_step)
158 cc = r7 == r6; 158 cc = r7 == r6;
159 if cc jump _bfin_return_from_exception; 159 if cc jump _bfin_return_from_exception;
160 160
161#ifdef CONFIG_KGDB
161 /* Don't do single step in hardware exception handler */ 162 /* Don't do single step in hardware exception handler */
162 p5.l = lo(IPEND); 163 p5.l = lo(IPEND);
163 p5.h = hi(IPEND); 164 p5.h = hi(IPEND);
164 r6 = [p5]; 165 r6 = [p5];
166 cc = bittst(r6, 4);
167 if cc jump _bfin_return_from_exception;
165 cc = bittst(r6, 5); 168 cc = bittst(r6, 5);
166 if cc jump _bfin_return_from_exception; 169 if cc jump _bfin_return_from_exception;
167 170
168#ifdef CONFIG_KGDB
169 /* skip single step if current interrupt priority is higher than 171 /* skip single step if current interrupt priority is higher than
170 * that of the first instruction, from which gdb starts single step */ 172 * that of the first instruction, from which gdb starts single step */
171 r6 >>= 6; 173 r6 >>= 6;
@@ -186,17 +188,27 @@ ENTRY(_ex_single_step)
186 if cc jump .Ldo_single_step; 188 if cc jump .Ldo_single_step;
187 r6 += -1; 189 r6 += -1;
188 cc = r6 < r7; 190 cc = r6 < r7;
189 if cc jump _bfin_return_from_exception; 191 if cc jump 1f;
190.Ldo_single_step: 192.Ldo_single_step:
191#endif 193#else
192
193 /* If we were in user mode, do the single step normally. */ 194 /* If we were in user mode, do the single step normally. */
195 p5.l = lo(IPEND);
196 p5.h = hi(IPEND);
194 r6 = [p5]; 197 r6 = [p5];
195 r7 = 0xffe0 (z); 198 r7 = 0xffe0 (z);
196 r7 = r7 & r6; 199 r7 = r7 & r6;
197 cc = r7 == 0; 200 cc = r7 == 0;
198 if cc jump 1f; 201 if !cc jump 1f;
202#endif
199 203
204 /* Single stepping only a single instruction, so clear the trace
205 * bit here. */
206 r7 = syscfg;
207 bitclr (r7, 0);
208 syscfg = R7;
209 jump _ex_trap_c;
210
2111:
200 /* 212 /*
201 * We were in an interrupt handler. By convention, all of them save 213 * We were in an interrupt handler. By convention, all of them save
202 * SYSCFG with their first instruction, so by checking whether our 214 * SYSCFG with their first instruction, so by checking whether our
@@ -224,15 +236,11 @@ ENTRY(_ex_single_step)
224 cc = R7 == R6; 236 cc = R7 == R6;
225 if !cc jump _bfin_return_from_exception; 237 if !cc jump _bfin_return_from_exception;
226 238
2271:
228 /* Single stepping only a single instruction, so clear the trace
229 * bit here. */
230 r7 = syscfg; 239 r7 = syscfg;
231 bitclr (r7, 0); 240 bitclr (r7, 0);
232 syscfg = R7; 241 syscfg = R7;
233 242
234 jump _ex_trap_c; 243 /* Fall through to _bfin_return_from_exception. */
235
236ENDPROC(_ex_single_step) 244ENDPROC(_ex_single_step)
237 245
238ENTRY(_bfin_return_from_exception) 246ENTRY(_bfin_return_from_exception)
@@ -1414,6 +1422,12 @@ ENTRY(_sys_call_table)
1414 .long _sys_semtimedop 1422 .long _sys_semtimedop
1415 .long _sys_timerfd_settime 1423 .long _sys_timerfd_settime
1416 .long _sys_timerfd_gettime 1424 .long _sys_timerfd_gettime
1425 .long _sys_signalfd4 /* 360 */
1426 .long _sys_eventfd2
1427 .long _sys_epoll_create1
1428 .long _sys_dup3
1429 .long _sys_pipe2
1430 .long _sys_inotify_init1 /* 365 */
1417 1431
1418 .rept NR_syscalls-(.-_sys_call_table)/4 1432 .rept NR_syscalls-(.-_sys_call_table)/4
1419 .long _sys_ni_syscall 1433 .long _sys_ni_syscall
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S
new file mode 100644
index 000000000000..191b4e974c4b
--- /dev/null
+++ b/arch/blackfin/mach-common/head.S
@@ -0,0 +1,207 @@
1/*
2 * Common Blackfin startup code
3 *
4 * Copyright 2004-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11#include <linux/linkage.h>
12#include <linux/init.h>
13#include <asm/blackfin.h>
14#include <asm/thread_info.h>
15#include <asm/trace.h>
16
17__INIT
18
19#define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
20
21ENTRY(__start)
22 /* R0: argument of command line string, passed from uboot, save it */
23 R7 = R0;
24 /* Enable Cycle Counter and Nesting Of Interrupts */
25#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
26 R0 = SYSCFG_SNEN;
27#else
28 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
29#endif
30 SYSCFG = R0;
31 R0 = 0;
32
33 /* Clear Out All the data and pointer Registers */
34 R1 = R0;
35 R2 = R0;
36 R3 = R0;
37 R4 = R0;
38 R5 = R0;
39 R6 = R0;
40
41 P0 = R0;
42 P1 = R0;
43 P2 = R0;
44 P3 = R0;
45 P4 = R0;
46 P5 = R0;
47
48 LC0 = r0;
49 LC1 = r0;
50 L0 = r0;
51 L1 = r0;
52 L2 = r0;
53 L3 = r0;
54
55 /* Clear Out All the DAG Registers */
56 B0 = r0;
57 B1 = r0;
58 B2 = r0;
59 B3 = r0;
60
61 I0 = r0;
62 I1 = r0;
63 I2 = r0;
64 I3 = r0;
65
66 M0 = r0;
67 M1 = r0;
68 M2 = r0;
69 M3 = r0;
70
71 trace_buffer_init(p0,r0);
72 P0 = R1;
73 R0 = R1;
74
75 /* Turn off the icache */
76 p0.l = LO(IMEM_CONTROL);
77 p0.h = HI(IMEM_CONTROL);
78 R1 = [p0];
79 R0 = ~ENICPLB;
80 R0 = R0 & R1;
81 [p0] = R0;
82 SSYNC;
83
84 /* Turn off the dcache */
85 p0.l = LO(DMEM_CONTROL);
86 p0.h = HI(DMEM_CONTROL);
87 R1 = [p0];
88 R0 = ~ENDCPLB;
89 R0 = R0 & R1;
90 [p0] = R0;
91 SSYNC;
92
93 /* Save RETX, in case of doublefault */
94 p0.l = ___retx;
95 p0.h = ___retx;
96 R0 = RETX;
97 [P0] = R0;
98
99 /* Initialize stack pointer */
100 sp.l = lo(INITIAL_STACK);
101 sp.h = hi(INITIAL_STACK);
102 fp = sp;
103 usp = sp;
104
105#ifdef CONFIG_EARLY_PRINTK
106 call _init_early_exception_vectors;
107#endif
108
109 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
110 call _bf53x_relocate_l1_mem;
111#ifdef CONFIG_BFIN_KERNEL_CLOCK
112 call _start_dma_code;
113#endif
114
115 /* This section keeps the processor in supervisor mode
116 * during kernel boot. Switches to user mode at end of boot.
117 * See page 3-9 of Hardware Reference manual for documentation.
118 */
119
120 /* EVT15 = _real_start */
121
122 p0.l = lo(EVT15);
123 p0.h = hi(EVT15);
124 p1.l = _real_start;
125 p1.h = _real_start;
126 [p0] = p1;
127 csync;
128
129 p0.l = lo(IMASK);
130 p0.h = hi(IMASK);
131 p1.l = IMASK_IVG15;
132 p1.h = 0x0;
133 [p0] = p1;
134 csync;
135
136 raise 15;
137 p0.l = .LWAIT_HERE;
138 p0.h = .LWAIT_HERE;
139 reti = p0;
140#if ANOMALY_05000281
141 nop; nop; nop;
142#endif
143 rti;
144
145.LWAIT_HERE:
146 jump .LWAIT_HERE;
147ENDPROC(__start)
148
149/* A little BF561 glue ... */
150#ifndef WDOG_CTL
151# define WDOG_CTL WDOGA_CTL
152#endif
153
154ENTRY(_real_start)
155 /* Enable nested interrupts */
156 [--sp] = reti;
157
158 /* watchdog off for now */
159 p0.l = lo(WDOG_CTL);
160 p0.h = hi(WDOG_CTL);
161 r0 = 0xAD6(z);
162 w[p0] = r0;
163 ssync;
164
165 /* Zero out the bss region
166 * Note: this will fail if bss is 0 bytes ...
167 */
168 r0 = 0 (z);
169 r1.l = ___bss_start;
170 r1.h = ___bss_start;
171 r2.l = ___bss_stop;
172 r2.h = ___bss_stop;
173 r2 = r2 - r1;
174 r2 >>= 2;
175 p1 = r1;
176 p2 = r2;
177 lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
178.L_clear_bss:
179 [p1++] = r0;
180
181 /* In case there is a NULL pointer reference,
182 * zero out region before stext
183 */
184 p1 = r0;
185 r2.l = __stext;
186 r2.h = __stext;
187 r2 >>= 2;
188 p2 = r2;
189 lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
190.L_clear_zero:
191 [p1++] = r0;
192
193 /* Pass the u-boot arguments to the global value command line */
194 R0 = R7;
195 call _cmdline_init;
196
197 /* Load the current thread pointer and stack */
198 sp.l = _init_thread_union;
199 sp.h = _init_thread_union;
200 p1 = THREAD_SIZE (z);
201 sp = sp + p1;
202 usp = sp;
203 fp = sp;
204 jump.l _start_kernel;
205ENDPROC(_real_start)
206
207__FINIT
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 64d746114e4b..62f8883a5c27 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -71,6 +71,7 @@ atomic_t num_spurious;
71 71
72#ifdef CONFIG_PM 72#ifdef CONFIG_PM
73unsigned long bfin_sic_iwr[3]; /* Up to 3 SIC_IWRx registers */ 73unsigned long bfin_sic_iwr[3]; /* Up to 3 SIC_IWRx registers */
74unsigned vr_wakeup;
74#endif 75#endif
75 76
76struct ivgx { 77struct ivgx {
@@ -184,17 +185,56 @@ static void bfin_internal_unmask_irq(unsigned int irq)
184#ifdef CONFIG_PM 185#ifdef CONFIG_PM
185int bfin_internal_set_wake(unsigned int irq, unsigned int state) 186int bfin_internal_set_wake(unsigned int irq, unsigned int state)
186{ 187{
187 unsigned bank, bit; 188 unsigned bank, bit, wakeup = 0;
188 unsigned long flags; 189 unsigned long flags;
189 bank = SIC_SYSIRQ(irq) / 32; 190 bank = SIC_SYSIRQ(irq) / 32;
190 bit = SIC_SYSIRQ(irq) % 32; 191 bit = SIC_SYSIRQ(irq) % 32;
191 192
193 switch (irq) {
194#ifdef IRQ_RTC
195 case IRQ_RTC:
196 wakeup |= WAKE;
197 break;
198#endif
199#ifdef IRQ_CAN0_RX
200 case IRQ_CAN0_RX:
201 wakeup |= CANWE;
202 break;
203#endif
204#ifdef IRQ_CAN1_RX
205 case IRQ_CAN1_RX:
206 wakeup |= CANWE;
207 break;
208#endif
209#ifdef IRQ_USB_INT0
210 case IRQ_USB_INT0:
211 wakeup |= USBWE;
212 break;
213#endif
214#ifdef IRQ_KEY
215 case IRQ_KEY:
216 wakeup |= KPADWE;
217 break;
218#endif
219#ifdef IRQ_CNT
220 case IRQ_CNT:
221 wakeup |= ROTWE;
222 break;
223#endif
224 default:
225 break;
226 }
227
192 local_irq_save(flags); 228 local_irq_save(flags);
193 229
194 if (state) 230 if (state) {
195 bfin_sic_iwr[bank] |= (1 << bit); 231 bfin_sic_iwr[bank] |= (1 << bit);
196 else 232 vr_wakeup |= wakeup;
233
234 } else {
197 bfin_sic_iwr[bank] &= ~(1 << bit); 235 bfin_sic_iwr[bank] &= ~(1 << bit);
236 vr_wakeup &= ~wakeup;
237 }
198 238
199 local_irq_restore(flags); 239 local_irq_restore(flags);
200 240
@@ -943,6 +983,11 @@ int __init init_arch_irq(void)
943 983
944 local_irq_disable(); 984 local_irq_disable();
945 985
986#if defined(CONFIG_BF527) || defined(CONFIG_BF536) || defined(CONFIG_BF537)
987 /* Clear EMAC Interrupt Status bits so we can demux it later */
988 bfin_write_EMAC_SYSTAT(-1);
989#endif
990
946#ifdef CONFIG_BF54x 991#ifdef CONFIG_BF54x
947# ifdef CONFIG_PINTx_REASSIGN 992# ifdef CONFIG_PINTx_REASSIGN
948 pint[0]->assign = CONFIG_PINT0_ASSIGN; 993 pint[0]->assign = CONFIG_PINT0_ASSIGN;
@@ -1028,13 +1073,22 @@ int __init init_arch_irq(void)
1028 IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; 1073 IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
1029 1074
1030#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) 1075#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
1031 bfin_write_SIC_IWR0(IWR_ENABLE_ALL); 1076 bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
1032 bfin_write_SIC_IWR1(IWR_ENABLE_ALL); 1077#if defined(CONFIG_BF52x)
1078 /* BF52x system reset does not properly reset SIC_IWR1 which
1079 * will screw up the bootrom as it relies on MDMA0/1 waking it
1080 * up from IDLE instructions. See this report for more info:
1081 * http://blackfin.uclinux.org/gf/tracker/4323
1082 */
1083 bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
1084#else
1085 bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
1086#endif
1033# ifdef CONFIG_BF54x 1087# ifdef CONFIG_BF54x
1034 bfin_write_SIC_IWR2(IWR_ENABLE_ALL); 1088 bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
1035# endif 1089# endif
1036#else 1090#else
1037 bfin_write_SIC_IWR(IWR_ENABLE_ALL); 1091 bfin_write_SIC_IWR(IWR_DISABLE_ALL);
1038#endif 1092#endif
1039 1093
1040 return 0; 1094 return 0;
diff --git a/arch/blackfin/mach-common/lock.S b/arch/blackfin/mach-common/lock.S
index 30b887e67dd6..9daf01201e9f 100644
--- a/arch/blackfin/mach-common/lock.S
+++ b/arch/blackfin/mach-common/lock.S
@@ -28,13 +28,10 @@
28 */ 28 */
29 29
30#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <asm/cplb.h>
32#include <asm/blackfin.h> 31#include <asm/blackfin.h>
33 32
34.text 33.text
35 34
36#ifdef CONFIG_BFIN_ICACHE_LOCK
37
38/* When you come here, it is assumed that 35/* When you come here, it is assumed that
39 * R0 - Which way to be locked 36 * R0 - Which way to be locked
40 */ 37 */
@@ -189,18 +186,38 @@ ENTRY(_cache_lock)
189 RTS; 186 RTS;
190ENDPROC(_cache_lock) 187ENDPROC(_cache_lock)
191 188
192#endif /* BFIN_ICACHE_LOCK */ 189/* Invalidate the Entire Instruction cache by
193 190 * disabling IMC bit
194/* Return the ILOC bits of IMEM_CONTROL
195 */ 191 */
192ENTRY(_invalidate_entire_icache)
193 [--SP] = ( R7:5);
196 194
197ENTRY(_read_iloc) 195 P0.L = LO(IMEM_CONTROL);
198 P1.H = HI(IMEM_CONTROL); 196 P0.H = HI(IMEM_CONTROL);
199 P1.L = LO(IMEM_CONTROL); 197 R7 = [P0];
200 R1 = 0xF; 198
201 R0 = [P1]; 199 /* Clear the IMC bit , All valid bits in the instruction
202 R0 = R0 >> 3; 200 * cache are set to the invalid state
203 R0 = R0 & R1; 201 */
202 BITCLR(R7,IMC_P);
203 CLI R6;
204 SSYNC; /* SSYNC required before invalidating cache. */
205 .align 8;
206 [P0] = R7;
207 SSYNC;
208 STI R6;
209
210 /* Configures the instruction cache agian */
211 R6 = (IMC | ENICPLB);
212 R7 = R7 | R6;
213
214 CLI R6;
215 SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
216 .align 8;
217 [P0] = R7;
218 SSYNC;
219 STI R6;
204 220
221 ( R7:5) = [SP++];
205 RTS; 222 RTS;
206ENDPROC(_read_iloc) 223ENDPROC(_invalidate_entire_icache)
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index 4fe6a2366b13..e28c6af1f415 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -83,13 +83,22 @@ void bfin_pm_suspend_standby_enter(void)
83 bfin_pm_standby_restore(); 83 bfin_pm_standby_restore();
84 84
85#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) 85#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
86 bfin_write_SIC_IWR0(IWR_ENABLE_ALL); 86 bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
87 bfin_write_SIC_IWR1(IWR_ENABLE_ALL); 87#if defined(CONFIG_BF52x)
88 /* BF52x system reset does not properly reset SIC_IWR1 which
89 * will screw up the bootrom as it relies on MDMA0/1 waking it
90 * up from IDLE instructions. See this report for more info:
91 * http://blackfin.uclinux.org/gf/tracker/4323
92 */
93 bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
94#else
95 bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
96#endif
88# ifdef CONFIG_BF54x 97# ifdef CONFIG_BF54x
89 bfin_write_SIC_IWR2(IWR_ENABLE_ALL); 98 bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
90# endif 99# endif
91#else 100#else
92 bfin_write_SIC_IWR(IWR_ENABLE_ALL); 101 bfin_write_SIC_IWR(IWR_DISABLE_ALL);
93#endif 102#endif
94 103
95 local_irq_restore(flags); 104 local_irq_restore(flags);
@@ -229,28 +238,12 @@ int bfin_pm_suspend_mem_enter(void)
229 wakeup = bfin_read_VR_CTL() & ~FREQ; 238 wakeup = bfin_read_VR_CTL() & ~FREQ;
230 wakeup |= SCKELOW; 239 wakeup |= SCKELOW;
231 240
232 /* FIXME: merge this somehow with set_irq_wake */
233#ifdef CONFIG_PM_BFIN_WAKE_RTC
234 wakeup |= WAKE;
235#endif
236#ifdef CONFIG_PM_BFIN_WAKE_PH6 241#ifdef CONFIG_PM_BFIN_WAKE_PH6
237 wakeup |= PHYWE; 242 wakeup |= PHYWE;
238#endif 243#endif
239#ifdef CONFIG_PM_BFIN_WAKE_CAN
240 wakeup |= CANWE;
241#endif
242#ifdef CONFIG_PM_BFIN_WAKE_GP 244#ifdef CONFIG_PM_BFIN_WAKE_GP
243 wakeup |= GPWE; 245 wakeup |= GPWE;
244#endif 246#endif
245#ifdef CONFIG_PM_BFIN_WAKE_USB
246 wakeup |= USBWE;
247#endif
248#ifdef CONFIG_PM_BFIN_WAKE_KEYPAD
249 wakeup |= KPADWE;
250#endif
251#ifdef CONFIG_PM_BFIN_WAKE_ROTARY
252 wakeup |= ROTWE;
253#endif
254 247
255 local_irq_save(flags); 248 local_irq_save(flags);
256 249
@@ -268,7 +261,7 @@ int bfin_pm_suspend_mem_enter(void)
268 icache_disable(); 261 icache_disable();
269 bf53x_suspend_l1_mem(memptr); 262 bf53x_suspend_l1_mem(memptr);
270 263
271 do_hibernate(wakeup); /* Goodbye */ 264 do_hibernate(wakeup | vr_wakeup); /* Goodbye */
272 265
273 bf53x_resume_l1_mem(memptr); 266 bf53x_resume_l1_mem(memptr);
274 267
diff --git a/arch/blackfin/mm/blackfin_sram.c b/arch/blackfin/mm/blackfin_sram.c
index 5af3c31c9365..9d2be43ac3da 100644
--- a/arch/blackfin/mm/blackfin_sram.c
+++ b/arch/blackfin/mm/blackfin_sram.c
@@ -66,7 +66,7 @@ static struct sram_piece free_l1_data_B_sram_head, used_l1_data_B_sram_head;
66static struct sram_piece free_l1_inst_sram_head, used_l1_inst_sram_head; 66static struct sram_piece free_l1_inst_sram_head, used_l1_inst_sram_head;
67#endif 67#endif
68 68
69#ifdef L2_LENGTH 69#if L2_LENGTH != 0
70static struct sram_piece free_l2_sram_head, used_l2_sram_head; 70static struct sram_piece free_l2_sram_head, used_l2_sram_head;
71#endif 71#endif
72 72
@@ -175,7 +175,7 @@ static void __init l1_inst_sram_init(void)
175 175
176static void __init l2_sram_init(void) 176static void __init l2_sram_init(void)
177{ 177{
178#ifdef L2_LENGTH 178#if L2_LENGTH != 0
179 free_l2_sram_head.next = 179 free_l2_sram_head.next =
180 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL); 180 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
181 if (!free_l2_sram_head.next) { 181 if (!free_l2_sram_head.next) {
@@ -367,7 +367,7 @@ int sram_free(const void *addr)
367 && addr < (void *)(L1_DATA_B_START + L1_DATA_B_LENGTH)) 367 && addr < (void *)(L1_DATA_B_START + L1_DATA_B_LENGTH))
368 return l1_data_B_sram_free(addr); 368 return l1_data_B_sram_free(addr);
369#endif 369#endif
370#ifdef L2_LENGTH 370#if L2_LENGTH != 0
371 else if (addr >= (void *)L2_START 371 else if (addr >= (void *)L2_START
372 && addr < (void *)(L2_START + L2_LENGTH)) 372 && addr < (void *)(L2_START + L2_LENGTH))
373 return l2_sram_free(addr); 373 return l2_sram_free(addr);
@@ -604,7 +604,7 @@ int l1sram_free(const void *addr)
604 604
605void *l2_sram_alloc(size_t size) 605void *l2_sram_alloc(size_t size)
606{ 606{
607#ifdef L2_LENGTH 607#if L2_LENGTH != 0
608 unsigned flags; 608 unsigned flags;
609 void *addr; 609 void *addr;
610 610
@@ -640,7 +640,7 @@ EXPORT_SYMBOL(l2_sram_zalloc);
640 640
641int l2_sram_free(const void *addr) 641int l2_sram_free(const void *addr)
642{ 642{
643#ifdef L2_LENGTH 643#if L2_LENGTH != 0
644 unsigned flags; 644 unsigned flags;
645 int ret; 645 int ret;
646 646
@@ -779,7 +779,7 @@ static int sram_proc_read(char *buf, char **start, off_t offset, int count,
779 &free_l1_inst_sram_head, &used_l1_inst_sram_head)) 779 &free_l1_inst_sram_head, &used_l1_inst_sram_head))
780 goto not_done; 780 goto not_done;
781#endif 781#endif
782#ifdef L2_LENGTH 782#if L2_LENGTH != 0
783 if (_sram_proc_read(buf, &len, count, "L2", 783 if (_sram_proc_read(buf, &len, count, "L2",
784 &free_l2_sram_head, &used_l2_sram_head)) 784 &free_l2_sram_head, &used_l2_sram_head))
785 goto not_done; 785 goto not_done;
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-30 11:07:19 -0500