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authorVince Weaver <vincent.weaver@maine.edu>2014-05-16 17:15:49 -0400
committerIngo Molnar <mingo@kernel.org>2014-06-05 06:30:00 -0400
commitedcb4d3c36a6429caa03ddfeab4cbb153c7002b2 (patch)
tree682b321f8473dfd53cb55382c20955a01e104c31 /arch
parent53b25335dd60981ad608da7890420898a34469a6 (diff)
perf/ARM: Use common PMU interrupt disabled code
Make the ARM perf code use the new common PMU interrupt disabled code. This allows perf to work on ARM machines without a working PMU interrupt (for example, raspberry pi). Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Vince Weaver <vincent.weaver@maine.edu> [peterz: applied changes suggested by Will] Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1405161712190.11099@vincent-weaver-1.umelst.maine.edu [ Small readability tweaks to the code. ] Signed-off-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/kernel/perf_event.c2
-rw-r--r--arch/arm/kernel/perf_event_cpu.c8
2 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index a6bc431cde70..4238bcba9d60 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -410,7 +410,7 @@ __hw_perf_event_init(struct perf_event *event)
410 */ 410 */
411 hwc->config_base |= (unsigned long)mapping; 411 hwc->config_base |= (unsigned long)mapping;
412 412
413 if (!hwc->sample_period) { 413 if (!is_sampling_event(event)) {
414 /* 414 /*
415 * For non-sampling runs, limit the sample_period to half 415 * For non-sampling runs, limit the sample_period to half
416 * of the counter width. That way, the new counter value 416 * of the counter width. That way, the new counter value
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index 51798d7854ac..bbdbffd06cf7 100644
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -126,8 +126,8 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
126 126
127 irqs = min(pmu_device->num_resources, num_possible_cpus()); 127 irqs = min(pmu_device->num_resources, num_possible_cpus());
128 if (irqs < 1) { 128 if (irqs < 1) {
129 pr_err("no irqs for PMUs defined\n"); 129 printk_once("perf/ARM: No irqs for PMU defined, sampling events not supported\n");
130 return -ENODEV; 130 return 0;
131 } 131 }
132 132
133 irq = platform_get_irq(pmu_device, 0); 133 irq = platform_get_irq(pmu_device, 0);
@@ -191,6 +191,10 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
191 /* Ensure the PMU has sane values out of reset. */ 191 /* Ensure the PMU has sane values out of reset. */
192 if (cpu_pmu->reset) 192 if (cpu_pmu->reset)
193 on_each_cpu(cpu_pmu->reset, cpu_pmu, 1); 193 on_each_cpu(cpu_pmu->reset, cpu_pmu, 1);
194
195 /* If no interrupts available, set the corresponding capability flag */
196 if (!platform_get_irq(cpu_pmu->plat_device, 0))
197 cpu_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
194} 198}
195 199
196/* 200/*