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authorKevin Hilman <khilman@deeprootsystems.com>2009-05-05 19:34:25 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-05-28 13:59:10 -0400
commitd3fd3290c4d9f0e40d06fa3a1a8cf164d8cde801 (patch)
treeda09074beebc8b4b43b4c72db5a918e246992e68 /arch
parentb1340d17d25f9a51acf003ba4742e77aefb32071 (diff)
OMAP3: PM: prevent module wakeups from waking IVA2
By default, prevent functional wakeups from inside a module from waking up the IVA2. Let DSP Bridge code handle this when loaded. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/pm34xx.c6
-rw-r--r--arch/arm/mach-omap2/prm.h2
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8b8a2dd49471..841d4c5ed8be 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -595,6 +595,12 @@ static void __init prcm_setup_regs(void)
595 prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN, 595 prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN,
596 OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); 596 OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
597 597
598 /* Don't attach IVA interrupts */
599 prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL);
600 prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1);
601 prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3);
602 prm_write_mod_reg(0, OMAP3430_PER_MOD, OMAP3430_PM_IVAGRPSEL);
603
598 /* Clear any pending 'reset' flags */ 604 /* Clear any pending 'reset' flags */
599 prm_write_mod_reg(0xffffffff, MPU_MOD, RM_RSTST); 605 prm_write_mod_reg(0xffffffff, MPU_MOD, RM_RSTST);
600 prm_write_mod_reg(0xffffffff, CORE_MOD, RM_RSTST); 606 prm_write_mod_reg(0xffffffff, CORE_MOD, RM_RSTST);
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 7c8e0c42b05d..9937e2814696 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -203,9 +203,11 @@
203 203
204#define OMAP3430_PM_MPUGRPSEL 0x00a4 204#define OMAP3430_PM_MPUGRPSEL 0x00a4
205#define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL 205#define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL
206#define OMAP3430ES2_PM_MPUGRPSEL3 0x00f8
206 207
207#define OMAP3430_PM_IVAGRPSEL 0x00a8 208#define OMAP3430_PM_IVAGRPSEL 0x00a8
208#define OMAP3430_PM_IVAGRPSEL1 OMAP3430_PM_IVAGRPSEL 209#define OMAP3430_PM_IVAGRPSEL1 OMAP3430_PM_IVAGRPSEL
210#define OMAP3430ES2_PM_IVAGRPSEL3 0x00f4
209 211
210#define OMAP3430_PM_PREPWSTST 0x00e8 212#define OMAP3430_PM_PREPWSTST 0x00e8
211 213