gpio: Add a driver for Sodaville GPIO controller

Sodaville has GPIO controller behind the PCI bus. To my suprissed it is
not the same as on PXA.

The interrupt & gpio chip can be referenced from the device tree like
from any other driver. Unfortunately the driver which uses the gpio
interrupt has to use irq_of_parse_and_map() instead of
platform_get_irq(). The problem is that the platform device (which is
created from the device tree) is most likely created before the
interrupt chip is registered and therefore irq_of_parse_and_map() fails.

In theory the driver works as module. In reality most of the irq
functions are not exported to modules and it is possible that _this_
module is unloaded while the provided irqs are still in use.

Signed-off-by: Hans J. Koch <hjk@linutronix.de>
[torbenh@linutronix.de: make it work after the irq namespace cleanup,
	                add some device tree entries.]
Signed-off-by: Torben Hohn <torbenh@linutronix.de>
[bigeasy@linutronix.de: convert to generic irq & gpio chip]
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
[grant.likely@secretlab.ca: depend on x86 to avoid irq_domain breakage]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

1 files changed, 5 insertions, 2 deletions

diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
index e70be38ce039..ce874f872cc6 100644
--- a/arch/x86/platform/ce4100/falconfalls.dts
+++ b/arch/x86/platform/ce4100/falconfalls.dts
@@ -208,16 +208,19 @@
                                         interrupts = <14 1>;
                                 };
 
-                                gpio@b,1 {
+                                pcigpio: gpio@b,1 {
+                                        #gpio-cells = <2>;
+                                        #interrupt-cells = <2>;
                                         compatible = "pci8086,2e67.2",
                                                    "pci8086,2e67",
                                                    "pciclassff0000",
                                                    "pciclassff00";
 
-                                        #gpio-cells = <2>;
                                         reg = <0x15900 0x0 0x0 0x0 0x0>;
                                         interrupts = <15 1>;
+                                        interrupt-controller;
                                         gpio-controller;
+                                        intel,muxctl = <0>;
                                 };
 
                                 i2c-controller@b,2 {