Merge tag 'for-v3.16-rc/omap-fixes-b' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.16/fixes

Some miscellaneous fixes for OMAP clock code, DRA7xx device data, and
PRCM code (when DSPBridge is used) for v3.16-rc.

Basic build, boot, and PM test logs are available here:

http://www.pwsan.com/omap/testlogs/prcm-a-v3.16-rc/20140706174258/

4 files changed, 23 insertions, 6 deletions

diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 332af927f4d3..67fd26a18441 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -76,7 +76,7 @@
  * (assuming that it is counting N upwards), or -2 if the enclosing loop
  * should skip to the next iteration (again assuming N is increasing).
  */
-static int _dpll_test_fint(struct clk_hw_omap *clk, u8 n)
+static int _dpll_test_fint(struct clk_hw_omap *clk, unsigned int n)
 {
         struct dpll_data *dd;
         long fint, fint_min, fint_max;
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 04dab2fcf862..ee6c784cd6b7 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -26,11 +26,14 @@
 #define OMAP3430_EN_WDT3_SHIFT                          12
 #define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK            (1 << 0)
 #define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT           0
+#define OMAP3430_IVA2_DPLL_FREQSEL_SHIFT                4
 #define OMAP3430_IVA2_DPLL_FREQSEL_MASK                 (0xf << 4)
 #define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT          3
+#define OMAP3430_EN_IVA2_DPLL_SHIFT                     0
 #define OMAP3430_EN_IVA2_DPLL_MASK                      (0x7 << 0)
 #define OMAP3430_ST_IVA2_SHIFT                          0
 #define OMAP3430_ST_IVA2_CLK_MASK                       (1 << 0)
+#define OMAP3430_AUTO_IVA2_DPLL_SHIFT                   0
 #define OMAP3430_AUTO_IVA2_DPLL_MASK                    (0x7 << 0)
 #define OMAP3430_IVA2_CLK_SRC_SHIFT                     19
 #define OMAP3430_IVA2_CLK_SRC_WIDTH                     3
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398cec05..284324f2b98a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1268,9 +1268,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = {
 };
 
 /* sata */
-static struct omap_hwmod_opt_clk sata_opt_clks[] = {
-        { .role = "ref_clk", .clk = "sata_ref_clk" },
-};
 
 static struct omap_hwmod dra7xx_sata_hwmod = {
         .name           = "sata",
@@ -1278,6 +1275,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
         .clkdm_name     = "l3init_clkdm",
         .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
         .main_clk       = "func_48m_fclk",
+        .mpu_rt_idx     = 1,
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1285,8 +1283,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
-        .opt_clks       = sata_opt_clks,
-        .opt_clks_cnt   = ARRAY_SIZE(sata_opt_clks),
 };
 
 /*
@@ -1731,8 +1727,20 @@ static struct omap_hwmod dra7xx_uart6_hwmod = {
  *
  */
 
+static struct omap_hwmod_class_sysconfig dra7xx_usb_otg_ss_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .sysc_flags     = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE |
+                           SYSC_HAS_SIDLEMODE),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+                           SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+                           MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
+        .sysc_fields    = &omap_hwmod_sysc_type2,
+};
+
 static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = {
         .name   = "usb_otg_ss",
+        .sysc   = &dra7xx_usb_otg_ss_sysc,
 };
 
 /* usb_otg_ss1 */
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 106132db532b..cbefbd7cfdb5 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -35,6 +35,8 @@
 #define OMAP3430_LOGICSTATEST_MASK                      (1 << 2)
 #define OMAP3430_LASTLOGICSTATEENTERED_MASK             (1 << 2)
 #define OMAP3430_LASTPOWERSTATEENTERED_MASK             (0x3 << 0)
+#define OMAP3430_GRPSEL_MCBSP5_MASK                     (1 << 10)
+#define OMAP3430_GRPSEL_MCBSP1_MASK                     (1 << 9)
 #define OMAP3630_GRPSEL_UART4_MASK                      (1 << 18)
 #define OMAP3430_GRPSEL_GPIO6_MASK                      (1 << 17)
 #define OMAP3430_GRPSEL_GPIO5_MASK                      (1 << 16)
@@ -42,6 +44,10 @@
 #define OMAP3430_GRPSEL_GPIO3_MASK                      (1 << 14)
 #define OMAP3430_GRPSEL_GPIO2_MASK                      (1 << 13)
 #define OMAP3430_GRPSEL_UART3_MASK                      (1 << 11)
+#define OMAP3430_GRPSEL_GPT8_MASK                       (1 << 9)
+#define OMAP3430_GRPSEL_GPT7_MASK                       (1 << 8)
+#define OMAP3430_GRPSEL_GPT6_MASK                       (1 << 7)
+#define OMAP3430_GRPSEL_GPT5_MASK                       (1 << 6)
 #define OMAP3430_GRPSEL_MCBSP4_MASK                     (1 << 2)
 #define OMAP3430_GRPSEL_MCBSP3_MASK                     (1 << 1)
 #define OMAP3430_GRPSEL_MCBSP2_MASK                     (1 << 0)