diff options
author | Andrew Bresticker <abrestic@chromium.org> | 2014-09-18 17:47:14 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 01:44:53 -0500 |
commit | a67b3cf1af7affcf3fc8ad775c90954aa887032c (patch) | |
tree | 43ac34bb090e3a9d39561ca9b39522fd5a54dd3f /arch | |
parent | ff1e29ade4c677c24ee972549d20f07e466d50bf (diff) |
MIPS: Remove gic_{enable,disable}_interrupt()
Nothing calls gic_{enable,disable}_interrupt() any more.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7806/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/asm/gic.h | 2 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-int.c | 10 | ||||
-rw-r--r-- | arch/mips/mti-sead3/sead3-int.c | 34 |
3 files changed, 0 insertions, 46 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h index d7699cf7e135..022d83136c5a 100644 --- a/arch/mips/include/asm/gic.h +++ b/arch/mips/include/asm/gic.h | |||
@@ -376,8 +376,6 @@ extern void gic_bind_eic_interrupt(int irq, int set); | |||
376 | extern unsigned int gic_get_timer_pending(void); | 376 | extern unsigned int gic_get_timer_pending(void); |
377 | extern void gic_get_int_mask(unsigned long *dst, const unsigned long *src); | 377 | extern void gic_get_int_mask(unsigned long *dst, const unsigned long *src); |
378 | extern unsigned int gic_get_int(void); | 378 | extern unsigned int gic_get_int(void); |
379 | extern void gic_enable_interrupt(int irq_vec); | ||
380 | extern void gic_disable_interrupt(int irq_vec); | ||
381 | extern void gic_irq_ack(struct irq_data *d); | 379 | extern void gic_irq_ack(struct irq_data *d); |
382 | extern void gic_finish_irq(struct irq_data *d); | 380 | extern void gic_finish_irq(struct irq_data *d); |
383 | extern void gic_platform_init(int irqs, struct irq_chip *irq_controller); | 381 | extern void gic_platform_init(int irqs, struct irq_chip *irq_controller); |
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index e4f43baa8f67..5c3120857987 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c | |||
@@ -715,16 +715,6 @@ int malta_be_handler(struct pt_regs *regs, int is_fixup) | |||
715 | return retval; | 715 | return retval; |
716 | } | 716 | } |
717 | 717 | ||
718 | void gic_enable_interrupt(int irq_vec) | ||
719 | { | ||
720 | GIC_SET_INTR_MASK(irq_vec); | ||
721 | } | ||
722 | |||
723 | void gic_disable_interrupt(int irq_vec) | ||
724 | { | ||
725 | GIC_CLR_INTR_MASK(irq_vec); | ||
726 | } | ||
727 | |||
728 | void gic_irq_ack(struct irq_data *d) | 718 | void gic_irq_ack(struct irq_data *d) |
729 | { | 719 | { |
730 | int irq = (d->irq - gic_irq_base); | 720 | int irq = (d->irq - gic_irq_base); |
diff --git a/arch/mips/mti-sead3/sead3-int.c b/arch/mips/mti-sead3/sead3-int.c index 6a560ac03def..9d5b5bd3a1d2 100644 --- a/arch/mips/mti-sead3/sead3-int.c +++ b/arch/mips/mti-sead3/sead3-int.c | |||
@@ -85,40 +85,6 @@ void __init arch_init_irq(void) | |||
85 | ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE); | 85 | ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE); |
86 | } | 86 | } |
87 | 87 | ||
88 | void gic_enable_interrupt(int irq_vec) | ||
89 | { | ||
90 | unsigned int i, irq_source; | ||
91 | |||
92 | /* enable all the interrupts associated with this vector */ | ||
93 | for (i = 0; i < gic_shared_intr_map[irq_vec].num_shared_intr; i++) { | ||
94 | irq_source = gic_shared_intr_map[irq_vec].intr_list[i]; | ||
95 | GIC_SET_INTR_MASK(irq_source); | ||
96 | } | ||
97 | /* enable all local interrupts associated with this vector */ | ||
98 | if (gic_shared_intr_map[irq_vec].local_intr_mask) { | ||
99 | GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0); | ||
100 | GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_SMASK), | ||
101 | gic_shared_intr_map[irq_vec].local_intr_mask); | ||
102 | } | ||
103 | } | ||
104 | |||
105 | void gic_disable_interrupt(int irq_vec) | ||
106 | { | ||
107 | unsigned int i, irq_source; | ||
108 | |||
109 | /* disable all the interrupts associated with this vector */ | ||
110 | for (i = 0; i < gic_shared_intr_map[irq_vec].num_shared_intr; i++) { | ||
111 | irq_source = gic_shared_intr_map[irq_vec].intr_list[i]; | ||
112 | GIC_CLR_INTR_MASK(irq_source); | ||
113 | } | ||
114 | /* disable all local interrupts associated with this vector */ | ||
115 | if (gic_shared_intr_map[irq_vec].local_intr_mask) { | ||
116 | GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0); | ||
117 | GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_RMASK), | ||
118 | gic_shared_intr_map[irq_vec].local_intr_mask); | ||
119 | } | ||
120 | } | ||
121 | |||
122 | void gic_irq_ack(struct irq_data *d) | 88 | void gic_irq_ack(struct irq_data *d) |
123 | { | 89 | { |
124 | GIC_CLR_INTR_MASK(d->irq - gic_irq_base); | 90 | GIC_CLR_INTR_MASK(d->irq - gic_irq_base); |