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authorPeter Chen <peter.chen@freescale.com>2013-02-17 21:06:44 -0500
committerShawn Guo <shawn.guo@linaro.org>2013-04-09 10:52:49 -0400
commita10c22e44b3d44c6ec8109b38e37c061437d122d (patch)
treecc603dba0434aada12f0f41f3425f2312f011b5d /arch
parent218abe6fe31b2059a6a647eddbe9c3ee08fa26fd (diff)
ARM: dts: imx6q-sabresd: Add USB support
Add USB support for imx6q sabresd board Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/imx6q-sabresd.dts25
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi6
2 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index 2dea304a7980..bafaccd73a75 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -21,6 +21,19 @@
21 reg = <0x10000000 0x40000000>; 21 reg = <0x10000000 0x40000000>;
22 }; 22 };
23 23
24 regulators {
25 compatible = "simple-bus";
26
27 reg_usb_otg_vbus: usb_otg_vbus {
28 compatible = "regulator-fixed";
29 regulator-name = "usb_otg_vbus";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
32 gpio = <&gpio3 22 0>;
33 enable-active-high;
34 };
35 };
36
24 gpio-keys { 37 gpio-keys {
25 compatible = "gpio-keys"; 38 compatible = "gpio-keys";
26 39
@@ -62,6 +75,18 @@
62 }; 75 };
63}; 76};
64 77
78&usbotg {
79 vbus-supply = <&reg_usb_otg_vbus>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&pinctrl_usbotg_2>;
82 disable-over-current;
83 status = "okay";
84};
85
86&usbh1 {
87 status = "okay";
88};
89
65&fec { 90&fec {
66 pinctrl-names = "default"; 91 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_enet_1>; 92 pinctrl-0 = <&pinctrl_enet_1>;
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index cba021eb035e..0125250d650e 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -207,6 +207,12 @@
207 1592 0x17059 /* MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID */ 207 1592 0x17059 /* MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID */
208 >; 208 >;
209 }; 209 };
210
211 pinctrl_usbotg_2: usbotggrp-2 {
212 fsl,pins = <
213 1591 0x17059 /* MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID */
214 >;
215 };
210 }; 216 };
211 217
212 usdhc2 { 218 usdhc2 {