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author | Sascha Hauer <s.hauer@pengutronix.de> | 2010-04-22 06:37:13 -0400 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-08-17 03:23:15 -0400 |
commit | 9a6f17fd1cd84811962735ff47111f84a8f05073 (patch) | |
tree | 65f00958d20d07aa059e125f56036481d72df528 /arch | |
parent | 3d6e614952e3e4cf9e70e58893a740ffec220b24 (diff) |
i.MX35: remove get_3_3_div helper function
In the v2 reference manual there are no dividers combined of two
dividers. Instead, all dividers are simple 6bit dividers. I assume
the combined dividers only exist in preliminary hardware.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-mx3/clock-imx35.c | 24 |
1 files changed, 9 insertions, 15 deletions
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c index 32adf8d5b1f8..d3a8d3f32160 100644 --- a/arch/arm/mach-mx3/clock-imx35.c +++ b/arch/arm/mach-mx3/clock-imx35.c | |||
@@ -176,16 +176,11 @@ static unsigned long get_rate_ipg(struct clk *clk) | |||
176 | return get_rate_ahb(NULL) >> 1; | 176 | return get_rate_ahb(NULL) >> 1; |
177 | } | 177 | } |
178 | 178 | ||
179 | static unsigned long get_3_3_div(unsigned long in) | ||
180 | { | ||
181 | return (((in >> 3) & 0x7) + 1) * ((in & 0x7) + 1); | ||
182 | } | ||
183 | |||
184 | static unsigned long get_rate_uart(struct clk *clk) | 179 | static unsigned long get_rate_uart(struct clk *clk) |
185 | { | 180 | { |
186 | unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); | 181 | unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); |
187 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); | 182 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); |
188 | unsigned long div = get_3_3_div(pdr4 >> 10); | 183 | unsigned long div = ((pdr4 >> 10) & 0x3f) + 1; |
189 | 184 | ||
190 | if (pdr3 & (1 << 14)) | 185 | if (pdr3 & (1 << 14)) |
191 | return get_rate_arm() / div; | 186 | return get_rate_arm() / div; |
@@ -216,7 +211,7 @@ static unsigned long get_rate_sdhc(struct clk *clk) | |||
216 | break; | 211 | break; |
217 | } | 212 | } |
218 | 213 | ||
219 | return rate / get_3_3_div(div); | 214 | return rate / (div + 1); |
220 | } | 215 | } |
221 | 216 | ||
222 | static unsigned long get_rate_mshc(struct clk *clk) | 217 | static unsigned long get_rate_mshc(struct clk *clk) |
@@ -270,7 +265,7 @@ static unsigned long get_rate_csi(struct clk *clk) | |||
270 | else | 265 | else |
271 | rate = get_rate_ppll(); | 266 | rate = get_rate_ppll(); |
272 | 267 | ||
273 | return rate / get_3_3_div((pdr2 >> 16) & 0x3f); | 268 | return rate / (((pdr2 >> 16) & 0x3f) + 1); |
274 | } | 269 | } |
275 | 270 | ||
276 | static unsigned long get_rate_otg(struct clk *clk) | 271 | static unsigned long get_rate_otg(struct clk *clk) |
@@ -283,22 +278,21 @@ static unsigned long get_rate_otg(struct clk *clk) | |||
283 | else | 278 | else |
284 | rate = get_rate_ppll(); | 279 | rate = get_rate_ppll(); |
285 | 280 | ||
286 | return rate / get_3_3_div((pdr4 >> 22) & 0x3f); | 281 | return rate / (((pdr4 >> 22) & 0x3f) + 1); |
287 | } | 282 | } |
288 | 283 | ||
289 | static unsigned long get_rate_ipg_per(struct clk *clk) | 284 | static unsigned long get_rate_ipg_per(struct clk *clk) |
290 | { | 285 | { |
291 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); | 286 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); |
292 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); | 287 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); |
293 | unsigned long div1, div2; | 288 | unsigned long div; |
294 | 289 | ||
295 | if (pdr0 & (1 << 26)) { | 290 | if (pdr0 & (1 << 26)) { |
296 | div1 = (pdr4 >> 19) & 0x7; | 291 | div = (pdr4 >> 16) & 0x3f; |
297 | div2 = (pdr4 >> 16) & 0x7; | 292 | return get_rate_arm() / (div + 1); |
298 | return get_rate_arm() / ((div1 + 1) * (div2 + 1)); | ||
299 | } else { | 293 | } else { |
300 | div1 = (pdr0 >> 12) & 0x7; | 294 | div = (pdr0 >> 12) & 0x7; |
301 | return get_rate_ahb(NULL) / div1; | 295 | return get_rate_ahb(NULL) / div; |
302 | } | 296 | } |
303 | } | 297 | } |
304 | 298 | ||