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authorDavid S. Miller <davem@davemloft.net>2005-05-31 22:13:52 -0400
committerDavid S. Miller <davem@davemloft.net>2005-05-31 22:13:52 -0400
commit88314ee73fd75eb32abdcb3119cd303c116d4500 (patch)
tree913c23ad89ec778d62eb517487dc6ab545d869c5 /arch
parent7c963ad1d113790a8c723a178988b675868f3abe (diff)
[SPARC64]: Refine PCI strbuf ctx-based flush.
The initial peek read PIO of the match register is just a waste. Just do the flush writes first, as that is more efficient. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/sparc64/kernel/pci_iommu.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/sparc64/kernel/pci_iommu.c b/arch/sparc64/kernel/pci_iommu.c
index 1807876f8c36..2803bc7c2c79 100644
--- a/arch/sparc64/kernel/pci_iommu.c
+++ b/arch/sparc64/kernel/pci_iommu.c
@@ -422,14 +422,12 @@ static void pci_strbuf_flush(struct pci_strbuf *strbuf, struct pci_iommu *iommu,
422 flushreg = strbuf->strbuf_ctxflush; 422 flushreg = strbuf->strbuf_ctxflush;
423 matchreg = PCI_STC_CTXMATCH_ADDR(strbuf, ctx); 423 matchreg = PCI_STC_CTXMATCH_ADDR(strbuf, ctx);
424 424
425 if (pci_iommu_read(matchreg) == 0)
426 goto do_flush_sync;
427
428 pci_iommu_write(flushreg, ctx); 425 pci_iommu_write(flushreg, ctx);
429 if ((val = pci_iommu_read(matchreg)) == 0) 426 val = pci_iommu_read(matchreg);
427 val &= 0xffff;
428 if (!val)
430 goto do_flush_sync; 429 goto do_flush_sync;
431 430
432 val &= 0xffff;
433 while (val) { 431 while (val) {
434 if (val & 0x1) 432 if (val & 0x1)
435 pci_iommu_write(flushreg, ctx); 433 pci_iommu_write(flushreg, ctx);