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authorJavier Martinez Canillas <javier.martinez@collabora.co.uk>2013-09-20 11:00:00 -0400
committerBenoit Cousson <bcousson@baylibre.com>2013-10-11 15:06:32 -0400
commit82d75afcb718dc8fe9fcd71959bff7878df53076 (patch)
treeffd75d28823dada50ce4c8c01b6de7307e3c3d30 /arch
parentec8a75979f199fd6fdcf24f8d1c928a48c61483e (diff)
ARM: dts: AM33XX: use pinmux node defined in included file
am33xx boards DTS include the am33xx.dtsi Device Tree source file that already define a pinmux device node for the AM33XX SoC Pin Multiplex. Redefining this for each board makes the Device Tree files harder to modify and maintain so let's just use what is already defined in the included .dtsi file. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/am335x-bone-common.dtsi218
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts254
-rw-r--r--arch/arm/boot/dts/am335x-evmsk.dts258
3 files changed, 365 insertions, 365 deletions
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 56361ceb418b..29799ac3423a 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -21,115 +21,6 @@
21 reg = <0x80000000 0x10000000>; /* 256 MB */ 21 reg = <0x80000000 0x10000000>; /* 256 MB */
22 }; 22 };
23 23
24 am33xx_pinmux: pinmux@44e10800 {
25 pinctrl-names = "default";
26 pinctrl-0 = <&clkout2_pin>;
27
28 user_leds_s0: user_leds_s0 {
29 pinctrl-single,pins = <
30 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
31 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
32 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
33 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
34 >;
35 };
36
37 i2c0_pins: pinmux_i2c0_pins {
38 pinctrl-single,pins = <
39 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
40 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
41 >;
42 };
43
44 uart0_pins: pinmux_uart0_pins {
45 pinctrl-single,pins = <
46 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
47 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
48 >;
49 };
50
51 clkout2_pin: pinmux_clkout2_pin {
52 pinctrl-single,pins = <
53 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
54 >;
55 };
56
57 cpsw_default: cpsw_default {
58 pinctrl-single,pins = <
59 /* Slave 1 */
60 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
61 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
62 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
63 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
64 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
65 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
66 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
67 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
68 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
69 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
70 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
71 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
72 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
73 >;
74 };
75
76 cpsw_sleep: cpsw_sleep {
77 pinctrl-single,pins = <
78 /* Slave 1 reset value */
79 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
80 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
81 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
82 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
83 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
84 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
85 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
86 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
87 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
88 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
89 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
90 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
91 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
92 >;
93 };
94
95 davinci_mdio_default: davinci_mdio_default {
96 pinctrl-single,pins = <
97 /* MDIO */
98 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
99 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
100 >;
101 };
102
103 davinci_mdio_sleep: davinci_mdio_sleep {
104 pinctrl-single,pins = <
105 /* MDIO reset value */
106 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
107 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
108 >;
109 };
110
111 mmc1_pins: pinmux_mmc1_pins {
112 pinctrl-single,pins = <
113 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
114 >;
115 };
116
117 emmc_pins: pinmux_emmc_pins {
118 pinctrl-single,pins = <
119 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
120 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */
121 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
122 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
123 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
124 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
125 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
126 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
127 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
128 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
129 >;
130 };
131 };
132
133 ocp { 24 ocp {
134 uart0: serial@44e09000 { 25 uart0: serial@44e09000 {
135 pinctrl-names = "default"; 26 pinctrl-names = "default";
@@ -217,6 +108,115 @@
217 }; 108 };
218}; 109};
219 110
111&am33xx_pinmux {
112 pinctrl-names = "default";
113 pinctrl-0 = <&clkout2_pin>;
114
115 user_leds_s0: user_leds_s0 {
116 pinctrl-single,pins = <
117 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
118 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
119 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
120 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
121 >;
122 };
123
124 i2c0_pins: pinmux_i2c0_pins {
125 pinctrl-single,pins = <
126 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
127 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
128 >;
129 };
130
131 uart0_pins: pinmux_uart0_pins {
132 pinctrl-single,pins = <
133 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
134 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
135 >;
136 };
137
138 clkout2_pin: pinmux_clkout2_pin {
139 pinctrl-single,pins = <
140 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
141 >;
142 };
143
144 cpsw_default: cpsw_default {
145 pinctrl-single,pins = <
146 /* Slave 1 */
147 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
148 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
149 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
150 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
151 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
152 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
153 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
154 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
155 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
156 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
157 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
158 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
159 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
160 >;
161 };
162
163 cpsw_sleep: cpsw_sleep {
164 pinctrl-single,pins = <
165 /* Slave 1 reset value */
166 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
167 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
168 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
169 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
170 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
171 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
172 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
173 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
174 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
175 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
176 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
177 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
178 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
179 >;
180 };
181
182 davinci_mdio_default: davinci_mdio_default {
183 pinctrl-single,pins = <
184 /* MDIO */
185 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
186 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
187 >;
188 };
189
190 davinci_mdio_sleep: davinci_mdio_sleep {
191 pinctrl-single,pins = <
192 /* MDIO reset value */
193 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
194 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
195 >;
196 };
197
198 mmc1_pins: pinmux_mmc1_pins {
199 pinctrl-single,pins = <
200 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
201 >;
202 };
203
204 emmc_pins: pinmux_emmc_pins {
205 pinctrl-single,pins = <
206 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
207 0x84 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_csn2.mmc1_cmd */
208 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
209 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
210 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
211 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
212 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
213 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
214 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
215 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
216 >;
217 };
218};
219
220/include/ "tps65217.dtsi" 220/include/ "tps65217.dtsi"
221 221
222&tps { 222&tps {
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index bc4a69d80fd8..1525cd6d4844 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -24,133 +24,6 @@
24 reg = <0x80000000 0x10000000>; /* 256 MB */ 24 reg = <0x80000000 0x10000000>; /* 256 MB */
25 }; 25 };
26 26
27 am33xx_pinmux: pinmux@44e10800 {
28 pinctrl-names = "default";
29 pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
30
31 matrix_keypad_s0: matrix_keypad_s0 {
32 pinctrl-single,pins = <
33 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
34 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
35 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
36 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
37 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
38 >;
39 };
40
41 volume_keys_s0: volume_keys_s0 {
42 pinctrl-single,pins = <
43 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
44 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
45 >;
46 };
47
48 i2c0_pins: pinmux_i2c0_pins {
49 pinctrl-single,pins = <
50 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
51 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
52 >;
53 };
54
55 i2c1_pins: pinmux_i2c1_pins {
56 pinctrl-single,pins = <
57 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
58 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
59 >;
60 };
61
62 uart0_pins: pinmux_uart0_pins {
63 pinctrl-single,pins = <
64 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
65 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
66 >;
67 };
68
69 clkout2_pin: pinmux_clkout2_pin {
70 pinctrl-single,pins = <
71 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
72 >;
73 };
74
75 nandflash_pins_s0: nandflash_pins_s0 {
76 pinctrl-single,pins = <
77 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
78 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
79 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
80 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
81 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
82 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
83 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
84 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
85 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
86 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
87 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
88 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
89 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
90 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
91 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
92 >;
93 };
94
95 ecap0_pins: backlight_pins {
96 pinctrl-single,pins = <
97 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
98 >;
99 };
100
101 cpsw_default: cpsw_default {
102 pinctrl-single,pins = <
103 /* Slave 1 */
104 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
105 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
106 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
107 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
108 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
109 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
110 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
111 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
112 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
113 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
114 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
115 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
116 >;
117 };
118
119 cpsw_sleep: cpsw_sleep {
120 pinctrl-single,pins = <
121 /* Slave 1 reset value */
122 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
123 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
124 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
125 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
126 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
127 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
128 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
129 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
130 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
131 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
132 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
133 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
134 >;
135 };
136
137 davinci_mdio_default: davinci_mdio_default {
138 pinctrl-single,pins = <
139 /* MDIO */
140 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
141 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
142 >;
143 };
144
145 davinci_mdio_sleep: davinci_mdio_sleep {
146 pinctrl-single,pins = <
147 /* MDIO reset value */
148 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
149 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
150 >;
151 };
152 };
153
154 ocp { 27 ocp {
155 uart0: serial@44e09000 { 28 uart0: serial@44e09000 {
156 pinctrl-names = "default"; 29 pinctrl-names = "default";
@@ -405,6 +278,133 @@
405 }; 278 };
406}; 279};
407 280
281&am33xx_pinmux {
282 pinctrl-names = "default";
283 pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
284
285 matrix_keypad_s0: matrix_keypad_s0 {
286 pinctrl-single,pins = <
287 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
288 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
289 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
290 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
291 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
292 >;
293 };
294
295 volume_keys_s0: volume_keys_s0 {
296 pinctrl-single,pins = <
297 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
298 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
299 >;
300 };
301
302 i2c0_pins: pinmux_i2c0_pins {
303 pinctrl-single,pins = <
304 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
305 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
306 >;
307 };
308
309 i2c1_pins: pinmux_i2c1_pins {
310 pinctrl-single,pins = <
311 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
312 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
313 >;
314 };
315
316 uart0_pins: pinmux_uart0_pins {
317 pinctrl-single,pins = <
318 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
319 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
320 >;
321 };
322
323 clkout2_pin: pinmux_clkout2_pin {
324 pinctrl-single,pins = <
325 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
326 >;
327 };
328
329 nandflash_pins_s0: nandflash_pins_s0 {
330 pinctrl-single,pins = <
331 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
332 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
333 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
334 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
335 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
336 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
337 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
338 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
339 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
340 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
341 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
342 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
343 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
344 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
345 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
346 >;
347 };
348
349 ecap0_pins: backlight_pins {
350 pinctrl-single,pins = <
351 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
352 >;
353 };
354
355 cpsw_default: cpsw_default {
356 pinctrl-single,pins = <
357 /* Slave 1 */
358 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
359 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
360 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
361 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
362 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
363 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
364 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
365 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
366 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
367 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
368 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
369 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
370 >;
371 };
372
373 cpsw_sleep: cpsw_sleep {
374 pinctrl-single,pins = <
375 /* Slave 1 reset value */
376 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
377 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
378 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
379 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
380 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
381 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
382 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
383 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
384 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
385 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
386 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
387 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
388 >;
389 };
390
391 davinci_mdio_default: davinci_mdio_default {
392 pinctrl-single,pins = <
393 /* MDIO */
394 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
395 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
396 >;
397 };
398
399 davinci_mdio_sleep: davinci_mdio_sleep {
400 pinctrl-single,pins = <
401 /* MDIO reset value */
402 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
403 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
404 >;
405 };
406};
407
408#include "tps65910.dtsi" 408#include "tps65910.dtsi"
409 409
410&tps { 410&tps {
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 55fd19487b8c..f0066fe5d739 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -31,135 +31,6 @@
31 reg = <0x80000000 0x10000000>; /* 256 MB */ 31 reg = <0x80000000 0x10000000>; /* 256 MB */
32 }; 32 };
33 33
34 am33xx_pinmux: pinmux@44e10800 {
35 pinctrl-names = "default";
36 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
37
38 user_leds_s0: user_leds_s0 {
39 pinctrl-single,pins = <
40 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
41 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
42 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
43 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
44 >;
45 };
46
47 gpio_keys_s0: gpio_keys_s0 {
48 pinctrl-single,pins = <
49 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
50 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
51 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
52 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
53 >;
54 };
55
56 i2c0_pins: pinmux_i2c0_pins {
57 pinctrl-single,pins = <
58 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
59 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
60 >;
61 };
62
63 uart0_pins: pinmux_uart0_pins {
64 pinctrl-single,pins = <
65 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
66 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
67 >;
68 };
69
70 clkout2_pin: pinmux_clkout2_pin {
71 pinctrl-single,pins = <
72 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
73 >;
74 };
75
76 ecap2_pins: backlight_pins {
77 pinctrl-single,pins = <
78 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
79 >;
80 };
81
82 cpsw_default: cpsw_default {
83 pinctrl-single,pins = <
84 /* Slave 1 */
85 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
86 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
87 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
88 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
89 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
90 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
91 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
92 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
93 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
94 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
95 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
96 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
97
98 /* Slave 2 */
99 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
100 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
101 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
102 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
103 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
104 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
105 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
106 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
107 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
108 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
109 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
110 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
111 >;
112 };
113
114 cpsw_sleep: cpsw_sleep {
115 pinctrl-single,pins = <
116 /* Slave 1 reset value */
117 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
118 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
119 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
120 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
121 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
122 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
123 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
124 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
125 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
126 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
127 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
128 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
129
130 /* Slave 2 reset value*/
131 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
132 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
133 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
134 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
135 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
136 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
137 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
138 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
139 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
140 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
141 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
142 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
143 >;
144 };
145
146 davinci_mdio_default: davinci_mdio_default {
147 pinctrl-single,pins = <
148 /* MDIO */
149 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
150 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
151 >;
152 };
153
154 davinci_mdio_sleep: davinci_mdio_sleep {
155 pinctrl-single,pins = <
156 /* MDIO reset value */
157 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
158 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
159 >;
160 };
161 };
162
163 ocp { 34 ocp {
164 uart0: serial@44e09000 { 35 uart0: serial@44e09000 {
165 pinctrl-names = "default"; 36 pinctrl-names = "default";
@@ -321,6 +192,135 @@
321 }; 192 };
322}; 193};
323 194
195&am33xx_pinmux {
196 pinctrl-names = "default";
197 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
198
199 user_leds_s0: user_leds_s0 {
200 pinctrl-single,pins = <
201 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
202 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
203 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
204 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
205 >;
206 };
207
208 gpio_keys_s0: gpio_keys_s0 {
209 pinctrl-single,pins = <
210 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
211 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
212 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
213 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
214 >;
215 };
216
217 i2c0_pins: pinmux_i2c0_pins {
218 pinctrl-single,pins = <
219 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
220 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
221 >;
222 };
223
224 uart0_pins: pinmux_uart0_pins {
225 pinctrl-single,pins = <
226 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
227 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
228 >;
229 };
230
231 clkout2_pin: pinmux_clkout2_pin {
232 pinctrl-single,pins = <
233 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
234 >;
235 };
236
237 ecap2_pins: backlight_pins {
238 pinctrl-single,pins = <
239 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
240 >;
241 };
242
243 cpsw_default: cpsw_default {
244 pinctrl-single,pins = <
245 /* Slave 1 */
246 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
247 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
248 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
249 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
250 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
251 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
252 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
253 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
254 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
255 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
256 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
257 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
258
259 /* Slave 2 */
260 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
261 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
262 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
263 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
264 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
265 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
266 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
267 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
268 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
269 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
270 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
271 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
272 >;
273 };
274
275 cpsw_sleep: cpsw_sleep {
276 pinctrl-single,pins = <
277 /* Slave 1 reset value */
278 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
279 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
280 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
281 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
282 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
283 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
284 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
285 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
286 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
287 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
288 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
289 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
290
291 /* Slave 2 reset value*/
292 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
293 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
294 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
295 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
296 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
297 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
298 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
299 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
300 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
301 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
302 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
303 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
304 >;
305 };
306
307 davinci_mdio_default: davinci_mdio_default {
308 pinctrl-single,pins = <
309 /* MDIO */
310 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
311 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
312 >;
313 };
314
315 davinci_mdio_sleep: davinci_mdio_sleep {
316 pinctrl-single,pins = <
317 /* MDIO reset value */
318 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
319 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
320 >;
321 };
322};
323
324#include "tps65910.dtsi" 324#include "tps65910.dtsi"
325 325
326&tps { 326&tps {
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-10 11:22:35 -0500