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| author | Olof Johansson <olof@lixom.net> | 2013-01-24 10:49:49 -0500 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2013-01-24 10:49:49 -0500 |
| commit | 60fd8e35e32087eed200bea99be037b5f75a016e (patch) | |
| tree | 64f6672dc891dde9c5b6a0e608a3acb8a056b967 /arch | |
| parent | 4ad3041d3b76632c02b50aa384a8f21d7d15bac0 (diff) | |
| parent | 8461c2f6fdd3ef0b26f931d561435df8cae2a9a5 (diff) | |
Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes
From Nicolas Ferre:
Here are fixes for AT91 that are mainly related to device tree.
One RM9200 setup option is the only C code change.
Some documentation changes can clarify the pinctrl use.
Then, some defconfig modifications are allowing the affected platforms
to boot.
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
ARM: at91/dts: correct comment in at91sam9x5.dtsi for mii
ARM: at91/at91_dt_defconfig: add at91sam9n12 SoC to DT defconfig
ARM: at91/at91_dt_defconfig: remove memory specification to cmdline
ARM: at91/dts: add macb mii pinctrl config for kizbox
ARM: at91: rm9200: remake the BGA as default version
ARM: at91: fix gpios on i2c-gpio for RM9200 DT
ARM: at91/at91sam9x5 DTS: add SCK USART pins
ARM: at91/at91sam9x5 DTS: correct wrong PIO BANK values on u(s)arts
ARM: at91/at91-pinctrl documentation: fix typo and add some details
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/at91rm9200.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/at91sam9x5.dtsi | 60 | ||||
| -rw-r--r-- | arch/arm/boot/dts/kizbox.dts | 2 | ||||
| -rw-r--r-- | arch/arm/configs/at91_dt_defconfig | 3 | ||||
| -rw-r--r-- | arch/arm/mach-at91/setup.c | 2 |
5 files changed, 48 insertions, 23 deletions
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi index e154f242c680..222047f1ece9 100644 --- a/arch/arm/boot/dts/at91rm9200.dtsi +++ b/arch/arm/boot/dts/at91rm9200.dtsi | |||
| @@ -336,8 +336,8 @@ | |||
| 336 | 336 | ||
| 337 | i2c@0 { | 337 | i2c@0 { |
| 338 | compatible = "i2c-gpio"; | 338 | compatible = "i2c-gpio"; |
| 339 | gpios = <&pioA 23 0 /* sda */ | 339 | gpios = <&pioA 25 0 /* sda */ |
| 340 | &pioA 24 0 /* scl */ | 340 | &pioA 26 0 /* scl */ |
| 341 | >; | 341 | >; |
| 342 | i2c-gpio,sda-open-drain; | 342 | i2c-gpio,sda-open-drain; |
| 343 | i2c-gpio,scl-open-drain; | 343 | i2c-gpio,scl-open-drain; |
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 3a47cf952146..8ecca6948d81 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi | |||
| @@ -143,6 +143,11 @@ | |||
| 143 | atmel,pins = | 143 | atmel,pins = |
| 144 | <0 3 0x1 0x0>; /* PA3 periph A */ | 144 | <0 3 0x1 0x0>; /* PA3 periph A */ |
| 145 | }; | 145 | }; |
| 146 | |||
| 147 | pinctrl_usart0_sck: usart0_sck-0 { | ||
| 148 | atmel,pins = | ||
| 149 | <0 4 0x1 0x0>; /* PA4 periph A */ | ||
| 150 | }; | ||
| 146 | }; | 151 | }; |
| 147 | 152 | ||
| 148 | usart1 { | 153 | usart1 { |
| @@ -154,12 +159,17 @@ | |||
| 154 | 159 | ||
| 155 | pinctrl_usart1_rts: usart1_rts-0 { | 160 | pinctrl_usart1_rts: usart1_rts-0 { |
| 156 | atmel,pins = | 161 | atmel,pins = |
| 157 | <3 27 0x3 0x0>; /* PC27 periph C */ | 162 | <2 27 0x3 0x0>; /* PC27 periph C */ |
| 158 | }; | 163 | }; |
| 159 | 164 | ||
| 160 | pinctrl_usart1_cts: usart1_cts-0 { | 165 | pinctrl_usart1_cts: usart1_cts-0 { |
| 161 | atmel,pins = | 166 | atmel,pins = |
| 162 | <3 28 0x3 0x0>; /* PC28 periph C */ | 167 | <2 28 0x3 0x0>; /* PC28 periph C */ |
| 168 | }; | ||
| 169 | |||
| 170 | pinctrl_usart1_sck: usart1_sck-0 { | ||
| 171 | atmel,pins = | ||
| 172 | <2 28 0x3 0x0>; /* PC29 periph C */ | ||
| 163 | }; | 173 | }; |
| 164 | }; | 174 | }; |
| 165 | 175 | ||
| @@ -172,46 +182,56 @@ | |||
| 172 | 182 | ||
| 173 | pinctrl_uart2_rts: uart2_rts-0 { | 183 | pinctrl_uart2_rts: uart2_rts-0 { |
| 174 | atmel,pins = | 184 | atmel,pins = |
| 175 | <0 0 0x2 0x0>; /* PB0 periph B */ | 185 | <1 0 0x2 0x0>; /* PB0 periph B */ |
| 176 | }; | 186 | }; |
| 177 | 187 | ||
| 178 | pinctrl_uart2_cts: uart2_cts-0 { | 188 | pinctrl_uart2_cts: uart2_cts-0 { |
| 179 | atmel,pins = | 189 | atmel,pins = |
| 180 | <0 1 0x2 0x0>; /* PB1 periph B */ | 190 | <1 1 0x2 0x0>; /* PB1 periph B */ |
| 191 | }; | ||
| 192 | |||
| 193 | pinctrl_usart2_sck: usart2_sck-0 { | ||
| 194 | atmel,pins = | ||
| 195 | <1 2 0x2 0x0>; /* PB2 periph B */ | ||
| 181 | }; | 196 | }; |
| 182 | }; | 197 | }; |
| 183 | 198 | ||
| 184 | usart3 { | 199 | usart3 { |
| 185 | pinctrl_uart3: usart3-0 { | 200 | pinctrl_uart3: usart3-0 { |
| 186 | atmel,pins = | 201 | atmel,pins = |
| 187 | <3 23 0x2 0x1 /* PC22 periph B with pullup */ | 202 | <2 23 0x2 0x1 /* PC22 periph B with pullup */ |
| 188 | 3 23 0x2 0x0>; /* PC23 periph B */ | 203 | 2 23 0x2 0x0>; /* PC23 periph B */ |
| 189 | }; | 204 | }; |
| 190 | 205 | ||
| 191 | pinctrl_usart3_rts: usart3_rts-0 { | 206 | pinctrl_usart3_rts: usart3_rts-0 { |
| 192 | atmel,pins = | 207 | atmel,pins = |
| 193 | <3 24 0x2 0x0>; /* PC24 periph B */ | 208 | <2 24 0x2 0x0>; /* PC24 periph B */ |
| 194 | }; | 209 | }; |
| 195 | 210 | ||
| 196 | pinctrl_usart3_cts: usart3_cts-0 { | 211 | pinctrl_usart3_cts: usart3_cts-0 { |
| 197 | atmel,pins = | 212 | atmel,pins = |
| 198 | <3 25 0x2 0x0>; /* PC25 periph B */ | 213 | <2 25 0x2 0x0>; /* PC25 periph B */ |
| 214 | }; | ||
| 215 | |||
| 216 | pinctrl_usart3_sck: usart3_sck-0 { | ||
| 217 | atmel,pins = | ||
| 218 | <2 26 0x2 0x0>; /* PC26 periph B */ | ||
| 199 | }; | 219 | }; |
| 200 | }; | 220 | }; |
| 201 | 221 | ||
| 202 | uart0 { | 222 | uart0 { |
| 203 | pinctrl_uart0: uart0-0 { | 223 | pinctrl_uart0: uart0-0 { |
| 204 | atmel,pins = | 224 | atmel,pins = |
| 205 | <3 8 0x3 0x0 /* PC8 periph C */ | 225 | <2 8 0x3 0x0 /* PC8 periph C */ |
| 206 | 3 9 0x3 0x1>; /* PC9 periph C with pullup */ | 226 | 2 9 0x3 0x1>; /* PC9 periph C with pullup */ |
| 207 | }; | 227 | }; |
| 208 | }; | 228 | }; |
| 209 | 229 | ||
| 210 | uart1 { | 230 | uart1 { |
| 211 | pinctrl_uart1: uart1-0 { | 231 | pinctrl_uart1: uart1-0 { |
| 212 | atmel,pins = | 232 | atmel,pins = |
| 213 | <3 16 0x3 0x0 /* PC16 periph C */ | 233 | <2 16 0x3 0x0 /* PC16 periph C */ |
| 214 | 3 17 0x3 0x1>; /* PC17 periph C with pullup */ | 234 | 2 17 0x3 0x1>; /* PC17 periph C with pullup */ |
| 215 | }; | 235 | }; |
| 216 | }; | 236 | }; |
| 217 | 237 | ||
| @@ -240,14 +260,14 @@ | |||
| 240 | 260 | ||
| 241 | pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { | 261 | pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { |
| 242 | atmel,pins = | 262 | atmel,pins = |
| 243 | <1 8 0x1 0x0 /* PA8 periph A */ | 263 | <1 8 0x1 0x0 /* PB8 periph A */ |
| 244 | 1 11 0x1 0x0 /* PA11 periph A */ | 264 | 1 11 0x1 0x0 /* PB11 periph A */ |
| 245 | 1 12 0x1 0x0 /* PA12 periph A */ | 265 | 1 12 0x1 0x0 /* PB12 periph A */ |
| 246 | 1 13 0x1 0x0 /* PA13 periph A */ | 266 | 1 13 0x1 0x0 /* PB13 periph A */ |
| 247 | 1 14 0x1 0x0 /* PA14 periph A */ | 267 | 1 14 0x1 0x0 /* PB14 periph A */ |
| 248 | 1 15 0x1 0x0 /* PA15 periph A */ | 268 | 1 15 0x1 0x0 /* PB15 periph A */ |
| 249 | 1 16 0x1 0x0 /* PA16 periph A */ | 269 | 1 16 0x1 0x0 /* PB16 periph A */ |
| 250 | 1 17 0x1 0x0>; /* PA17 periph A */ | 270 | 1 17 0x1 0x0>; /* PB17 periph A */ |
| 251 | }; | 271 | }; |
| 252 | }; | 272 | }; |
| 253 | 273 | ||
diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts index e8814fe0e277..b4dc3ed9a3ec 100644 --- a/arch/arm/boot/dts/kizbox.dts +++ b/arch/arm/boot/dts/kizbox.dts | |||
| @@ -48,6 +48,8 @@ | |||
| 48 | 48 | ||
| 49 | macb0: ethernet@fffc4000 { | 49 | macb0: ethernet@fffc4000 { |
| 50 | phy-mode = "mii"; | 50 | phy-mode = "mii"; |
| 51 | pinctrl-0 = <&pinctrl_macb_rmii | ||
| 52 | &pinctrl_macb_rmii_mii_alt>; | ||
| 51 | status = "okay"; | 53 | status = "okay"; |
| 52 | }; | 54 | }; |
| 53 | 55 | ||
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig index b175577d7abb..1ea959019fcd 100644 --- a/arch/arm/configs/at91_dt_defconfig +++ b/arch/arm/configs/at91_dt_defconfig | |||
| @@ -19,6 +19,7 @@ CONFIG_SOC_AT91SAM9260=y | |||
| 19 | CONFIG_SOC_AT91SAM9263=y | 19 | CONFIG_SOC_AT91SAM9263=y |
| 20 | CONFIG_SOC_AT91SAM9G45=y | 20 | CONFIG_SOC_AT91SAM9G45=y |
| 21 | CONFIG_SOC_AT91SAM9X5=y | 21 | CONFIG_SOC_AT91SAM9X5=y |
| 22 | CONFIG_SOC_AT91SAM9N12=y | ||
| 22 | CONFIG_MACH_AT91SAM_DT=y | 23 | CONFIG_MACH_AT91SAM_DT=y |
| 23 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | 24 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y |
| 24 | CONFIG_AT91_TIMER_HZ=128 | 25 | CONFIG_AT91_TIMER_HZ=128 |
| @@ -31,7 +32,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 | |||
| 31 | CONFIG_ZBOOT_ROM_BSS=0x0 | 32 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 32 | CONFIG_ARM_APPENDED_DTB=y | 33 | CONFIG_ARM_APPENDED_DTB=y |
| 33 | CONFIG_ARM_ATAG_DTB_COMPAT=y | 34 | CONFIG_ARM_ATAG_DTB_COMPAT=y |
| 34 | CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw" | 35 | CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw" |
| 35 | CONFIG_KEXEC=y | 36 | CONFIG_KEXEC=y |
| 36 | CONFIG_AUTO_ZRELADDR=y | 37 | CONFIG_AUTO_ZRELADDR=y |
| 37 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | 38 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set |
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index 9ee866ce0478..4b678478cf95 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c | |||
| @@ -105,6 +105,8 @@ static void __init soc_detect(u32 dbgu_base) | |||
| 105 | switch (socid) { | 105 | switch (socid) { |
| 106 | case ARCH_ID_AT91RM9200: | 106 | case ARCH_ID_AT91RM9200: |
| 107 | at91_soc_initdata.type = AT91_SOC_RM9200; | 107 | at91_soc_initdata.type = AT91_SOC_RM9200; |
| 108 | if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE) | ||
| 109 | at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; | ||
| 108 | at91_boot_soc = at91rm9200_soc; | 110 | at91_boot_soc = at91rm9200_soc; |
| 109 | break; | 111 | break; |
| 110 | 112 | ||