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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-12 20:27:41 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-12 20:27:41 -0400
commit5889fc32171a41d2f306bba320715b72655dcb1a (patch)
tree7bec4883544f504664a01a600688d8fd963c2a7d /arch
parent1bc4a5be0acbd16de4df6e4fb73a76fa92e9a521 (diff)
parent85d5c4a362add39f7491b38ed0160df1dcae1d2b (diff)
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM: SoC fixes from Olof Johansson: "I was hoping to be done with fixes for 3.4 but we got two branches from subarch maintainers the last couple of days. So here is one last(?) pull request for arm-soc containing 7 patches: - Five of them are for shmobile dealing with SMP setup and compile failures - The remaining two are for regressions on the Samsung platforms" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: EXYNOS: fix ctrlbit for exynos5_clk_pdma1 ARM: EXYNOS: use s5p-timer for UniversalC210 board ARM / mach-shmobile: Invalidate caches when booting secondary cores ARM / mach-shmobile: sh73a0 SMP TWD boot regression fix ARM / mach-shmobile: r8a7779 SMP TWD boot regression fix ARM: mach-shmobile: convert ag5evm to use the generic MMC GPIO hotplug helper ARM: mach-shmobile: convert mackerel to use the generic MMC GPIO hotplug helper
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-exynos/Kconfig3
-rw-r--r--arch/arm/mach-exynos/clock-exynos5.c2
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c4
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c22
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c22
-rw-r--r--arch/arm/mach-shmobile/headsmp.S56
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h2
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7779.c4
-rw-r--r--arch/arm/mach-shmobile/setup-sh73a0.c4
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c8
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c7
-rw-r--r--arch/arm/mach-shmobile/timer.c9
12 files changed, 88 insertions, 55 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index e81c35f936b5..b8df521fb68e 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -232,6 +232,9 @@ config MACH_ARMLEX4210
232config MACH_UNIVERSAL_C210 232config MACH_UNIVERSAL_C210
233 bool "Mobile UNIVERSAL_C210 Board" 233 bool "Mobile UNIVERSAL_C210 Board"
234 select CPU_EXYNOS4210 234 select CPU_EXYNOS4210
235 select S5P_HRT
236 select CLKSRC_MMIO
237 select HAVE_SCHED_CLOCK
235 select S5P_GPIO_INT 238 select S5P_GPIO_INT
236 select S5P_DEV_FIMC0 239 select S5P_DEV_FIMC0
237 select S5P_DEV_FIMC1 240 select S5P_DEV_FIMC1
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index 5cd7a8b8868c..7ac6ff4c46bd 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -678,7 +678,7 @@ static struct clk exynos5_clk_pdma1 = {
678 .name = "dma", 678 .name = "dma",
679 .devname = "dma-pl330.1", 679 .devname = "dma-pl330.1",
680 .enable = exynos5_clk_ip_fsys_ctrl, 680 .enable = exynos5_clk_ip_fsys_ctrl,
681 .ctrlbit = (1 << 1), 681 .ctrlbit = (1 << 2),
682}; 682};
683 683
684static struct clk exynos5_clk_mdma1 = { 684static struct clk exynos5_clk_mdma1 = {
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index cb2b027f09a6..a34036eb8ba2 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -40,6 +40,7 @@
40#include <plat/pd.h> 40#include <plat/pd.h>
41#include <plat/regs-fb-v4.h> 41#include <plat/regs-fb-v4.h>
42#include <plat/fimc-core.h> 42#include <plat/fimc-core.h>
43#include <plat/s5p-time.h>
43#include <plat/camport.h> 44#include <plat/camport.h>
44#include <plat/mipi_csis.h> 45#include <plat/mipi_csis.h>
45 46
@@ -1063,6 +1064,7 @@ static void __init universal_map_io(void)
1063 exynos_init_io(NULL, 0); 1064 exynos_init_io(NULL, 0);
1064 s3c24xx_init_clocks(24000000); 1065 s3c24xx_init_clocks(24000000);
1065 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); 1066 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1067 s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
1066} 1068}
1067 1069
1068static void s5p_tv_setup(void) 1070static void s5p_tv_setup(void)
@@ -1113,7 +1115,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1113 .map_io = universal_map_io, 1115 .map_io = universal_map_io,
1114 .handle_irq = gic_handle_irq, 1116 .handle_irq = gic_handle_irq,
1115 .init_machine = universal_machine_init, 1117 .init_machine = universal_machine_init,
1116 .timer = &exynos4_timer, 1118 .timer = &s5p_timer,
1117 .reserve = &universal_reserve, 1119 .reserve = &universal_reserve,
1118 .restart = exynos4_restart, 1120 .restart = exynos4_restart,
1119MACHINE_END 1121MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index cb224a344af0..0891ec6e27f5 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -365,23 +365,13 @@ static struct platform_device mipidsi0_device = {
365}; 365};
366 366
367/* SDHI0 */ 367/* SDHI0 */
368static irqreturn_t ag5evm_sdhi0_gpio_cd(int irq, void *arg)
369{
370 struct device *dev = arg;
371 struct sh_mobile_sdhi_info *info = dev->platform_data;
372 struct tmio_mmc_data *pdata = info->pdata;
373
374 tmio_mmc_cd_wakeup(pdata);
375
376 return IRQ_HANDLED;
377}
378
379static struct sh_mobile_sdhi_info sdhi0_info = { 368static struct sh_mobile_sdhi_info sdhi0_info = {
380 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 369 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
381 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 370 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
382 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, 371 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
383 .tmio_caps = MMC_CAP_SD_HIGHSPEED, 372 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
384 .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, 373 .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
374 .cd_gpio = GPIO_PORT251,
385}; 375};
386 376
387static struct resource sdhi0_resources[] = { 377static struct resource sdhi0_resources[] = {
@@ -557,7 +547,6 @@ static void __init ag5evm_init(void)
557 lcd_backlight_reset(); 547 lcd_backlight_reset();
558 548
559 /* enable SDHI0 on CN15 [SD I/F] */ 549 /* enable SDHI0 on CN15 [SD I/F] */
560 gpio_request(GPIO_FN_SDHICD0, NULL);
561 gpio_request(GPIO_FN_SDHIWP0, NULL); 550 gpio_request(GPIO_FN_SDHIWP0, NULL);
562 gpio_request(GPIO_FN_SDHICMD0, NULL); 551 gpio_request(GPIO_FN_SDHICMD0, NULL);
563 gpio_request(GPIO_FN_SDHICLK0, NULL); 552 gpio_request(GPIO_FN_SDHICLK0, NULL);
@@ -566,13 +555,6 @@ static void __init ag5evm_init(void)
566 gpio_request(GPIO_FN_SDHID0_1, NULL); 555 gpio_request(GPIO_FN_SDHID0_1, NULL);
567 gpio_request(GPIO_FN_SDHID0_0, NULL); 556 gpio_request(GPIO_FN_SDHID0_0, NULL);
568 557
569 if (!request_irq(intcs_evt2irq(0x3c0), ag5evm_sdhi0_gpio_cd,
570 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
571 "sdhi0 cd", &sdhi0_device.dev))
572 sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
573 else
574 pr_warn("Unable to setup SDHI0 GPIO IRQ\n");
575
576 /* enable SDHI1 on CN4 [WLAN I/F] */ 558 /* enable SDHI1 on CN4 [WLAN I/F] */
577 gpio_request(GPIO_FN_SDHICLK1, NULL); 559 gpio_request(GPIO_FN_SDHICLK1, NULL);
578 gpio_request(GPIO_FN_SDHICMD1_PU, NULL); 560 gpio_request(GPIO_FN_SDHICMD1_PU, NULL);
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index f49e28abe0ab..8c6202bb6aeb 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1011,21 +1011,12 @@ static int slot_cn7_get_cd(struct platform_device *pdev)
1011} 1011}
1012 1012
1013/* SDHI0 */ 1013/* SDHI0 */
1014static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg)
1015{
1016 struct device *dev = arg;
1017 struct sh_mobile_sdhi_info *info = dev->platform_data;
1018 struct tmio_mmc_data *pdata = info->pdata;
1019
1020 tmio_mmc_cd_wakeup(pdata);
1021
1022 return IRQ_HANDLED;
1023}
1024
1025static struct sh_mobile_sdhi_info sdhi0_info = { 1014static struct sh_mobile_sdhi_info sdhi0_info = {
1026 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 1015 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
1027 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 1016 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
1017 .tmio_flags = TMIO_MMC_USE_GPIO_CD,
1028 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, 1018 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
1019 .cd_gpio = GPIO_PORT172,
1029}; 1020};
1030 1021
1031static struct resource sdhi0_resources[] = { 1022static struct resource sdhi0_resources[] = {
@@ -1384,7 +1375,6 @@ static void __init mackerel_init(void)
1384{ 1375{
1385 u32 srcr4; 1376 u32 srcr4;
1386 struct clk *clk; 1377 struct clk *clk;
1387 int ret;
1388 1378
1389 /* External clock source */ 1379 /* External clock source */
1390 clk_set_rate(&sh7372_dv_clki_clk, 27000000); 1380 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
@@ -1481,7 +1471,6 @@ static void __init mackerel_init(void)
1481 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH); 1471 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
1482 1472
1483 /* enable SDHI0 */ 1473 /* enable SDHI0 */
1484 gpio_request(GPIO_FN_SDHICD0, NULL);
1485 gpio_request(GPIO_FN_SDHIWP0, NULL); 1474 gpio_request(GPIO_FN_SDHIWP0, NULL);
1486 gpio_request(GPIO_FN_SDHICMD0, NULL); 1475 gpio_request(GPIO_FN_SDHICMD0, NULL);
1487 gpio_request(GPIO_FN_SDHICLK0, NULL); 1476 gpio_request(GPIO_FN_SDHICLK0, NULL);
@@ -1490,13 +1479,6 @@ static void __init mackerel_init(void)
1490 gpio_request(GPIO_FN_SDHID0_1, NULL); 1479 gpio_request(GPIO_FN_SDHID0_1, NULL);
1491 gpio_request(GPIO_FN_SDHID0_0, NULL); 1480 gpio_request(GPIO_FN_SDHID0_0, NULL);
1492 1481
1493 ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd,
1494 IRQF_TRIGGER_FALLING, "sdhi0 cd", &sdhi0_device.dev);
1495 if (!ret)
1496 sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
1497 else
1498 pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret);
1499
1500#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) 1482#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1501 /* enable SDHI1 */ 1483 /* enable SDHI1 */
1502 gpio_request(GPIO_FN_SDHICMD1, NULL); 1484 gpio_request(GPIO_FN_SDHICMD1, NULL);
diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
index 6ac015c89206..b202c1272526 100644
--- a/arch/arm/mach-shmobile/headsmp.S
+++ b/arch/arm/mach-shmobile/headsmp.S
@@ -16,6 +16,59 @@
16 16
17 __CPUINIT 17 __CPUINIT
18 18
19/* Cache invalidation nicked from arch/arm/mach-imx/head-v7.S, thanks!
20 *
21 * The secondary kernel init calls v7_flush_dcache_all before it enables
22 * the L1; however, the L1 comes out of reset in an undefined state, so
23 * the clean + invalidate performed by v7_flush_dcache_all causes a bunch
24 * of cache lines with uninitialized data and uninitialized tags to get
25 * written out to memory, which does really unpleasant things to the main
26 * processor. We fix this by performing an invalidate, rather than a
27 * clean + invalidate, before jumping into the kernel.
28 *
29 * This funciton is cloned from arch/arm/mach-tegra/headsmp.S, and needs
30 * to be called for both secondary cores startup and primary core resume
31 * procedures. Ideally, it should be moved into arch/arm/mm/cache-v7.S.
32 */
33ENTRY(v7_invalidate_l1)
34 mov r0, #0
35 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
36 mcr p15, 2, r0, c0, c0, 0
37 mrc p15, 1, r0, c0, c0, 0
38
39 ldr r1, =0x7fff
40 and r2, r1, r0, lsr #13
41
42 ldr r1, =0x3ff
43
44 and r3, r1, r0, lsr #3 @ NumWays - 1
45 add r2, r2, #1 @ NumSets
46
47 and r0, r0, #0x7
48 add r0, r0, #4 @ SetShift
49
50 clz r1, r3 @ WayShift
51 add r4, r3, #1 @ NumWays
521: sub r2, r2, #1 @ NumSets--
53 mov r3, r4 @ Temp = NumWays
542: subs r3, r3, #1 @ Temp--
55 mov r5, r3, lsl r1
56 mov r6, r2, lsl r0
57 orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift)
58 mcr p15, 0, r5, c7, c6, 2
59 bgt 2b
60 cmp r2, #0
61 bgt 1b
62 dsb
63 isb
64 mov pc, lr
65ENDPROC(v7_invalidate_l1)
66
67ENTRY(shmobile_invalidate_start)
68 bl v7_invalidate_l1
69 b secondary_startup
70ENDPROC(shmobile_invalidate_start)
71
19/* 72/*
20 * Reset vector for secondary CPUs. 73 * Reset vector for secondary CPUs.
21 * This will be mapped at address 0 by SBAR register. 74 * This will be mapped at address 0 by SBAR register.
@@ -24,4 +77,5 @@
24 .align 12 77 .align 12
25ENTRY(shmobile_secondary_vector) 78ENTRY(shmobile_secondary_vector)
26 ldr pc, 1f 79 ldr pc, 1f
271: .long secondary_startup - PAGE_OFFSET + PLAT_PHYS_OFFSET 801: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET
81ENDPROC(shmobile_secondary_vector)
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 83ad3fe0a75f..c85e6ecda606 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -4,7 +4,6 @@
4extern void shmobile_earlytimer_init(void); 4extern void shmobile_earlytimer_init(void);
5extern struct sys_timer shmobile_timer; 5extern struct sys_timer shmobile_timer;
6struct twd_local_timer; 6struct twd_local_timer;
7void shmobile_twd_init(struct twd_local_timer *twd_local_timer);
8extern void shmobile_setup_console(void); 7extern void shmobile_setup_console(void);
9extern void shmobile_secondary_vector(void); 8extern void shmobile_secondary_vector(void);
10extern int shmobile_platform_cpu_kill(unsigned int cpu); 9extern int shmobile_platform_cpu_kill(unsigned int cpu);
@@ -82,5 +81,6 @@ extern int r8a7779_platform_cpu_kill(unsigned int cpu);
82extern void r8a7779_secondary_init(unsigned int cpu); 81extern void r8a7779_secondary_init(unsigned int cpu);
83extern int r8a7779_boot_secondary(unsigned int cpu); 82extern int r8a7779_boot_secondary(unsigned int cpu);
84extern void r8a7779_smp_prepare_cpus(void); 83extern void r8a7779_smp_prepare_cpus(void);
84extern void r8a7779_register_twd(void);
85 85
86#endif /* __ARCH_MACH_COMMON_H */ 86#endif /* __ARCH_MACH_COMMON_H */
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 12c6f529ab89..e98e46f6cf55 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -262,10 +262,14 @@ void __init r8a7779_add_standard_devices(void)
262 ARRAY_SIZE(r8a7779_late_devices)); 262 ARRAY_SIZE(r8a7779_late_devices));
263} 263}
264 264
265/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
266void __init __weak r8a7779_register_twd(void) { }
267
265static void __init r8a7779_earlytimer_init(void) 268static void __init r8a7779_earlytimer_init(void)
266{ 269{
267 r8a7779_clock_init(); 270 r8a7779_clock_init();
268 shmobile_earlytimer_init(); 271 shmobile_earlytimer_init();
272 r8a7779_register_twd();
269} 273}
270 274
271void __init r8a7779_add_early_devices(void) 275void __init r8a7779_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index 5bebffc10455..04a0dfe75493 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -688,10 +688,14 @@ void __init sh73a0_add_standard_devices(void)
688 ARRAY_SIZE(sh73a0_late_devices)); 688 ARRAY_SIZE(sh73a0_late_devices));
689} 689}
690 690
691/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
692void __init __weak sh73a0_register_twd(void) { }
693
691static void __init sh73a0_earlytimer_init(void) 694static void __init sh73a0_earlytimer_init(void)
692{ 695{
693 sh73a0_clock_init(); 696 sh73a0_clock_init();
694 shmobile_earlytimer_init(); 697 shmobile_earlytimer_init();
698 sh73a0_register_twd();
695} 699}
696 700
697void __init sh73a0_add_early_devices(void) 701void __init sh73a0_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index b62e19d4c9af..6d1d0238cbf7 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -64,8 +64,15 @@ static void __iomem *scu_base_addr(void)
64static DEFINE_SPINLOCK(scu_lock); 64static DEFINE_SPINLOCK(scu_lock);
65static unsigned long tmp; 65static unsigned long tmp;
66 66
67#ifdef CONFIG_HAVE_ARM_TWD
67static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); 68static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
68 69
70void __init r8a7779_register_twd(void)
71{
72 twd_local_timer_register(&twd_local_timer);
73}
74#endif
75
69static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) 76static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
70{ 77{
71 void __iomem *scu_base = scu_base_addr(); 78 void __iomem *scu_base = scu_base_addr();
@@ -84,7 +91,6 @@ unsigned int __init r8a7779_get_core_count(void)
84{ 91{
85 void __iomem *scu_base = scu_base_addr(); 92 void __iomem *scu_base = scu_base_addr();
86 93
87 shmobile_twd_init(&twd_local_timer);
88 return scu_get_core_count(scu_base); 94 return scu_get_core_count(scu_base);
89} 95}
90 96
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 14ad8b052f1a..e36c41c4ab40 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -42,7 +42,13 @@ static void __iomem *scu_base_addr(void)
42static DEFINE_SPINLOCK(scu_lock); 42static DEFINE_SPINLOCK(scu_lock);
43static unsigned long tmp; 43static unsigned long tmp;
44 44
45#ifdef CONFIG_HAVE_ARM_TWD
45static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); 46static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
47void __init sh73a0_register_twd(void)
48{
49 twd_local_timer_register(&twd_local_timer);
50}
51#endif
46 52
47static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) 53static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
48{ 54{
@@ -62,7 +68,6 @@ unsigned int __init sh73a0_get_core_count(void)
62{ 68{
63 void __iomem *scu_base = scu_base_addr(); 69 void __iomem *scu_base = scu_base_addr();
64 70
65 shmobile_twd_init(&twd_local_timer);
66 return scu_get_core_count(scu_base); 71 return scu_get_core_count(scu_base);
67} 72}
68 73
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index 2fba5f3d1c8a..8b79e7917a23 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -46,15 +46,6 @@ static void __init shmobile_timer_init(void)
46{ 46{
47} 47}
48 48
49void __init shmobile_twd_init(struct twd_local_timer *twd_local_timer)
50{
51#ifdef CONFIG_HAVE_ARM_TWD
52 int err = twd_local_timer_register(twd_local_timer);
53 if (err)
54 pr_err("twd_local_timer_register failed %d\n", err);
55#endif
56}
57
58struct sys_timer shmobile_timer = { 49struct sys_timer shmobile_timer = {
59 .init = shmobile_timer_init, 50 .init = shmobile_timer_init,
60}; 51};