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authorRalf Baechle <ralf@linux-mips.org>2014-04-16 05:00:12 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-05-21 05:12:56 -0400
commit47fa0c0251413db66a9018fbac6f6266201195ae (patch)
tree888319389bc7f02d0711c4363e4ac8782d72fd26 /arch
parent85c51c511d6373d4bc859458fd3f130015db31a5 (diff)
MIPS: math-emu: Reformat code according to coding style.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/math-emu/cp1emu.c42
-rw-r--r--arch/mips/math-emu/ieee754dp.c4
-rw-r--r--arch/mips/math-emu/ieee754dp.h22
-rw-r--r--arch/mips/math-emu/ieee754int.h146
-rw-r--r--arch/mips/math-emu/ieee754sp.c7
-rw-r--r--arch/mips/math-emu/ieee754sp.h33
-rw-r--r--arch/mips/math-emu/me-debugfs.c19
7 files changed, 140 insertions, 133 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index c4b855e7b0e0..584e0b805909 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -869,14 +869,16 @@ static inline int cop1_64bit(struct pt_regs *xcp)
869#endif 869#endif
870} 870}
871 871
872#define SIFROMREG(si, x) do { \ 872#define SIFROMREG(si, x) \
873do { \
873 if (cop1_64bit(xcp)) \ 874 if (cop1_64bit(xcp)) \
874 (si) = get_fpr32(&ctx->fpr[x], 0); \ 875 (si) = get_fpr32(&ctx->fpr[x], 0); \
875 else \ 876 else \
876 (si) = get_fpr32(&ctx->fpr[(x) & ~1], (x) & 1); \ 877 (si) = get_fpr32(&ctx->fpr[(x) & ~1], (x) & 1); \
877} while (0) 878} while (0)
878 879
879#define SITOREG(si, x) do { \ 880#define SITOREG(si, x) \
881do { \
880 if (cop1_64bit(xcp)) { \ 882 if (cop1_64bit(xcp)) { \
881 unsigned i; \ 883 unsigned i; \
882 set_fpr32(&ctx->fpr[x], 0, si); \ 884 set_fpr32(&ctx->fpr[x], 0, si); \
@@ -889,17 +891,19 @@ static inline int cop1_64bit(struct pt_regs *xcp)
889 891
890#define SIFROMHREG(si, x) ((si) = get_fpr32(&ctx->fpr[x], 1)) 892#define SIFROMHREG(si, x) ((si) = get_fpr32(&ctx->fpr[x], 1))
891 893
892#define SITOHREG(si, x) do { \ 894#define SITOHREG(si, x) \
895do { \
893 unsigned i; \ 896 unsigned i; \
894 set_fpr32(&ctx->fpr[x], 1, si); \ 897 set_fpr32(&ctx->fpr[x], 1, si); \
895 for (i = 2; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \ 898 for (i = 2; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \
896 set_fpr32(&ctx->fpr[x], i, 0); \ 899 set_fpr32(&ctx->fpr[x], i, 0); \
897} while (0) 900} while (0)
898 901
899#define DIFROMREG(di, x) \ 902#define DIFROMREG(di, x) \
900 ((di) = get_fpr64(&ctx->fpr[(x) & ~(cop1_64bit(xcp) == 0)], 0)) 903 ((di) = get_fpr64(&ctx->fpr[(x) & ~(cop1_64bit(xcp) == 0)], 0))
901 904
902#define DITOREG(di, x) do { \ 905#define DITOREG(di, x) \
906do { \
903 unsigned fpr, i; \ 907 unsigned fpr, i; \
904 fpr = (x) & ~(cop1_64bit(xcp) == 0); \ 908 fpr = (x) & ~(cop1_64bit(xcp) == 0); \
905 set_fpr64(&ctx->fpr[fpr], 0, di); \ 909 set_fpr64(&ctx->fpr[fpr], 0, di); \
@@ -1341,20 +1345,20 @@ static const unsigned char cmptab[8] = {
1341 * Additional MIPS4 instructions 1345 * Additional MIPS4 instructions
1342 */ 1346 */
1343 1347
1344#define DEF3OP(name, p, f1, f2, f3) \ 1348#define DEF3OP(name, p, f1, f2, f3) \
1345static union ieee754##p fpemu_##p##_##name(union ieee754##p r, union ieee754##p s, \ 1349static union ieee754##p fpemu_##p##_##name(union ieee754##p r, \
1346 union ieee754##p t) \ 1350 union ieee754##p s, union ieee754##p t) \
1347{ \ 1351{ \
1348 struct _ieee754_csr ieee754_csr_save; \ 1352 struct _ieee754_csr ieee754_csr_save; \
1349 s = f1(s, t); \ 1353 s = f1(s, t); \
1350 ieee754_csr_save = ieee754_csr; \ 1354 ieee754_csr_save = ieee754_csr; \
1351 s = f2(s, r); \ 1355 s = f2(s, r); \
1352 ieee754_csr_save.cx |= ieee754_csr.cx; \ 1356 ieee754_csr_save.cx |= ieee754_csr.cx; \
1353 ieee754_csr_save.sx |= ieee754_csr.sx; \ 1357 ieee754_csr_save.sx |= ieee754_csr.sx; \
1354 s = f3(s); \ 1358 s = f3(s); \
1355 ieee754_csr.cx |= ieee754_csr_save.cx; \ 1359 ieee754_csr.cx |= ieee754_csr_save.cx; \
1356 ieee754_csr.sx |= ieee754_csr_save.sx; \ 1360 ieee754_csr.sx |= ieee754_csr_save.sx; \
1357 return s; \ 1361 return s; \
1358} 1362}
1359 1363
1360static union ieee754dp fpemu_dp_recip(union ieee754dp d) 1364static union ieee754dp fpemu_dp_recip(union ieee754dp d)
diff --git a/arch/mips/math-emu/ieee754dp.c b/arch/mips/math-emu/ieee754dp.c
index 3692362b8072..43fb7fefb6cc 100644
--- a/arch/mips/math-emu/ieee754dp.c
+++ b/arch/mips/math-emu/ieee754dp.c
@@ -151,12 +151,12 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
151 case IEEE754_RZ: 151 case IEEE754_RZ:
152 return ieee754dp_zero(sn); 152 return ieee754dp_zero(sn);
153 case IEEE754_RU: /* toward +Infinity */ 153 case IEEE754_RU: /* toward +Infinity */
154 if(sn == 0) 154 if (sn == 0)
155 return ieee754dp_min(0); 155 return ieee754dp_min(0);
156 else 156 else
157 return ieee754dp_zero(1); 157 return ieee754dp_zero(1);
158 case IEEE754_RD: /* toward -Infinity */ 158 case IEEE754_RD: /* toward -Infinity */
159 if(sn == 0) 159 if (sn == 0)
160 return ieee754dp_zero(0); 160 return ieee754dp_zero(0);
161 else 161 else
162 return ieee754dp_min(1); 162 return ieee754dp_min(1);
diff --git a/arch/mips/math-emu/ieee754dp.h b/arch/mips/math-emu/ieee754dp.h
index ad2568fa0b05..3759f3f35293 100644
--- a/arch/mips/math-emu/ieee754dp.h
+++ b/arch/mips/math-emu/ieee754dp.h
@@ -32,17 +32,17 @@
32 32
33/* 3bit extended double precision sticky right shift */ 33/* 3bit extended double precision sticky right shift */
34#define XDPSRS(v,rs) \ 34#define XDPSRS(v,rs) \
35 ((rs > (DP_MBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0)) 35 ((rs > (DP_MBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0))
36 36
37#define XDPSRSX1() \ 37#define XDPSRSX1() \
38 (xe++, (xm = (xm >> 1) | (xm & 1))) 38 (xe++, (xm = (xm >> 1) | (xm & 1)))
39 39
40#define XDPSRS1(v) \ 40#define XDPSRS1(v) \
41 (((v) >> 1) | ((v) & 1)) 41 (((v) >> 1) | ((v) & 1))
42 42
43/* convert denormal to normalized with extended exponent */ 43/* convert denormal to normalized with extended exponent */
44#define DPDNORMx(m,e) \ 44#define DPDNORMx(m,e) \
45 while( (m >> DP_MBITS) == 0) { m <<= 1; e--; } 45 while ((m >> DP_MBITS) == 0) { m <<= 1; e--; }
46#define DPDNORMX DPDNORMx(xm, xe) 46#define DPDNORMX DPDNORMx(xm, xe)
47#define DPDNORMY DPDNORMx(ym, ye) 47#define DPDNORMY DPDNORMx(ym, ye)
48 48
@@ -71,13 +71,13 @@ extern union ieee754dp ieee754dp_bestnan(union ieee754dp, union ieee754dp);
71extern union ieee754dp ieee754dp_format(int, int, u64); 71extern union ieee754dp ieee754dp_format(int, int, u64);
72 72
73 73
74#define DPNORMRET2(s, e, m, name, a0, a1) \ 74#define DPNORMRET2(s, e, m, name, a0, a1) \
75{ \ 75{ \
76 union ieee754dp V = ieee754dp_format(s, e, m); \ 76 union ieee754dp V = ieee754dp_format(s, e, m); \
77 if(TSTX()) \ 77 if (TSTX()) \
78 return ieee754dp_xcpt(V, name, a0, a1); \ 78 return ieee754dp_xcpt(V, name, a0, a1); \
79 else \ 79 else \
80 return V; \ 80 return V; \
81} 81}
82 82
83#define DPNORMRET1(s, e, m, name, a0) DPNORMRET2(s, e, m, name, a0, a0) 83#define DPNORMRET1(s, e, m, name, a0) DPNORMRET2(s, e, m, name, a0, a0)
diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h
index 4b6c6fb35304..27ed825ad35a 100644
--- a/arch/mips/math-emu/ieee754int.h
+++ b/arch/mips/math-emu/ieee754int.h
@@ -57,105 +57,105 @@
57#define CLPAIR(x, y) ((x)*6+(y)) 57#define CLPAIR(x, y) ((x)*6+(y))
58 58
59#define CLEARCX \ 59#define CLEARCX \
60 (ieee754_csr.cx = 0) 60 (ieee754_csr.cx = 0)
61 61
62#define SETCX(x) \ 62#define SETCX(x) \
63 (ieee754_csr.cx |= (x), ieee754_csr.sx |= (x)) 63 (ieee754_csr.cx |= (x), ieee754_csr.sx |= (x))
64 64
65#define SETANDTESTCX(x) \ 65#define SETANDTESTCX(x) \
66 (SETCX(x), ieee754_csr.mx & (x)) 66 (SETCX(x), ieee754_csr.mx & (x))
67 67
68#define TSTX() \ 68#define TSTX() \
69 (ieee754_csr.cx & ieee754_csr.mx) 69 (ieee754_csr.cx & ieee754_csr.mx)
70 70
71 71
72#define COMPXSP \ 72#define COMPXSP \
73 unsigned xm; int xe; int xs __maybe_unused; int xc 73 unsigned xm; int xe; int xs __maybe_unused; int xc
74 74
75#define COMPYSP \ 75#define COMPYSP \
76 unsigned ym; int ye; int ys; int yc 76 unsigned ym; int ye; int ys; int yc
77 77
78#define EXPLODESP(v, vc, vs, ve, vm) \ 78#define EXPLODESP(v, vc, vs, ve, vm) \
79{\ 79{ \
80 vs = SPSIGN(v);\ 80 vs = SPSIGN(v); \
81 ve = SPBEXP(v);\ 81 ve = SPBEXP(v); \
82 vm = SPMANT(v);\ 82 vm = SPMANT(v); \
83 if(ve == SP_EMAX+1+SP_EBIAS){\ 83 if (ve == SP_EMAX+1+SP_EBIAS) { \
84 if(vm == 0)\ 84 if (vm == 0) \
85 vc = IEEE754_CLASS_INF;\ 85 vc = IEEE754_CLASS_INF; \
86 else if(vm & SP_MBIT(SP_MBITS-1)) \ 86 else if (vm & SP_MBIT(SP_MBITS-1)) \
87 vc = IEEE754_CLASS_SNAN;\ 87 vc = IEEE754_CLASS_SNAN; \
88 else \ 88 else \
89 vc = IEEE754_CLASS_QNAN;\ 89 vc = IEEE754_CLASS_QNAN; \
90 } else if(ve == SP_EMIN-1+SP_EBIAS) {\ 90 } else if (ve == SP_EMIN-1+SP_EBIAS) { \
91 if(vm) {\ 91 if (vm) { \
92 ve = SP_EMIN;\ 92 ve = SP_EMIN; \
93 vc = IEEE754_CLASS_DNORM;\ 93 vc = IEEE754_CLASS_DNORM; \
94 } else\ 94 } else \
95 vc = IEEE754_CLASS_ZERO;\ 95 vc = IEEE754_CLASS_ZERO; \
96 } else {\ 96 } else { \
97 ve -= SP_EBIAS;\ 97 ve -= SP_EBIAS; \
98 vm |= SP_HIDDEN_BIT;\ 98 vm |= SP_HIDDEN_BIT; \
99 vc = IEEE754_CLASS_NORM;\ 99 vc = IEEE754_CLASS_NORM; \
100 }\ 100 } \
101} 101}
102#define EXPLODEXSP EXPLODESP(x, xc, xs, xe, xm) 102#define EXPLODEXSP EXPLODESP(x, xc, xs, xe, xm)
103#define EXPLODEYSP EXPLODESP(y, yc, ys, ye, ym) 103#define EXPLODEYSP EXPLODESP(y, yc, ys, ye, ym)
104 104
105 105
106#define COMPXDP \ 106#define COMPXDP \
107u64 xm; int xe; int xs __maybe_unused; int xc 107 u64 xm; int xe; int xs __maybe_unused; int xc
108 108
109#define COMPYDP \ 109#define COMPYDP \
110u64 ym; int ye; int ys; int yc 110 u64 ym; int ye; int ys; int yc
111 111
112#define EXPLODEDP(v, vc, vs, ve, vm) \ 112#define EXPLODEDP(v, vc, vs, ve, vm) \
113{\ 113{ \
114 vm = DPMANT(v);\ 114 vm = DPMANT(v); \
115 vs = DPSIGN(v);\ 115 vs = DPSIGN(v); \
116 ve = DPBEXP(v);\ 116 ve = DPBEXP(v); \
117 if(ve == DP_EMAX+1+DP_EBIAS){\ 117 if (ve == DP_EMAX+1+DP_EBIAS) { \
118 if(vm == 0)\ 118 if (vm == 0) \
119 vc = IEEE754_CLASS_INF;\ 119 vc = IEEE754_CLASS_INF; \
120 else if(vm & DP_MBIT(DP_MBITS-1)) \ 120 else if (vm & DP_MBIT(DP_MBITS-1)) \
121 vc = IEEE754_CLASS_SNAN;\ 121 vc = IEEE754_CLASS_SNAN; \
122 else \ 122 else \
123 vc = IEEE754_CLASS_QNAN;\ 123 vc = IEEE754_CLASS_QNAN; \
124 } else if(ve == DP_EMIN-1+DP_EBIAS) {\ 124 } else if (ve == DP_EMIN-1+DP_EBIAS) { \
125 if(vm) {\ 125 if (vm) { \
126 ve = DP_EMIN;\ 126 ve = DP_EMIN; \
127 vc = IEEE754_CLASS_DNORM;\ 127 vc = IEEE754_CLASS_DNORM; \
128 } else\ 128 } else \
129 vc = IEEE754_CLASS_ZERO;\ 129 vc = IEEE754_CLASS_ZERO; \
130 } else {\ 130 } else { \
131 ve -= DP_EBIAS;\ 131 ve -= DP_EBIAS; \
132 vm |= DP_HIDDEN_BIT;\ 132 vm |= DP_HIDDEN_BIT; \
133 vc = IEEE754_CLASS_NORM;\ 133 vc = IEEE754_CLASS_NORM; \
134 }\ 134 } \
135} 135}
136#define EXPLODEXDP EXPLODEDP(x, xc, xs, xe, xm) 136#define EXPLODEXDP EXPLODEDP(x, xc, xs, xe, xm)
137#define EXPLODEYDP EXPLODEDP(y, yc, ys, ye, ym) 137#define EXPLODEYDP EXPLODEDP(y, yc, ys, ye, ym)
138 138
139#define FLUSHDP(v, vc, vs, ve, vm) \ 139#define FLUSHDP(v, vc, vs, ve, vm) \
140 if(vc==IEEE754_CLASS_DNORM) {\ 140 if (vc==IEEE754_CLASS_DNORM) { \
141 if(ieee754_csr.nod) {\ 141 if (ieee754_csr.nod) { \
142 SETCX(IEEE754_INEXACT);\ 142 SETCX(IEEE754_INEXACT); \
143 vc = IEEE754_CLASS_ZERO;\ 143 vc = IEEE754_CLASS_ZERO; \
144 ve = DP_EMIN-1+DP_EBIAS;\ 144 ve = DP_EMIN-1+DP_EBIAS; \
145 vm = 0;\ 145 vm = 0; \
146 v = ieee754dp_zero(vs);\ 146 v = ieee754dp_zero(vs); \
147 }\ 147 } \
148 } 148 }
149 149
150#define FLUSHSP(v, vc, vs, ve, vm) \ 150#define FLUSHSP(v, vc, vs, ve, vm) \
151 if(vc==IEEE754_CLASS_DNORM) {\ 151 if (vc==IEEE754_CLASS_DNORM) { \
152 if(ieee754_csr.nod) {\ 152 if (ieee754_csr.nod) { \
153 SETCX(IEEE754_INEXACT);\ 153 SETCX(IEEE754_INEXACT); \
154 vc = IEEE754_CLASS_ZERO;\ 154 vc = IEEE754_CLASS_ZERO; \
155 ve = SP_EMIN-1+SP_EBIAS;\ 155 ve = SP_EMIN-1+SP_EBIAS; \
156 vm = 0;\ 156 vm = 0; \
157 v = ieee754sp_zero(vs);\ 157 v = ieee754sp_zero(vs); \
158 }\ 158 } \
159 } 159 }
160 160
161#define FLUSHXDP FLUSHDP(x, xc, xs, xe, xm) 161#define FLUSHXDP FLUSHDP(x, xc, xs, xe, xm)
diff --git a/arch/mips/math-emu/ieee754sp.c b/arch/mips/math-emu/ieee754sp.c
index ac84d19e7c87..a15d2123e05e 100644
--- a/arch/mips/math-emu/ieee754sp.c
+++ b/arch/mips/math-emu/ieee754sp.c
@@ -152,12 +152,12 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
152 case IEEE754_RZ: 152 case IEEE754_RZ:
153 return ieee754sp_zero(sn); 153 return ieee754sp_zero(sn);
154 case IEEE754_RU: /* toward +Infinity */ 154 case IEEE754_RU: /* toward +Infinity */
155 if(sn == 0) 155 if (sn == 0)
156 return ieee754sp_min(0); 156 return ieee754sp_min(0);
157 else 157 else
158 return ieee754sp_zero(1); 158 return ieee754sp_zero(1);
159 case IEEE754_RD: /* toward -Infinity */ 159 case IEEE754_RD: /* toward -Infinity */
160 if(sn == 0) 160 if (sn == 0)
161 return ieee754sp_zero(0); 161 return ieee754sp_zero(0);
162 else 162 else
163 return ieee754sp_min(1); 163 return ieee754sp_min(1);
@@ -174,8 +174,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
174 /* Clear grs bits */ 174 /* Clear grs bits */
175 xm &= ~(SP_MBIT(3) - 1); 175 xm &= ~(SP_MBIT(3) - 1);
176 xe++; 176 xe++;
177 } 177 } else {
178 else {
179 /* sticky right shift es bits 178 /* sticky right shift es bits
180 */ 179 */
181 SPXSRSXn(es); 180 SPXSRSXn(es);
diff --git a/arch/mips/math-emu/ieee754sp.h b/arch/mips/math-emu/ieee754sp.h
index 5836fa1e69d8..f007c47086cb 100644
--- a/arch/mips/math-emu/ieee754sp.h
+++ b/arch/mips/math-emu/ieee754sp.h
@@ -31,23 +31,23 @@
31#define assert(expr) ((void)0) 31#define assert(expr) ((void)0)
32 32
33/* 3bit extended single precision sticky right shift */ 33/* 3bit extended single precision sticky right shift */
34#define SPXSRSXn(rs) \ 34#define SPXSRSXn(rs) \
35 (xe += rs, \ 35 (xe += rs, \
36 xm = (rs > (SP_MBITS+3))?1:((xm) >> (rs)) | ((xm) << (32-(rs)) != 0)) 36 xm = (rs > (SP_MBITS+3))?1:((xm) >> (rs)) | ((xm) << (32-(rs)) != 0))
37 37
38#define SPXSRSX1() \ 38#define SPXSRSX1() \
39 (xe++, (xm = (xm >> 1) | (xm & 1))) 39 (xe++, (xm = (xm >> 1) | (xm & 1)))
40 40
41#define SPXSRSYn(rs) \ 41#define SPXSRSYn(rs) \
42 (ye+=rs, \ 42 (ye+=rs, \
43 ym = (rs > (SP_MBITS+3))?1:((ym) >> (rs)) | ((ym) << (32-(rs)) != 0)) 43 ym = (rs > (SP_MBITS+3))?1:((ym) >> (rs)) | ((ym) << (32-(rs)) != 0))
44 44
45#define SPXSRSY1() \ 45#define SPXSRSY1() \
46 (ye++, (ym = (ym >> 1) | (ym & 1))) 46 (ye++, (ym = (ym >> 1) | (ym & 1)))
47 47
48/* convert denormal to normalized with extended exponent */ 48/* convert denormal to normalized with extended exponent */
49#define SPDNORMx(m,e) \ 49#define SPDNORMx(m,e) \
50 while( (m >> SP_MBITS) == 0) { m <<= 1; e--; } 50 while ((m >> SP_MBITS) == 0) { m <<= 1; e--; }
51#define SPDNORMX SPDNORMx(xm, xe) 51#define SPDNORMX SPDNORMx(xm, xe)
52#define SPDNORMY SPDNORMx(ym, ye) 52#define SPDNORMY SPDNORMx(ym, ye)
53 53
@@ -77,13 +77,14 @@ extern union ieee754sp ieee754sp_bestnan(union ieee754sp, union ieee754sp);
77extern union ieee754sp ieee754sp_format(int, int, unsigned); 77extern union ieee754sp ieee754sp_format(int, int, unsigned);
78 78
79 79
80#define SPNORMRET2(s, e, m, name, a0, a1) \ 80#define SPNORMRET2(s, e, m, name, a0, a1) \
81{ \ 81{ \
82 union ieee754sp V = ieee754sp_format(s, e, m); \ 82 union ieee754sp V = ieee754sp_format(s, e, m); \
83 if(TSTX()) \ 83 \
84 return ieee754sp_xcpt(V, name, a0, a1); \ 84 if (TSTX()) \
85 else \ 85 return ieee754sp_xcpt(V, name, a0, a1); \
86 return V; \ 86 else \
87 return V; \
87} 88}
88 89
89#define SPNORMRET1(s, e, m, name, a0) SPNORMRET2(s, e, m, name, a0, a0) 90#define SPNORMRET1(s, e, m, name, a0) SPNORMRET2(s, e, m, name, a0, a0)
diff --git a/arch/mips/math-emu/me-debugfs.c b/arch/mips/math-emu/me-debugfs.c
index d895b38773df..95ed9f9bd2b0 100644
--- a/arch/mips/math-emu/me-debugfs.c
+++ b/arch/mips/math-emu/me-debugfs.c
@@ -38,14 +38,17 @@ static int __init debugfs_fpuemu(void)
38 if (!dir) 38 if (!dir)
39 return -ENOMEM; 39 return -ENOMEM;
40 40
41#define FPU_STAT_CREATE(M) \ 41#define FPU_EMU_STAT_OFFSET(m) \
42 do { \ 42 offsetof(struct mips_fpu_emulator_stats, m)
43 d = debugfs_create_file(#M , S_IRUGO, dir, \ 43
44 (void *)offsetof(struct mips_fpu_emulator_stats, M), \ 44#define FPU_STAT_CREATE(m) \
45 &fops_fpuemu_stat); \ 45do { \
46 if (!d) \ 46 d = debugfs_create_file(#m , S_IRUGO, dir, \
47 return -ENOMEM; \ 47 (void *)FPU_EMU_STAT_OFFSET(m), \
48 } while (0) 48 &fops_fpuemu_stat); \
49 if (!d) \
50 return -ENOMEM; \
51} while (0)
49 52
50 FPU_STAT_CREATE(emulated); 53 FPU_STAT_CREATE(emulated);
51 FPU_STAT_CREATE(loads); 54 FPU_STAT_CREATE(loads);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 23:09:41 -0500