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authorAndreas Schwab <schwab@linux-m68k.org>2011-11-08 02:08:52 -0500
committerAvi Kivity <avi@redhat.com>2011-12-26 06:28:00 -0500
commit36cc66d638d3ffbc635b0d48b29c1128fdad38f4 (patch)
tree26951168034391d951994641fc0eaf991d5fc778 /arch
parent4d25a066b69fb749a39d0d4c610689dd765a0b0e (diff)
KVM: PPC: move compute_tlbie_rb to book3s_64 common header
compute_tlbie_rb is only used on ppc64 and cannot be compiled on ppc32. Signed-off-by: Andreas Schwab <schwab@linux-m68k.org> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/include/asm/kvm_book3s.h33
-rw-r--r--arch/powerpc/include/asm/kvm_book3s_64.h33
2 files changed, 33 insertions, 33 deletions
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index d4df013ad779..69c7377d2071 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -381,39 +381,6 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
381} 381}
382#endif 382#endif
383 383
384static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
385 unsigned long pte_index)
386{
387 unsigned long rb, va_low;
388
389 rb = (v & ~0x7fUL) << 16; /* AVA field */
390 va_low = pte_index >> 3;
391 if (v & HPTE_V_SECONDARY)
392 va_low = ~va_low;
393 /* xor vsid from AVA */
394 if (!(v & HPTE_V_1TB_SEG))
395 va_low ^= v >> 12;
396 else
397 va_low ^= v >> 24;
398 va_low &= 0x7ff;
399 if (v & HPTE_V_LARGE) {
400 rb |= 1; /* L field */
401 if (cpu_has_feature(CPU_FTR_ARCH_206) &&
402 (r & 0xff000)) {
403 /* non-16MB large page, must be 64k */
404 /* (masks depend on page size) */
405 rb |= 0x1000; /* page encoding in LP field */
406 rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
407 rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
408 }
409 } else {
410 /* 4kB page */
411 rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
412 }
413 rb |= (v >> 54) & 0x300; /* B field */
414 return rb;
415}
416
417/* Magic register values loaded into r3 and r4 before the 'sc' assembly 384/* Magic register values loaded into r3 and r4 before the 'sc' assembly
418 * instruction for the OSI hypercalls */ 385 * instruction for the OSI hypercalls */
419#define OSI_SC_MAGIC_R3 0x113724FA 386#define OSI_SC_MAGIC_R3 0x113724FA
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h
index e43fe42b9875..d0ac94f98f9e 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -29,4 +29,37 @@ static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu)
29 29
30#define SPAPR_TCE_SHIFT 12 30#define SPAPR_TCE_SHIFT 12
31 31
32static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
33 unsigned long pte_index)
34{
35 unsigned long rb, va_low;
36
37 rb = (v & ~0x7fUL) << 16; /* AVA field */
38 va_low = pte_index >> 3;
39 if (v & HPTE_V_SECONDARY)
40 va_low = ~va_low;
41 /* xor vsid from AVA */
42 if (!(v & HPTE_V_1TB_SEG))
43 va_low ^= v >> 12;
44 else
45 va_low ^= v >> 24;
46 va_low &= 0x7ff;
47 if (v & HPTE_V_LARGE) {
48 rb |= 1; /* L field */
49 if (cpu_has_feature(CPU_FTR_ARCH_206) &&
50 (r & 0xff000)) {
51 /* non-16MB large page, must be 64k */
52 /* (masks depend on page size) */
53 rb |= 0x1000; /* page encoding in LP field */
54 rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
55 rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
56 }
57 } else {
58 /* 4kB page */
59 rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
60 }
61 rb |= (v >> 54) & 0x300; /* B field */
62 return rb;
63}
64
32#endif /* __ASM_KVM_BOOK3S_64_H__ */ 65#endif /* __ASM_KVM_BOOK3S_64_H__ */