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authorStephen Warren <swarren@nvidia.com>2012-05-11 19:12:52 -0400
committerStephen Warren <swarren@nvidia.com>2012-05-14 12:55:19 -0400
commit2eaab06ea6cc2d686fd1a6de62b1094bedc4cfca (patch)
tree3b5e9fe39aff3fa3d1949722431b158e988ca7a2 /arch
parentc04abb3a07b56db4756b6f970609e65a8624b0a3 (diff)
ARM: dt: tegra: consistent basic property ordering
Put properties in order compatible, reg, interrupts, then anything else the node has. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/tegra-paz00.dts4
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi24
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi24
3 files changed, 26 insertions, 26 deletions
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
index b500212cc01c..6539e8934802 100644
--- a/arch/arm/boot/dts/tegra-paz00.dts
+++ b/arch/arm/boot/dts/tegra-paz00.dts
@@ -270,11 +270,11 @@
270 }; 270 };
271 271
272 nvec { 272 nvec {
273 #address-cells = <1>;
274 #size-cells = <0>;
275 compatible = "nvidia,nvec"; 273 compatible = "nvidia,nvec";
276 reg = <0x7000c500 0x100>; 274 reg = <0x7000c500 0x100>;
277 interrupts = <0 92 0x04>; 275 interrupts = <0 92 0x04>;
276 #address-cells = <1>;
277 #size-cells = <0>;
278 clock-frequency = <80000>; 278 clock-frequency = <80000>;
279 request-gpios = <&gpio 170 0>; /* gpio PV2 */ 279 request-gpios = <&gpio 170 0>; /* gpio PV2 */
280 slave-addr = <138>; 280 slave-addr = <138>;
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 0e371f92d1d2..df34defe1bbd 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -6,10 +6,10 @@
6 6
7 intc: interrupt-controller { 7 intc: interrupt-controller {
8 compatible = "arm,cortex-a9-gic"; 8 compatible = "arm,cortex-a9-gic";
9 interrupt-controller;
10 #interrupt-cells = <3>;
11 reg = <0x50041000 0x1000 9 reg = <0x50041000 0x1000
12 0x50040100 0x0100>; 10 0x50040100 0x0100>;
11 interrupt-controller;
12 #interrupt-cells = <3>;
13 }; 13 };
14 14
15 apbdma: dma { 15 apbdma: dma {
@@ -117,35 +117,35 @@
117 }; 117 };
118 118
119 i2c@7000c000 { 119 i2c@7000c000 {
120 #address-cells = <1>;
121 #size-cells = <0>;
122 compatible = "nvidia,tegra20-i2c"; 120 compatible = "nvidia,tegra20-i2c";
123 reg = <0x7000c000 0x100>; 121 reg = <0x7000c000 0x100>;
124 interrupts = <0 38 0x04>; 122 interrupts = <0 38 0x04>;
123 #address-cells = <1>;
124 #size-cells = <0>;
125 }; 125 };
126 126
127 i2c@7000c400 { 127 i2c@7000c400 {
128 #address-cells = <1>;
129 #size-cells = <0>;
130 compatible = "nvidia,tegra20-i2c"; 128 compatible = "nvidia,tegra20-i2c";
131 reg = <0x7000c400 0x100>; 129 reg = <0x7000c400 0x100>;
132 interrupts = <0 84 0x04>; 130 interrupts = <0 84 0x04>;
131 #address-cells = <1>;
132 #size-cells = <0>;
133 }; 133 };
134 134
135 i2c@7000c500 { 135 i2c@7000c500 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 compatible = "nvidia,tegra20-i2c"; 136 compatible = "nvidia,tegra20-i2c";
139 reg = <0x7000c500 0x100>; 137 reg = <0x7000c500 0x100>;
140 interrupts = <0 92 0x04>; 138 interrupts = <0 92 0x04>;
139 #address-cells = <1>;
140 #size-cells = <0>;
141 }; 141 };
142 142
143 i2c@7000d000 { 143 i2c@7000d000 {
144 #address-cells = <1>;
145 #size-cells = <0>;
146 compatible = "nvidia,tegra20-i2c-dvc"; 144 compatible = "nvidia,tegra20-i2c-dvc";
147 reg = <0x7000d000 0x200>; 145 reg = <0x7000d000 0x200>;
148 interrupts = <0 53 0x04>; 146 interrupts = <0 53 0x04>;
147 #address-cells = <1>;
148 #size-cells = <0>;
149 }; 149 };
150 150
151 pmc { 151 pmc {
@@ -167,10 +167,10 @@
167 }; 167 };
168 168
169 emc { 169 emc {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "nvidia,tegra20-emc"; 170 compatible = "nvidia,tegra20-emc";
173 reg = <0x7000f400 0x200>; 171 reg = <0x7000f400 0x200>;
172 #address-cells = <1>;
173 #size-cells = <0>;
174 }; 174 };
175 175
176 usb@c5000000 { 176 usb@c5000000 {
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 9fb47adc935d..5a1c85fbf0f0 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -6,10 +6,10 @@
6 6
7 intc: interrupt-controller { 7 intc: interrupt-controller {
8 compatible = "arm,cortex-a9-gic"; 8 compatible = "arm,cortex-a9-gic";
9 interrupt-controller;
10 #interrupt-cells = <3>;
11 reg = <0x50041000 0x1000 9 reg = <0x50041000 0x1000
12 0x50040100 0x0100>; 10 0x50040100 0x0100>;
11 interrupt-controller;
12 #interrupt-cells = <3>;
13 }; 13 };
14 14
15 apbdma: dma { 15 apbdma: dma {
@@ -113,43 +113,43 @@
113 }; 113 };
114 114
115 i2c@7000c000 { 115 i2c@7000c000 {
116 #address-cells = <1>;
117 #size-cells = <0>;
118 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; 116 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
119 reg = <0x7000c000 0x100>; 117 reg = <0x7000c000 0x100>;
120 interrupts = <0 38 0x04>; 118 interrupts = <0 38 0x04>;
119 #address-cells = <1>;
120 #size-cells = <0>;
121 }; 121 };
122 122
123 i2c@7000c400 { 123 i2c@7000c400 {
124 #address-cells = <1>;
125 #size-cells = <0>;
126 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; 124 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
127 reg = <0x7000c400 0x100>; 125 reg = <0x7000c400 0x100>;
128 interrupts = <0 84 0x04>; 126 interrupts = <0 84 0x04>;
127 #address-cells = <1>;
128 #size-cells = <0>;
129 }; 129 };
130 130
131 i2c@7000c500 { 131 i2c@7000c500 {
132 #address-cells = <1>;
133 #size-cells = <0>;
134 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; 132 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
135 reg = <0x7000c500 0x100>; 133 reg = <0x7000c500 0x100>;
136 interrupts = <0 92 0x04>; 134 interrupts = <0 92 0x04>;
135 #address-cells = <1>;
136 #size-cells = <0>;
137 }; 137 };
138 138
139 i2c@7000c700 { 139 i2c@7000c700 {
140 #address-cells = <1>;
141 #size-cells = <0>;
142 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; 140 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
143 reg = <0x7000c700 0x100>; 141 reg = <0x7000c700 0x100>;
144 interrupts = <0 120 0x04>; 142 interrupts = <0 120 0x04>;
143 #address-cells = <1>;
144 #size-cells = <0>;
145 }; 145 };
146 146
147 i2c@7000d000 { 147 i2c@7000d000 {
148 #address-cells = <1>;
149 #size-cells = <0>;
150 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; 148 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
151 reg = <0x7000d000 0x100>; 149 reg = <0x7000d000 0x100>;
152 interrupts = <0 53 0x04>; 150 interrupts = <0 53 0x04>;
151 #address-cells = <1>;
152 #size-cells = <0>;
153 }; 153 };
154 154
155 pmc { 155 pmc {