aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorRussell King <rmk+kernel@arm.linux.org.uk>2009-11-20 16:06:43 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-11-24 12:41:36 -0500
commit26a26d329688ab018e068b412b03d43d7c299f0a (patch)
treef33ea6faa4f8d9409098654354548fa28c7b41ad /arch
parentacaac256b3a14a09ab278409a72d119f2d75b02b (diff)
ARM: dma-mapping: switch ARMv7 DMA mappings to retain 'memory' attribute
On ARMv7, it is invalid to map the same physical address multiple times with different memory types. Since system RAM is already mapped as 'memory', subsequent remapping of it must retain this attribute. However, DMA memory maps it as "strongly ordered". Fix this by introducing 'pgprot_dmacoherent()' which provides the necessary page table bits for DMA mappings. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Greg Ungerer <gerg@uclinux.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/pgtable.h14
-rw-r--r--arch/arm/include/asm/system.h19
-rw-r--r--arch/arm/mm/dma-mapping.c4
3 files changed, 26 insertions, 11 deletions
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 201ccaa11f61..11397687f42c 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -304,13 +304,23 @@ PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG);
304 304
305static inline pte_t pte_mkspecial(pte_t pte) { return pte; } 305static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
306 306
307#define __pgprot_modify(prot,mask,bits) \
308 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
309
307/* 310/*
308 * Mark the prot value as uncacheable and unbufferable. 311 * Mark the prot value as uncacheable and unbufferable.
309 */ 312 */
310#define pgprot_noncached(prot) \ 313#define pgprot_noncached(prot) \
311 __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_UNCACHED) 314 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
312#define pgprot_writecombine(prot) \ 315#define pgprot_writecombine(prot) \
313 __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_BUFFERABLE) 316 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE)
317#if __LINUX_ARM_ARCH__ >= 7
318#define pgprot_dmacoherent(prot) \
319 __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_BUFFERABLE)
320#else
321#define pgprot_dmacoherent(prot) \
322 __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_UNCACHED)
323#endif
314 324
315#define pmd_none(pmd) (!pmd_val(pmd)) 325#define pmd_none(pmd) (!pmd_val(pmd))
316#define pmd_present(pmd) (pmd_val(pmd)) 326#define pmd_present(pmd) (pmd_val(pmd))
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index d65b2f5bf41f..058e7e90881d 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -138,21 +138,26 @@ extern unsigned int user_debug;
138#define dmb() __asm__ __volatile__ ("" : : : "memory") 138#define dmb() __asm__ __volatile__ ("" : : : "memory")
139#endif 139#endif
140 140
141#ifndef CONFIG_SMP 141#if __LINUX_ARM_ARCH__ >= 7 || defined(CONFIG_SMP)
142#define mb() dmb()
143#define rmb() dmb()
144#define wmb() dmb()
145#else
142#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) 146#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
143#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) 147#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
144#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) 148#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
149#endif
150
151#ifndef CONFIG_SMP
145#define smp_mb() barrier() 152#define smp_mb() barrier()
146#define smp_rmb() barrier() 153#define smp_rmb() barrier()
147#define smp_wmb() barrier() 154#define smp_wmb() barrier()
148#else 155#else
149#define mb() dmb() 156#define smp_mb() mb()
150#define rmb() dmb() 157#define smp_rmb() rmb()
151#define wmb() dmb() 158#define smp_wmb() wmb()
152#define smp_mb() dmb()
153#define smp_rmb() dmb()
154#define smp_wmb() dmb()
155#endif 159#endif
160
156#define read_barrier_depends() do { } while(0) 161#define read_barrier_depends() do { } while(0)
157#define smp_read_barrier_depends() do { } while(0) 162#define smp_read_barrier_depends() do { } while(0)
158 163
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 6fac793329c6..26325cb5d368 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -317,7 +317,7 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gf
317 return memory; 317 return memory;
318 318
319 return __dma_alloc(dev, size, handle, gfp, 319 return __dma_alloc(dev, size, handle, gfp,
320 pgprot_noncached(pgprot_kernel)); 320 pgprot_dmacoherent(pgprot_kernel));
321} 321}
322EXPORT_SYMBOL(dma_alloc_coherent); 322EXPORT_SYMBOL(dma_alloc_coherent);
323 323
@@ -365,7 +365,7 @@ static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
365int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, 365int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
366 void *cpu_addr, dma_addr_t dma_addr, size_t size) 366 void *cpu_addr, dma_addr_t dma_addr, size_t size)
367{ 367{
368 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 368 vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot);
369 return dma_mmap(dev, vma, cpu_addr, dma_addr, size); 369 return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
370} 370}
371EXPORT_SYMBOL(dma_mmap_coherent); 371EXPORT_SYMBOL(dma_mmap_coherent);