diff options
author | Harvey Harrison <harvey.harrison@gmail.com> | 2009-01-06 17:56:23 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-01-06 21:10:27 -0500 |
commit | 8cdd3a9261e8efe36aeb6c708edb76d7e2b5d13f (patch) | |
tree | e988371e5370b60605101eec01425d1b42ae9d19 /arch | |
parent | 292b4d0978e3bbb087a83ce77e389c7b462a093c (diff) |
mips: introduce asm/swab.h
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/asm/Kbuild | 1 | ||||
-rw-r--r-- | arch/mips/include/asm/byteorder.h | 52 | ||||
-rw-r--r-- | arch/mips/include/asm/swab.h | 55 |
3 files changed, 59 insertions, 49 deletions
diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild index 7897f05e3165..023866c0c102 100644 --- a/arch/mips/include/asm/Kbuild +++ b/arch/mips/include/asm/Kbuild | |||
@@ -1,3 +1,4 @@ | |||
1 | include include/asm-generic/Kbuild.asm | 1 | include include/asm-generic/Kbuild.asm |
2 | 2 | ||
3 | header-y += cachectl.h sgidefs.h sysmips.h | 3 | header-y += cachectl.h sgidefs.h sysmips.h |
4 | header-y += swab.h | ||
diff --git a/arch/mips/include/asm/byteorder.h b/arch/mips/include/asm/byteorder.h index 33790b9e0cc0..607b71830707 100644 --- a/arch/mips/include/asm/byteorder.h +++ b/arch/mips/include/asm/byteorder.h | |||
@@ -8,60 +8,14 @@ | |||
8 | #ifndef _ASM_BYTEORDER_H | 8 | #ifndef _ASM_BYTEORDER_H |
9 | #define _ASM_BYTEORDER_H | 9 | #define _ASM_BYTEORDER_H |
10 | 10 | ||
11 | #include <linux/compiler.h> | 11 | #include <asm/swab.h> |
12 | #include <asm/types.h> | ||
13 | 12 | ||
14 | #if defined(__MIPSEB__) | 13 | #if defined(__MIPSEB__) |
15 | # define __BIG_ENDIAN | 14 | #include <linux/byteorder/big_endian.h> |
16 | #elif defined(__MIPSEL__) | 15 | #elif defined(__MIPSEL__) |
17 | # define __LITTLE_ENDIAN | 16 | #include <linux/byteorder/little_endian.h> |
18 | #else | 17 | #else |
19 | # error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" | 18 | # error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" |
20 | #endif | 19 | #endif |
21 | 20 | ||
22 | #define __SWAB_64_THRU_32__ | ||
23 | |||
24 | #ifdef CONFIG_CPU_MIPSR2 | ||
25 | |||
26 | static inline __attribute_const__ __u16 __arch_swab16(__u16 x) | ||
27 | { | ||
28 | __asm__( | ||
29 | " wsbh %0, %1 \n" | ||
30 | : "=r" (x) | ||
31 | : "r" (x)); | ||
32 | |||
33 | return x; | ||
34 | } | ||
35 | #define __arch_swab16 __arch_swab16 | ||
36 | |||
37 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) | ||
38 | { | ||
39 | __asm__( | ||
40 | " wsbh %0, %1 \n" | ||
41 | " rotr %0, %0, 16 \n" | ||
42 | : "=r" (x) | ||
43 | : "r" (x)); | ||
44 | |||
45 | return x; | ||
46 | } | ||
47 | #define __arch_swab32 __arch_swab32 | ||
48 | |||
49 | #ifdef CONFIG_CPU_MIPS64_R2 | ||
50 | static inline __attribute_const__ __u64 __arch_swab64(__u64 x) | ||
51 | { | ||
52 | __asm__( | ||
53 | " dsbh %0, %1\n" | ||
54 | " dshd %0, %0" | ||
55 | : "=r" (x) | ||
56 | : "r" (x)); | ||
57 | |||
58 | return x; | ||
59 | } | ||
60 | #define __arch_swab64 __arch_swab64 | ||
61 | #endif /* CONFIG_CPU_MIPS64_R2 */ | ||
62 | |||
63 | #endif /* CONFIG_CPU_MIPSR2 */ | ||
64 | |||
65 | #include <linux/byteorder.h> | ||
66 | |||
67 | #endif /* _ASM_BYTEORDER_H */ | 21 | #endif /* _ASM_BYTEORDER_H */ |
diff --git a/arch/mips/include/asm/swab.h b/arch/mips/include/asm/swab.h new file mode 100644 index 000000000000..88f1f7d555cb --- /dev/null +++ b/arch/mips/include/asm/swab.h | |||
@@ -0,0 +1,55 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1996, 99, 2003 by Ralf Baechle | ||
7 | */ | ||
8 | #ifndef _ASM_SWAB_H | ||
9 | #define _ASM_SWAB_H | ||
10 | |||
11 | #include <linux/compiler.h> | ||
12 | #include <asm/types.h> | ||
13 | |||
14 | #define __SWAB_64_THRU_32__ | ||
15 | |||
16 | #ifdef CONFIG_CPU_MIPSR2 | ||
17 | |||
18 | static inline __attribute_const__ __u16 __arch_swab16(__u16 x) | ||
19 | { | ||
20 | __asm__( | ||
21 | " wsbh %0, %1 \n" | ||
22 | : "=r" (x) | ||
23 | : "r" (x)); | ||
24 | |||
25 | return x; | ||
26 | } | ||
27 | #define __arch_swab16 __arch_swab16 | ||
28 | |||
29 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) | ||
30 | { | ||
31 | __asm__( | ||
32 | " wsbh %0, %1 \n" | ||
33 | " rotr %0, %0, 16 \n" | ||
34 | : "=r" (x) | ||
35 | : "r" (x)); | ||
36 | |||
37 | return x; | ||
38 | } | ||
39 | #define __arch_swab32 __arch_swab32 | ||
40 | |||
41 | #ifdef CONFIG_CPU_MIPS64_R2 | ||
42 | static inline __attribute_const__ __u64 __arch_swab64(__u64 x) | ||
43 | { | ||
44 | __asm__( | ||
45 | " dsbh %0, %1\n" | ||
46 | " dshd %0, %0" | ||
47 | : "=r" (x) | ||
48 | : "r" (x)); | ||
49 | |||
50 | return x; | ||
51 | } | ||
52 | #define __arch_swab64 __arch_swab64 | ||
53 | #endif /* CONFIG_CPU_MIPS64_R2 */ | ||
54 | #endif /* CONFIG_CPU_MIPSR2 */ | ||
55 | #endif /* _ASM_SWAB_H */ | ||