diff options
author | Heiko Carstens <heiko.carstens@de.ibm.com> | 2009-09-22 16:58:45 -0400 |
---|---|---|
committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2009-09-22 16:58:44 -0400 |
commit | 2583d1efe04170cf166d43da6e4ed309e5601e84 (patch) | |
tree | 39fcc09b207d1cc50545643bc1a6d8db41c95d20 /arch | |
parent | 846955c8afe5ebca2f8841b042ca3342e08a092b (diff) |
[S390] hibernation: reset system after resume
Force system into defined state after resume.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/s390/kernel/swsusp_asm64.S | 42 |
1 files changed, 40 insertions, 2 deletions
diff --git a/arch/s390/kernel/swsusp_asm64.S b/arch/s390/kernel/swsusp_asm64.S index 9a86ccb91a8a..fc056810a017 100644 --- a/arch/s390/kernel/swsusp_asm64.S +++ b/arch/s390/kernel/swsusp_asm64.S | |||
@@ -108,7 +108,8 @@ swsusp_arch_resume: | |||
108 | #ifdef CONFIG_SMP | 108 | #ifdef CONFIG_SMP |
109 | /* Save boot cpu number */ | 109 | /* Save boot cpu number */ |
110 | brasl %r14,smp_get_phys_cpu_id | 110 | brasl %r14,smp_get_phys_cpu_id |
111 | lgr %r10,%r2 | 111 | larl %r1,saved_cpu_id |
112 | st %r2,0(%r1) | ||
112 | #endif | 113 | #endif |
113 | /* Deactivate DAT */ | 114 | /* Deactivate DAT */ |
114 | stnsm __SF_EMPTY(%r15),0xfb | 115 | stnsm __SF_EMPTY(%r15),0xfb |
@@ -136,6 +137,29 @@ swsusp_arch_resume: | |||
136 | 2: | 137 | 2: |
137 | ptlb /* flush tlb */ | 138 | ptlb /* flush tlb */ |
138 | 139 | ||
140 | /* Reset System */ | ||
141 | larl %r1,restart_entry | ||
142 | larl %r2,restart_psw | ||
143 | og %r1,0(%r2) | ||
144 | stg %r1,0(%r0) | ||
145 | larl %r1,saved_pgm_check_psw | ||
146 | mvc 0(16,%r1),__LC_PGM_NEW_PSW(%r0) | ||
147 | larl %r1,new_pgm_check_psw | ||
148 | epsw %r2,%r3 | ||
149 | stm %r2,%r3,0(%r1) | ||
150 | mvc __LC_PGM_NEW_PSW(16,%r0),0(%r1) | ||
151 | lghi %r0,0 | ||
152 | diag %r0,%r0,0x308 | ||
153 | restart_entry: | ||
154 | lhi %r1,1 | ||
155 | sigp %r1,%r0,0x12 | ||
156 | sam64 | ||
157 | larl %r1,new_pgm_check_psw | ||
158 | lpswe 0(%r1) | ||
159 | pgm_check_entry: | ||
160 | larl %r1,saved_pgm_check_psw | ||
161 | mvc __LC_PGM_NEW_PSW(16,%r0),0(%r1) | ||
162 | |||
139 | /* Restore registers */ | 163 | /* Restore registers */ |
140 | lghi %r13,0x1000 /* %r1 = pointer to save arae */ | 164 | lghi %r13,0x1000 /* %r1 = pointer to save arae */ |
141 | 165 | ||
@@ -171,7 +195,8 @@ swsusp_arch_resume: | |||
171 | 195 | ||
172 | #ifdef CONFIG_SMP | 196 | #ifdef CONFIG_SMP |
173 | /* Switch CPUs */ | 197 | /* Switch CPUs */ |
174 | lgr %r2,%r10 /* get cpu id */ | 198 | larl %r1,saved_cpu_id |
199 | llgf %r2,0(%r1) | ||
175 | llgf %r3,0x318(%r13) | 200 | llgf %r3,0x318(%r13) |
176 | brasl %r14,smp_switch_boot_cpu_in_resume | 201 | brasl %r14,smp_switch_boot_cpu_in_resume |
177 | #endif | 202 | #endif |
@@ -189,3 +214,16 @@ swsusp_arch_resume: | |||
189 | lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15) | 214 | lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15) |
190 | lghi %r2,0 | 215 | lghi %r2,0 |
191 | br %r14 | 216 | br %r14 |
217 | |||
218 | .section .data.nosave,"aw",@progbits | ||
219 | .align 8 | ||
220 | restart_psw: | ||
221 | .long 0x00080000,0x80000000 | ||
222 | new_pgm_check_psw: | ||
223 | .quad 0,pgm_check_entry | ||
224 | saved_pgm_check_psw: | ||
225 | .quad 0,0 | ||
226 | #ifdef CONFIG_SMP | ||
227 | saved_cpu_id: | ||
228 | .long 0 | ||
229 | #endif | ||