diff options
author | Andi Kleen <ak@suse.de> | 2005-09-12 12:49:23 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-12 13:49:55 -0400 |
commit | eddfb4ed290383abf912630fa8dac5acf65c9e55 (patch) | |
tree | f13e544e4105facfb9d40d9ee86fb0d10ba29d04 /arch | |
parent | c1507eb2ee845b123ace751bec9c992a1937872c (diff) |
[PATCH] x86-64: Remove obsolete APIC "write around" bug workaround
No x86-64 chipset has this bug
Generated code doesn't change because it was always disabled.
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86_64/kernel/genapic_cluster.c | 4 | ||||
-rw-r--r-- | arch/x86_64/kernel/genapic_flat.c | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/x86_64/kernel/genapic_cluster.c b/arch/x86_64/kernel/genapic_cluster.c index f6523dd1bc09..a472d62f899a 100644 --- a/arch/x86_64/kernel/genapic_cluster.c +++ b/arch/x86_64/kernel/genapic_cluster.c | |||
@@ -51,10 +51,10 @@ static void cluster_init_apic_ldr(void) | |||
51 | count = 3; | 51 | count = 3; |
52 | id = my_cluster | (1UL << count); | 52 | id = my_cluster | (1UL << count); |
53 | x86_cpu_to_log_apicid[smp_processor_id()] = id; | 53 | x86_cpu_to_log_apicid[smp_processor_id()] = id; |
54 | apic_write_around(APIC_DFR, APIC_DFR_CLUSTER); | 54 | apic_write(APIC_DFR, APIC_DFR_CLUSTER); |
55 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | 55 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
56 | val |= SET_APIC_LOGICAL_ID(id); | 56 | val |= SET_APIC_LOGICAL_ID(id); |
57 | apic_write_around(APIC_LDR, val); | 57 | apic_write(APIC_LDR, val); |
58 | } | 58 | } |
59 | 59 | ||
60 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ | 60 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ |
diff --git a/arch/x86_64/kernel/genapic_flat.c b/arch/x86_64/kernel/genapic_flat.c index 6d57da96bf8c..8c6028a0f322 100644 --- a/arch/x86_64/kernel/genapic_flat.c +++ b/arch/x86_64/kernel/genapic_flat.c | |||
@@ -38,10 +38,10 @@ static void flat_init_apic_ldr(void) | |||
38 | num = smp_processor_id(); | 38 | num = smp_processor_id(); |
39 | id = 1UL << num; | 39 | id = 1UL << num; |
40 | x86_cpu_to_log_apicid[num] = id; | 40 | x86_cpu_to_log_apicid[num] = id; |
41 | apic_write_around(APIC_DFR, APIC_DFR_FLAT); | 41 | apic_write(APIC_DFR, APIC_DFR_FLAT); |
42 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | 42 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
43 | val |= SET_APIC_LOGICAL_ID(id); | 43 | val |= SET_APIC_LOGICAL_ID(id); |
44 | apic_write_around(APIC_LDR, val); | 44 | apic_write(APIC_LDR, val); |
45 | } | 45 | } |
46 | 46 | ||
47 | static void flat_send_IPI_mask(cpumask_t cpumask, int vector) | 47 | static void flat_send_IPI_mask(cpumask_t cpumask, int vector) |
@@ -62,7 +62,7 @@ static void flat_send_IPI_mask(cpumask_t cpumask, int vector) | |||
62 | * prepare target chip field | 62 | * prepare target chip field |
63 | */ | 63 | */ |
64 | cfg = __prepare_ICR2(mask); | 64 | cfg = __prepare_ICR2(mask); |
65 | apic_write_around(APIC_ICR2, cfg); | 65 | apic_write(APIC_ICR2, cfg); |
66 | 66 | ||
67 | /* | 67 | /* |
68 | * program the ICR | 68 | * program the ICR |
@@ -72,7 +72,7 @@ static void flat_send_IPI_mask(cpumask_t cpumask, int vector) | |||
72 | /* | 72 | /* |
73 | * Send the IPI. The write to APIC_ICR fires this off. | 73 | * Send the IPI. The write to APIC_ICR fires this off. |
74 | */ | 74 | */ |
75 | apic_write_around(APIC_ICR, cfg); | 75 | apic_write(APIC_ICR, cfg); |
76 | local_irq_restore(flags); | 76 | local_irq_restore(flags); |
77 | } | 77 | } |
78 | 78 | ||