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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-09-21 17:05:45 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-09-21 17:05:45 -0400
commitad501bce5771bdea47fd26368a2d435424a1af7e (patch)
treeaa4fb5973776dfa2488c9fbd0bd4079501a5bebd /arch
parentda8f153e51290e7438ba7da66234a864e5d3e1c1 (diff)
parent8742bc92c36324ac4bac739ab413acc6630a875d (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 4569/1: ep93xx_gpio_irq_type(): fix spurious enumeration offset for FGPIO handling [ARM] 4568/1: fix l2x0 cache invalidate handling of unaligned addresses
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-ep93xx/core.c2
-rw-r--r--arch/arm/mm/cache-l2x0.c12
2 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 851cc7158ca3..70b2c7801110 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -336,7 +336,7 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
336 if (line >= 0 && line < 16) { 336 if (line >= 0 && line < 16) {
337 gpio_line_config(line, GPIO_IN); 337 gpio_line_config(line, GPIO_IN);
338 } else { 338 } else {
339 gpio_line_config(EP93XX_GPIO_LINE_F(line), GPIO_IN); 339 gpio_line_config(EP93XX_GPIO_LINE_F(line-16), GPIO_IN);
340 } 340 }
341 341
342 port = line >> 3; 342 port = line >> 3;
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index b4e9b734e0bd..76b800a95191 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -57,7 +57,17 @@ static void l2x0_inv_range(unsigned long start, unsigned long end)
57{ 57{
58 unsigned long addr; 58 unsigned long addr;
59 59
60 start &= ~(CACHE_LINE_SIZE - 1); 60 if (start & (CACHE_LINE_SIZE - 1)) {
61 start &= ~(CACHE_LINE_SIZE - 1);
62 sync_writel(start, L2X0_CLEAN_INV_LINE_PA, 1);
63 start += CACHE_LINE_SIZE;
64 }
65
66 if (end & (CACHE_LINE_SIZE - 1)) {
67 end &= ~(CACHE_LINE_SIZE - 1);
68 sync_writel(end, L2X0_CLEAN_INV_LINE_PA, 1);
69 }
70
61 for (addr = start; addr < end; addr += CACHE_LINE_SIZE) 71 for (addr = start; addr < end; addr += CACHE_LINE_SIZE)
62 sync_writel(addr, L2X0_INV_LINE_PA, 1); 72 sync_writel(addr, L2X0_INV_LINE_PA, 1);
63 cache_sync(); 73 cache_sync();