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authorThomas Gleixner <tglx@linutronix.de>2011-03-24 09:58:43 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-24 15:35:58 -0400
commit610e1756eafdeca15cc24ade6dae23d8129225f9 (patch)
treeeb58c8850e3cdc66d7e95abec0db1cd9eb073637 /arch
parent3b190a4a0919eac849f73cb06886f26d357a554c (diff)
xtensa: Convert genirq namespace
Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/xtensa/kernel/irq.c10
-rw-r--r--arch/xtensa/platforms/s6105/device.c2
-rw-r--r--arch/xtensa/variants/s6000/gpio.c14
3 files changed, 13 insertions, 13 deletions
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c
index 8438319b14d7..98c0d6bafdf2 100644
--- a/arch/xtensa/kernel/irq.c
+++ b/arch/xtensa/kernel/irq.c
@@ -164,25 +164,25 @@ void __init init_IRQ(void)
164 int mask = 1 << index; 164 int mask = 1 << index;
165 165
166 if (mask & XCHAL_INTTYPE_MASK_SOFTWARE) 166 if (mask & XCHAL_INTTYPE_MASK_SOFTWARE)
167 set_irq_chip_and_handler(index, &xtensa_irq_chip, 167 irq_set_chip_and_handler(index, &xtensa_irq_chip,
168 handle_simple_irq); 168 handle_simple_irq);
169 169
170 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE) 170 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE)
171 set_irq_chip_and_handler(index, &xtensa_irq_chip, 171 irq_set_chip_and_handler(index, &xtensa_irq_chip,
172 handle_edge_irq); 172 handle_edge_irq);
173 173
174 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL) 174 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL)
175 set_irq_chip_and_handler(index, &xtensa_irq_chip, 175 irq_set_chip_and_handler(index, &xtensa_irq_chip,
176 handle_level_irq); 176 handle_level_irq);
177 177
178 else if (mask & XCHAL_INTTYPE_MASK_TIMER) 178 else if (mask & XCHAL_INTTYPE_MASK_TIMER)
179 set_irq_chip_and_handler(index, &xtensa_irq_chip, 179 irq_set_chip_and_handler(index, &xtensa_irq_chip,
180 handle_edge_irq); 180 handle_edge_irq);
181 181
182 else /* XCHAL_INTTYPE_MASK_WRITE_ERROR */ 182 else /* XCHAL_INTTYPE_MASK_WRITE_ERROR */
183 /* XCHAL_INTTYPE_MASK_NMI */ 183 /* XCHAL_INTTYPE_MASK_NMI */
184 184
185 set_irq_chip_and_handler(index, &xtensa_irq_chip, 185 irq_set_chip_and_handler(index, &xtensa_irq_chip,
186 handle_level_irq); 186 handle_level_irq);
187 } 187 }
188 188
diff --git a/arch/xtensa/platforms/s6105/device.c b/arch/xtensa/platforms/s6105/device.c
index 65333ffefb07..4f4fc971042f 100644
--- a/arch/xtensa/platforms/s6105/device.c
+++ b/arch/xtensa/platforms/s6105/device.c
@@ -120,7 +120,7 @@ static int __init prepare_phy_irq(int pin)
120 irq = gpio_to_irq(pin); 120 irq = gpio_to_irq(pin);
121 if (irq < 0) 121 if (irq < 0)
122 goto free; 122 goto free;
123 if (set_irq_type(irq, IRQ_TYPE_LEVEL_LOW) < 0) 123 if (irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW) < 0)
124 goto free; 124 goto free;
125 return irq; 125 return irq;
126free: 126free:
diff --git a/arch/xtensa/variants/s6000/gpio.c b/arch/xtensa/variants/s6000/gpio.c
index c694158817b2..7af0757e001b 100644
--- a/arch/xtensa/variants/s6000/gpio.c
+++ b/arch/xtensa/variants/s6000/gpio.c
@@ -128,7 +128,7 @@ static int set_type(struct irq_data *d, unsigned int type)
128 handler = handle_edge_irq; 128 handler = handle_edge_irq;
129 } 129 }
130 writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS); 130 writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS);
131 __set_irq_handler_unlocked(irq, handler); 131 __irq_set_handler_locked(irq, handler);
132 132
133 reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV); 133 reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV);
134 if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING)) 134 if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING))
@@ -158,8 +158,8 @@ static u8 demux_masks[4];
158 158
159static void demux_irqs(unsigned int irq, struct irq_desc *desc) 159static void demux_irqs(unsigned int irq, struct irq_desc *desc)
160{ 160{
161 struct irq_chip *chip = get_irq_desc_chip(desc); 161 struct irq_chip *chip = irq_desc_get_chip(desc);
162 u8 *mask = get_irq_desc_data(desc); 162 u8 *mask = irq_desc_get_handler_data(desc);
163 u8 pending; 163 u8 pending;
164 int cirq; 164 int cirq;
165 165
@@ -218,11 +218,11 @@ void __init variant_init_irq(void)
218 i = ffs(mask); 218 i = ffs(mask);
219 cirq += i; 219 cirq += i;
220 mask >>= i; 220 mask >>= i;
221 set_irq_chip(cirq, &gpioirqs); 221 irq_set_chip(cirq, &gpioirqs);
222 set_irq_type(irq, IRQ_TYPE_LEVEL_LOW); 222 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
223 } while (mask); 223 } while (mask);
224 set_irq_data(irq, demux_masks + n); 224 irq_set_handler_data(irq, demux_masks + n);
225 set_irq_chained_handler(irq, demux_irqs); 225 irq_set_chained_handler(irq, demux_irqs);
226 if (++n == ARRAY_SIZE(demux_masks)) 226 if (++n == ARRAY_SIZE(demux_masks))
227 break; 227 break;
228 } 228 }