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authorMatt Reimer <mreimer@vpop.net>2007-02-12 15:00:32 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-12 15:58:06 -0500
commit4b210faf0944172e55489bef83babf520bccc1c4 (patch)
tree0c3ea77facacfa57e766293dc99812f1ce39cfaa /arch
parent6fb9c4f87018f90d7aa415c5c8a4b22e6a000c5b (diff)
[ARM] 4169/1: S3C2410: align to a cache line
Align the code to the start of the next cache line, rather than the start of the next 256-byte page. (On i386 and ARM, the ".align" assembler directive takes its first argument as the number of low-order bits that must be zero, not the number of words comprising a cache line.) Supercedes patch 4166. Signed-off-by: Matt Reimer <mreimer@vpop.net> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s3c2410/sleep.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S
index 9179a1024588..637aaba65390 100644
--- a/arch/arm/mach-s3c2410/sleep.S
+++ b/arch/arm/mach-s3c2410/sleep.S
@@ -59,7 +59,7 @@ ENTRY(s3c2410_cpu_suspend)
59 b s3c2410_do_sleep @ 59 b s3c2410_do_sleep @
60 60
61 @@ align next bit of code to cache line 61 @@ align next bit of code to cache line
62 .align 8 62 .align 5
63s3c2410_do_sleep: 63s3c2410_do_sleep:
64 streq r7, [ r4 ] @ SDRAM sleep command 64 streq r7, [ r4 ] @ SDRAM sleep command
65 streq r8, [ r5 ] @ SDRAM power-down config 65 streq r8, [ r5 ] @ SDRAM power-down config