diff options
author | Ben Dooks <ben-linux@fluff.org> | 2007-01-16 06:56:58 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-01-24 06:59:56 -0500 |
commit | 30f0e0f4153918a22d802b415980974514139389 (patch) | |
tree | 9b7867e04c29977fbfffffb0a43e98350a458e09 /arch | |
parent | 6c3c5bb3c68b932ece9f92b9d201196d537cb99c (diff) |
[ARM] 4096/1: S3C24XX: change return code form s3c2410_gpio_getcfg()
The s3c2410_gpio_getcfg() currently returns
a value which is dependant on the GPIO no
passed in. Now we have more generic constants
it is sensible to use those as return codes
so that any function dealing with >1 GPIO
does not need to do it's own number processing.
Since this function is only currently used in
pm.c, it is easy to fixup (and correct pm.c
to use the generic constants)
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-s3c2410/gpio.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/pm.c | 7 |
2 files changed, 10 insertions, 8 deletions
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c index d1740643a135..f6fb215bb48c 100644 --- a/arch/arm/mach-s3c2410/gpio.c +++ b/arch/arm/mach-s3c2410/gpio.c | |||
@@ -84,15 +84,18 @@ EXPORT_SYMBOL(s3c2410_gpio_cfgpin); | |||
84 | unsigned int s3c2410_gpio_getcfg(unsigned int pin) | 84 | unsigned int s3c2410_gpio_getcfg(unsigned int pin) |
85 | { | 85 | { |
86 | void __iomem *base = S3C24XX_GPIO_BASE(pin); | 86 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
87 | unsigned long mask; | 87 | unsigned long val = __raw_readl(base); |
88 | 88 | ||
89 | if (pin < S3C2410_GPIO_BANKB) { | 89 | if (pin < S3C2410_GPIO_BANKB) { |
90 | mask = 1 << S3C2410_GPIO_OFFSET(pin); | 90 | val >>= S3C2410_GPIO_OFFSET(pin); |
91 | val &= 1; | ||
92 | val += 1; | ||
91 | } else { | 93 | } else { |
92 | mask = 3 << S3C2410_GPIO_OFFSET(pin)*2; | 94 | val >>= S3C2410_GPIO_OFFSET(pin)*2; |
95 | val &= 3; | ||
93 | } | 96 | } |
94 | 97 | ||
95 | return __raw_readl(base) & mask; | 98 | return val | S3C2410_GPIO_INPUT; |
96 | } | 99 | } |
97 | 100 | ||
98 | EXPORT_SYMBOL(s3c2410_gpio_getcfg); | 101 | EXPORT_SYMBOL(s3c2410_gpio_getcfg); |
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c index 00834097eb82..ebf294dd31da 100644 --- a/arch/arm/mach-s3c2410/pm.c +++ b/arch/arm/mach-s3c2410/pm.c | |||
@@ -451,15 +451,14 @@ static void s3c2410_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) | |||
451 | irqstate = s3c_irqwake_eintmask & (1L<<irqoffs); | 451 | irqstate = s3c_irqwake_eintmask & (1L<<irqoffs); |
452 | 452 | ||
453 | pinstate = s3c2410_gpio_getcfg(pin); | 453 | pinstate = s3c2410_gpio_getcfg(pin); |
454 | pinstate >>= S3C2410_GPIO_OFFSET(pin)*2; | ||
455 | 454 | ||
456 | if (!irqstate) { | 455 | if (!irqstate) { |
457 | if (pinstate == 0x02) | 456 | if (pinstate == S3C2410_GPIO_IRQ) |
458 | DBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin); | 457 | DBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin); |
459 | } else { | 458 | } else { |
460 | if (pinstate == 0x02) { | 459 | if (pinstate == S3C2410_GPIO_IRQ) { |
461 | DBG("Disabling IRQ %d (pin %d)\n", irq, pin); | 460 | DBG("Disabling IRQ %d (pin %d)\n", irq, pin); |
462 | s3c2410_gpio_cfgpin(pin, 0x00); | 461 | s3c2410_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); |
463 | } | 462 | } |
464 | } | 463 | } |
465 | } | 464 | } |