diff options
author | Nick Piggin <npiggin@suse.de> | 2009-01-19 22:36:04 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-01-21 07:00:42 -0500 |
commit | 03b486322e994dde49e67aedb391867b7cf28822 (patch) | |
tree | f1b3418cfaa57376f3637e85464bb6b88d72ba26 /arch | |
parent | 5b221278d61e3907a5e4104a844b63bc8bb3d43a (diff) |
x86: make UV support configurable
Make X86 SGI Ultraviolet support configurable. Saves about 13K of text size
on my modest config.
text data bss dec hex filename
6770537 1158680 694356 8623573 8395d5 vmlinux
6757492 1157664 694228 8609384 835e68 vmlinux.nouv
Signed-off-by: Nick Piggin <npiggin@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/Kconfig | 7 | ||||
-rw-r--r-- | arch/x86/include/asm/uv/uv.h | 6 | ||||
-rw-r--r-- | arch/x86/kernel/Makefile | 5 | ||||
-rw-r--r-- | arch/x86/kernel/efi.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/entry_64.S | 2 | ||||
-rw-r--r-- | arch/x86/kernel/genapic_64.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/io_apic.c | 2 |
7 files changed, 20 insertions, 6 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index ef27aed6ff74..5a29b792cb84 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -391,6 +391,13 @@ config X86_RDC321X | |||
391 | as R-8610-(G). | 391 | as R-8610-(G). |
392 | If you don't have one of these chips, you should say N here. | 392 | If you don't have one of these chips, you should say N here. |
393 | 393 | ||
394 | config X86_UV | ||
395 | bool "SGI Ultraviolet" | ||
396 | depends on X86_64 | ||
397 | help | ||
398 | This option is needed in order to support SGI Ultraviolet systems. | ||
399 | If you don't have one of these, you should say N here. | ||
400 | |||
394 | config SCHED_OMIT_FRAME_POINTER | 401 | config SCHED_OMIT_FRAME_POINTER |
395 | def_bool y | 402 | def_bool y |
396 | prompt "Single-depth WCHAN output" | 403 | prompt "Single-depth WCHAN output" |
diff --git a/arch/x86/include/asm/uv/uv.h b/arch/x86/include/asm/uv/uv.h index dce5fe350134..8ac1d7e312f3 100644 --- a/arch/x86/include/asm/uv/uv.h +++ b/arch/x86/include/asm/uv/uv.h | |||
@@ -3,7 +3,7 @@ | |||
3 | 3 | ||
4 | enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC}; | 4 | enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC}; |
5 | 5 | ||
6 | #ifdef CONFIG_X86_64 | 6 | #ifdef CONFIG_X86_UV |
7 | 7 | ||
8 | extern enum uv_system_type get_uv_system_type(void); | 8 | extern enum uv_system_type get_uv_system_type(void); |
9 | extern int is_uv_system(void); | 9 | extern int is_uv_system(void); |
@@ -15,7 +15,7 @@ extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask, | |||
15 | unsigned long va, | 15 | unsigned long va, |
16 | unsigned int cpu); | 16 | unsigned int cpu); |
17 | 17 | ||
18 | #else /* X86_64 */ | 18 | #else /* X86_UV */ |
19 | 19 | ||
20 | static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; } | 20 | static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; } |
21 | static inline int is_uv_system(void) { return 0; } | 21 | static inline int is_uv_system(void) { return 0; } |
@@ -28,6 +28,6 @@ uv_flush_tlb_others(const struct cpumask *cpumask, struct mm_struct *mm, | |||
28 | unsigned long va, unsigned int cpu) | 28 | unsigned long va, unsigned int cpu) |
29 | { return cpumask; } | 29 | { return cpumask; } |
30 | 30 | ||
31 | #endif /* X86_64 */ | 31 | #endif /* X86_UV */ |
32 | 32 | ||
33 | #endif /* _ASM_X86_UV_UV_H */ | 33 | #endif /* _ASM_X86_UV_UV_H */ |
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 0b3272f58bd9..a99437c965cc 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile | |||
@@ -115,10 +115,11 @@ obj-$(CONFIG_SWIOTLB) += pci-swiotlb_64.o # NB rename without _64 | |||
115 | ### | 115 | ### |
116 | # 64 bit specific files | 116 | # 64 bit specific files |
117 | ifeq ($(CONFIG_X86_64),y) | 117 | ifeq ($(CONFIG_X86_64),y) |
118 | obj-y += genapic_64.o genapic_flat_64.o genx2apic_uv_x.o tlb_uv.o | 118 | obj-y += genapic_64.o genapic_flat_64.o |
119 | obj-y += bios_uv.o uv_irq.o uv_sysfs.o | ||
120 | obj-y += genx2apic_cluster.o | 119 | obj-y += genx2apic_cluster.o |
121 | obj-y += genx2apic_phys.o | 120 | obj-y += genx2apic_phys.o |
121 | obj-$(CONFIG_X86_UV) += genx2apic_uv_x.o tlb_uv.o | ||
122 | obj-$(CONFIG_X86_UV) += bios_uv.o uv_irq.o uv_sysfs.o | ||
122 | obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o | 123 | obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o |
123 | obj-$(CONFIG_AUDIT) += audit_64.o | 124 | obj-$(CONFIG_AUDIT) += audit_64.o |
124 | 125 | ||
diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c index 1119d247fe11..b205272ad394 100644 --- a/arch/x86/kernel/efi.c +++ b/arch/x86/kernel/efi.c | |||
@@ -366,10 +366,12 @@ void __init efi_init(void) | |||
366 | SMBIOS_TABLE_GUID)) { | 366 | SMBIOS_TABLE_GUID)) { |
367 | efi.smbios = config_tables[i].table; | 367 | efi.smbios = config_tables[i].table; |
368 | printk(" SMBIOS=0x%lx ", config_tables[i].table); | 368 | printk(" SMBIOS=0x%lx ", config_tables[i].table); |
369 | #ifdef CONFIG_X86_UV | ||
369 | } else if (!efi_guidcmp(config_tables[i].guid, | 370 | } else if (!efi_guidcmp(config_tables[i].guid, |
370 | UV_SYSTEM_TABLE_GUID)) { | 371 | UV_SYSTEM_TABLE_GUID)) { |
371 | efi.uv_systab = config_tables[i].table; | 372 | efi.uv_systab = config_tables[i].table; |
372 | printk(" UVsystab=0x%lx ", config_tables[i].table); | 373 | printk(" UVsystab=0x%lx ", config_tables[i].table); |
374 | #endif | ||
373 | } else if (!efi_guidcmp(config_tables[i].guid, | 375 | } else if (!efi_guidcmp(config_tables[i].guid, |
374 | HCDP_TABLE_GUID)) { | 376 | HCDP_TABLE_GUID)) { |
375 | efi.hcdp = config_tables[i].table; | 377 | efi.hcdp = config_tables[i].table; |
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index c52b60919163..a52703864a16 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S | |||
@@ -982,8 +982,10 @@ apicinterrupt IRQ_MOVE_CLEANUP_VECTOR \ | |||
982 | irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt | 982 | irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt |
983 | #endif | 983 | #endif |
984 | 984 | ||
985 | #ifdef CONFIG_X86_UV | ||
985 | apicinterrupt UV_BAU_MESSAGE \ | 986 | apicinterrupt UV_BAU_MESSAGE \ |
986 | uv_bau_message_intr1 uv_bau_message_interrupt | 987 | uv_bau_message_intr1 uv_bau_message_interrupt |
988 | #endif | ||
987 | apicinterrupt LOCAL_TIMER_VECTOR \ | 989 | apicinterrupt LOCAL_TIMER_VECTOR \ |
988 | apic_timer_interrupt smp_apic_timer_interrupt | 990 | apic_timer_interrupt smp_apic_timer_interrupt |
989 | 991 | ||
diff --git a/arch/x86/kernel/genapic_64.c b/arch/x86/kernel/genapic_64.c index 2bced78b0b8e..e656c2721154 100644 --- a/arch/x86/kernel/genapic_64.c +++ b/arch/x86/kernel/genapic_64.c | |||
@@ -32,7 +32,9 @@ extern struct genapic apic_x2apic_cluster; | |||
32 | struct genapic __read_mostly *genapic = &apic_flat; | 32 | struct genapic __read_mostly *genapic = &apic_flat; |
33 | 33 | ||
34 | static struct genapic *apic_probe[] __initdata = { | 34 | static struct genapic *apic_probe[] __initdata = { |
35 | #ifdef CONFIG_X86_UV | ||
35 | &apic_x2apic_uv_x, | 36 | &apic_x2apic_uv_x, |
37 | #endif | ||
36 | &apic_x2apic_phys, | 38 | &apic_x2apic_phys, |
37 | &apic_x2apic_cluster, | 39 | &apic_x2apic_cluster, |
38 | &apic_physflat, | 40 | &apic_physflat, |
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/io_apic.c index f79660390724..e4d36bd56b62 100644 --- a/arch/x86/kernel/io_apic.c +++ b/arch/x86/kernel/io_apic.c | |||
@@ -3765,7 +3765,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) | |||
3765 | } | 3765 | } |
3766 | #endif /* CONFIG_HT_IRQ */ | 3766 | #endif /* CONFIG_HT_IRQ */ |
3767 | 3767 | ||
3768 | #ifdef CONFIG_X86_64 | 3768 | #ifdef CONFIG_X86_UV |
3769 | /* | 3769 | /* |
3770 | * Re-target the irq to the specified CPU and enable the specified MMR located | 3770 | * Re-target the irq to the specified CPU and enable the specified MMR located |
3771 | * on the specified blade to allow the sending of MSIs to the specified CPU. | 3771 | * on the specified blade to allow the sending of MSIs to the specified CPU. |