diff options
author | Yauhen Kharuzhy <jekhor@gmail.com> | 2011-01-05 23:04:33 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-06 00:09:18 -0500 |
commit | 95d6791b4f8aad51caea657236234f21b50a4559 (patch) | |
tree | 875c6ef6081b5f422f78eeb6c62fc8341cf4d96a /arch | |
parent | 387c31c7e5c9805b0aef8833d1731a5fe7bdea14 (diff) |
ARM: S3C24XX: Add address map and clock definitions for HSMMC0
Define maps for HSMMC devices.
S3C2443 has one HSMMC device with base address 0x4A800000.
S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000.
So suppose that S3C2443 has only HSMMC1.
Define clock for hsmmc0 device and register it.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/irqs.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/map.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-s3c2416/clock.c | 18 | ||||
-rw-r--r-- | arch/arm/mach-s3c2443/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c2443/clock.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c2443/mach-smdk2443.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/s3c2443-clock.c | 2 |
8 files changed, 23 insertions, 14 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c2410/include/mach/irqs.h index 11bb0f08fe6a..e5a68ea13113 100644 --- a/arch/arm/mach-s3c2410/include/mach/irqs.h +++ b/arch/arm/mach-s3c2410/include/mach/irqs.h | |||
@@ -152,8 +152,8 @@ | |||
152 | 152 | ||
153 | #define IRQ_S3C2416_HSMMC0 S3C2410_IRQ(21) /* S3C2416/S3C2450 */ | 153 | #define IRQ_S3C2416_HSMMC0 S3C2410_IRQ(21) /* S3C2416/S3C2450 */ |
154 | 154 | ||
155 | #define IRQ_HSMMC0 IRQ_S3C2443_HSMMC | 155 | #define IRQ_HSMMC0 IRQ_S3C2416_HSMMC0 |
156 | #define IRQ_HSMMC1 IRQ_S3C2416_HSMMC0 | 156 | #define IRQ_HSMMC1 IRQ_S3C2443_HSMMC |
157 | 157 | ||
158 | #define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14) | 158 | #define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14) |
159 | #define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15) | 159 | #define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15) |
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h index cd3983ad4160..25bbf5a942dd 100644 --- a/arch/arm/mach-s3c2410/include/mach/map.h +++ b/arch/arm/mach-s3c2410/include/mach/map.h | |||
@@ -112,8 +112,8 @@ | |||
112 | #define S3C_PA_IIC S3C2410_PA_IIC | 112 | #define S3C_PA_IIC S3C2410_PA_IIC |
113 | #define S3C_PA_UART S3C24XX_PA_UART | 113 | #define S3C_PA_UART S3C24XX_PA_UART |
114 | #define S3C_PA_USBHOST S3C2410_PA_USBHOST | 114 | #define S3C_PA_USBHOST S3C2410_PA_USBHOST |
115 | #define S3C_PA_HSMMC0 S3C2443_PA_HSMMC | 115 | #define S3C_PA_HSMMC0 S3C2416_PA_HSMMC0 |
116 | #define S3C_PA_HSMMC1 S3C2416_PA_HSMMC0 | 116 | #define S3C_PA_HSMMC1 S3C2443_PA_HSMMC |
117 | #define S3C_PA_WDT S3C2410_PA_WATCHDOG | 117 | #define S3C_PA_WDT S3C2410_PA_WATCHDOG |
118 | #define S3C_PA_NAND S3C24XX_PA_NAND | 118 | #define S3C_PA_NAND S3C24XX_PA_NAND |
119 | 119 | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h index 101aeea22310..44494a56e68b 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h | |||
@@ -86,6 +86,7 @@ | |||
86 | #define S3C2443_HCLKCON_LCDC (1<<9) | 86 | #define S3C2443_HCLKCON_LCDC (1<<9) |
87 | #define S3C2443_HCLKCON_USBH (1<<11) | 87 | #define S3C2443_HCLKCON_USBH (1<<11) |
88 | #define S3C2443_HCLKCON_USBD (1<<12) | 88 | #define S3C2443_HCLKCON_USBD (1<<12) |
89 | #define S3C2416_HCLKCON_HSMMC0 (1<<15) | ||
89 | #define S3C2443_HCLKCON_HSMMC (1<<16) | 90 | #define S3C2443_HCLKCON_HSMMC (1<<16) |
90 | #define S3C2443_HCLKCON_CFC (1<<17) | 91 | #define S3C2443_HCLKCON_CFC (1<<17) |
91 | #define S3C2443_HCLKCON_SSMC (1<<18) | 92 | #define S3C2443_HCLKCON_SSMC (1<<18) |
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c index 7ccf5a2a2bfc..3b02d8506e25 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c2416/clock.c | |||
@@ -38,12 +38,11 @@ static unsigned int armdiv[8] = { | |||
38 | [7] = 8, | 38 | [7] = 8, |
39 | }; | 39 | }; |
40 | 40 | ||
41 | /* ID to hardware numbering, 0 is HSMMC1, 1 is HSMMC0 */ | ||
42 | static struct clksrc_clk hsmmc_div[] = { | 41 | static struct clksrc_clk hsmmc_div[] = { |
43 | [0] = { | 42 | [0] = { |
44 | .clk = { | 43 | .clk = { |
45 | .name = "hsmmc-div", | 44 | .name = "hsmmc-div", |
46 | .id = 1, | 45 | .id = 0, |
47 | .parent = &clk_esysclk.clk, | 46 | .parent = &clk_esysclk.clk, |
48 | }, | 47 | }, |
49 | .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 }, | 48 | .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 }, |
@@ -51,7 +50,7 @@ static struct clksrc_clk hsmmc_div[] = { | |||
51 | [1] = { | 50 | [1] = { |
52 | .clk = { | 51 | .clk = { |
53 | .name = "hsmmc-div", | 52 | .name = "hsmmc-div", |
54 | .id = 0, | 53 | .id = 1, |
55 | .parent = &clk_esysclk.clk, | 54 | .parent = &clk_esysclk.clk, |
56 | }, | 55 | }, |
57 | .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 }, | 56 | .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 }, |
@@ -61,7 +60,7 @@ static struct clksrc_clk hsmmc_div[] = { | |||
61 | static struct clksrc_clk hsmmc_mux[] = { | 60 | static struct clksrc_clk hsmmc_mux[] = { |
62 | [0] = { | 61 | [0] = { |
63 | .clk = { | 62 | .clk = { |
64 | .id = 1, | 63 | .id = 0, |
65 | .name = "hsmmc-if", | 64 | .name = "hsmmc-if", |
66 | .ctrlbit = (1 << 6), | 65 | .ctrlbit = (1 << 6), |
67 | .enable = s3c2443_clkcon_enable_s, | 66 | .enable = s3c2443_clkcon_enable_s, |
@@ -77,7 +76,7 @@ static struct clksrc_clk hsmmc_mux[] = { | |||
77 | }, | 76 | }, |
78 | [1] = { | 77 | [1] = { |
79 | .clk = { | 78 | .clk = { |
80 | .id = 0, | 79 | .id = 1, |
81 | .name = "hsmmc-if", | 80 | .name = "hsmmc-if", |
82 | .ctrlbit = (1 << 12), | 81 | .ctrlbit = (1 << 12), |
83 | .enable = s3c2443_clkcon_enable_s, | 82 | .enable = s3c2443_clkcon_enable_s, |
@@ -93,6 +92,13 @@ static struct clksrc_clk hsmmc_mux[] = { | |||
93 | }, | 92 | }, |
94 | }; | 93 | }; |
95 | 94 | ||
95 | static struct clk hsmmc0_clk = { | ||
96 | .name = "hsmmc", | ||
97 | .id = 0, | ||
98 | .parent = &clk_h, | ||
99 | .enable = s3c2443_clkcon_enable_h, | ||
100 | .ctrlbit = S3C2416_HCLKCON_HSMMC0, | ||
101 | }; | ||
96 | 102 | ||
97 | static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0) | 103 | static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0) |
98 | { | 104 | { |
@@ -130,6 +136,8 @@ void __init s3c2416_init_clocks(int xtal) | |||
130 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) | 136 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) |
131 | s3c_register_clksrc(clksrcs[ptr], 1); | 137 | s3c_register_clksrc(clksrcs[ptr], 1); |
132 | 138 | ||
139 | s3c24xx_register_clock(&hsmmc0_clk); | ||
140 | |||
133 | s3c_pwmclk_init(); | 141 | s3c_pwmclk_init(); |
134 | 142 | ||
135 | } | 143 | } |
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig index 31babec90cec..8814031516ce 100644 --- a/arch/arm/mach-s3c2443/Kconfig +++ b/arch/arm/mach-s3c2443/Kconfig | |||
@@ -25,7 +25,7 @@ config MACH_SMDK2443 | |||
25 | bool "SMDK2443" | 25 | bool "SMDK2443" |
26 | select CPU_S3C2443 | 26 | select CPU_S3C2443 |
27 | select MACH_SMDK | 27 | select MACH_SMDK |
28 | select S3C_DEV_HSMMC | 28 | select S3C_DEV_HSMMC1 |
29 | help | 29 | help |
30 | Say Y here if you are using an SMDK2443 | 30 | Say Y here if you are using an SMDK2443 |
31 | 31 | ||
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c index 0c3c0c884cd3..f4ec6d5715c8 100644 --- a/arch/arm/mach-s3c2443/clock.c +++ b/arch/arm/mach-s3c2443/clock.c | |||
@@ -196,7 +196,7 @@ static struct clksrc_clk clk_hsspi = { | |||
196 | static struct clksrc_clk clk_hsmmc_div = { | 196 | static struct clksrc_clk clk_hsmmc_div = { |
197 | .clk = { | 197 | .clk = { |
198 | .name = "hsmmc-div", | 198 | .name = "hsmmc-div", |
199 | .id = -1, | 199 | .id = 1, |
200 | .parent = &clk_esysclk.clk, | 200 | .parent = &clk_esysclk.clk, |
201 | }, | 201 | }, |
202 | .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 }, | 202 | .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 }, |
@@ -231,7 +231,7 @@ static int s3c2443_enable_hsmmc(struct clk *clk, int enable) | |||
231 | 231 | ||
232 | static struct clk clk_hsmmc = { | 232 | static struct clk clk_hsmmc = { |
233 | .name = "hsmmc-if", | 233 | .name = "hsmmc-if", |
234 | .id = -1, | 234 | .id = 1, |
235 | .parent = &clk_hsmmc_div.clk, | 235 | .parent = &clk_hsmmc_div.clk, |
236 | .enable = s3c2443_enable_hsmmc, | 236 | .enable = s3c2443_enable_hsmmc, |
237 | .ops = &(struct clk_ops) { | 237 | .ops = &(struct clk_ops) { |
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c index 4337f0a9960d..d3b2922517e0 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c2443/mach-smdk2443.c | |||
@@ -105,7 +105,7 @@ static struct s3c2410_uartcfg smdk2443_uartcfgs[] __initdata = { | |||
105 | static struct platform_device *smdk2443_devices[] __initdata = { | 105 | static struct platform_device *smdk2443_devices[] __initdata = { |
106 | &s3c_device_wdt, | 106 | &s3c_device_wdt, |
107 | &s3c_device_i2c0, | 107 | &s3c_device_i2c0, |
108 | &s3c_device_hsmmc0, | 108 | &s3c_device_hsmmc1, |
109 | #ifdef CONFIG_SND_SOC_SMDK2443_WM9710 | 109 | #ifdef CONFIG_SND_SOC_SMDK2443_WM9710 |
110 | &s3c_device_ac97, | 110 | &s3c_device_ac97, |
111 | #endif | 111 | #endif |
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c index 461f070eb62d..82f2d4a39291 100644 --- a/arch/arm/plat-s3c24xx/s3c2443-clock.c +++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c | |||
@@ -271,7 +271,7 @@ static struct clk init_clocks[] = { | |||
271 | .ctrlbit = S3C2443_HCLKCON_DMA5, | 271 | .ctrlbit = S3C2443_HCLKCON_DMA5, |
272 | }, { | 272 | }, { |
273 | .name = "hsmmc", | 273 | .name = "hsmmc", |
274 | .id = 0, | 274 | .id = 1, |
275 | .parent = &clk_h, | 275 | .parent = &clk_h, |
276 | .enable = s3c2443_clkcon_enable_h, | 276 | .enable = s3c2443_clkcon_enable_h, |
277 | .ctrlbit = S3C2443_HCLKCON_HSMMC, | 277 | .ctrlbit = S3C2443_HCLKCON_HSMMC, |