diff options
| author | Mike Frysinger <vapier@gentoo.org> | 2009-10-14 23:35:35 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2010-08-06 12:55:43 -0400 |
| commit | 222f6eb66eb966ac9f21c0224f53b98787529e10 (patch) | |
| tree | ff01e7f1e2ff61e9c21682e7ff5fadeb4bff3998 /arch | |
| parent | fc1caf6eafb30ea185720e29f7f5eccca61ecd60 (diff) | |
Blackfin: punt NFC MMR bits
Now that the NFC driver has its own defines, scrub the ones from the
global namespace to avoid ugly collisions with common code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/blackfin/mach-bf527/include/mach/defBF52x_base.h | 81 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf548/include/mach/defBF54x_base.h | 60 |
2 files changed, 0 insertions, 141 deletions
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h index 8b18b5359210..620834097632 100644 --- a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h +++ b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h | |||
| @@ -1738,85 +1738,4 @@ | |||
| 1738 | #define nAFEXIT 0x0 | 1738 | #define nAFEXIT 0x0 |
| 1739 | #define SECSTAT 0xe0 /* Secure Status */ | 1739 | #define SECSTAT 0xe0 /* Secure Status */ |
| 1740 | 1740 | ||
| 1741 | /* Bit masks for NFC_CTL */ | ||
| 1742 | |||
| 1743 | #define WR_DLY 0xf /* Write Strobe Delay */ | ||
| 1744 | #define RD_DLY 0xf0 /* Read Strobe Delay */ | ||
| 1745 | #define NWIDTH 0x100 /* NAND Data Width */ | ||
| 1746 | #define nNWIDTH 0x0 | ||
| 1747 | #define PG_SIZE 0x200 /* Page Size */ | ||
| 1748 | #define nPG_SIZE 0x0 | ||
| 1749 | |||
| 1750 | /* Bit masks for NFC_STAT */ | ||
| 1751 | |||
| 1752 | #define NBUSY 0x1 /* Not Busy */ | ||
| 1753 | #define nNBUSY 0x0 | ||
| 1754 | #define WB_FULL 0x2 /* Write Buffer Full */ | ||
| 1755 | #define nWB_FULL 0x0 | ||
| 1756 | #define PG_WR_STAT 0x4 /* Page Write Pending */ | ||
| 1757 | #define nPG_WR_STAT 0x0 | ||
| 1758 | #define PG_RD_STAT 0x8 /* Page Read Pending */ | ||
| 1759 | #define nPG_RD_STAT 0x0 | ||
| 1760 | #define WB_EMPTY 0x10 /* Write Buffer Empty */ | ||
| 1761 | #define nWB_EMPTY 0x0 | ||
| 1762 | |||
| 1763 | /* Bit masks for NFC_IRQSTAT */ | ||
| 1764 | |||
| 1765 | #define NBUSYIRQ 0x1 /* Not Busy IRQ */ | ||
| 1766 | #define nNBUSYIRQ 0x0 | ||
| 1767 | #define WB_OVF 0x2 /* Write Buffer Overflow */ | ||
| 1768 | #define nWB_OVF 0x0 | ||
| 1769 | #define WB_EDGE 0x4 /* Write Buffer Edge Detect */ | ||
| 1770 | #define nWB_EDGE 0x0 | ||
| 1771 | #define RD_RDY 0x8 /* Read Data Ready */ | ||
| 1772 | #define nRD_RDY 0x0 | ||
| 1773 | #define WR_DONE 0x10 /* Page Write Done */ | ||
| 1774 | #define nWR_DONE 0x0 | ||
| 1775 | |||
| 1776 | /* Bit masks for NFC_IRQMASK */ | ||
| 1777 | |||
| 1778 | #define MASK_BUSYIRQ 0x1 /* Mask Not Busy IRQ */ | ||
| 1779 | #define nMASK_BUSYIRQ 0x0 | ||
| 1780 | #define MASK_WBOVF 0x2 /* Mask Write Buffer Overflow */ | ||
| 1781 | #define nMASK_WBOVF 0x0 | ||
| 1782 | #define MASK_WBEMPTY 0x4 /* Mask Write Buffer Empty */ | ||
| 1783 | #define nMASK_WBEMPTY 0x0 | ||
| 1784 | #define MASK_RDRDY 0x8 /* Mask Read Data Ready */ | ||
| 1785 | #define nMASK_RDRDY 0x0 | ||
| 1786 | #define MASK_WRDONE 0x10 /* Mask Write Done */ | ||
| 1787 | #define nMASK_WRDONE 0x0 | ||
| 1788 | |||
| 1789 | /* Bit masks for NFC_RST */ | ||
| 1790 | |||
| 1791 | #define ECC_RST 0x1 /* ECC (and NFC counters) Reset */ | ||
| 1792 | #define nECC_RST 0x0 | ||
| 1793 | |||
| 1794 | /* Bit masks for NFC_PGCTL */ | ||
| 1795 | |||
| 1796 | #define PG_RD_START 0x1 /* Page Read Start */ | ||
| 1797 | #define nPG_RD_START 0x0 | ||
| 1798 | #define PG_WR_START 0x2 /* Page Write Start */ | ||
| 1799 | #define nPG_WR_START 0x0 | ||
| 1800 | |||
| 1801 | /* Bit masks for NFC_ECC0 */ | ||
| 1802 | |||
| 1803 | #define ECC0 0x7ff /* Parity Calculation Result0 */ | ||
| 1804 | |||
| 1805 | /* Bit masks for NFC_ECC1 */ | ||
| 1806 | |||
| 1807 | #define ECC1 0x7ff /* Parity Calculation Result1 */ | ||
| 1808 | |||
| 1809 | /* Bit masks for NFC_ECC2 */ | ||
| 1810 | |||
| 1811 | #define ECC2 0x7ff /* Parity Calculation Result2 */ | ||
| 1812 | |||
| 1813 | /* Bit masks for NFC_ECC3 */ | ||
| 1814 | |||
| 1815 | #define ECC3 0x7ff /* Parity Calculation Result3 */ | ||
| 1816 | |||
| 1817 | /* Bit masks for NFC_COUNT */ | ||
| 1818 | |||
| 1819 | #define ECCCNT 0x3ff /* Transfer Count */ | ||
| 1820 | |||
| 1821 | |||
| 1822 | #endif /* _DEF_BF52X_H */ | 1741 | #endif /* _DEF_BF52X_H */ |
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h index 0ed06c2366fe..54143441af5e 100644 --- a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h +++ b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h | |||
| @@ -2044,66 +2044,6 @@ | |||
| 2044 | #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ | 2044 | #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ |
| 2045 | #define RESET_SOFTWARE 0x8000 /* SW Reset Occurred Since Last Read Of SWRST */ | 2045 | #define RESET_SOFTWARE 0x8000 /* SW Reset Occurred Since Last Read Of SWRST */ |
| 2046 | 2046 | ||
| 2047 | /* Bit masks for NFC_CTL */ | ||
| 2048 | |||
| 2049 | #define WR_DLY 0xf /* Write Strobe Delay */ | ||
| 2050 | #define RD_DLY 0xf0 /* Read Strobe Delay */ | ||
| 2051 | #define NWIDTH 0x100 /* NAND Data Width */ | ||
| 2052 | #define PG_SIZE 0x200 /* Page Size */ | ||
| 2053 | |||
| 2054 | /* Bit masks for NFC_STAT */ | ||
| 2055 | |||
| 2056 | #define NBUSY 0x1 /* Not Busy */ | ||
| 2057 | #define WB_FULL 0x2 /* Write Buffer Full */ | ||
| 2058 | #define PG_WR_STAT 0x4 /* Page Write Pending */ | ||
| 2059 | #define PG_RD_STAT 0x8 /* Page Read Pending */ | ||
| 2060 | #define WB_EMPTY 0x10 /* Write Buffer Empty */ | ||
| 2061 | |||
| 2062 | /* Bit masks for NFC_IRQSTAT */ | ||
| 2063 | |||
| 2064 | #define NBUSYIRQ 0x1 /* Not Busy IRQ */ | ||
| 2065 | #define WB_OVF 0x2 /* Write Buffer Overflow */ | ||
| 2066 | #define WB_EDGE 0x4 /* Write Buffer Edge Detect */ | ||
| 2067 | #define RD_RDY 0x8 /* Read Data Ready */ | ||
| 2068 | #define WR_DONE 0x10 /* Page Write Done */ | ||
| 2069 | |||
| 2070 | /* Bit masks for NFC_IRQMASK */ | ||
| 2071 | |||
| 2072 | #define MASK_BUSYIRQ 0x1 /* Mask Not Busy IRQ */ | ||
| 2073 | #define MASK_WBOVF 0x2 /* Mask Write Buffer Overflow */ | ||
| 2074 | #define MASK_WBEMPTY 0x4 /* Mask Write Buffer Empty */ | ||
| 2075 | #define MASK_RDRDY 0x8 /* Mask Read Data Ready */ | ||
| 2076 | #define MASK_WRDONE 0x10 /* Mask Write Done */ | ||
| 2077 | |||
| 2078 | /* Bit masks for NFC_RST */ | ||
| 2079 | |||
| 2080 | #define ECC_RST 0x1 /* ECC (and NFC counters) Reset */ | ||
| 2081 | |||
| 2082 | /* Bit masks for NFC_PGCTL */ | ||
| 2083 | |||
| 2084 | #define PG_RD_START 0x1 /* Page Read Start */ | ||
| 2085 | #define PG_WR_START 0x2 /* Page Write Start */ | ||
| 2086 | |||
| 2087 | /* Bit masks for NFC_ECC0 */ | ||
| 2088 | |||
| 2089 | #define ECC0 0x7ff /* Parity Calculation Result0 */ | ||
| 2090 | |||
| 2091 | /* Bit masks for NFC_ECC1 */ | ||
| 2092 | |||
| 2093 | #define ECC1 0x7ff /* Parity Calculation Result1 */ | ||
| 2094 | |||
| 2095 | /* Bit masks for NFC_ECC2 */ | ||
| 2096 | |||
| 2097 | #define ECC2 0x7ff /* Parity Calculation Result2 */ | ||
| 2098 | |||
| 2099 | /* Bit masks for NFC_ECC3 */ | ||
| 2100 | |||
| 2101 | #define ECC3 0x7ff /* Parity Calculation Result3 */ | ||
| 2102 | |||
| 2103 | /* Bit masks for NFC_COUNT */ | ||
| 2104 | |||
| 2105 | #define ECCCNT 0x3ff /* Transfer Count */ | ||
| 2106 | |||
| 2107 | /* Bit masks for EPPIx_STATUS */ | 2047 | /* Bit masks for EPPIx_STATUS */ |
| 2108 | 2048 | ||
| 2109 | #define CFIFO_ERR 0x1 /* Chroma FIFO Error */ | 2049 | #define CFIFO_ERR 0x1 /* Chroma FIFO Error */ |