Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull additional x86 fixes from Peter Anvin.

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, amd, xen: Avoid NULL pointer paravirt references
  x86, mtrr: Fix a type overflow in range_to_mtrr func
  x86, realmode: Unbreak the ia64 build of drivers/acpi/sleep.c
  x86/mm/pat: Improve scaling of pat_pagerange_is_ram()
  x86: hpet: Fix copy-and-paste mistake in earlier change
  x86/mce: Fix 32-bit build
  x86/bitops: Move BIT_64() for a wider use

7 files changed, 49 insertions, 29 deletions

diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 724aa441de7d..0c44630d1789 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -29,6 +29,7 @@
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <asm/mpspec.h>
+#include <asm/realmode.h>
 
 #define COMPILER_DEPENDENT_INT64   long long
 #define COMPILER_DEPENDENT_UINT64  unsigned long long
@@ -116,10 +117,8 @@ static inline void acpi_disable_pci(void)
 /* Low-level suspend routine. */
 extern int acpi_suspend_lowlevel(void);
 
-extern const unsigned char acpi_wakeup_code[];
-
-/* early initialization routine */
-extern void acpi_reserve_wakeup_memory(void);
+/* Physical address to resume after wakeup */
+#define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start))
 
 /*
  * Check if the CPU can handle C2 and deeper
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index b97596e2b68c..a6983b277220 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -15,6 +15,8 @@
 #include <linux/compiler.h>
 #include <asm/alternative.h>
 
+#define BIT_64(n)                       (U64_C(1) << (n))
+
 /*
  * These have to be done with inline assembly: that way the bit-setting
  * is guaranteed to be atomic. All bit operations return 0 if the bit
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index b772dd6ad450..b4180f425fb8 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1472,9 +1472,9 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
                                  rdmsrl(msrs[i], val);
 
                                  /* CntP bit set? */
-                                 if (val & BIT(62)) {
-                                         val &= ~BIT(62);
-                                         wrmsrl(msrs[i], val);
+                                 if (val & BIT_64(62)) {
+                                        val &= ~BIT_64(62);
+                                        wrmsrl(msrs[i], val);
                                  }
                          }
 
diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c
index ac140c7be396..bdda2e6c673b 100644
--- a/arch/x86/kernel/cpu/mtrr/cleanup.c
+++ b/arch/x86/kernel/cpu/mtrr/cleanup.c
@@ -266,7 +266,7 @@ range_to_mtrr(unsigned int reg, unsigned long range_startk,
                 if (align > max_align)
                         align = max_align;
 
-                sizek = 1 << align;
+                sizek = 1UL << align;
                 if (debug_print) {
                         char start_factor = 'K', size_factor = 'K';
                         unsigned long start_base, size_base;
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 9cc7b4392f7c..1460a5df92f7 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -870,7 +870,7 @@ int __init hpet_enable(void)
         else
                 pr_warn("HPET initial state will not be saved\n");
         cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
-        hpet_writel(cfg, HPET_Tn_CFG(i));
+        hpet_writel(cfg, HPET_CFG);
         if (cfg)
                 pr_warn("HPET: Unrecognized bits %#x set in global cfg\n",
                         cfg);
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index f11729fd019c..3d68ef6d2266 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -158,31 +158,47 @@ static unsigned long pat_x_mtrr_type(u64 start, u64 end, unsigned long req_type)
         return req_type;
 }
 
+struct pagerange_state {
+        unsigned long           cur_pfn;
+        int                     ram;
+        int                     not_ram;
+};
+
+static int
+pagerange_is_ram_callback(unsigned long initial_pfn, unsigned long total_nr_pages, void *arg)
+{
+        struct pagerange_state *state = arg;
+
+        state->not_ram  |= initial_pfn > state->cur_pfn;
+        state->ram      |= total_nr_pages > 0;
+        state->cur_pfn   = initial_pfn + total_nr_pages;
+
+        return state->ram && state->not_ram;
+}
+
 static int pat_pagerange_is_ram(resource_size_t start, resource_size_t end)
 {
-        int ram_page = 0, not_rampage = 0;
-        unsigned long page_nr;
+        int ret = 0;
+        unsigned long start_pfn = start >> PAGE_SHIFT;
+        unsigned long end_pfn = (end + PAGE_SIZE - 1) >> PAGE_SHIFT;
+        struct pagerange_state state = {start_pfn, 0, 0};
 
-        for (page_nr = (start >> PAGE_SHIFT); page_nr < (end >> PAGE_SHIFT);
-             ++page_nr) {
-                /*
-                 * For legacy reasons, physical address range in the legacy ISA
-                 * region is tracked as non-RAM. This will allow users of
-                 * /dev/mem to map portions of legacy ISA region, even when
-                 * some of those portions are listed(or not even listed) with
-                 * different e820 types(RAM/reserved/..)
-                 */
-                if (page_nr >= (ISA_END_ADDRESS >> PAGE_SHIFT) &&
-                    page_is_ram(page_nr))
-                        ram_page = 1;
-                else
-                        not_rampage = 1;
-
-                if (ram_page == not_rampage)
-                        return -1;
+        /*
+         * For legacy reasons, physical address range in the legacy ISA
+         * region is tracked as non-RAM. This will allow users of
+         * /dev/mem to map portions of legacy ISA region, even when
+         * some of those portions are listed(or not even listed) with
+         * different e820 types(RAM/reserved/..)
+         */
+        if (start_pfn < ISA_END_ADDRESS >> PAGE_SHIFT)
+                start_pfn = ISA_END_ADDRESS >> PAGE_SHIFT;
+
+        if (start_pfn < end_pfn) {
+                ret = walk_system_ram_range(start_pfn, end_pfn - start_pfn,
+                                &state, pagerange_is_ram_callback);
         }
 
-        return ram_page;
+        return (ret > 0) ? -1 : (state.ram ? 1 : 0);
 }
 
 /*
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 75f33b2a5933..e74df9548a02 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1116,7 +1116,10 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {
         .wbinvd = native_wbinvd,
 
         .read_msr = native_read_msr_safe,
+        .rdmsr_regs = native_rdmsr_safe_regs,
         .write_msr = xen_write_msr_safe,
+        .wrmsr_regs = native_wrmsr_safe_regs,
+
         .read_tsc = native_read_tsc,
         .read_pmc = native_read_pmc,