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authorIngo Molnar <mingo@elte.hu>2009-01-28 12:49:31 -0500
committerIngo Molnar <mingo@elte.hu>2009-01-28 17:20:38 -0500
commitb11b867f78910192fc54bd0d09148cf768c7aaad (patch)
tree2b2ab37f5f4730fdafa07c2d43be1d06b9d502e2 /arch
parent5a44632f77a9c867621f7bf80c233eac75fea672 (diff)
x86, summit: consolidate code
Consolidate all the Summit code into a single file: arch/x86/kernel/summit_32.c. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/summit/apic.h195
-rw-r--r--arch/x86/include/asm/summit/apicdef.h9
-rw-r--r--arch/x86/include/asm/summit/ipi.h26
-rw-r--r--arch/x86/include/asm/summit/mpparse.h109
-rw-r--r--arch/x86/kernel/summit_32.c417
-rw-r--r--arch/x86/mach-generic/Makefile1
-rw-r--r--arch/x86/mach-generic/summit.c94
7 files changed, 416 insertions, 435 deletions
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
deleted file mode 100644
index 15b8dbd19e1a..000000000000
--- a/arch/x86/include/asm/summit/apic.h
+++ /dev/null
@@ -1,195 +0,0 @@
1#ifndef __ASM_SUMMIT_APIC_H
2#define __ASM_SUMMIT_APIC_H
3
4#include <asm/smp.h>
5#include <linux/gfp.h>
6
7/* In clustered mode, the high nibble of APIC ID is a cluster number.
8 * The low nibble is a 4-bit bitmap. */
9#define XAPIC_DEST_CPUS_SHIFT 4
10#define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
11#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
12
13#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
14
15static inline const cpumask_t *summit_target_cpus(void)
16{
17 /* CPU_MASK_ALL (0xff) has undefined behaviour with
18 * dest_LowestPrio mode logical clustered apic interrupt routing
19 * Just start on cpu 0. IRQ balancing will spread load
20 */
21 return &cpumask_of_cpu(0);
22}
23
24static inline unsigned long
25summit_check_apicid_used(physid_mask_t bitmap, int apicid)
26{
27 return 0;
28}
29
30/* we don't use the phys_cpu_present_map to indicate apicid presence */
31static inline unsigned long summit_check_apicid_present(int bit)
32{
33 return 1;
34}
35
36#define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
37
38extern u8 cpu_2_logical_apicid[];
39
40static inline void summit_init_apic_ldr(void)
41{
42 unsigned long val, id;
43 int count = 0;
44 u8 my_id = (u8)hard_smp_processor_id();
45 u8 my_cluster = (u8)apicid_cluster(my_id);
46#ifdef CONFIG_SMP
47 u8 lid;
48 int i;
49
50 /* Create logical APIC IDs by counting CPUs already in cluster. */
51 for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
52 lid = cpu_2_logical_apicid[i];
53 if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
54 ++count;
55 }
56#endif
57 /* We only have a 4 wide bitmap in cluster mode. If a deranged
58 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
59 BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
60 id = my_cluster | (1UL << count);
61 apic_write(APIC_DFR, APIC_DFR_VALUE);
62 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
63 val |= SET_APIC_LOGICAL_ID(id);
64 apic_write(APIC_LDR, val);
65}
66
67static inline int summit_apic_id_registered(void)
68{
69 return 1;
70}
71
72static inline void summit_setup_apic_routing(void)
73{
74 printk("Enabling APIC mode: Summit. Using %d I/O APICs\n",
75 nr_ioapics);
76}
77
78static inline int summit_apicid_to_node(int logical_apicid)
79{
80#ifdef CONFIG_SMP
81 return apicid_2_node[hard_smp_processor_id()];
82#else
83 return 0;
84#endif
85}
86
87/* Mapping from cpu number to logical apicid */
88static inline int summit_cpu_to_logical_apicid(int cpu)
89{
90#ifdef CONFIG_SMP
91 if (cpu >= nr_cpu_ids)
92 return BAD_APICID;
93 return (int)cpu_2_logical_apicid[cpu];
94#else
95 return logical_smp_processor_id();
96#endif
97}
98
99static inline int summit_cpu_present_to_apicid(int mps_cpu)
100{
101 if (mps_cpu < nr_cpu_ids)
102 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
103 else
104 return BAD_APICID;
105}
106
107static inline physid_mask_t
108summit_ioapic_phys_id_map(physid_mask_t phys_id_map)
109{
110 /* For clustered we don't have a good way to do this yet - hack */
111 return physids_promote(0x0F);
112}
113
114static inline physid_mask_t summit_apicid_to_cpu_present(int apicid)
115{
116 return physid_mask_of_physid(0);
117}
118
119static inline void summit_setup_portio_remap(void)
120{
121}
122
123static inline int summit_check_phys_apicid_present(int boot_cpu_physical_apicid)
124{
125 return 1;
126}
127
128static inline unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask)
129{
130 int cpus_found = 0;
131 int num_bits_set;
132 int apicid;
133 int cpu;
134
135 num_bits_set = cpus_weight(*cpumask);
136 /* Return id to all */
137 if (num_bits_set >= nr_cpu_ids)
138 return 0xFF;
139 /*
140 * The cpus in the mask must all be on the apic cluster. If are not
141 * on the same apicid cluster return default value of target_cpus():
142 */
143 cpu = first_cpu(*cpumask);
144 apicid = summit_cpu_to_logical_apicid(cpu);
145
146 while (cpus_found < num_bits_set) {
147 if (cpu_isset(cpu, *cpumask)) {
148 int new_apicid = summit_cpu_to_logical_apicid(cpu);
149
150 if (apicid_cluster(apicid) !=
151 apicid_cluster(new_apicid)) {
152 printk ("%s: Not a valid mask!\n", __func__);
153
154 return 0xFF;
155 }
156 apicid = apicid | new_apicid;
157 cpus_found++;
158 }
159 cpu++;
160 }
161 return apicid;
162}
163
164static inline unsigned int
165summit_cpu_mask_to_apicid_and(const struct cpumask *inmask,
166 const struct cpumask *andmask)
167{
168 int apicid = summit_cpu_to_logical_apicid(0);
169 cpumask_var_t cpumask;
170
171 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
172 return apicid;
173
174 cpumask_and(cpumask, inmask, andmask);
175 cpumask_and(cpumask, cpumask, cpu_online_mask);
176 apicid = summit_cpu_mask_to_apicid(cpumask);
177
178 free_cpumask_var(cpumask);
179
180 return apicid;
181}
182
183/*
184 * cpuid returns the value latched in the HW at reset, not the APIC ID
185 * register's value. For any box whose BIOS changes APIC IDs, like
186 * clustered APIC systems, we must use hard_smp_processor_id.
187 *
188 * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
189 */
190static inline int summit_phys_pkg_id(int cpuid_apic, int index_msb)
191{
192 return hard_smp_processor_id() >> index_msb;
193}
194
195#endif /* __ASM_SUMMIT_APIC_H */
diff --git a/arch/x86/include/asm/summit/apicdef.h b/arch/x86/include/asm/summit/apicdef.h
deleted file mode 100644
index c24b0df2dec6..000000000000
--- a/arch/x86/include/asm/summit/apicdef.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef __ASM_SUMMIT_APICDEF_H
2#define __ASM_SUMMIT_APICDEF_H
3
4static inline unsigned summit_get_apic_id(unsigned long x)
5{
6 return (x >> 24) & 0xFF;
7}
8
9#endif
diff --git a/arch/x86/include/asm/summit/ipi.h b/arch/x86/include/asm/summit/ipi.h
deleted file mode 100644
index f87a43fe0aed..000000000000
--- a/arch/x86/include/asm/summit/ipi.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef __ASM_SUMMIT_IPI_H
2#define __ASM_SUMMIT_IPI_H
3
4void default_send_IPI_mask_sequence(const cpumask_t *mask, int vector);
5void default_send_IPI_mask_allbutself(const cpumask_t *mask, int vector);
6
7static inline void summit_send_IPI_mask(const cpumask_t *mask, int vector)
8{
9 default_send_IPI_mask_sequence(mask, vector);
10}
11
12static inline void summit_send_IPI_allbutself(int vector)
13{
14 cpumask_t mask = cpu_online_map;
15 cpu_clear(smp_processor_id(), mask);
16
17 if (!cpus_empty(mask))
18 summit_send_IPI_mask(&mask, vector);
19}
20
21static inline void summit_send_IPI_all(int vector)
22{
23 summit_send_IPI_mask(&cpu_online_map, vector);
24}
25
26#endif /* __ASM_SUMMIT_IPI_H */
diff --git a/arch/x86/include/asm/summit/mpparse.h b/arch/x86/include/asm/summit/mpparse.h
deleted file mode 100644
index 4bbcce39acb8..000000000000
--- a/arch/x86/include/asm/summit/mpparse.h
+++ /dev/null
@@ -1,109 +0,0 @@
1#ifndef __ASM_SUMMIT_MPPARSE_H
2#define __ASM_SUMMIT_MPPARSE_H
3
4#include <asm/tsc.h>
5
6extern int use_cyclone;
7
8#ifdef CONFIG_X86_SUMMIT_NUMA
9extern void setup_summit(void);
10#else
11#define setup_summit() {}
12#endif
13
14static inline int
15summit_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
16{
17 if (!strncmp(oem, "IBM ENSW", 8) &&
18 (!strncmp(productid, "VIGIL SMP", 9)
19 || !strncmp(productid, "EXA", 3)
20 || !strncmp(productid, "RUTHLESS SMP", 12))){
21 mark_tsc_unstable("Summit based system");
22 use_cyclone = 1; /*enable cyclone-timer*/
23 setup_summit();
24 return 1;
25 }
26 return 0;
27}
28
29/* Hook from generic ACPI tables.c */
30static inline int summit_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
31{
32 if (!strncmp(oem_id, "IBM", 3) &&
33 (!strncmp(oem_table_id, "SERVIGIL", 8)
34 || !strncmp(oem_table_id, "EXA", 3))){
35 mark_tsc_unstable("Summit based system");
36 use_cyclone = 1; /*enable cyclone-timer*/
37 setup_summit();
38 return 1;
39 }
40 return 0;
41}
42
43struct rio_table_hdr {
44 unsigned char version; /* Version number of this data structure */
45 /* Version 3 adds chassis_num & WP_index */
46 unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil) */
47 unsigned char num_rio_dev; /* # of RIO I/O devices (Cyclones and Winnipegs) */
48} __attribute__((packed));
49
50struct scal_detail {
51 unsigned char node_id; /* Scalability Node ID */
52 unsigned long CBAR; /* Address of 1MB register space */
53 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
54 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
55 unsigned char port1node; /* Node ID port connected to: 0xFF = None */
56 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
57 unsigned char port2node; /* Node ID port connected to: 0xFF = None */
58 unsigned char port2port; /* Port num port connected to: 0,1,2, or 0xFF=None */
59 unsigned char chassis_num; /* 1 based Chassis number (1 = boot node) */
60} __attribute__((packed));
61
62struct rio_detail {
63 unsigned char node_id; /* RIO Node ID */
64 unsigned long BBAR; /* Address of 1MB register space */
65 unsigned char type; /* Type of device */
66 unsigned char owner_id; /* For WPEG: Node ID of Cyclone that owns this WPEG*/
67 /* For CYC: Node ID of Twister that owns this CYC */
68 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
69 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
70 unsigned char port1node; /* Node ID port connected to: 0xFF=None */
71 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
72 unsigned char first_slot; /* For WPEG: Lowest slot number below this WPEG */
73 /* For CYC: 0 */
74 unsigned char status; /* For WPEG: Bit 0 = 1 : the XAPIC is used */
75 /* = 0 : the XAPIC is not used, ie:*/
76 /* ints fwded to another XAPIC */
77 /* Bits1:7 Reserved */
78 /* For CYC: Bits0:7 Reserved */
79 unsigned char WP_index; /* For WPEG: WPEG instance index - lower ones have */
80 /* lower slot numbers/PCI bus numbers */
81 /* For CYC: No meaning */
82 unsigned char chassis_num; /* 1 based Chassis number */
83 /* For LookOut WPEGs this field indicates the */
84 /* Expansion Chassis #, enumerated from Boot */
85 /* Node WPEG external port, then Boot Node CYC */
86 /* external port, then Next Vigil chassis WPEG */
87 /* external port, etc. */
88 /* Shared Lookouts have only 1 chassis number (the */
89 /* first one assigned) */
90} __attribute__((packed));
91
92
93typedef enum {
94 CompatTwister = 0, /* Compatibility Twister */
95 AltTwister = 1, /* Alternate Twister of internal 8-way */
96 CompatCyclone = 2, /* Compatibility Cyclone */
97 AltCyclone = 3, /* Alternate Cyclone of internal 8-way */
98 CompatWPEG = 4, /* Compatibility WPEG */
99 AltWPEG = 5, /* Second Planar WPEG */
100 LookOutAWPEG = 6, /* LookOut WPEG */
101 LookOutBWPEG = 7, /* LookOut WPEG */
102} node_type;
103
104static inline int is_WPEG(struct rio_detail *rio){
105 return (rio->type == CompatWPEG || rio->type == AltWPEG ||
106 rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
107}
108
109#endif /* __ASM_SUMMIT_MPPARSE_H */
diff --git a/arch/x86/kernel/summit_32.c b/arch/x86/kernel/summit_32.c
index 7b987852e876..3b60dd5e57fa 100644
--- a/arch/x86/kernel/summit_32.c
+++ b/arch/x86/kernel/summit_32.c
@@ -30,7 +30,364 @@
30#include <linux/init.h> 30#include <linux/init.h>
31#include <asm/io.h> 31#include <asm/io.h>
32#include <asm/bios_ebda.h> 32#include <asm/bios_ebda.h>
33#include <asm/summit/mpparse.h> 33
34/*
35 * APIC driver for the IBM "Summit" chipset.
36 */
37#define APIC_DEFINITION 1
38#include <linux/threads.h>
39#include <linux/cpumask.h>
40#include <asm/mpspec.h>
41#include <asm/apic.h>
42#include <asm/smp.h>
43#include <asm/genapic.h>
44#include <asm/fixmap.h>
45#include <asm/apicdef.h>
46#include <linux/kernel.h>
47#include <linux/string.h>
48#include <linux/init.h>
49#include <linux/gfp.h>
50#include <linux/smp.h>
51
52static inline unsigned summit_get_apic_id(unsigned long x)
53{
54 return (x >> 24) & 0xFF;
55}
56
57void default_send_IPI_mask_sequence(const cpumask_t *mask, int vector);
58void default_send_IPI_mask_allbutself(const cpumask_t *mask, int vector);
59
60static inline void summit_send_IPI_mask(const cpumask_t *mask, int vector)
61{
62 default_send_IPI_mask_sequence(mask, vector);
63}
64
65static inline void summit_send_IPI_allbutself(int vector)
66{
67 cpumask_t mask = cpu_online_map;
68 cpu_clear(smp_processor_id(), mask);
69
70 if (!cpus_empty(mask))
71 summit_send_IPI_mask(&mask, vector);
72}
73
74static inline void summit_send_IPI_all(int vector)
75{
76 summit_send_IPI_mask(&cpu_online_map, vector);
77}
78
79#include <asm/tsc.h>
80
81extern int use_cyclone;
82
83#ifdef CONFIG_X86_SUMMIT_NUMA
84extern void setup_summit(void);
85#else
86#define setup_summit() {}
87#endif
88
89static inline int
90summit_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
91{
92 if (!strncmp(oem, "IBM ENSW", 8) &&
93 (!strncmp(productid, "VIGIL SMP", 9)
94 || !strncmp(productid, "EXA", 3)
95 || !strncmp(productid, "RUTHLESS SMP", 12))){
96 mark_tsc_unstable("Summit based system");
97 use_cyclone = 1; /*enable cyclone-timer*/
98 setup_summit();
99 return 1;
100 }
101 return 0;
102}
103
104/* Hook from generic ACPI tables.c */
105static inline int summit_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
106{
107 if (!strncmp(oem_id, "IBM", 3) &&
108 (!strncmp(oem_table_id, "SERVIGIL", 8)
109 || !strncmp(oem_table_id, "EXA", 3))){
110 mark_tsc_unstable("Summit based system");
111 use_cyclone = 1; /*enable cyclone-timer*/
112 setup_summit();
113 return 1;
114 }
115 return 0;
116}
117
118struct rio_table_hdr {
119 unsigned char version; /* Version number of this data structure */
120 /* Version 3 adds chassis_num & WP_index */
121 unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil) */
122 unsigned char num_rio_dev; /* # of RIO I/O devices (Cyclones and Winnipegs) */
123} __attribute__((packed));
124
125struct scal_detail {
126 unsigned char node_id; /* Scalability Node ID */
127 unsigned long CBAR; /* Address of 1MB register space */
128 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
129 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
130 unsigned char port1node; /* Node ID port connected to: 0xFF = None */
131 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
132 unsigned char port2node; /* Node ID port connected to: 0xFF = None */
133 unsigned char port2port; /* Port num port connected to: 0,1,2, or 0xFF=None */
134 unsigned char chassis_num; /* 1 based Chassis number (1 = boot node) */
135} __attribute__((packed));
136
137struct rio_detail {
138 unsigned char node_id; /* RIO Node ID */
139 unsigned long BBAR; /* Address of 1MB register space */
140 unsigned char type; /* Type of device */
141 unsigned char owner_id; /* For WPEG: Node ID of Cyclone that owns this WPEG*/
142 /* For CYC: Node ID of Twister that owns this CYC */
143 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
144 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
145 unsigned char port1node; /* Node ID port connected to: 0xFF=None */
146 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
147 unsigned char first_slot; /* For WPEG: Lowest slot number below this WPEG */
148 /* For CYC: 0 */
149 unsigned char status; /* For WPEG: Bit 0 = 1 : the XAPIC is used */
150 /* = 0 : the XAPIC is not used, ie:*/
151 /* ints fwded to another XAPIC */
152 /* Bits1:7 Reserved */
153 /* For CYC: Bits0:7 Reserved */
154 unsigned char WP_index; /* For WPEG: WPEG instance index - lower ones have */
155 /* lower slot numbers/PCI bus numbers */
156 /* For CYC: No meaning */
157 unsigned char chassis_num; /* 1 based Chassis number */
158 /* For LookOut WPEGs this field indicates the */
159 /* Expansion Chassis #, enumerated from Boot */
160 /* Node WPEG external port, then Boot Node CYC */
161 /* external port, then Next Vigil chassis WPEG */
162 /* external port, etc. */
163 /* Shared Lookouts have only 1 chassis number (the */
164 /* first one assigned) */
165} __attribute__((packed));
166
167
168typedef enum {
169 CompatTwister = 0, /* Compatibility Twister */
170 AltTwister = 1, /* Alternate Twister of internal 8-way */
171 CompatCyclone = 2, /* Compatibility Cyclone */
172 AltCyclone = 3, /* Alternate Cyclone of internal 8-way */
173 CompatWPEG = 4, /* Compatibility WPEG */
174 AltWPEG = 5, /* Second Planar WPEG */
175 LookOutAWPEG = 6, /* LookOut WPEG */
176 LookOutBWPEG = 7, /* LookOut WPEG */
177} node_type;
178
179static inline int is_WPEG(struct rio_detail *rio){
180 return (rio->type == CompatWPEG || rio->type == AltWPEG ||
181 rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
182}
183
184
185/* In clustered mode, the high nibble of APIC ID is a cluster number.
186 * The low nibble is a 4-bit bitmap. */
187#define XAPIC_DEST_CPUS_SHIFT 4
188#define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
189#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
190
191#define SUMMIT_APIC_DFR_VALUE (APIC_DFR_CLUSTER)
192
193static inline const cpumask_t *summit_target_cpus(void)
194{
195 /* CPU_MASK_ALL (0xff) has undefined behaviour with
196 * dest_LowestPrio mode logical clustered apic interrupt routing
197 * Just start on cpu 0. IRQ balancing will spread load
198 */
199 return &cpumask_of_cpu(0);
200}
201
202static inline unsigned long
203summit_check_apicid_used(physid_mask_t bitmap, int apicid)
204{
205 return 0;
206}
207
208/* we don't use the phys_cpu_present_map to indicate apicid presence */
209static inline unsigned long summit_check_apicid_present(int bit)
210{
211 return 1;
212}
213
214#define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
215
216extern u8 cpu_2_logical_apicid[];
217
218static inline void summit_init_apic_ldr(void)
219{
220 unsigned long val, id;
221 int count = 0;
222 u8 my_id = (u8)hard_smp_processor_id();
223 u8 my_cluster = (u8)apicid_cluster(my_id);
224#ifdef CONFIG_SMP
225 u8 lid;
226 int i;
227
228 /* Create logical APIC IDs by counting CPUs already in cluster. */
229 for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
230 lid = cpu_2_logical_apicid[i];
231 if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
232 ++count;
233 }
234#endif
235 /* We only have a 4 wide bitmap in cluster mode. If a deranged
236 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
237 BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
238 id = my_cluster | (1UL << count);
239 apic_write(APIC_DFR, SUMMIT_APIC_DFR_VALUE);
240 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
241 val |= SET_APIC_LOGICAL_ID(id);
242 apic_write(APIC_LDR, val);
243}
244
245static inline int summit_apic_id_registered(void)
246{
247 return 1;
248}
249
250static inline void summit_setup_apic_routing(void)
251{
252 printk("Enabling APIC mode: Summit. Using %d I/O APICs\n",
253 nr_ioapics);
254}
255
256static inline int summit_apicid_to_node(int logical_apicid)
257{
258#ifdef CONFIG_SMP
259 return apicid_2_node[hard_smp_processor_id()];
260#else
261 return 0;
262#endif
263}
264
265/* Mapping from cpu number to logical apicid */
266static inline int summit_cpu_to_logical_apicid(int cpu)
267{
268#ifdef CONFIG_SMP
269 if (cpu >= nr_cpu_ids)
270 return BAD_APICID;
271 return (int)cpu_2_logical_apicid[cpu];
272#else
273 return logical_smp_processor_id();
274#endif
275}
276
277static inline int summit_cpu_present_to_apicid(int mps_cpu)
278{
279 if (mps_cpu < nr_cpu_ids)
280 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
281 else
282 return BAD_APICID;
283}
284
285static inline physid_mask_t
286summit_ioapic_phys_id_map(physid_mask_t phys_id_map)
287{
288 /* For clustered we don't have a good way to do this yet - hack */
289 return physids_promote(0x0F);
290}
291
292static inline physid_mask_t summit_apicid_to_cpu_present(int apicid)
293{
294 return physid_mask_of_physid(0);
295}
296
297static inline void summit_setup_portio_remap(void)
298{
299}
300
301static inline int summit_check_phys_apicid_present(int boot_cpu_physical_apicid)
302{
303 return 1;
304}
305
306static inline unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask)
307{
308 int cpus_found = 0;
309 int num_bits_set;
310 int apicid;
311 int cpu;
312
313 num_bits_set = cpus_weight(*cpumask);
314 /* Return id to all */
315 if (num_bits_set >= nr_cpu_ids)
316 return 0xFF;
317 /*
318 * The cpus in the mask must all be on the apic cluster. If are not
319 * on the same apicid cluster return default value of target_cpus():
320 */
321 cpu = first_cpu(*cpumask);
322 apicid = summit_cpu_to_logical_apicid(cpu);
323
324 while (cpus_found < num_bits_set) {
325 if (cpu_isset(cpu, *cpumask)) {
326 int new_apicid = summit_cpu_to_logical_apicid(cpu);
327
328 if (apicid_cluster(apicid) !=
329 apicid_cluster(new_apicid)) {
330 printk ("%s: Not a valid mask!\n", __func__);
331
332 return 0xFF;
333 }
334 apicid = apicid | new_apicid;
335 cpus_found++;
336 }
337 cpu++;
338 }
339 return apicid;
340}
341
342static inline unsigned int
343summit_cpu_mask_to_apicid_and(const struct cpumask *inmask,
344 const struct cpumask *andmask)
345{
346 int apicid = summit_cpu_to_logical_apicid(0);
347 cpumask_var_t cpumask;
348
349 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
350 return apicid;
351
352 cpumask_and(cpumask, inmask, andmask);
353 cpumask_and(cpumask, cpumask, cpu_online_mask);
354 apicid = summit_cpu_mask_to_apicid(cpumask);
355
356 free_cpumask_var(cpumask);
357
358 return apicid;
359}
360
361/*
362 * cpuid returns the value latched in the HW at reset, not the APIC ID
363 * register's value. For any box whose BIOS changes APIC IDs, like
364 * clustered APIC systems, we must use hard_smp_processor_id.
365 *
366 * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
367 */
368static inline int summit_phys_pkg_id(int cpuid_apic, int index_msb)
369{
370 return hard_smp_processor_id() >> index_msb;
371}
372
373static int probe_summit(void)
374{
375 /* probed later in mptable/ACPI hooks */
376 return 0;
377}
378
379static void summit_vector_allocation_domain(int cpu, cpumask_t *retmask)
380{
381 /* Careful. Some cpus do not strictly honor the set of cpus
382 * specified in the interrupt destination when using lowest
383 * priority interrupt delivery mode.
384 *
385 * In particular there was a hyperthreading cpu observed to
386 * deliver interrupts to the wrong hyperthread when only one
387 * hyperthread was specified in the interrupt desitination.
388 */
389 *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
390}
34 391
35static struct rio_table_hdr *rio_table_hdr __initdata; 392static struct rio_table_hdr *rio_table_hdr __initdata;
36static struct scal_detail *scal_devs[MAX_NUMNODES] __initdata; 393static struct scal_detail *scal_devs[MAX_NUMNODES] __initdata;
@@ -186,3 +543,61 @@ void __init setup_summit(void)
186 next_wpeg = 0; 543 next_wpeg = 0;
187 } while (next_wpeg != 0); 544 } while (next_wpeg != 0);
188} 545}
546
547
548struct genapic apic_summit = {
549
550 .name = "summit",
551 .probe = probe_summit,
552 .acpi_madt_oem_check = summit_acpi_madt_oem_check,
553 .apic_id_registered = summit_apic_id_registered,
554
555 .irq_delivery_mode = dest_LowestPrio,
556 /* logical delivery broadcast to all CPUs: */
557 .irq_dest_mode = 1,
558
559 .target_cpus = summit_target_cpus,
560 .disable_esr = 1,
561 .dest_logical = APIC_DEST_LOGICAL,
562 .check_apicid_used = summit_check_apicid_used,
563 .check_apicid_present = summit_check_apicid_present,
564
565 .vector_allocation_domain = summit_vector_allocation_domain,
566 .init_apic_ldr = summit_init_apic_ldr,
567
568 .ioapic_phys_id_map = summit_ioapic_phys_id_map,
569 .setup_apic_routing = summit_setup_apic_routing,
570 .multi_timer_check = NULL,
571 .apicid_to_node = summit_apicid_to_node,
572 .cpu_to_logical_apicid = summit_cpu_to_logical_apicid,
573 .cpu_present_to_apicid = summit_cpu_present_to_apicid,
574 .apicid_to_cpu_present = summit_apicid_to_cpu_present,
575 .setup_portio_remap = NULL,
576 .check_phys_apicid_present = summit_check_phys_apicid_present,
577 .enable_apic_mode = NULL,
578 .phys_pkg_id = summit_phys_pkg_id,
579 .mps_oem_check = summit_mps_oem_check,
580
581 .get_apic_id = summit_get_apic_id,
582 .set_apic_id = NULL,
583 .apic_id_mask = 0xFF << 24,
584
585 .cpu_mask_to_apicid = summit_cpu_mask_to_apicid,
586 .cpu_mask_to_apicid_and = summit_cpu_mask_to_apicid_and,
587
588 .send_IPI_mask = summit_send_IPI_mask,
589 .send_IPI_mask_allbutself = NULL,
590 .send_IPI_allbutself = summit_send_IPI_allbutself,
591 .send_IPI_all = summit_send_IPI_all,
592 .send_IPI_self = NULL,
593
594 .wakeup_cpu = NULL,
595 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
596 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
597
598 .wait_for_init_deassert = default_wait_for_init_deassert,
599
600 .smp_callin_clear_local_apic = NULL,
601 .store_NMI_vector = NULL,
602 .inquire_remote_apic = default_inquire_remote_apic,
603};
diff --git a/arch/x86/mach-generic/Makefile b/arch/x86/mach-generic/Makefile
index 6730f4e7c744..78ab5735cb80 100644
--- a/arch/x86/mach-generic/Makefile
+++ b/arch/x86/mach-generic/Makefile
@@ -6,6 +6,5 @@ EXTRA_CFLAGS := -Iarch/x86/kernel
6 6
7obj-y := probe.o default.o 7obj-y := probe.o default.o
8obj-$(CONFIG_X86_NUMAQ) += numaq.o 8obj-$(CONFIG_X86_NUMAQ) += numaq.o
9obj-$(CONFIG_X86_SUMMIT) += summit.o
10obj-$(CONFIG_X86_BIGSMP) += bigsmp.o 9obj-$(CONFIG_X86_BIGSMP) += bigsmp.o
11obj-$(CONFIG_X86_ES7000) += es7000.o 10obj-$(CONFIG_X86_ES7000) += es7000.o
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
deleted file mode 100644
index 673a64f8b463..000000000000
--- a/arch/x86/mach-generic/summit.c
+++ /dev/null
@@ -1,94 +0,0 @@
1/*
2 * APIC driver for the IBM "Summit" chipset.
3 */
4#define APIC_DEFINITION 1
5#include <linux/threads.h>
6#include <linux/cpumask.h>
7#include <asm/mpspec.h>
8#include <asm/genapic.h>
9#include <asm/fixmap.h>
10#include <asm/apicdef.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/init.h>
14#include <asm/summit/apicdef.h>
15#include <linux/smp.h>
16#include <asm/summit/apic.h>
17#include <asm/summit/ipi.h>
18#include <asm/summit/mpparse.h>
19
20static int probe_summit(void)
21{
22 /* probed later in mptable/ACPI hooks */
23 return 0;
24}
25
26static void summit_vector_allocation_domain(int cpu, cpumask_t *retmask)
27{
28 /* Careful. Some cpus do not strictly honor the set of cpus
29 * specified in the interrupt destination when using lowest
30 * priority interrupt delivery mode.
31 *
32 * In particular there was a hyperthreading cpu observed to
33 * deliver interrupts to the wrong hyperthread when only one
34 * hyperthread was specified in the interrupt desitination.
35 */
36 *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
37}
38
39struct genapic apic_summit = {
40
41 .name = "summit",
42 .probe = probe_summit,
43 .acpi_madt_oem_check = summit_acpi_madt_oem_check,
44 .apic_id_registered = summit_apic_id_registered,
45
46 .irq_delivery_mode = dest_LowestPrio,
47 /* logical delivery broadcast to all CPUs: */
48 .irq_dest_mode = 1,
49
50 .target_cpus = summit_target_cpus,
51 .disable_esr = 1,
52 .dest_logical = APIC_DEST_LOGICAL,
53 .check_apicid_used = summit_check_apicid_used,
54 .check_apicid_present = summit_check_apicid_present,
55
56 .vector_allocation_domain = summit_vector_allocation_domain,
57 .init_apic_ldr = summit_init_apic_ldr,
58
59 .ioapic_phys_id_map = summit_ioapic_phys_id_map,
60 .setup_apic_routing = summit_setup_apic_routing,
61 .multi_timer_check = NULL,
62 .apicid_to_node = summit_apicid_to_node,
63 .cpu_to_logical_apicid = summit_cpu_to_logical_apicid,
64 .cpu_present_to_apicid = summit_cpu_present_to_apicid,
65 .apicid_to_cpu_present = summit_apicid_to_cpu_present,
66 .setup_portio_remap = NULL,
67 .check_phys_apicid_present = summit_check_phys_apicid_present,
68 .enable_apic_mode = NULL,
69 .phys_pkg_id = summit_phys_pkg_id,
70 .mps_oem_check = summit_mps_oem_check,
71
72 .get_apic_id = summit_get_apic_id,
73 .set_apic_id = NULL,
74 .apic_id_mask = 0xFF << 24,
75
76 .cpu_mask_to_apicid = summit_cpu_mask_to_apicid,
77 .cpu_mask_to_apicid_and = summit_cpu_mask_to_apicid_and,
78
79 .send_IPI_mask = summit_send_IPI_mask,
80 .send_IPI_mask_allbutself = NULL,
81 .send_IPI_allbutself = summit_send_IPI_allbutself,
82 .send_IPI_all = summit_send_IPI_all,
83 .send_IPI_self = NULL,
84
85 .wakeup_cpu = NULL,
86 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
87 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
88
89 .wait_for_init_deassert = default_wait_for_init_deassert,
90
91 .smp_callin_clear_local_apic = NULL,
92 .store_NMI_vector = NULL,
93 .inquire_remote_apic = default_inquire_remote_apic,
94};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 07:51:49 -0500