diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-07-03 18:28:34 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-07-03 18:28:34 -0400 |
commit | 912b2539e1e062cec73e2e61448e507f7719bd08 (patch) | |
tree | 233807569ee5e0ab3118dd54c0ae9164fec8343e /arch | |
parent | 70b97a7f0b19cf1f2619deb5cc41e8b78c591aa7 (diff) | |
parent | 39ab9c212aac48f2744f2fd7722fa639ec048eb7 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
powerpc: add defconfig for Freescale MPC8349E-mITX board
powerpc: Add base support for the Freescale MPC8349E-mITX eval board
Documentation: correct values in MPC8548E SEC example node
[POWERPC] Actually copy over i8259.c to arch/ppc/syslib this time
[POWERPC] Add new interrupt mapping core and change platforms to use it
[POWERPC] Copy i8259 code back to arch/ppc
[POWERPC] New device-tree interrupt parsing code
[POWERPC] Use the genirq framework
[PATCH] genirq: Allow fasteoi handler to retrigger disabled interrupts
[POWERPC] Update the SWIM3 (powermac) floppy driver
[POWERPC] Fix error handling in detecting legacy serial ports
[POWERPC] Fix booting on Momentum "Apache" board (a Maple derivative)
[POWERPC] Fix various offb and BootX-related issues
[POWERPC] Add a default config for 32-bit CHRP machines
[POWERPC] fix implicit declaration on cell.
[POWERPC] change get_property to return void *
Diffstat (limited to 'arch')
51 files changed, 6284 insertions, 2229 deletions
diff --git a/arch/powerpc/configs/chrp32_defconfig b/arch/powerpc/configs/chrp32_defconfig new file mode 100644 index 000000000000..0fa010a63a8e --- /dev/null +++ b/arch/powerpc/configs/chrp32_defconfig | |||
@@ -0,0 +1,1378 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.17 | ||
4 | # Mon Jul 3 12:08:41 2006 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | CONFIG_PPC32=y | ||
8 | CONFIG_PPC_MERGE=y | ||
9 | CONFIG_MMU=y | ||
10 | CONFIG_GENERIC_HARDIRQS=y | ||
11 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
12 | CONFIG_GENERIC_HWEIGHT=y | ||
13 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
14 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
15 | CONFIG_PPC=y | ||
16 | CONFIG_EARLY_PRINTK=y | ||
17 | CONFIG_GENERIC_NVRAM=y | ||
18 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
19 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
20 | CONFIG_PPC_OF=y | ||
21 | CONFIG_PPC_UDBG_16550=y | ||
22 | CONFIG_GENERIC_TBSYNC=y | ||
23 | # CONFIG_DEFAULT_UIMAGE is not set | ||
24 | |||
25 | # | ||
26 | # Processor support | ||
27 | # | ||
28 | CONFIG_CLASSIC32=y | ||
29 | # CONFIG_PPC_52xx is not set | ||
30 | # CONFIG_PPC_82xx is not set | ||
31 | # CONFIG_PPC_83xx is not set | ||
32 | # CONFIG_PPC_85xx is not set | ||
33 | # CONFIG_PPC_86xx is not set | ||
34 | # CONFIG_40x is not set | ||
35 | # CONFIG_44x is not set | ||
36 | # CONFIG_8xx is not set | ||
37 | # CONFIG_E200 is not set | ||
38 | CONFIG_6xx=y | ||
39 | CONFIG_PPC_FPU=y | ||
40 | # CONFIG_ALTIVEC is not set | ||
41 | CONFIG_PPC_STD_MMU=y | ||
42 | CONFIG_PPC_STD_MMU_32=y | ||
43 | CONFIG_SMP=y | ||
44 | CONFIG_NR_CPUS=4 | ||
45 | |||
46 | # | ||
47 | # Code maturity level options | ||
48 | # | ||
49 | CONFIG_EXPERIMENTAL=y | ||
50 | CONFIG_LOCK_KERNEL=y | ||
51 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
52 | |||
53 | # | ||
54 | # General setup | ||
55 | # | ||
56 | CONFIG_LOCALVERSION="" | ||
57 | # CONFIG_LOCALVERSION_AUTO is not set | ||
58 | CONFIG_SWAP=y | ||
59 | CONFIG_SYSVIPC=y | ||
60 | CONFIG_POSIX_MQUEUE=y | ||
61 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
62 | CONFIG_SYSCTL=y | ||
63 | # CONFIG_AUDIT is not set | ||
64 | CONFIG_IKCONFIG=y | ||
65 | CONFIG_IKCONFIG_PROC=y | ||
66 | # CONFIG_CPUSETS is not set | ||
67 | # CONFIG_RELAY is not set | ||
68 | CONFIG_INITRAMFS_SOURCE="" | ||
69 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
70 | # CONFIG_EMBEDDED is not set | ||
71 | CONFIG_KALLSYMS=y | ||
72 | # CONFIG_KALLSYMS_ALL is not set | ||
73 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
74 | CONFIG_HOTPLUG=y | ||
75 | CONFIG_PRINTK=y | ||
76 | CONFIG_BUG=y | ||
77 | CONFIG_ELF_CORE=y | ||
78 | CONFIG_BASE_FULL=y | ||
79 | CONFIG_FUTEX=y | ||
80 | CONFIG_EPOLL=y | ||
81 | CONFIG_SHMEM=y | ||
82 | CONFIG_SLAB=y | ||
83 | # CONFIG_TINY_SHMEM is not set | ||
84 | CONFIG_BASE_SMALL=0 | ||
85 | # CONFIG_SLOB is not set | ||
86 | |||
87 | # | ||
88 | # Loadable module support | ||
89 | # | ||
90 | CONFIG_MODULES=y | ||
91 | CONFIG_MODULE_UNLOAD=y | ||
92 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
93 | # CONFIG_MODVERSIONS is not set | ||
94 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
95 | CONFIG_KMOD=y | ||
96 | CONFIG_STOP_MACHINE=y | ||
97 | |||
98 | # | ||
99 | # Block layer | ||
100 | # | ||
101 | CONFIG_LBD=y | ||
102 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
103 | # CONFIG_LSF is not set | ||
104 | |||
105 | # | ||
106 | # IO Schedulers | ||
107 | # | ||
108 | CONFIG_IOSCHED_NOOP=y | ||
109 | CONFIG_IOSCHED_AS=y | ||
110 | CONFIG_IOSCHED_DEADLINE=y | ||
111 | CONFIG_IOSCHED_CFQ=y | ||
112 | CONFIG_DEFAULT_AS=y | ||
113 | # CONFIG_DEFAULT_DEADLINE is not set | ||
114 | # CONFIG_DEFAULT_CFQ is not set | ||
115 | # CONFIG_DEFAULT_NOOP is not set | ||
116 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
117 | |||
118 | # | ||
119 | # Platform support | ||
120 | # | ||
121 | CONFIG_PPC_MULTIPLATFORM=y | ||
122 | # CONFIG_PPC_ISERIES is not set | ||
123 | # CONFIG_EMBEDDED6xx is not set | ||
124 | # CONFIG_APUS is not set | ||
125 | CONFIG_PPC_CHRP=y | ||
126 | # CONFIG_PPC_PMAC is not set | ||
127 | # CONFIG_PPC_CELL is not set | ||
128 | # CONFIG_PPC_CELL_NATIVE is not set | ||
129 | CONFIG_MPIC=y | ||
130 | CONFIG_PPC_RTAS=y | ||
131 | # CONFIG_RTAS_ERROR_LOGGING is not set | ||
132 | CONFIG_RTAS_PROC=y | ||
133 | # CONFIG_MMIO_NVRAM is not set | ||
134 | CONFIG_PPC_MPC106=y | ||
135 | # CONFIG_PPC_970_NAP is not set | ||
136 | # CONFIG_CPU_FREQ is not set | ||
137 | # CONFIG_TAU is not set | ||
138 | # CONFIG_WANT_EARLY_SERIAL is not set | ||
139 | |||
140 | # | ||
141 | # Kernel options | ||
142 | # | ||
143 | CONFIG_HIGHMEM=y | ||
144 | # CONFIG_HZ_100 is not set | ||
145 | CONFIG_HZ_250=y | ||
146 | # CONFIG_HZ_1000 is not set | ||
147 | CONFIG_HZ=250 | ||
148 | CONFIG_PREEMPT_NONE=y | ||
149 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
150 | # CONFIG_PREEMPT is not set | ||
151 | CONFIG_PREEMPT_BKL=y | ||
152 | CONFIG_BINFMT_ELF=y | ||
153 | CONFIG_BINFMT_MISC=y | ||
154 | # CONFIG_KEXEC is not set | ||
155 | CONFIG_IRQ_ALL_CPUS=y | ||
156 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
157 | CONFIG_SELECT_MEMORY_MODEL=y | ||
158 | CONFIG_FLATMEM_MANUAL=y | ||
159 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
160 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
161 | CONFIG_FLATMEM=y | ||
162 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
163 | # CONFIG_SPARSEMEM_STATIC is not set | ||
164 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
165 | CONFIG_PROC_DEVICETREE=y | ||
166 | # CONFIG_CMDLINE_BOOL is not set | ||
167 | # CONFIG_PM is not set | ||
168 | CONFIG_SECCOMP=y | ||
169 | CONFIG_ISA_DMA_API=y | ||
170 | |||
171 | # | ||
172 | # Bus options | ||
173 | # | ||
174 | CONFIG_ISA=y | ||
175 | CONFIG_GENERIC_ISA_DMA=y | ||
176 | CONFIG_PPC_I8259=y | ||
177 | CONFIG_PPC_INDIRECT_PCI=y | ||
178 | CONFIG_PCI=y | ||
179 | CONFIG_PCI_DOMAINS=y | ||
180 | # CONFIG_PCIEPORTBUS is not set | ||
181 | # CONFIG_PCI_DEBUG is not set | ||
182 | |||
183 | # | ||
184 | # PCCARD (PCMCIA/CardBus) support | ||
185 | # | ||
186 | # CONFIG_PCCARD is not set | ||
187 | |||
188 | # | ||
189 | # PCI Hotplug Support | ||
190 | # | ||
191 | # CONFIG_HOTPLUG_PCI is not set | ||
192 | |||
193 | # | ||
194 | # Advanced setup | ||
195 | # | ||
196 | # CONFIG_ADVANCED_OPTIONS is not set | ||
197 | |||
198 | # | ||
199 | # Default settings for advanced configuration options are used | ||
200 | # | ||
201 | CONFIG_HIGHMEM_START=0xfe000000 | ||
202 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
203 | CONFIG_KERNEL_START=0xc0000000 | ||
204 | CONFIG_TASK_SIZE=0x80000000 | ||
205 | CONFIG_BOOT_LOAD=0x00800000 | ||
206 | |||
207 | # | ||
208 | # Networking | ||
209 | # | ||
210 | CONFIG_NET=y | ||
211 | |||
212 | # | ||
213 | # Networking options | ||
214 | # | ||
215 | # CONFIG_NETDEBUG is not set | ||
216 | CONFIG_PACKET=y | ||
217 | # CONFIG_PACKET_MMAP is not set | ||
218 | CONFIG_UNIX=y | ||
219 | # CONFIG_NET_KEY is not set | ||
220 | CONFIG_INET=y | ||
221 | CONFIG_IP_MULTICAST=y | ||
222 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
223 | CONFIG_IP_FIB_HASH=y | ||
224 | # CONFIG_IP_PNP is not set | ||
225 | # CONFIG_NET_IPIP is not set | ||
226 | # CONFIG_NET_IPGRE is not set | ||
227 | # CONFIG_IP_MROUTE is not set | ||
228 | # CONFIG_ARPD is not set | ||
229 | CONFIG_SYN_COOKIES=y | ||
230 | # CONFIG_INET_AH is not set | ||
231 | # CONFIG_INET_ESP is not set | ||
232 | # CONFIG_INET_IPCOMP is not set | ||
233 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
234 | # CONFIG_INET_TUNNEL is not set | ||
235 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
236 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
237 | CONFIG_INET_DIAG=y | ||
238 | CONFIG_INET_TCP_DIAG=y | ||
239 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
240 | CONFIG_TCP_CONG_BIC=y | ||
241 | |||
242 | # | ||
243 | # IP: Virtual Server Configuration | ||
244 | # | ||
245 | # CONFIG_IP_VS is not set | ||
246 | # CONFIG_IPV6 is not set | ||
247 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
248 | # CONFIG_INET6_TUNNEL is not set | ||
249 | # CONFIG_NETWORK_SECMARK is not set | ||
250 | CONFIG_NETFILTER=y | ||
251 | # CONFIG_NETFILTER_DEBUG is not set | ||
252 | |||
253 | # | ||
254 | # Core Netfilter Configuration | ||
255 | # | ||
256 | # CONFIG_NETFILTER_NETLINK is not set | ||
257 | # CONFIG_NETFILTER_XTABLES is not set | ||
258 | |||
259 | # | ||
260 | # IP: Netfilter Configuration | ||
261 | # | ||
262 | CONFIG_IP_NF_CONNTRACK=m | ||
263 | # CONFIG_IP_NF_CT_ACCT is not set | ||
264 | # CONFIG_IP_NF_CONNTRACK_MARK is not set | ||
265 | # CONFIG_IP_NF_CONNTRACK_EVENTS is not set | ||
266 | # CONFIG_IP_NF_CT_PROTO_SCTP is not set | ||
267 | CONFIG_IP_NF_FTP=m | ||
268 | CONFIG_IP_NF_IRC=m | ||
269 | # CONFIG_IP_NF_NETBIOS_NS is not set | ||
270 | CONFIG_IP_NF_TFTP=m | ||
271 | CONFIG_IP_NF_AMANDA=m | ||
272 | # CONFIG_IP_NF_PPTP is not set | ||
273 | # CONFIG_IP_NF_H323 is not set | ||
274 | # CONFIG_IP_NF_SIP is not set | ||
275 | # CONFIG_IP_NF_QUEUE is not set | ||
276 | |||
277 | # | ||
278 | # DCCP Configuration (EXPERIMENTAL) | ||
279 | # | ||
280 | # CONFIG_IP_DCCP is not set | ||
281 | |||
282 | # | ||
283 | # SCTP Configuration (EXPERIMENTAL) | ||
284 | # | ||
285 | # CONFIG_IP_SCTP is not set | ||
286 | |||
287 | # | ||
288 | # TIPC Configuration (EXPERIMENTAL) | ||
289 | # | ||
290 | # CONFIG_TIPC is not set | ||
291 | # CONFIG_ATM is not set | ||
292 | # CONFIG_BRIDGE is not set | ||
293 | # CONFIG_VLAN_8021Q is not set | ||
294 | # CONFIG_DECNET is not set | ||
295 | # CONFIG_LLC2 is not set | ||
296 | # CONFIG_IPX is not set | ||
297 | # CONFIG_ATALK is not set | ||
298 | # CONFIG_X25 is not set | ||
299 | # CONFIG_LAPB is not set | ||
300 | # CONFIG_NET_DIVERT is not set | ||
301 | # CONFIG_ECONET is not set | ||
302 | # CONFIG_WAN_ROUTER is not set | ||
303 | |||
304 | # | ||
305 | # QoS and/or fair queueing | ||
306 | # | ||
307 | # CONFIG_NET_SCHED is not set | ||
308 | |||
309 | # | ||
310 | # Network testing | ||
311 | # | ||
312 | # CONFIG_NET_PKTGEN is not set | ||
313 | # CONFIG_HAMRADIO is not set | ||
314 | # CONFIG_IRDA is not set | ||
315 | # CONFIG_BT is not set | ||
316 | # CONFIG_IEEE80211 is not set | ||
317 | |||
318 | # | ||
319 | # Device Drivers | ||
320 | # | ||
321 | |||
322 | # | ||
323 | # Generic Driver Options | ||
324 | # | ||
325 | # CONFIG_STANDALONE is not set | ||
326 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
327 | # CONFIG_FW_LOADER is not set | ||
328 | # CONFIG_DEBUG_DRIVER is not set | ||
329 | # CONFIG_SYS_HYPERVISOR is not set | ||
330 | |||
331 | # | ||
332 | # Connector - unified userspace <-> kernelspace linker | ||
333 | # | ||
334 | # CONFIG_CONNECTOR is not set | ||
335 | |||
336 | # | ||
337 | # Memory Technology Devices (MTD) | ||
338 | # | ||
339 | # CONFIG_MTD is not set | ||
340 | |||
341 | # | ||
342 | # Parallel port support | ||
343 | # | ||
344 | # CONFIG_PARPORT is not set | ||
345 | |||
346 | # | ||
347 | # Plug and Play support | ||
348 | # | ||
349 | # CONFIG_PNP is not set | ||
350 | |||
351 | # | ||
352 | # Block devices | ||
353 | # | ||
354 | CONFIG_BLK_DEV_FD=y | ||
355 | # CONFIG_BLK_DEV_XD is not set | ||
356 | # CONFIG_BLK_CPQ_DA is not set | ||
357 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
358 | # CONFIG_BLK_DEV_DAC960 is not set | ||
359 | # CONFIG_BLK_DEV_UMEM is not set | ||
360 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
361 | CONFIG_BLK_DEV_LOOP=y | ||
362 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
363 | # CONFIG_BLK_DEV_NBD is not set | ||
364 | # CONFIG_BLK_DEV_SX8 is not set | ||
365 | # CONFIG_BLK_DEV_UB is not set | ||
366 | CONFIG_BLK_DEV_RAM=y | ||
367 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
368 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
369 | CONFIG_BLK_DEV_INITRD=y | ||
370 | # CONFIG_CDROM_PKTCDVD is not set | ||
371 | # CONFIG_ATA_OVER_ETH is not set | ||
372 | |||
373 | # | ||
374 | # ATA/ATAPI/MFM/RLL support | ||
375 | # | ||
376 | CONFIG_IDE=y | ||
377 | CONFIG_BLK_DEV_IDE=y | ||
378 | |||
379 | # | ||
380 | # Please see Documentation/ide.txt for help/info on IDE drives | ||
381 | # | ||
382 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
383 | CONFIG_BLK_DEV_IDEDISK=y | ||
384 | CONFIG_IDEDISK_MULTI_MODE=y | ||
385 | CONFIG_BLK_DEV_IDECD=y | ||
386 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
387 | # CONFIG_BLK_DEV_IDEFLOPPY is not set | ||
388 | # CONFIG_BLK_DEV_IDESCSI is not set | ||
389 | # CONFIG_IDE_TASK_IOCTL is not set | ||
390 | |||
391 | # | ||
392 | # IDE chipset support/bugfixes | ||
393 | # | ||
394 | CONFIG_IDE_GENERIC=y | ||
395 | CONFIG_BLK_DEV_IDEPCI=y | ||
396 | CONFIG_IDEPCI_SHARE_IRQ=y | ||
397 | # CONFIG_BLK_DEV_OFFBOARD is not set | ||
398 | CONFIG_BLK_DEV_GENERIC=y | ||
399 | # CONFIG_BLK_DEV_OPTI621 is not set | ||
400 | CONFIG_BLK_DEV_SL82C105=y | ||
401 | CONFIG_BLK_DEV_IDEDMA_PCI=y | ||
402 | # CONFIG_BLK_DEV_IDEDMA_FORCED is not set | ||
403 | CONFIG_IDEDMA_PCI_AUTO=y | ||
404 | # CONFIG_IDEDMA_ONLYDISK is not set | ||
405 | # CONFIG_BLK_DEV_AEC62XX is not set | ||
406 | # CONFIG_BLK_DEV_ALI15X3 is not set | ||
407 | # CONFIG_BLK_DEV_AMD74XX is not set | ||
408 | # CONFIG_BLK_DEV_CMD64X is not set | ||
409 | # CONFIG_BLK_DEV_TRIFLEX is not set | ||
410 | # CONFIG_BLK_DEV_CY82C693 is not set | ||
411 | # CONFIG_BLK_DEV_CS5520 is not set | ||
412 | # CONFIG_BLK_DEV_CS5530 is not set | ||
413 | # CONFIG_BLK_DEV_HPT34X is not set | ||
414 | # CONFIG_BLK_DEV_HPT366 is not set | ||
415 | # CONFIG_BLK_DEV_SC1200 is not set | ||
416 | # CONFIG_BLK_DEV_PIIX is not set | ||
417 | # CONFIG_BLK_DEV_IT821X is not set | ||
418 | # CONFIG_BLK_DEV_NS87415 is not set | ||
419 | # CONFIG_BLK_DEV_PDC202XX_OLD is not set | ||
420 | # CONFIG_BLK_DEV_PDC202XX_NEW is not set | ||
421 | # CONFIG_BLK_DEV_SVWKS is not set | ||
422 | # CONFIG_BLK_DEV_SIIMAGE is not set | ||
423 | # CONFIG_BLK_DEV_SLC90E66 is not set | ||
424 | # CONFIG_BLK_DEV_TRM290 is not set | ||
425 | CONFIG_BLK_DEV_VIA82CXXX=y | ||
426 | # CONFIG_IDE_ARM is not set | ||
427 | # CONFIG_IDE_CHIPSETS is not set | ||
428 | CONFIG_BLK_DEV_IDEDMA=y | ||
429 | # CONFIG_IDEDMA_IVB is not set | ||
430 | CONFIG_IDEDMA_AUTO=y | ||
431 | # CONFIG_BLK_DEV_HD is not set | ||
432 | |||
433 | # | ||
434 | # SCSI device support | ||
435 | # | ||
436 | # CONFIG_RAID_ATTRS is not set | ||
437 | CONFIG_SCSI=y | ||
438 | CONFIG_SCSI_PROC_FS=y | ||
439 | |||
440 | # | ||
441 | # SCSI support type (disk, tape, CD-ROM) | ||
442 | # | ||
443 | CONFIG_BLK_DEV_SD=y | ||
444 | CONFIG_CHR_DEV_ST=y | ||
445 | # CONFIG_CHR_DEV_OSST is not set | ||
446 | CONFIG_BLK_DEV_SR=y | ||
447 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
448 | CONFIG_CHR_DEV_SG=y | ||
449 | # CONFIG_CHR_DEV_SCH is not set | ||
450 | |||
451 | # | ||
452 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
453 | # | ||
454 | # CONFIG_SCSI_MULTI_LUN is not set | ||
455 | CONFIG_SCSI_CONSTANTS=y | ||
456 | # CONFIG_SCSI_LOGGING is not set | ||
457 | |||
458 | # | ||
459 | # SCSI Transport Attributes | ||
460 | # | ||
461 | CONFIG_SCSI_SPI_ATTRS=y | ||
462 | # CONFIG_SCSI_FC_ATTRS is not set | ||
463 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
464 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
465 | |||
466 | # | ||
467 | # SCSI low-level drivers | ||
468 | # | ||
469 | # CONFIG_ISCSI_TCP is not set | ||
470 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
471 | # CONFIG_SCSI_3W_9XXX is not set | ||
472 | # CONFIG_SCSI_7000FASST is not set | ||
473 | # CONFIG_SCSI_ACARD is not set | ||
474 | # CONFIG_SCSI_AHA152X is not set | ||
475 | # CONFIG_SCSI_AHA1542 is not set | ||
476 | # CONFIG_SCSI_AACRAID is not set | ||
477 | # CONFIG_SCSI_AIC7XXX is not set | ||
478 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
479 | # CONFIG_SCSI_AIC79XX is not set | ||
480 | # CONFIG_SCSI_DPT_I2O is not set | ||
481 | # CONFIG_SCSI_IN2000 is not set | ||
482 | # CONFIG_MEGARAID_NEWGEN is not set | ||
483 | # CONFIG_MEGARAID_LEGACY is not set | ||
484 | # CONFIG_MEGARAID_SAS is not set | ||
485 | # CONFIG_SCSI_SATA is not set | ||
486 | # CONFIG_SCSI_HPTIOP is not set | ||
487 | # CONFIG_SCSI_BUSLOGIC is not set | ||
488 | # CONFIG_SCSI_DMX3191D is not set | ||
489 | # CONFIG_SCSI_DTC3280 is not set | ||
490 | # CONFIG_SCSI_EATA is not set | ||
491 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
492 | # CONFIG_SCSI_GDTH is not set | ||
493 | # CONFIG_SCSI_GENERIC_NCR5380 is not set | ||
494 | # CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set | ||
495 | # CONFIG_SCSI_IPS is not set | ||
496 | # CONFIG_SCSI_INITIO is not set | ||
497 | # CONFIG_SCSI_INIA100 is not set | ||
498 | # CONFIG_SCSI_NCR53C406A is not set | ||
499 | CONFIG_SCSI_SYM53C8XX_2=y | ||
500 | CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0 | ||
501 | CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 | ||
502 | CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 | ||
503 | CONFIG_SCSI_SYM53C8XX_MMIO=y | ||
504 | # CONFIG_SCSI_IPR is not set | ||
505 | # CONFIG_SCSI_PAS16 is not set | ||
506 | # CONFIG_SCSI_PSI240I is not set | ||
507 | # CONFIG_SCSI_QLOGIC_FAS is not set | ||
508 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
509 | # CONFIG_SCSI_QLA_FC is not set | ||
510 | # CONFIG_SCSI_LPFC is not set | ||
511 | # CONFIG_SCSI_SYM53C416 is not set | ||
512 | # CONFIG_SCSI_DC395x is not set | ||
513 | # CONFIG_SCSI_DC390T is not set | ||
514 | # CONFIG_SCSI_T128 is not set | ||
515 | # CONFIG_SCSI_U14_34F is not set | ||
516 | # CONFIG_SCSI_NSP32 is not set | ||
517 | # CONFIG_SCSI_DEBUG is not set | ||
518 | |||
519 | # | ||
520 | # Old CD-ROM drivers (not SCSI, not IDE) | ||
521 | # | ||
522 | # CONFIG_CD_NO_IDESCSI is not set | ||
523 | |||
524 | # | ||
525 | # Multi-device support (RAID and LVM) | ||
526 | # | ||
527 | # CONFIG_MD is not set | ||
528 | |||
529 | # | ||
530 | # Fusion MPT device support | ||
531 | # | ||
532 | # CONFIG_FUSION is not set | ||
533 | # CONFIG_FUSION_SPI is not set | ||
534 | # CONFIG_FUSION_FC is not set | ||
535 | # CONFIG_FUSION_SAS is not set | ||
536 | |||
537 | # | ||
538 | # IEEE 1394 (FireWire) support | ||
539 | # | ||
540 | # CONFIG_IEEE1394 is not set | ||
541 | |||
542 | # | ||
543 | # I2O device support | ||
544 | # | ||
545 | # CONFIG_I2O is not set | ||
546 | |||
547 | # | ||
548 | # Macintosh device drivers | ||
549 | # | ||
550 | # CONFIG_WINDFARM is not set | ||
551 | |||
552 | # | ||
553 | # Network device support | ||
554 | # | ||
555 | CONFIG_NETDEVICES=y | ||
556 | # CONFIG_DUMMY is not set | ||
557 | # CONFIG_BONDING is not set | ||
558 | # CONFIG_EQUALIZER is not set | ||
559 | # CONFIG_TUN is not set | ||
560 | |||
561 | # | ||
562 | # ARCnet devices | ||
563 | # | ||
564 | # CONFIG_ARCNET is not set | ||
565 | |||
566 | # | ||
567 | # PHY device support | ||
568 | # | ||
569 | # CONFIG_PHYLIB is not set | ||
570 | |||
571 | # | ||
572 | # Ethernet (10 or 100Mbit) | ||
573 | # | ||
574 | CONFIG_NET_ETHERNET=y | ||
575 | CONFIG_MII=y | ||
576 | # CONFIG_HAPPYMEAL is not set | ||
577 | # CONFIG_SUNGEM is not set | ||
578 | # CONFIG_CASSINI is not set | ||
579 | # CONFIG_NET_VENDOR_3COM is not set | ||
580 | # CONFIG_LANCE is not set | ||
581 | # CONFIG_NET_VENDOR_SMC is not set | ||
582 | # CONFIG_NET_VENDOR_RACAL is not set | ||
583 | |||
584 | # | ||
585 | # Tulip family network device support | ||
586 | # | ||
587 | CONFIG_NET_TULIP=y | ||
588 | # CONFIG_DE2104X is not set | ||
589 | # CONFIG_TULIP is not set | ||
590 | CONFIG_DE4X5=y | ||
591 | # CONFIG_WINBOND_840 is not set | ||
592 | # CONFIG_DM9102 is not set | ||
593 | # CONFIG_ULI526X is not set | ||
594 | # CONFIG_AT1700 is not set | ||
595 | # CONFIG_DEPCA is not set | ||
596 | # CONFIG_HP100 is not set | ||
597 | # CONFIG_NET_ISA is not set | ||
598 | CONFIG_NET_PCI=y | ||
599 | CONFIG_PCNET32=y | ||
600 | # CONFIG_AMD8111_ETH is not set | ||
601 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
602 | # CONFIG_AC3200 is not set | ||
603 | # CONFIG_APRICOT is not set | ||
604 | # CONFIG_B44 is not set | ||
605 | # CONFIG_FORCEDETH is not set | ||
606 | # CONFIG_CS89x0 is not set | ||
607 | # CONFIG_DGRS is not set | ||
608 | # CONFIG_EEPRO100 is not set | ||
609 | # CONFIG_E100 is not set | ||
610 | # CONFIG_FEALNX is not set | ||
611 | # CONFIG_NATSEMI is not set | ||
612 | # CONFIG_NE2K_PCI is not set | ||
613 | CONFIG_8139CP=y | ||
614 | CONFIG_8139TOO=y | ||
615 | # CONFIG_8139TOO_PIO is not set | ||
616 | # CONFIG_8139TOO_TUNE_TWISTER is not set | ||
617 | # CONFIG_8139TOO_8129 is not set | ||
618 | # CONFIG_8139_OLD_RX_RESET is not set | ||
619 | # CONFIG_SIS900 is not set | ||
620 | # CONFIG_EPIC100 is not set | ||
621 | # CONFIG_SUNDANCE is not set | ||
622 | # CONFIG_TLAN is not set | ||
623 | CONFIG_VIA_RHINE=y | ||
624 | # CONFIG_VIA_RHINE_MMIO is not set | ||
625 | |||
626 | # | ||
627 | # Ethernet (1000 Mbit) | ||
628 | # | ||
629 | # CONFIG_ACENIC is not set | ||
630 | # CONFIG_DL2K is not set | ||
631 | # CONFIG_E1000 is not set | ||
632 | # CONFIG_NS83820 is not set | ||
633 | # CONFIG_HAMACHI is not set | ||
634 | # CONFIG_YELLOWFIN is not set | ||
635 | # CONFIG_R8169 is not set | ||
636 | # CONFIG_SIS190 is not set | ||
637 | # CONFIG_SKGE is not set | ||
638 | # CONFIG_SKY2 is not set | ||
639 | # CONFIG_SK98LIN is not set | ||
640 | # CONFIG_VIA_VELOCITY is not set | ||
641 | # CONFIG_TIGON3 is not set | ||
642 | # CONFIG_BNX2 is not set | ||
643 | CONFIG_MV643XX_ETH=y | ||
644 | # CONFIG_MV643XX_ETH_0 is not set | ||
645 | # CONFIG_MV643XX_ETH_1 is not set | ||
646 | # CONFIG_MV643XX_ETH_2 is not set | ||
647 | |||
648 | # | ||
649 | # Ethernet (10000 Mbit) | ||
650 | # | ||
651 | # CONFIG_CHELSIO_T1 is not set | ||
652 | # CONFIG_IXGB is not set | ||
653 | # CONFIG_S2IO is not set | ||
654 | # CONFIG_MYRI10GE is not set | ||
655 | |||
656 | # | ||
657 | # Token Ring devices | ||
658 | # | ||
659 | # CONFIG_TR is not set | ||
660 | |||
661 | # | ||
662 | # Wireless LAN (non-hamradio) | ||
663 | # | ||
664 | # CONFIG_NET_RADIO is not set | ||
665 | |||
666 | # | ||
667 | # Wan interfaces | ||
668 | # | ||
669 | # CONFIG_WAN is not set | ||
670 | # CONFIG_FDDI is not set | ||
671 | # CONFIG_HIPPI is not set | ||
672 | CONFIG_PPP=m | ||
673 | CONFIG_PPP_MULTILINK=y | ||
674 | CONFIG_PPP_FILTER=y | ||
675 | CONFIG_PPP_ASYNC=m | ||
676 | CONFIG_PPP_SYNC_TTY=m | ||
677 | CONFIG_PPP_DEFLATE=m | ||
678 | CONFIG_PPP_BSDCOMP=m | ||
679 | CONFIG_PPP_MPPE=m | ||
680 | CONFIG_PPPOE=m | ||
681 | # CONFIG_SLIP is not set | ||
682 | # CONFIG_NET_FC is not set | ||
683 | # CONFIG_SHAPER is not set | ||
684 | # CONFIG_NETCONSOLE is not set | ||
685 | # CONFIG_NETPOLL is not set | ||
686 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
687 | |||
688 | # | ||
689 | # ISDN subsystem | ||
690 | # | ||
691 | # CONFIG_ISDN is not set | ||
692 | |||
693 | # | ||
694 | # Telephony Support | ||
695 | # | ||
696 | # CONFIG_PHONE is not set | ||
697 | |||
698 | # | ||
699 | # Input device support | ||
700 | # | ||
701 | CONFIG_INPUT=y | ||
702 | |||
703 | # | ||
704 | # Userland interfaces | ||
705 | # | ||
706 | CONFIG_INPUT_MOUSEDEV=y | ||
707 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
708 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
709 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
710 | # CONFIG_INPUT_JOYDEV is not set | ||
711 | # CONFIG_INPUT_TSDEV is not set | ||
712 | CONFIG_INPUT_EVDEV=y | ||
713 | # CONFIG_INPUT_EVBUG is not set | ||
714 | |||
715 | # | ||
716 | # Input Device Drivers | ||
717 | # | ||
718 | CONFIG_INPUT_KEYBOARD=y | ||
719 | CONFIG_KEYBOARD_ATKBD=y | ||
720 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
721 | # CONFIG_KEYBOARD_LKKBD is not set | ||
722 | # CONFIG_KEYBOARD_XTKBD is not set | ||
723 | # CONFIG_KEYBOARD_NEWTON is not set | ||
724 | CONFIG_INPUT_MOUSE=y | ||
725 | CONFIG_MOUSE_PS2=y | ||
726 | # CONFIG_MOUSE_SERIAL is not set | ||
727 | # CONFIG_MOUSE_INPORT is not set | ||
728 | # CONFIG_MOUSE_LOGIBM is not set | ||
729 | # CONFIG_MOUSE_PC110PAD is not set | ||
730 | # CONFIG_MOUSE_VSXXXAA is not set | ||
731 | # CONFIG_INPUT_JOYSTICK is not set | ||
732 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
733 | CONFIG_INPUT_MISC=y | ||
734 | # CONFIG_INPUT_PCSPKR is not set | ||
735 | CONFIG_INPUT_UINPUT=y | ||
736 | |||
737 | # | ||
738 | # Hardware I/O ports | ||
739 | # | ||
740 | CONFIG_SERIO=y | ||
741 | CONFIG_SERIO_I8042=y | ||
742 | CONFIG_SERIO_SERPORT=y | ||
743 | # CONFIG_SERIO_PCIPS2 is not set | ||
744 | CONFIG_SERIO_LIBPS2=y | ||
745 | # CONFIG_SERIO_RAW is not set | ||
746 | # CONFIG_GAMEPORT is not set | ||
747 | |||
748 | # | ||
749 | # Character devices | ||
750 | # | ||
751 | CONFIG_VT=y | ||
752 | CONFIG_VT_CONSOLE=y | ||
753 | CONFIG_HW_CONSOLE=y | ||
754 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
755 | |||
756 | # | ||
757 | # Serial drivers | ||
758 | # | ||
759 | CONFIG_SERIAL_8250=y | ||
760 | CONFIG_SERIAL_8250_CONSOLE=y | ||
761 | CONFIG_SERIAL_8250_PCI=y | ||
762 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
763 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
764 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
765 | |||
766 | # | ||
767 | # Non-8250 serial port support | ||
768 | # | ||
769 | CONFIG_SERIAL_CORE=y | ||
770 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
771 | # CONFIG_SERIAL_JSM is not set | ||
772 | CONFIG_UNIX98_PTYS=y | ||
773 | CONFIG_LEGACY_PTYS=y | ||
774 | CONFIG_LEGACY_PTY_COUNT=256 | ||
775 | # CONFIG_HVC_RTAS is not set | ||
776 | |||
777 | # | ||
778 | # IPMI | ||
779 | # | ||
780 | # CONFIG_IPMI_HANDLER is not set | ||
781 | |||
782 | # | ||
783 | # Watchdog Cards | ||
784 | # | ||
785 | # CONFIG_WATCHDOG is not set | ||
786 | CONFIG_NVRAM=y | ||
787 | CONFIG_GEN_RTC=y | ||
788 | # CONFIG_GEN_RTC_X is not set | ||
789 | # CONFIG_DTLK is not set | ||
790 | # CONFIG_R3964 is not set | ||
791 | # CONFIG_APPLICOM is not set | ||
792 | |||
793 | # | ||
794 | # Ftape, the floppy tape device driver | ||
795 | # | ||
796 | # CONFIG_AGP is not set | ||
797 | # CONFIG_DRM is not set | ||
798 | # CONFIG_RAW_DRIVER is not set | ||
799 | |||
800 | # | ||
801 | # TPM devices | ||
802 | # | ||
803 | # CONFIG_TCG_TPM is not set | ||
804 | # CONFIG_TELCLOCK is not set | ||
805 | |||
806 | # | ||
807 | # I2C support | ||
808 | # | ||
809 | CONFIG_I2C=y | ||
810 | # CONFIG_I2C_CHARDEV is not set | ||
811 | |||
812 | # | ||
813 | # I2C Algorithms | ||
814 | # | ||
815 | CONFIG_I2C_ALGOBIT=y | ||
816 | # CONFIG_I2C_ALGOPCF is not set | ||
817 | # CONFIG_I2C_ALGOPCA is not set | ||
818 | |||
819 | # | ||
820 | # I2C Hardware Bus support | ||
821 | # | ||
822 | # CONFIG_I2C_ALI1535 is not set | ||
823 | # CONFIG_I2C_ALI1563 is not set | ||
824 | # CONFIG_I2C_ALI15X3 is not set | ||
825 | # CONFIG_I2C_AMD756 is not set | ||
826 | # CONFIG_I2C_AMD8111 is not set | ||
827 | # CONFIG_I2C_HYDRA is not set | ||
828 | # CONFIG_I2C_I801 is not set | ||
829 | # CONFIG_I2C_I810 is not set | ||
830 | # CONFIG_I2C_PIIX4 is not set | ||
831 | # CONFIG_I2C_MPC is not set | ||
832 | # CONFIG_I2C_NFORCE2 is not set | ||
833 | # CONFIG_I2C_OCORES is not set | ||
834 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
835 | # CONFIG_I2C_PROSAVAGE is not set | ||
836 | # CONFIG_I2C_SAVAGE4 is not set | ||
837 | # CONFIG_I2C_SIS5595 is not set | ||
838 | # CONFIG_I2C_SIS630 is not set | ||
839 | # CONFIG_I2C_SIS96X is not set | ||
840 | # CONFIG_I2C_STUB is not set | ||
841 | # CONFIG_I2C_VIA is not set | ||
842 | # CONFIG_I2C_VIAPRO is not set | ||
843 | # CONFIG_I2C_VOODOO3 is not set | ||
844 | # CONFIG_I2C_PCA_ISA is not set | ||
845 | |||
846 | # | ||
847 | # Miscellaneous I2C Chip support | ||
848 | # | ||
849 | # CONFIG_SENSORS_DS1337 is not set | ||
850 | # CONFIG_SENSORS_DS1374 is not set | ||
851 | # CONFIG_SENSORS_EEPROM is not set | ||
852 | # CONFIG_SENSORS_PCF8574 is not set | ||
853 | # CONFIG_SENSORS_PCA9539 is not set | ||
854 | # CONFIG_SENSORS_PCF8591 is not set | ||
855 | # CONFIG_SENSORS_M41T00 is not set | ||
856 | # CONFIG_SENSORS_MAX6875 is not set | ||
857 | # CONFIG_I2C_DEBUG_CORE is not set | ||
858 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
859 | # CONFIG_I2C_DEBUG_BUS is not set | ||
860 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
861 | |||
862 | # | ||
863 | # SPI support | ||
864 | # | ||
865 | # CONFIG_SPI is not set | ||
866 | # CONFIG_SPI_MASTER is not set | ||
867 | |||
868 | # | ||
869 | # Dallas's 1-wire bus | ||
870 | # | ||
871 | |||
872 | # | ||
873 | # Hardware Monitoring support | ||
874 | # | ||
875 | # CONFIG_HWMON is not set | ||
876 | # CONFIG_HWMON_VID is not set | ||
877 | |||
878 | # | ||
879 | # Misc devices | ||
880 | # | ||
881 | |||
882 | # | ||
883 | # Multimedia devices | ||
884 | # | ||
885 | # CONFIG_VIDEO_DEV is not set | ||
886 | CONFIG_VIDEO_V4L2=y | ||
887 | |||
888 | # | ||
889 | # Digital Video Broadcasting Devices | ||
890 | # | ||
891 | # CONFIG_DVB is not set | ||
892 | # CONFIG_USB_DABUSB is not set | ||
893 | |||
894 | # | ||
895 | # Graphics support | ||
896 | # | ||
897 | CONFIG_FB=y | ||
898 | CONFIG_FB_CFB_FILLRECT=y | ||
899 | CONFIG_FB_CFB_COPYAREA=y | ||
900 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
901 | CONFIG_FB_MACMODES=y | ||
902 | CONFIG_FB_FIRMWARE_EDID=y | ||
903 | # CONFIG_FB_BACKLIGHT is not set | ||
904 | CONFIG_FB_MODE_HELPERS=y | ||
905 | CONFIG_FB_TILEBLITTING=y | ||
906 | # CONFIG_FB_CIRRUS is not set | ||
907 | # CONFIG_FB_PM2 is not set | ||
908 | # CONFIG_FB_CYBER2000 is not set | ||
909 | CONFIG_FB_OF=y | ||
910 | # CONFIG_FB_CT65550 is not set | ||
911 | # CONFIG_FB_ASILIANT is not set | ||
912 | # CONFIG_FB_IMSTT is not set | ||
913 | # CONFIG_FB_VGA16 is not set | ||
914 | # CONFIG_FB_S1D13XXX is not set | ||
915 | # CONFIG_FB_NVIDIA is not set | ||
916 | # CONFIG_FB_RIVA is not set | ||
917 | CONFIG_FB_MATROX=y | ||
918 | CONFIG_FB_MATROX_MILLENIUM=y | ||
919 | CONFIG_FB_MATROX_MYSTIQUE=y | ||
920 | CONFIG_FB_MATROX_G=y | ||
921 | # CONFIG_FB_MATROX_I2C is not set | ||
922 | # CONFIG_FB_MATROX_MULTIHEAD is not set | ||
923 | CONFIG_FB_RADEON=y | ||
924 | CONFIG_FB_RADEON_I2C=y | ||
925 | # CONFIG_FB_RADEON_DEBUG is not set | ||
926 | # CONFIG_FB_ATY128 is not set | ||
927 | CONFIG_FB_ATY=y | ||
928 | CONFIG_FB_ATY_CT=y | ||
929 | # CONFIG_FB_ATY_GENERIC_LCD is not set | ||
930 | CONFIG_FB_ATY_GX=y | ||
931 | # CONFIG_FB_SAVAGE is not set | ||
932 | # CONFIG_FB_SIS is not set | ||
933 | # CONFIG_FB_NEOMAGIC is not set | ||
934 | # CONFIG_FB_KYRO is not set | ||
935 | CONFIG_FB_3DFX=y | ||
936 | # CONFIG_FB_3DFX_ACCEL is not set | ||
937 | # CONFIG_FB_VOODOO1 is not set | ||
938 | # CONFIG_FB_TRIDENT is not set | ||
939 | # CONFIG_FB_VIRTUAL is not set | ||
940 | |||
941 | # | ||
942 | # Console display driver support | ||
943 | # | ||
944 | CONFIG_VGA_CONSOLE=y | ||
945 | # CONFIG_VGACON_SOFT_SCROLLBACK is not set | ||
946 | # CONFIG_MDA_CONSOLE is not set | ||
947 | CONFIG_DUMMY_CONSOLE=y | ||
948 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
949 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
950 | # CONFIG_FONTS is not set | ||
951 | CONFIG_FONT_8x8=y | ||
952 | CONFIG_FONT_8x16=y | ||
953 | |||
954 | # | ||
955 | # Logo configuration | ||
956 | # | ||
957 | CONFIG_LOGO=y | ||
958 | CONFIG_LOGO_LINUX_MONO=y | ||
959 | CONFIG_LOGO_LINUX_VGA16=y | ||
960 | CONFIG_LOGO_LINUX_CLUT224=y | ||
961 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
962 | |||
963 | # | ||
964 | # Sound | ||
965 | # | ||
966 | # CONFIG_SOUND is not set | ||
967 | |||
968 | # | ||
969 | # USB support | ||
970 | # | ||
971 | CONFIG_USB_ARCH_HAS_HCD=y | ||
972 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
973 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
974 | CONFIG_USB=y | ||
975 | # CONFIG_USB_DEBUG is not set | ||
976 | |||
977 | # | ||
978 | # Miscellaneous USB options | ||
979 | # | ||
980 | CONFIG_USB_DEVICEFS=y | ||
981 | # CONFIG_USB_BANDWIDTH is not set | ||
982 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
983 | # CONFIG_USB_OTG is not set | ||
984 | |||
985 | # | ||
986 | # USB Host Controller Drivers | ||
987 | # | ||
988 | CONFIG_USB_EHCI_HCD=m | ||
989 | # CONFIG_USB_EHCI_SPLIT_ISO is not set | ||
990 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
991 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
992 | # CONFIG_USB_ISP116X_HCD is not set | ||
993 | CONFIG_USB_OHCI_HCD=y | ||
994 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set | ||
995 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
996 | CONFIG_USB_UHCI_HCD=y | ||
997 | # CONFIG_USB_SL811_HCD is not set | ||
998 | |||
999 | # | ||
1000 | # USB Device Class drivers | ||
1001 | # | ||
1002 | # CONFIG_USB_ACM is not set | ||
1003 | # CONFIG_USB_PRINTER is not set | ||
1004 | |||
1005 | # | ||
1006 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
1007 | # | ||
1008 | |||
1009 | # | ||
1010 | # may also be needed; see USB_STORAGE Help for more information | ||
1011 | # | ||
1012 | CONFIG_USB_STORAGE=m | ||
1013 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1014 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
1015 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
1016 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1017 | # CONFIG_USB_STORAGE_DPCM is not set | ||
1018 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1019 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
1020 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
1021 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1022 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1023 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1024 | # CONFIG_USB_LIBUSUAL is not set | ||
1025 | |||
1026 | # | ||
1027 | # USB Input Devices | ||
1028 | # | ||
1029 | CONFIG_USB_HID=y | ||
1030 | CONFIG_USB_HIDINPUT=y | ||
1031 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | ||
1032 | # CONFIG_HID_FF is not set | ||
1033 | # CONFIG_USB_HIDDEV is not set | ||
1034 | # CONFIG_USB_AIPTEK is not set | ||
1035 | # CONFIG_USB_WACOM is not set | ||
1036 | # CONFIG_USB_ACECAD is not set | ||
1037 | # CONFIG_USB_KBTAB is not set | ||
1038 | # CONFIG_USB_POWERMATE is not set | ||
1039 | # CONFIG_USB_TOUCHSCREEN is not set | ||
1040 | # CONFIG_USB_YEALINK is not set | ||
1041 | # CONFIG_USB_XPAD is not set | ||
1042 | # CONFIG_USB_ATI_REMOTE is not set | ||
1043 | # CONFIG_USB_ATI_REMOTE2 is not set | ||
1044 | # CONFIG_USB_KEYSPAN_REMOTE is not set | ||
1045 | # CONFIG_USB_APPLETOUCH is not set | ||
1046 | |||
1047 | # | ||
1048 | # USB Imaging devices | ||
1049 | # | ||
1050 | # CONFIG_USB_MDC800 is not set | ||
1051 | # CONFIG_USB_MICROTEK is not set | ||
1052 | |||
1053 | # | ||
1054 | # USB Network Adapters | ||
1055 | # | ||
1056 | # CONFIG_USB_CATC is not set | ||
1057 | # CONFIG_USB_KAWETH is not set | ||
1058 | # CONFIG_USB_PEGASUS is not set | ||
1059 | # CONFIG_USB_RTL8150 is not set | ||
1060 | # CONFIG_USB_USBNET is not set | ||
1061 | CONFIG_USB_MON=y | ||
1062 | |||
1063 | # | ||
1064 | # USB port drivers | ||
1065 | # | ||
1066 | |||
1067 | # | ||
1068 | # USB Serial Converter support | ||
1069 | # | ||
1070 | # CONFIG_USB_SERIAL is not set | ||
1071 | |||
1072 | # | ||
1073 | # USB Miscellaneous drivers | ||
1074 | # | ||
1075 | # CONFIG_USB_EMI62 is not set | ||
1076 | # CONFIG_USB_EMI26 is not set | ||
1077 | # CONFIG_USB_AUERSWALD is not set | ||
1078 | # CONFIG_USB_RIO500 is not set | ||
1079 | # CONFIG_USB_LEGOTOWER is not set | ||
1080 | # CONFIG_USB_LCD is not set | ||
1081 | # CONFIG_USB_LED is not set | ||
1082 | # CONFIG_USB_CY7C63 is not set | ||
1083 | # CONFIG_USB_CYTHERM is not set | ||
1084 | # CONFIG_USB_PHIDGETKIT is not set | ||
1085 | # CONFIG_USB_PHIDGETSERVO is not set | ||
1086 | # CONFIG_USB_IDMOUSE is not set | ||
1087 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1088 | # CONFIG_USB_SISUSBVGA is not set | ||
1089 | # CONFIG_USB_LD is not set | ||
1090 | # CONFIG_USB_TEST is not set | ||
1091 | |||
1092 | # | ||
1093 | # USB DSL modem support | ||
1094 | # | ||
1095 | |||
1096 | # | ||
1097 | # USB Gadget Support | ||
1098 | # | ||
1099 | # CONFIG_USB_GADGET is not set | ||
1100 | |||
1101 | # | ||
1102 | # MMC/SD Card support | ||
1103 | # | ||
1104 | # CONFIG_MMC is not set | ||
1105 | |||
1106 | # | ||
1107 | # LED devices | ||
1108 | # | ||
1109 | # CONFIG_NEW_LEDS is not set | ||
1110 | |||
1111 | # | ||
1112 | # LED drivers | ||
1113 | # | ||
1114 | |||
1115 | # | ||
1116 | # LED Triggers | ||
1117 | # | ||
1118 | |||
1119 | # | ||
1120 | # InfiniBand support | ||
1121 | # | ||
1122 | # CONFIG_INFINIBAND is not set | ||
1123 | |||
1124 | # | ||
1125 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | ||
1126 | # | ||
1127 | |||
1128 | # | ||
1129 | # Real Time Clock | ||
1130 | # | ||
1131 | # CONFIG_RTC_CLASS is not set | ||
1132 | |||
1133 | # | ||
1134 | # DMA Engine support | ||
1135 | # | ||
1136 | # CONFIG_DMA_ENGINE is not set | ||
1137 | |||
1138 | # | ||
1139 | # DMA Clients | ||
1140 | # | ||
1141 | |||
1142 | # | ||
1143 | # DMA Devices | ||
1144 | # | ||
1145 | |||
1146 | # | ||
1147 | # File systems | ||
1148 | # | ||
1149 | CONFIG_EXT2_FS=y | ||
1150 | # CONFIG_EXT2_FS_XATTR is not set | ||
1151 | # CONFIG_EXT2_FS_XIP is not set | ||
1152 | CONFIG_EXT3_FS=y | ||
1153 | CONFIG_EXT3_FS_XATTR=y | ||
1154 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
1155 | # CONFIG_EXT3_FS_SECURITY is not set | ||
1156 | CONFIG_JBD=y | ||
1157 | # CONFIG_JBD_DEBUG is not set | ||
1158 | CONFIG_FS_MBCACHE=y | ||
1159 | # CONFIG_REISERFS_FS is not set | ||
1160 | # CONFIG_JFS_FS is not set | ||
1161 | # CONFIG_FS_POSIX_ACL is not set | ||
1162 | # CONFIG_XFS_FS is not set | ||
1163 | # CONFIG_OCFS2_FS is not set | ||
1164 | # CONFIG_MINIX_FS is not set | ||
1165 | # CONFIG_ROMFS_FS is not set | ||
1166 | CONFIG_INOTIFY=y | ||
1167 | CONFIG_INOTIFY_USER=y | ||
1168 | # CONFIG_QUOTA is not set | ||
1169 | CONFIG_DNOTIFY=y | ||
1170 | # CONFIG_AUTOFS_FS is not set | ||
1171 | # CONFIG_AUTOFS4_FS is not set | ||
1172 | # CONFIG_FUSE_FS is not set | ||
1173 | |||
1174 | # | ||
1175 | # CD-ROM/DVD Filesystems | ||
1176 | # | ||
1177 | CONFIG_ISO9660_FS=y | ||
1178 | # CONFIG_JOLIET is not set | ||
1179 | # CONFIG_ZISOFS is not set | ||
1180 | # CONFIG_UDF_FS is not set | ||
1181 | |||
1182 | # | ||
1183 | # DOS/FAT/NT Filesystems | ||
1184 | # | ||
1185 | CONFIG_FAT_FS=m | ||
1186 | CONFIG_MSDOS_FS=m | ||
1187 | CONFIG_VFAT_FS=m | ||
1188 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1189 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1190 | # CONFIG_NTFS_FS is not set | ||
1191 | |||
1192 | # | ||
1193 | # Pseudo filesystems | ||
1194 | # | ||
1195 | CONFIG_PROC_FS=y | ||
1196 | CONFIG_PROC_KCORE=y | ||
1197 | CONFIG_SYSFS=y | ||
1198 | CONFIG_TMPFS=y | ||
1199 | # CONFIG_HUGETLB_PAGE is not set | ||
1200 | CONFIG_RAMFS=y | ||
1201 | # CONFIG_CONFIGFS_FS is not set | ||
1202 | |||
1203 | # | ||
1204 | # Miscellaneous filesystems | ||
1205 | # | ||
1206 | # CONFIG_ADFS_FS is not set | ||
1207 | # CONFIG_AFFS_FS is not set | ||
1208 | # CONFIG_HFS_FS is not set | ||
1209 | # CONFIG_HFSPLUS_FS is not set | ||
1210 | # CONFIG_BEFS_FS is not set | ||
1211 | # CONFIG_BFS_FS is not set | ||
1212 | # CONFIG_EFS_FS is not set | ||
1213 | # CONFIG_CRAMFS is not set | ||
1214 | # CONFIG_VXFS_FS is not set | ||
1215 | # CONFIG_HPFS_FS is not set | ||
1216 | # CONFIG_QNX4FS_FS is not set | ||
1217 | # CONFIG_SYSV_FS is not set | ||
1218 | # CONFIG_UFS_FS is not set | ||
1219 | |||
1220 | # | ||
1221 | # Network File Systems | ||
1222 | # | ||
1223 | # CONFIG_NFS_FS is not set | ||
1224 | # CONFIG_NFSD is not set | ||
1225 | # CONFIG_SMB_FS is not set | ||
1226 | # CONFIG_CIFS is not set | ||
1227 | # CONFIG_NCP_FS is not set | ||
1228 | # CONFIG_CODA_FS is not set | ||
1229 | # CONFIG_AFS_FS is not set | ||
1230 | # CONFIG_9P_FS is not set | ||
1231 | |||
1232 | # | ||
1233 | # Partition Types | ||
1234 | # | ||
1235 | CONFIG_PARTITION_ADVANCED=y | ||
1236 | # CONFIG_ACORN_PARTITION is not set | ||
1237 | # CONFIG_OSF_PARTITION is not set | ||
1238 | # CONFIG_AMIGA_PARTITION is not set | ||
1239 | # CONFIG_ATARI_PARTITION is not set | ||
1240 | CONFIG_MAC_PARTITION=y | ||
1241 | CONFIG_MSDOS_PARTITION=y | ||
1242 | # CONFIG_BSD_DISKLABEL is not set | ||
1243 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1244 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1245 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1246 | # CONFIG_LDM_PARTITION is not set | ||
1247 | # CONFIG_SGI_PARTITION is not set | ||
1248 | # CONFIG_ULTRIX_PARTITION is not set | ||
1249 | # CONFIG_SUN_PARTITION is not set | ||
1250 | # CONFIG_KARMA_PARTITION is not set | ||
1251 | # CONFIG_EFI_PARTITION is not set | ||
1252 | |||
1253 | # | ||
1254 | # Native Language Support | ||
1255 | # | ||
1256 | CONFIG_NLS=y | ||
1257 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1258 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
1259 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1260 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1261 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1262 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1263 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1264 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1265 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1266 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1267 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1268 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1269 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1270 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1271 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1272 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1273 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1274 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1275 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1276 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1277 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1278 | # CONFIG_NLS_ISO8859_8 is not set | ||
1279 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1280 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1281 | CONFIG_NLS_ASCII=y | ||
1282 | CONFIG_NLS_ISO8859_1=m | ||
1283 | # CONFIG_NLS_ISO8859_2 is not set | ||
1284 | # CONFIG_NLS_ISO8859_3 is not set | ||
1285 | # CONFIG_NLS_ISO8859_4 is not set | ||
1286 | # CONFIG_NLS_ISO8859_5 is not set | ||
1287 | # CONFIG_NLS_ISO8859_6 is not set | ||
1288 | # CONFIG_NLS_ISO8859_7 is not set | ||
1289 | # CONFIG_NLS_ISO8859_9 is not set | ||
1290 | # CONFIG_NLS_ISO8859_13 is not set | ||
1291 | # CONFIG_NLS_ISO8859_14 is not set | ||
1292 | # CONFIG_NLS_ISO8859_15 is not set | ||
1293 | # CONFIG_NLS_KOI8_R is not set | ||
1294 | # CONFIG_NLS_KOI8_U is not set | ||
1295 | # CONFIG_NLS_UTF8 is not set | ||
1296 | |||
1297 | # | ||
1298 | # Library routines | ||
1299 | # | ||
1300 | CONFIG_CRC_CCITT=m | ||
1301 | # CONFIG_CRC16 is not set | ||
1302 | CONFIG_CRC32=y | ||
1303 | # CONFIG_LIBCRC32C is not set | ||
1304 | CONFIG_ZLIB_INFLATE=m | ||
1305 | CONFIG_ZLIB_DEFLATE=m | ||
1306 | CONFIG_TEXTSEARCH=y | ||
1307 | CONFIG_TEXTSEARCH_KMP=m | ||
1308 | |||
1309 | # | ||
1310 | # Instrumentation Support | ||
1311 | # | ||
1312 | # CONFIG_PROFILING is not set | ||
1313 | |||
1314 | # | ||
1315 | # Kernel hacking | ||
1316 | # | ||
1317 | # CONFIG_PRINTK_TIME is not set | ||
1318 | CONFIG_MAGIC_SYSRQ=y | ||
1319 | CONFIG_DEBUG_KERNEL=y | ||
1320 | CONFIG_LOG_BUF_SHIFT=15 | ||
1321 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1322 | # CONFIG_SCHEDSTATS is not set | ||
1323 | # CONFIG_DEBUG_SLAB is not set | ||
1324 | CONFIG_DEBUG_MUTEXES=y | ||
1325 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1326 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | ||
1327 | # CONFIG_DEBUG_KOBJECT is not set | ||
1328 | # CONFIG_DEBUG_HIGHMEM is not set | ||
1329 | # CONFIG_DEBUG_INFO is not set | ||
1330 | # CONFIG_DEBUG_FS is not set | ||
1331 | # CONFIG_DEBUG_VM is not set | ||
1332 | CONFIG_FORCED_INLINING=y | ||
1333 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1334 | CONFIG_DEBUGGER=y | ||
1335 | CONFIG_XMON=y | ||
1336 | CONFIG_XMON_DEFAULT=y | ||
1337 | # CONFIG_BDI_SWITCH is not set | ||
1338 | # CONFIG_BOOTX_TEXT is not set | ||
1339 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1340 | |||
1341 | # | ||
1342 | # Security options | ||
1343 | # | ||
1344 | # CONFIG_KEYS is not set | ||
1345 | # CONFIG_SECURITY is not set | ||
1346 | |||
1347 | # | ||
1348 | # Cryptographic options | ||
1349 | # | ||
1350 | CONFIG_CRYPTO=y | ||
1351 | # CONFIG_CRYPTO_HMAC is not set | ||
1352 | # CONFIG_CRYPTO_NULL is not set | ||
1353 | # CONFIG_CRYPTO_MD4 is not set | ||
1354 | # CONFIG_CRYPTO_MD5 is not set | ||
1355 | CONFIG_CRYPTO_SHA1=m | ||
1356 | # CONFIG_CRYPTO_SHA256 is not set | ||
1357 | # CONFIG_CRYPTO_SHA512 is not set | ||
1358 | # CONFIG_CRYPTO_WP512 is not set | ||
1359 | # CONFIG_CRYPTO_TGR192 is not set | ||
1360 | # CONFIG_CRYPTO_DES is not set | ||
1361 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1362 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1363 | # CONFIG_CRYPTO_SERPENT is not set | ||
1364 | # CONFIG_CRYPTO_AES is not set | ||
1365 | # CONFIG_CRYPTO_CAST5 is not set | ||
1366 | # CONFIG_CRYPTO_CAST6 is not set | ||
1367 | # CONFIG_CRYPTO_TEA is not set | ||
1368 | CONFIG_CRYPTO_ARC4=m | ||
1369 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1370 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1371 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1372 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1373 | # CONFIG_CRYPTO_CRC32C is not set | ||
1374 | # CONFIG_CRYPTO_TEST is not set | ||
1375 | |||
1376 | # | ||
1377 | # Hardware crypto devices | ||
1378 | # | ||
diff --git a/arch/powerpc/configs/mpc834x_itx_defconfig b/arch/powerpc/configs/mpc834x_itx_defconfig new file mode 100644 index 000000000000..fc2d9789adc8 --- /dev/null +++ b/arch/powerpc/configs/mpc834x_itx_defconfig | |||
@@ -0,0 +1,1336 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.17 | ||
4 | # Fri Jun 30 17:53:25 2006 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | CONFIG_PPC32=y | ||
8 | CONFIG_PPC_MERGE=y | ||
9 | CONFIG_MMU=y | ||
10 | CONFIG_GENERIC_HARDIRQS=y | ||
11 | CONFIG_IRQ_PER_CPU=y | ||
12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
13 | CONFIG_GENERIC_HWEIGHT=y | ||
14 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
15 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
16 | CONFIG_PPC=y | ||
17 | CONFIG_EARLY_PRINTK=y | ||
18 | CONFIG_GENERIC_NVRAM=y | ||
19 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
20 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
21 | CONFIG_PPC_OF=y | ||
22 | CONFIG_PPC_UDBG_16550=y | ||
23 | # CONFIG_GENERIC_TBSYNC is not set | ||
24 | CONFIG_DEFAULT_UIMAGE=y | ||
25 | |||
26 | # | ||
27 | # Processor support | ||
28 | # | ||
29 | # CONFIG_CLASSIC32 is not set | ||
30 | # CONFIG_PPC_52xx is not set | ||
31 | # CONFIG_PPC_82xx is not set | ||
32 | CONFIG_PPC_83xx=y | ||
33 | # CONFIG_PPC_85xx is not set | ||
34 | # CONFIG_PPC_86xx is not set | ||
35 | # CONFIG_40x is not set | ||
36 | # CONFIG_44x is not set | ||
37 | # CONFIG_8xx is not set | ||
38 | # CONFIG_E200 is not set | ||
39 | CONFIG_6xx=y | ||
40 | CONFIG_83xx=y | ||
41 | CONFIG_PPC_FPU=y | ||
42 | CONFIG_PPC_STD_MMU=y | ||
43 | CONFIG_PPC_STD_MMU_32=y | ||
44 | # CONFIG_SMP is not set | ||
45 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
46 | |||
47 | # | ||
48 | # Code maturity level options | ||
49 | # | ||
50 | CONFIG_EXPERIMENTAL=y | ||
51 | CONFIG_BROKEN_ON_SMP=y | ||
52 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
53 | |||
54 | # | ||
55 | # General setup | ||
56 | # | ||
57 | CONFIG_LOCALVERSION="" | ||
58 | CONFIG_LOCALVERSION_AUTO=y | ||
59 | CONFIG_SWAP=y | ||
60 | CONFIG_SYSVIPC=y | ||
61 | # CONFIG_POSIX_MQUEUE is not set | ||
62 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
63 | CONFIG_SYSCTL=y | ||
64 | # CONFIG_AUDIT is not set | ||
65 | # CONFIG_IKCONFIG is not set | ||
66 | # CONFIG_RELAY is not set | ||
67 | CONFIG_INITRAMFS_SOURCE="" | ||
68 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
69 | CONFIG_EMBEDDED=y | ||
70 | # CONFIG_KALLSYMS is not set | ||
71 | CONFIG_HOTPLUG=y | ||
72 | CONFIG_PRINTK=y | ||
73 | CONFIG_BUG=y | ||
74 | CONFIG_ELF_CORE=y | ||
75 | CONFIG_BASE_FULL=y | ||
76 | CONFIG_RT_MUTEXES=y | ||
77 | CONFIG_FUTEX=y | ||
78 | # CONFIG_EPOLL is not set | ||
79 | CONFIG_SHMEM=y | ||
80 | CONFIG_SLAB=y | ||
81 | # CONFIG_TINY_SHMEM is not set | ||
82 | CONFIG_BASE_SMALL=0 | ||
83 | # CONFIG_SLOB is not set | ||
84 | |||
85 | # | ||
86 | # Loadable module support | ||
87 | # | ||
88 | CONFIG_MODULES=y | ||
89 | CONFIG_MODULE_UNLOAD=y | ||
90 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
91 | # CONFIG_MODVERSIONS is not set | ||
92 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
93 | # CONFIG_KMOD is not set | ||
94 | |||
95 | # | ||
96 | # Block layer | ||
97 | # | ||
98 | # CONFIG_LBD is not set | ||
99 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
100 | # CONFIG_LSF is not set | ||
101 | |||
102 | # | ||
103 | # IO Schedulers | ||
104 | # | ||
105 | CONFIG_IOSCHED_NOOP=y | ||
106 | CONFIG_IOSCHED_AS=y | ||
107 | CONFIG_IOSCHED_DEADLINE=y | ||
108 | CONFIG_IOSCHED_CFQ=y | ||
109 | CONFIG_DEFAULT_AS=y | ||
110 | # CONFIG_DEFAULT_DEADLINE is not set | ||
111 | # CONFIG_DEFAULT_CFQ is not set | ||
112 | # CONFIG_DEFAULT_NOOP is not set | ||
113 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
114 | CONFIG_PPC_GEN550=y | ||
115 | # CONFIG_WANT_EARLY_SERIAL is not set | ||
116 | |||
117 | # | ||
118 | # Platform support | ||
119 | # | ||
120 | # CONFIG_MPC834x_SYS is not set | ||
121 | CONFIG_MPC834x_ITX=y | ||
122 | CONFIG_MPC834x=y | ||
123 | |||
124 | # | ||
125 | # Kernel options | ||
126 | # | ||
127 | # CONFIG_HIGHMEM is not set | ||
128 | # CONFIG_HZ_100 is not set | ||
129 | CONFIG_HZ_250=y | ||
130 | # CONFIG_HZ_1000 is not set | ||
131 | CONFIG_HZ=250 | ||
132 | CONFIG_PREEMPT_NONE=y | ||
133 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
134 | # CONFIG_PREEMPT is not set | ||
135 | CONFIG_BINFMT_ELF=y | ||
136 | # CONFIG_BINFMT_MISC is not set | ||
137 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
138 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
139 | CONFIG_SELECT_MEMORY_MODEL=y | ||
140 | CONFIG_FLATMEM_MANUAL=y | ||
141 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
142 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
143 | CONFIG_FLATMEM=y | ||
144 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
145 | # CONFIG_SPARSEMEM_STATIC is not set | ||
146 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
147 | # CONFIG_RESOURCES_64BIT is not set | ||
148 | CONFIG_PROC_DEVICETREE=y | ||
149 | # CONFIG_CMDLINE_BOOL is not set | ||
150 | # CONFIG_PM is not set | ||
151 | # CONFIG_SOFTWARE_SUSPEND is not set | ||
152 | CONFIG_SECCOMP=y | ||
153 | CONFIG_ISA_DMA_API=y | ||
154 | |||
155 | # | ||
156 | # Bus options | ||
157 | # | ||
158 | CONFIG_GENERIC_ISA_DMA=y | ||
159 | # CONFIG_PPC_I8259 is not set | ||
160 | CONFIG_PPC_INDIRECT_PCI=y | ||
161 | CONFIG_FSL_SOC=y | ||
162 | CONFIG_PCI=y | ||
163 | CONFIG_PCI_DOMAINS=y | ||
164 | # CONFIG_PCIEPORTBUS is not set | ||
165 | # CONFIG_PCI_DEBUG is not set | ||
166 | |||
167 | # | ||
168 | # PCCARD (PCMCIA/CardBus) support | ||
169 | # | ||
170 | # CONFIG_PCCARD is not set | ||
171 | |||
172 | # | ||
173 | # PCI Hotplug Support | ||
174 | # | ||
175 | # CONFIG_HOTPLUG_PCI is not set | ||
176 | |||
177 | # | ||
178 | # Advanced setup | ||
179 | # | ||
180 | # CONFIG_ADVANCED_OPTIONS is not set | ||
181 | |||
182 | # | ||
183 | # Default settings for advanced configuration options are used | ||
184 | # | ||
185 | CONFIG_HIGHMEM_START=0xfe000000 | ||
186 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
187 | CONFIG_KERNEL_START=0xc0000000 | ||
188 | CONFIG_TASK_SIZE=0x80000000 | ||
189 | CONFIG_BOOT_LOAD=0x00800000 | ||
190 | |||
191 | # | ||
192 | # Networking | ||
193 | # | ||
194 | CONFIG_NET=y | ||
195 | |||
196 | # | ||
197 | # Networking options | ||
198 | # | ||
199 | # CONFIG_NETDEBUG is not set | ||
200 | CONFIG_PACKET=y | ||
201 | # CONFIG_PACKET_MMAP is not set | ||
202 | CONFIG_UNIX=y | ||
203 | CONFIG_XFRM=y | ||
204 | # CONFIG_XFRM_USER is not set | ||
205 | # CONFIG_NET_KEY is not set | ||
206 | CONFIG_INET=y | ||
207 | CONFIG_IP_MULTICAST=y | ||
208 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
209 | CONFIG_IP_FIB_HASH=y | ||
210 | CONFIG_IP_PNP=y | ||
211 | CONFIG_IP_PNP_DHCP=y | ||
212 | CONFIG_IP_PNP_BOOTP=y | ||
213 | # CONFIG_IP_PNP_RARP is not set | ||
214 | # CONFIG_NET_IPIP is not set | ||
215 | # CONFIG_NET_IPGRE is not set | ||
216 | # CONFIG_IP_MROUTE is not set | ||
217 | # CONFIG_ARPD is not set | ||
218 | CONFIG_SYN_COOKIES=y | ||
219 | # CONFIG_INET_AH is not set | ||
220 | # CONFIG_INET_ESP is not set | ||
221 | # CONFIG_INET_IPCOMP is not set | ||
222 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
223 | # CONFIG_INET_TUNNEL is not set | ||
224 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
225 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
226 | CONFIG_INET_DIAG=y | ||
227 | CONFIG_INET_TCP_DIAG=y | ||
228 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
229 | CONFIG_TCP_CONG_BIC=y | ||
230 | # CONFIG_IPV6 is not set | ||
231 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
232 | # CONFIG_INET6_TUNNEL is not set | ||
233 | # CONFIG_NETWORK_SECMARK is not set | ||
234 | # CONFIG_NETFILTER is not set | ||
235 | |||
236 | # | ||
237 | # DCCP Configuration (EXPERIMENTAL) | ||
238 | # | ||
239 | # CONFIG_IP_DCCP is not set | ||
240 | |||
241 | # | ||
242 | # SCTP Configuration (EXPERIMENTAL) | ||
243 | # | ||
244 | # CONFIG_IP_SCTP is not set | ||
245 | |||
246 | # | ||
247 | # TIPC Configuration (EXPERIMENTAL) | ||
248 | # | ||
249 | # CONFIG_TIPC is not set | ||
250 | # CONFIG_ATM is not set | ||
251 | # CONFIG_BRIDGE is not set | ||
252 | # CONFIG_VLAN_8021Q is not set | ||
253 | # CONFIG_DECNET is not set | ||
254 | # CONFIG_LLC2 is not set | ||
255 | # CONFIG_IPX is not set | ||
256 | # CONFIG_ATALK is not set | ||
257 | # CONFIG_X25 is not set | ||
258 | # CONFIG_LAPB is not set | ||
259 | # CONFIG_NET_DIVERT is not set | ||
260 | # CONFIG_ECONET is not set | ||
261 | # CONFIG_WAN_ROUTER is not set | ||
262 | |||
263 | # | ||
264 | # QoS and/or fair queueing | ||
265 | # | ||
266 | # CONFIG_NET_SCHED is not set | ||
267 | |||
268 | # | ||
269 | # Network testing | ||
270 | # | ||
271 | # CONFIG_NET_PKTGEN is not set | ||
272 | # CONFIG_HAMRADIO is not set | ||
273 | # CONFIG_IRDA is not set | ||
274 | # CONFIG_BT is not set | ||
275 | # CONFIG_IEEE80211 is not set | ||
276 | |||
277 | # | ||
278 | # Device Drivers | ||
279 | # | ||
280 | |||
281 | # | ||
282 | # Generic Driver Options | ||
283 | # | ||
284 | CONFIG_STANDALONE=y | ||
285 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
286 | # CONFIG_FW_LOADER is not set | ||
287 | # CONFIG_DEBUG_DRIVER is not set | ||
288 | # CONFIG_SYS_HYPERVISOR is not set | ||
289 | |||
290 | # | ||
291 | # Connector - unified userspace <-> kernelspace linker | ||
292 | # | ||
293 | # CONFIG_CONNECTOR is not set | ||
294 | |||
295 | # | ||
296 | # Memory Technology Devices (MTD) | ||
297 | # | ||
298 | CONFIG_MTD=y | ||
299 | # CONFIG_MTD_DEBUG is not set | ||
300 | # CONFIG_MTD_CONCAT is not set | ||
301 | # CONFIG_MTD_PARTITIONS is not set | ||
302 | |||
303 | # | ||
304 | # User Modules And Translation Layers | ||
305 | # | ||
306 | CONFIG_MTD_CHAR=y | ||
307 | # CONFIG_MTD_BLOCK is not set | ||
308 | # CONFIG_MTD_BLOCK_RO is not set | ||
309 | # CONFIG_FTL is not set | ||
310 | # CONFIG_NFTL is not set | ||
311 | # CONFIG_INFTL is not set | ||
312 | # CONFIG_RFD_FTL is not set | ||
313 | |||
314 | # | ||
315 | # RAM/ROM/Flash chip drivers | ||
316 | # | ||
317 | CONFIG_MTD_CFI=y | ||
318 | # CONFIG_MTD_JEDECPROBE is not set | ||
319 | CONFIG_MTD_GEN_PROBE=y | ||
320 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
321 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
322 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
323 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
324 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
325 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
326 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
327 | CONFIG_MTD_CFI_I1=y | ||
328 | CONFIG_MTD_CFI_I2=y | ||
329 | # CONFIG_MTD_CFI_I4 is not set | ||
330 | # CONFIG_MTD_CFI_I8 is not set | ||
331 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
332 | CONFIG_MTD_CFI_AMDSTD=y | ||
333 | # CONFIG_MTD_CFI_STAA is not set | ||
334 | CONFIG_MTD_CFI_UTIL=y | ||
335 | # CONFIG_MTD_RAM is not set | ||
336 | # CONFIG_MTD_ROM is not set | ||
337 | # CONFIG_MTD_ABSENT is not set | ||
338 | # CONFIG_MTD_OBSOLETE_CHIPS is not set | ||
339 | |||
340 | # | ||
341 | # Mapping drivers for chip access | ||
342 | # | ||
343 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
344 | CONFIG_MTD_PHYSMAP=y | ||
345 | CONFIG_MTD_PHYSMAP_START=0xfe000000 | ||
346 | CONFIG_MTD_PHYSMAP_LEN=0x1000000 | ||
347 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
348 | # CONFIG_MTD_PLATRAM is not set | ||
349 | |||
350 | # | ||
351 | # Self-contained MTD device drivers | ||
352 | # | ||
353 | # CONFIG_MTD_PMC551 is not set | ||
354 | # CONFIG_MTD_DATAFLASH is not set | ||
355 | # CONFIG_MTD_M25P80 is not set | ||
356 | # CONFIG_MTD_SLRAM is not set | ||
357 | # CONFIG_MTD_PHRAM is not set | ||
358 | # CONFIG_MTD_MTDRAM is not set | ||
359 | # CONFIG_MTD_BLOCK2MTD is not set | ||
360 | |||
361 | # | ||
362 | # Disk-On-Chip Device Drivers | ||
363 | # | ||
364 | # CONFIG_MTD_DOC2000 is not set | ||
365 | # CONFIG_MTD_DOC2001 is not set | ||
366 | # CONFIG_MTD_DOC2001PLUS is not set | ||
367 | |||
368 | # | ||
369 | # NAND Flash Device Drivers | ||
370 | # | ||
371 | # CONFIG_MTD_NAND is not set | ||
372 | |||
373 | # | ||
374 | # OneNAND Flash Device Drivers | ||
375 | # | ||
376 | # CONFIG_MTD_ONENAND is not set | ||
377 | |||
378 | # | ||
379 | # Parallel port support | ||
380 | # | ||
381 | # CONFIG_PARPORT is not set | ||
382 | |||
383 | # | ||
384 | # Plug and Play support | ||
385 | # | ||
386 | |||
387 | # | ||
388 | # Block devices | ||
389 | # | ||
390 | # CONFIG_BLK_DEV_FD is not set | ||
391 | # CONFIG_BLK_CPQ_DA is not set | ||
392 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
393 | # CONFIG_BLK_DEV_DAC960 is not set | ||
394 | # CONFIG_BLK_DEV_UMEM is not set | ||
395 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
396 | CONFIG_BLK_DEV_LOOP=y | ||
397 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
398 | # CONFIG_BLK_DEV_NBD is not set | ||
399 | # CONFIG_BLK_DEV_SX8 is not set | ||
400 | # CONFIG_BLK_DEV_UB is not set | ||
401 | CONFIG_BLK_DEV_RAM=y | ||
402 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
403 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
404 | CONFIG_BLK_DEV_INITRD=y | ||
405 | # CONFIG_CDROM_PKTCDVD is not set | ||
406 | # CONFIG_ATA_OVER_ETH is not set | ||
407 | |||
408 | # | ||
409 | # ATA/ATAPI/MFM/RLL support | ||
410 | # | ||
411 | CONFIG_IDE=y | ||
412 | # CONFIG_BLK_DEV_IDE is not set | ||
413 | # CONFIG_BLK_DEV_HD_ONLY is not set | ||
414 | # CONFIG_BLK_DEV_HD is not set | ||
415 | |||
416 | # | ||
417 | # SCSI device support | ||
418 | # | ||
419 | # CONFIG_RAID_ATTRS is not set | ||
420 | CONFIG_SCSI=y | ||
421 | CONFIG_SCSI_PROC_FS=y | ||
422 | |||
423 | # | ||
424 | # SCSI support type (disk, tape, CD-ROM) | ||
425 | # | ||
426 | CONFIG_BLK_DEV_SD=y | ||
427 | # CONFIG_CHR_DEV_ST is not set | ||
428 | # CONFIG_CHR_DEV_OSST is not set | ||
429 | # CONFIG_BLK_DEV_SR is not set | ||
430 | CONFIG_CHR_DEV_SG=y | ||
431 | # CONFIG_CHR_DEV_SCH is not set | ||
432 | |||
433 | # | ||
434 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
435 | # | ||
436 | # CONFIG_SCSI_MULTI_LUN is not set | ||
437 | # CONFIG_SCSI_CONSTANTS is not set | ||
438 | # CONFIG_SCSI_LOGGING is not set | ||
439 | |||
440 | # | ||
441 | # SCSI Transport Attributes | ||
442 | # | ||
443 | CONFIG_SCSI_SPI_ATTRS=y | ||
444 | # CONFIG_SCSI_FC_ATTRS is not set | ||
445 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
446 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
447 | |||
448 | # | ||
449 | # SCSI low-level drivers | ||
450 | # | ||
451 | # CONFIG_ISCSI_TCP is not set | ||
452 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
453 | # CONFIG_SCSI_3W_9XXX is not set | ||
454 | # CONFIG_SCSI_ACARD is not set | ||
455 | # CONFIG_SCSI_AACRAID is not set | ||
456 | # CONFIG_SCSI_AIC7XXX is not set | ||
457 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
458 | # CONFIG_SCSI_AIC79XX is not set | ||
459 | # CONFIG_SCSI_DPT_I2O is not set | ||
460 | # CONFIG_MEGARAID_NEWGEN is not set | ||
461 | # CONFIG_MEGARAID_LEGACY is not set | ||
462 | # CONFIG_MEGARAID_SAS is not set | ||
463 | CONFIG_SCSI_SATA=y | ||
464 | # CONFIG_SCSI_SATA_AHCI is not set | ||
465 | # CONFIG_SCSI_SATA_SVW is not set | ||
466 | # CONFIG_SCSI_ATA_PIIX is not set | ||
467 | # CONFIG_SCSI_SATA_MV is not set | ||
468 | # CONFIG_SCSI_SATA_NV is not set | ||
469 | # CONFIG_SCSI_PDC_ADMA is not set | ||
470 | # CONFIG_SCSI_HPTIOP is not set | ||
471 | # CONFIG_SCSI_SATA_QSTOR is not set | ||
472 | # CONFIG_SCSI_SATA_PROMISE is not set | ||
473 | # CONFIG_SCSI_SATA_SX4 is not set | ||
474 | CONFIG_SCSI_SATA_SIL=y | ||
475 | # CONFIG_SCSI_SATA_SIL24 is not set | ||
476 | # CONFIG_SCSI_SATA_SIS is not set | ||
477 | # CONFIG_SCSI_SATA_ULI is not set | ||
478 | # CONFIG_SCSI_SATA_VIA is not set | ||
479 | # CONFIG_SCSI_SATA_VITESSE is not set | ||
480 | # CONFIG_SCSI_BUSLOGIC is not set | ||
481 | # CONFIG_SCSI_DMX3191D is not set | ||
482 | # CONFIG_SCSI_EATA is not set | ||
483 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
484 | # CONFIG_SCSI_GDTH is not set | ||
485 | # CONFIG_SCSI_IPS is not set | ||
486 | # CONFIG_SCSI_INITIO is not set | ||
487 | # CONFIG_SCSI_INIA100 is not set | ||
488 | # CONFIG_SCSI_SYM53C8XX_2 is not set | ||
489 | # CONFIG_SCSI_IPR is not set | ||
490 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
491 | # CONFIG_SCSI_QLA_FC is not set | ||
492 | # CONFIG_SCSI_LPFC is not set | ||
493 | # CONFIG_SCSI_DC395x is not set | ||
494 | # CONFIG_SCSI_DC390T is not set | ||
495 | # CONFIG_SCSI_NSP32 is not set | ||
496 | # CONFIG_SCSI_DEBUG is not set | ||
497 | |||
498 | # | ||
499 | # Multi-device support (RAID and LVM) | ||
500 | # | ||
501 | CONFIG_MD=y | ||
502 | CONFIG_BLK_DEV_MD=y | ||
503 | CONFIG_MD_LINEAR=y | ||
504 | CONFIG_MD_RAID0=y | ||
505 | CONFIG_MD_RAID1=y | ||
506 | # CONFIG_MD_RAID10 is not set | ||
507 | # CONFIG_MD_RAID456 is not set | ||
508 | # CONFIG_MD_MULTIPATH is not set | ||
509 | # CONFIG_MD_FAULTY is not set | ||
510 | # CONFIG_BLK_DEV_DM is not set | ||
511 | |||
512 | # | ||
513 | # Fusion MPT device support | ||
514 | # | ||
515 | # CONFIG_FUSION is not set | ||
516 | # CONFIG_FUSION_SPI is not set | ||
517 | # CONFIG_FUSION_FC is not set | ||
518 | # CONFIG_FUSION_SAS is not set | ||
519 | |||
520 | # | ||
521 | # IEEE 1394 (FireWire) support | ||
522 | # | ||
523 | # CONFIG_IEEE1394 is not set | ||
524 | |||
525 | # | ||
526 | # I2O device support | ||
527 | # | ||
528 | # CONFIG_I2O is not set | ||
529 | |||
530 | # | ||
531 | # Macintosh device drivers | ||
532 | # | ||
533 | # CONFIG_WINDFARM is not set | ||
534 | |||
535 | # | ||
536 | # Network device support | ||
537 | # | ||
538 | CONFIG_NETDEVICES=y | ||
539 | # CONFIG_DUMMY is not set | ||
540 | # CONFIG_BONDING is not set | ||
541 | # CONFIG_EQUALIZER is not set | ||
542 | # CONFIG_TUN is not set | ||
543 | |||
544 | # | ||
545 | # ARCnet devices | ||
546 | # | ||
547 | # CONFIG_ARCNET is not set | ||
548 | |||
549 | # | ||
550 | # PHY device support | ||
551 | # | ||
552 | CONFIG_PHYLIB=y | ||
553 | |||
554 | # | ||
555 | # MII PHY device drivers | ||
556 | # | ||
557 | # CONFIG_MARVELL_PHY is not set | ||
558 | # CONFIG_DAVICOM_PHY is not set | ||
559 | # CONFIG_QSEMI_PHY is not set | ||
560 | # CONFIG_LXT_PHY is not set | ||
561 | CONFIG_CICADA_PHY=y | ||
562 | # CONFIG_VITESSE_PHY is not set | ||
563 | # CONFIG_SMSC_PHY is not set | ||
564 | |||
565 | # | ||
566 | # Ethernet (10 or 100Mbit) | ||
567 | # | ||
568 | CONFIG_NET_ETHERNET=y | ||
569 | CONFIG_MII=y | ||
570 | # CONFIG_HAPPYMEAL is not set | ||
571 | # CONFIG_SUNGEM is not set | ||
572 | # CONFIG_CASSINI is not set | ||
573 | # CONFIG_NET_VENDOR_3COM is not set | ||
574 | |||
575 | # | ||
576 | # Tulip family network device support | ||
577 | # | ||
578 | # CONFIG_NET_TULIP is not set | ||
579 | # CONFIG_HP100 is not set | ||
580 | CONFIG_NET_PCI=y | ||
581 | # CONFIG_PCNET32 is not set | ||
582 | # CONFIG_AMD8111_ETH is not set | ||
583 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
584 | # CONFIG_B44 is not set | ||
585 | # CONFIG_FORCEDETH is not set | ||
586 | # CONFIG_DGRS is not set | ||
587 | # CONFIG_EEPRO100 is not set | ||
588 | CONFIG_E100=y | ||
589 | # CONFIG_FEALNX is not set | ||
590 | # CONFIG_NATSEMI is not set | ||
591 | # CONFIG_NE2K_PCI is not set | ||
592 | # CONFIG_8139CP is not set | ||
593 | # CONFIG_8139TOO is not set | ||
594 | # CONFIG_SIS900 is not set | ||
595 | # CONFIG_EPIC100 is not set | ||
596 | # CONFIG_SUNDANCE is not set | ||
597 | # CONFIG_TLAN is not set | ||
598 | # CONFIG_VIA_RHINE is not set | ||
599 | |||
600 | # | ||
601 | # Ethernet (1000 Mbit) | ||
602 | # | ||
603 | # CONFIG_ACENIC is not set | ||
604 | # CONFIG_DL2K is not set | ||
605 | # CONFIG_E1000 is not set | ||
606 | # CONFIG_NS83820 is not set | ||
607 | # CONFIG_HAMACHI is not set | ||
608 | # CONFIG_YELLOWFIN is not set | ||
609 | # CONFIG_R8169 is not set | ||
610 | # CONFIG_SIS190 is not set | ||
611 | # CONFIG_SKGE is not set | ||
612 | # CONFIG_SKY2 is not set | ||
613 | # CONFIG_SK98LIN is not set | ||
614 | # CONFIG_VIA_VELOCITY is not set | ||
615 | # CONFIG_TIGON3 is not set | ||
616 | # CONFIG_BNX2 is not set | ||
617 | CONFIG_GIANFAR=y | ||
618 | CONFIG_GFAR_NAPI=y | ||
619 | |||
620 | # | ||
621 | # Ethernet (10000 Mbit) | ||
622 | # | ||
623 | # CONFIG_CHELSIO_T1 is not set | ||
624 | # CONFIG_IXGB is not set | ||
625 | # CONFIG_S2IO is not set | ||
626 | # CONFIG_MYRI10GE is not set | ||
627 | |||
628 | # | ||
629 | # Token Ring devices | ||
630 | # | ||
631 | # CONFIG_TR is not set | ||
632 | |||
633 | # | ||
634 | # Wireless LAN (non-hamradio) | ||
635 | # | ||
636 | # CONFIG_NET_RADIO is not set | ||
637 | |||
638 | # | ||
639 | # Wan interfaces | ||
640 | # | ||
641 | # CONFIG_WAN is not set | ||
642 | # CONFIG_FDDI is not set | ||
643 | # CONFIG_HIPPI is not set | ||
644 | # CONFIG_PPP is not set | ||
645 | # CONFIG_SLIP is not set | ||
646 | # CONFIG_NET_FC is not set | ||
647 | # CONFIG_SHAPER is not set | ||
648 | # CONFIG_NETCONSOLE is not set | ||
649 | # CONFIG_NETPOLL is not set | ||
650 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
651 | |||
652 | # | ||
653 | # ISDN subsystem | ||
654 | # | ||
655 | # CONFIG_ISDN is not set | ||
656 | |||
657 | # | ||
658 | # Telephony Support | ||
659 | # | ||
660 | # CONFIG_PHONE is not set | ||
661 | |||
662 | # | ||
663 | # Input device support | ||
664 | # | ||
665 | CONFIG_INPUT=y | ||
666 | |||
667 | # | ||
668 | # Userland interfaces | ||
669 | # | ||
670 | # CONFIG_INPUT_MOUSEDEV is not set | ||
671 | # CONFIG_INPUT_JOYDEV is not set | ||
672 | # CONFIG_INPUT_TSDEV is not set | ||
673 | # CONFIG_INPUT_EVDEV is not set | ||
674 | # CONFIG_INPUT_EVBUG is not set | ||
675 | |||
676 | # | ||
677 | # Input Device Drivers | ||
678 | # | ||
679 | # CONFIG_INPUT_KEYBOARD is not set | ||
680 | # CONFIG_INPUT_MOUSE is not set | ||
681 | # CONFIG_INPUT_JOYSTICK is not set | ||
682 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
683 | # CONFIG_INPUT_MISC is not set | ||
684 | |||
685 | # | ||
686 | # Hardware I/O ports | ||
687 | # | ||
688 | # CONFIG_SERIO is not set | ||
689 | # CONFIG_GAMEPORT is not set | ||
690 | |||
691 | # | ||
692 | # Character devices | ||
693 | # | ||
694 | # CONFIG_VT is not set | ||
695 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
696 | |||
697 | # | ||
698 | # Serial drivers | ||
699 | # | ||
700 | CONFIG_SERIAL_8250=y | ||
701 | CONFIG_SERIAL_8250_CONSOLE=y | ||
702 | CONFIG_SERIAL_8250_PCI=y | ||
703 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
704 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
705 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
706 | |||
707 | # | ||
708 | # Non-8250 serial port support | ||
709 | # | ||
710 | CONFIG_SERIAL_CORE=y | ||
711 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
712 | # CONFIG_SERIAL_JSM is not set | ||
713 | CONFIG_UNIX98_PTYS=y | ||
714 | CONFIG_LEGACY_PTYS=y | ||
715 | CONFIG_LEGACY_PTY_COUNT=256 | ||
716 | |||
717 | # | ||
718 | # IPMI | ||
719 | # | ||
720 | # CONFIG_IPMI_HANDLER is not set | ||
721 | |||
722 | # | ||
723 | # Watchdog Cards | ||
724 | # | ||
725 | CONFIG_WATCHDOG=y | ||
726 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
727 | |||
728 | # | ||
729 | # Watchdog Device Drivers | ||
730 | # | ||
731 | # CONFIG_SOFT_WATCHDOG is not set | ||
732 | CONFIG_83xx_WDT=y | ||
733 | |||
734 | # | ||
735 | # PCI-based Watchdog Cards | ||
736 | # | ||
737 | # CONFIG_PCIPCWATCHDOG is not set | ||
738 | # CONFIG_WDTPCI is not set | ||
739 | |||
740 | # | ||
741 | # USB-based Watchdog Cards | ||
742 | # | ||
743 | # CONFIG_USBPCWATCHDOG is not set | ||
744 | CONFIG_HW_RANDOM=y | ||
745 | # CONFIG_NVRAM is not set | ||
746 | # CONFIG_GEN_RTC is not set | ||
747 | # CONFIG_DTLK is not set | ||
748 | # CONFIG_R3964 is not set | ||
749 | # CONFIG_APPLICOM is not set | ||
750 | |||
751 | # | ||
752 | # Ftape, the floppy tape device driver | ||
753 | # | ||
754 | # CONFIG_AGP is not set | ||
755 | # CONFIG_DRM is not set | ||
756 | # CONFIG_RAW_DRIVER is not set | ||
757 | |||
758 | # | ||
759 | # TPM devices | ||
760 | # | ||
761 | # CONFIG_TCG_TPM is not set | ||
762 | # CONFIG_TELCLOCK is not set | ||
763 | |||
764 | # | ||
765 | # I2C support | ||
766 | # | ||
767 | CONFIG_I2C=y | ||
768 | CONFIG_I2C_CHARDEV=y | ||
769 | |||
770 | # | ||
771 | # I2C Algorithms | ||
772 | # | ||
773 | # CONFIG_I2C_ALGOBIT is not set | ||
774 | # CONFIG_I2C_ALGOPCF is not set | ||
775 | # CONFIG_I2C_ALGOPCA is not set | ||
776 | |||
777 | # | ||
778 | # I2C Hardware Bus support | ||
779 | # | ||
780 | # CONFIG_I2C_ALI1535 is not set | ||
781 | # CONFIG_I2C_ALI1563 is not set | ||
782 | # CONFIG_I2C_ALI15X3 is not set | ||
783 | # CONFIG_I2C_AMD756 is not set | ||
784 | # CONFIG_I2C_AMD8111 is not set | ||
785 | # CONFIG_I2C_I801 is not set | ||
786 | # CONFIG_I2C_I810 is not set | ||
787 | # CONFIG_I2C_PIIX4 is not set | ||
788 | CONFIG_I2C_MPC=y | ||
789 | # CONFIG_I2C_NFORCE2 is not set | ||
790 | # CONFIG_I2C_OCORES is not set | ||
791 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
792 | # CONFIG_I2C_PROSAVAGE is not set | ||
793 | # CONFIG_I2C_SAVAGE4 is not set | ||
794 | # CONFIG_I2C_SIS5595 is not set | ||
795 | # CONFIG_I2C_SIS630 is not set | ||
796 | # CONFIG_I2C_SIS96X is not set | ||
797 | # CONFIG_I2C_STUB is not set | ||
798 | # CONFIG_I2C_VIA is not set | ||
799 | # CONFIG_I2C_VIAPRO is not set | ||
800 | # CONFIG_I2C_VOODOO3 is not set | ||
801 | # CONFIG_I2C_PCA_ISA is not set | ||
802 | |||
803 | # | ||
804 | # Miscellaneous I2C Chip support | ||
805 | # | ||
806 | # CONFIG_SENSORS_DS1337 is not set | ||
807 | # CONFIG_SENSORS_DS1374 is not set | ||
808 | # CONFIG_SENSORS_EEPROM is not set | ||
809 | # CONFIG_SENSORS_PCF8574 is not set | ||
810 | # CONFIG_SENSORS_PCA9539 is not set | ||
811 | # CONFIG_SENSORS_PCF8591 is not set | ||
812 | # CONFIG_SENSORS_M41T00 is not set | ||
813 | # CONFIG_SENSORS_MAX6875 is not set | ||
814 | # CONFIG_I2C_DEBUG_CORE is not set | ||
815 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
816 | # CONFIG_I2C_DEBUG_BUS is not set | ||
817 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
818 | |||
819 | # | ||
820 | # SPI support | ||
821 | # | ||
822 | CONFIG_SPI=y | ||
823 | # CONFIG_SPI_DEBUG is not set | ||
824 | CONFIG_SPI_MASTER=y | ||
825 | |||
826 | # | ||
827 | # SPI Master Controller Drivers | ||
828 | # | ||
829 | CONFIG_SPI_BITBANG=y | ||
830 | CONFIG_SPI_MPC83xx=y | ||
831 | |||
832 | # | ||
833 | # SPI Protocol Masters | ||
834 | # | ||
835 | |||
836 | # | ||
837 | # Dallas's 1-wire bus | ||
838 | # | ||
839 | |||
840 | # | ||
841 | # Hardware Monitoring support | ||
842 | # | ||
843 | CONFIG_HWMON=y | ||
844 | # CONFIG_HWMON_VID is not set | ||
845 | # CONFIG_SENSORS_ABITUGURU is not set | ||
846 | # CONFIG_SENSORS_ADM1021 is not set | ||
847 | # CONFIG_SENSORS_ADM1025 is not set | ||
848 | # CONFIG_SENSORS_ADM1026 is not set | ||
849 | # CONFIG_SENSORS_ADM1031 is not set | ||
850 | # CONFIG_SENSORS_ADM9240 is not set | ||
851 | # CONFIG_SENSORS_ASB100 is not set | ||
852 | # CONFIG_SENSORS_ATXP1 is not set | ||
853 | # CONFIG_SENSORS_DS1621 is not set | ||
854 | # CONFIG_SENSORS_F71805F is not set | ||
855 | # CONFIG_SENSORS_FSCHER is not set | ||
856 | # CONFIG_SENSORS_FSCPOS is not set | ||
857 | # CONFIG_SENSORS_GL518SM is not set | ||
858 | # CONFIG_SENSORS_GL520SM is not set | ||
859 | # CONFIG_SENSORS_IT87 is not set | ||
860 | # CONFIG_SENSORS_LM63 is not set | ||
861 | # CONFIG_SENSORS_LM70 is not set | ||
862 | # CONFIG_SENSORS_LM75 is not set | ||
863 | # CONFIG_SENSORS_LM77 is not set | ||
864 | # CONFIG_SENSORS_LM78 is not set | ||
865 | # CONFIG_SENSORS_LM80 is not set | ||
866 | # CONFIG_SENSORS_LM83 is not set | ||
867 | # CONFIG_SENSORS_LM85 is not set | ||
868 | # CONFIG_SENSORS_LM87 is not set | ||
869 | # CONFIG_SENSORS_LM90 is not set | ||
870 | # CONFIG_SENSORS_LM92 is not set | ||
871 | # CONFIG_SENSORS_MAX1619 is not set | ||
872 | # CONFIG_SENSORS_PC87360 is not set | ||
873 | # CONFIG_SENSORS_SIS5595 is not set | ||
874 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
875 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
876 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
877 | # CONFIG_SENSORS_VIA686A is not set | ||
878 | # CONFIG_SENSORS_VT8231 is not set | ||
879 | # CONFIG_SENSORS_W83781D is not set | ||
880 | # CONFIG_SENSORS_W83791D is not set | ||
881 | # CONFIG_SENSORS_W83792D is not set | ||
882 | # CONFIG_SENSORS_W83L785TS is not set | ||
883 | # CONFIG_SENSORS_W83627HF is not set | ||
884 | # CONFIG_SENSORS_W83627EHF is not set | ||
885 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
886 | |||
887 | # | ||
888 | # Misc devices | ||
889 | # | ||
890 | |||
891 | # | ||
892 | # Multimedia devices | ||
893 | # | ||
894 | # CONFIG_VIDEO_DEV is not set | ||
895 | CONFIG_VIDEO_V4L2=y | ||
896 | |||
897 | # | ||
898 | # Digital Video Broadcasting Devices | ||
899 | # | ||
900 | # CONFIG_DVB is not set | ||
901 | # CONFIG_USB_DABUSB is not set | ||
902 | |||
903 | # | ||
904 | # Graphics support | ||
905 | # | ||
906 | CONFIG_FIRMWARE_EDID=y | ||
907 | # CONFIG_FB is not set | ||
908 | |||
909 | # | ||
910 | # Sound | ||
911 | # | ||
912 | # CONFIG_SOUND is not set | ||
913 | |||
914 | # | ||
915 | # USB support | ||
916 | # | ||
917 | CONFIG_USB_ARCH_HAS_HCD=y | ||
918 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
919 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
920 | CONFIG_USB=y | ||
921 | # CONFIG_USB_DEBUG is not set | ||
922 | |||
923 | # | ||
924 | # Miscellaneous USB options | ||
925 | # | ||
926 | CONFIG_USB_DEVICEFS=y | ||
927 | # CONFIG_USB_BANDWIDTH is not set | ||
928 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
929 | # CONFIG_USB_OTG is not set | ||
930 | |||
931 | # | ||
932 | # USB Host Controller Drivers | ||
933 | # | ||
934 | CONFIG_USB_EHCI_HCD=y | ||
935 | # CONFIG_USB_EHCI_SPLIT_ISO is not set | ||
936 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
937 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
938 | # CONFIG_USB_ISP116X_HCD is not set | ||
939 | CONFIG_USB_OHCI_HCD=y | ||
940 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set | ||
941 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
942 | CONFIG_USB_UHCI_HCD=y | ||
943 | # CONFIG_USB_SL811_HCD is not set | ||
944 | |||
945 | # | ||
946 | # USB Device Class drivers | ||
947 | # | ||
948 | # CONFIG_USB_ACM is not set | ||
949 | # CONFIG_USB_PRINTER is not set | ||
950 | |||
951 | # | ||
952 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
953 | # | ||
954 | |||
955 | # | ||
956 | # may also be needed; see USB_STORAGE Help for more information | ||
957 | # | ||
958 | CONFIG_USB_STORAGE=y | ||
959 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
960 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
961 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
962 | # CONFIG_USB_STORAGE_DPCM is not set | ||
963 | # CONFIG_USB_STORAGE_USBAT is not set | ||
964 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
965 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
966 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
967 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
968 | # CONFIG_USB_LIBUSUAL is not set | ||
969 | |||
970 | # | ||
971 | # USB Input Devices | ||
972 | # | ||
973 | # CONFIG_USB_HID is not set | ||
974 | |||
975 | # | ||
976 | # USB HID Boot Protocol drivers | ||
977 | # | ||
978 | # CONFIG_USB_KBD is not set | ||
979 | # CONFIG_USB_MOUSE is not set | ||
980 | # CONFIG_USB_AIPTEK is not set | ||
981 | # CONFIG_USB_WACOM is not set | ||
982 | # CONFIG_USB_ACECAD is not set | ||
983 | # CONFIG_USB_KBTAB is not set | ||
984 | # CONFIG_USB_POWERMATE is not set | ||
985 | # CONFIG_USB_TOUCHSCREEN is not set | ||
986 | # CONFIG_USB_YEALINK is not set | ||
987 | # CONFIG_USB_XPAD is not set | ||
988 | # CONFIG_USB_ATI_REMOTE is not set | ||
989 | # CONFIG_USB_ATI_REMOTE2 is not set | ||
990 | # CONFIG_USB_KEYSPAN_REMOTE is not set | ||
991 | # CONFIG_USB_APPLETOUCH is not set | ||
992 | |||
993 | # | ||
994 | # USB Imaging devices | ||
995 | # | ||
996 | # CONFIG_USB_MDC800 is not set | ||
997 | # CONFIG_USB_MICROTEK is not set | ||
998 | |||
999 | # | ||
1000 | # USB Network Adapters | ||
1001 | # | ||
1002 | # CONFIG_USB_CATC is not set | ||
1003 | # CONFIG_USB_KAWETH is not set | ||
1004 | # CONFIG_USB_PEGASUS is not set | ||
1005 | # CONFIG_USB_RTL8150 is not set | ||
1006 | # CONFIG_USB_USBNET is not set | ||
1007 | CONFIG_USB_MON=y | ||
1008 | |||
1009 | # | ||
1010 | # USB port drivers | ||
1011 | # | ||
1012 | |||
1013 | # | ||
1014 | # USB Serial Converter support | ||
1015 | # | ||
1016 | # CONFIG_USB_SERIAL is not set | ||
1017 | |||
1018 | # | ||
1019 | # USB Miscellaneous drivers | ||
1020 | # | ||
1021 | # CONFIG_USB_EMI62 is not set | ||
1022 | # CONFIG_USB_EMI26 is not set | ||
1023 | # CONFIG_USB_AUERSWALD is not set | ||
1024 | # CONFIG_USB_RIO500 is not set | ||
1025 | # CONFIG_USB_LEGOTOWER is not set | ||
1026 | # CONFIG_USB_LCD is not set | ||
1027 | # CONFIG_USB_LED is not set | ||
1028 | # CONFIG_USB_CY7C63 is not set | ||
1029 | # CONFIG_USB_CYTHERM is not set | ||
1030 | # CONFIG_USB_PHIDGETKIT is not set | ||
1031 | # CONFIG_USB_PHIDGETSERVO is not set | ||
1032 | # CONFIG_USB_IDMOUSE is not set | ||
1033 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1034 | # CONFIG_USB_SISUSBVGA is not set | ||
1035 | # CONFIG_USB_LD is not set | ||
1036 | # CONFIG_USB_TEST is not set | ||
1037 | |||
1038 | # | ||
1039 | # USB DSL modem support | ||
1040 | # | ||
1041 | |||
1042 | # | ||
1043 | # USB Gadget Support | ||
1044 | # | ||
1045 | CONFIG_USB_GADGET=y | ||
1046 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
1047 | CONFIG_USB_GADGET_SELECTED=y | ||
1048 | CONFIG_USB_GADGET_NET2280=y | ||
1049 | CONFIG_USB_NET2280=y | ||
1050 | # CONFIG_USB_GADGET_PXA2XX is not set | ||
1051 | # CONFIG_USB_GADGET_GOKU is not set | ||
1052 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
1053 | # CONFIG_USB_GADGET_OMAP is not set | ||
1054 | # CONFIG_USB_GADGET_AT91 is not set | ||
1055 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
1056 | CONFIG_USB_GADGET_DUALSPEED=y | ||
1057 | # CONFIG_USB_ZERO is not set | ||
1058 | CONFIG_USB_ETH=y | ||
1059 | CONFIG_USB_ETH_RNDIS=y | ||
1060 | # CONFIG_USB_GADGETFS is not set | ||
1061 | # CONFIG_USB_FILE_STORAGE is not set | ||
1062 | # CONFIG_USB_G_SERIAL is not set | ||
1063 | |||
1064 | # | ||
1065 | # MMC/SD Card support | ||
1066 | # | ||
1067 | # CONFIG_MMC is not set | ||
1068 | |||
1069 | # | ||
1070 | # LED devices | ||
1071 | # | ||
1072 | # CONFIG_NEW_LEDS is not set | ||
1073 | |||
1074 | # | ||
1075 | # LED drivers | ||
1076 | # | ||
1077 | |||
1078 | # | ||
1079 | # LED Triggers | ||
1080 | # | ||
1081 | |||
1082 | # | ||
1083 | # InfiniBand support | ||
1084 | # | ||
1085 | # CONFIG_INFINIBAND is not set | ||
1086 | |||
1087 | # | ||
1088 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | ||
1089 | # | ||
1090 | |||
1091 | # | ||
1092 | # Real Time Clock | ||
1093 | # | ||
1094 | CONFIG_RTC_LIB=y | ||
1095 | CONFIG_RTC_CLASS=y | ||
1096 | CONFIG_RTC_HCTOSYS=y | ||
1097 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
1098 | |||
1099 | # | ||
1100 | # RTC interfaces | ||
1101 | # | ||
1102 | CONFIG_RTC_INTF_SYSFS=y | ||
1103 | CONFIG_RTC_INTF_PROC=y | ||
1104 | CONFIG_RTC_INTF_DEV=y | ||
1105 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y | ||
1106 | |||
1107 | # | ||
1108 | # RTC drivers | ||
1109 | # | ||
1110 | # CONFIG_RTC_DRV_X1205 is not set | ||
1111 | CONFIG_RTC_DRV_DS1307=y | ||
1112 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1113 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1114 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1115 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1116 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1117 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
1118 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1119 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1120 | # CONFIG_RTC_DRV_TEST is not set | ||
1121 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
1122 | # CONFIG_RTC_DRV_V3020 is not set | ||
1123 | |||
1124 | # | ||
1125 | # DMA Engine support | ||
1126 | # | ||
1127 | CONFIG_DMA_ENGINE=y | ||
1128 | |||
1129 | # | ||
1130 | # DMA Clients | ||
1131 | # | ||
1132 | CONFIG_NET_DMA=y | ||
1133 | |||
1134 | # | ||
1135 | # DMA Devices | ||
1136 | # | ||
1137 | CONFIG_INTEL_IOATDMA=y | ||
1138 | |||
1139 | # | ||
1140 | # File systems | ||
1141 | # | ||
1142 | CONFIG_EXT2_FS=y | ||
1143 | # CONFIG_EXT2_FS_XATTR is not set | ||
1144 | # CONFIG_EXT2_FS_XIP is not set | ||
1145 | CONFIG_EXT3_FS=y | ||
1146 | CONFIG_EXT3_FS_XATTR=y | ||
1147 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
1148 | # CONFIG_EXT3_FS_SECURITY is not set | ||
1149 | CONFIG_JBD=y | ||
1150 | # CONFIG_JBD_DEBUG is not set | ||
1151 | CONFIG_FS_MBCACHE=y | ||
1152 | # CONFIG_REISERFS_FS is not set | ||
1153 | # CONFIG_JFS_FS is not set | ||
1154 | # CONFIG_FS_POSIX_ACL is not set | ||
1155 | # CONFIG_XFS_FS is not set | ||
1156 | # CONFIG_OCFS2_FS is not set | ||
1157 | # CONFIG_MINIX_FS is not set | ||
1158 | # CONFIG_ROMFS_FS is not set | ||
1159 | CONFIG_INOTIFY=y | ||
1160 | CONFIG_INOTIFY_USER=y | ||
1161 | # CONFIG_QUOTA is not set | ||
1162 | CONFIG_DNOTIFY=y | ||
1163 | # CONFIG_AUTOFS_FS is not set | ||
1164 | # CONFIG_AUTOFS4_FS is not set | ||
1165 | # CONFIG_FUSE_FS is not set | ||
1166 | |||
1167 | # | ||
1168 | # CD-ROM/DVD Filesystems | ||
1169 | # | ||
1170 | # CONFIG_ISO9660_FS is not set | ||
1171 | # CONFIG_UDF_FS is not set | ||
1172 | |||
1173 | # | ||
1174 | # DOS/FAT/NT Filesystems | ||
1175 | # | ||
1176 | # CONFIG_MSDOS_FS is not set | ||
1177 | # CONFIG_VFAT_FS is not set | ||
1178 | # CONFIG_NTFS_FS is not set | ||
1179 | |||
1180 | # | ||
1181 | # Pseudo filesystems | ||
1182 | # | ||
1183 | CONFIG_PROC_FS=y | ||
1184 | CONFIG_PROC_KCORE=y | ||
1185 | CONFIG_SYSFS=y | ||
1186 | CONFIG_TMPFS=y | ||
1187 | # CONFIG_HUGETLB_PAGE is not set | ||
1188 | CONFIG_RAMFS=y | ||
1189 | # CONFIG_CONFIGFS_FS is not set | ||
1190 | |||
1191 | # | ||
1192 | # Miscellaneous filesystems | ||
1193 | # | ||
1194 | # CONFIG_ADFS_FS is not set | ||
1195 | # CONFIG_AFFS_FS is not set | ||
1196 | # CONFIG_HFS_FS is not set | ||
1197 | # CONFIG_HFSPLUS_FS is not set | ||
1198 | # CONFIG_BEFS_FS is not set | ||
1199 | # CONFIG_BFS_FS is not set | ||
1200 | # CONFIG_EFS_FS is not set | ||
1201 | # CONFIG_JFFS_FS is not set | ||
1202 | # CONFIG_JFFS2_FS is not set | ||
1203 | # CONFIG_CRAMFS is not set | ||
1204 | # CONFIG_VXFS_FS is not set | ||
1205 | # CONFIG_HPFS_FS is not set | ||
1206 | # CONFIG_QNX4FS_FS is not set | ||
1207 | # CONFIG_SYSV_FS is not set | ||
1208 | # CONFIG_UFS_FS is not set | ||
1209 | |||
1210 | # | ||
1211 | # Network File Systems | ||
1212 | # | ||
1213 | CONFIG_NFS_FS=y | ||
1214 | CONFIG_NFS_V3=y | ||
1215 | # CONFIG_NFS_V3_ACL is not set | ||
1216 | CONFIG_NFS_V4=y | ||
1217 | # CONFIG_NFS_DIRECTIO is not set | ||
1218 | # CONFIG_NFSD is not set | ||
1219 | CONFIG_ROOT_NFS=y | ||
1220 | CONFIG_LOCKD=y | ||
1221 | CONFIG_LOCKD_V4=y | ||
1222 | CONFIG_NFS_COMMON=y | ||
1223 | CONFIG_SUNRPC=y | ||
1224 | CONFIG_SUNRPC_GSS=y | ||
1225 | CONFIG_RPCSEC_GSS_KRB5=y | ||
1226 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1227 | # CONFIG_SMB_FS is not set | ||
1228 | # CONFIG_CIFS is not set | ||
1229 | # CONFIG_CIFS_DEBUG2 is not set | ||
1230 | # CONFIG_NCP_FS is not set | ||
1231 | # CONFIG_CODA_FS is not set | ||
1232 | # CONFIG_AFS_FS is not set | ||
1233 | # CONFIG_9P_FS is not set | ||
1234 | |||
1235 | # | ||
1236 | # Partition Types | ||
1237 | # | ||
1238 | CONFIG_PARTITION_ADVANCED=y | ||
1239 | # CONFIG_ACORN_PARTITION is not set | ||
1240 | # CONFIG_OSF_PARTITION is not set | ||
1241 | # CONFIG_AMIGA_PARTITION is not set | ||
1242 | # CONFIG_ATARI_PARTITION is not set | ||
1243 | # CONFIG_MAC_PARTITION is not set | ||
1244 | # CONFIG_MSDOS_PARTITION is not set | ||
1245 | # CONFIG_LDM_PARTITION is not set | ||
1246 | # CONFIG_SGI_PARTITION is not set | ||
1247 | # CONFIG_ULTRIX_PARTITION is not set | ||
1248 | # CONFIG_SUN_PARTITION is not set | ||
1249 | # CONFIG_KARMA_PARTITION is not set | ||
1250 | # CONFIG_EFI_PARTITION is not set | ||
1251 | |||
1252 | # | ||
1253 | # Native Language Support | ||
1254 | # | ||
1255 | # CONFIG_NLS is not set | ||
1256 | |||
1257 | # | ||
1258 | # Library routines | ||
1259 | # | ||
1260 | # CONFIG_CRC_CCITT is not set | ||
1261 | # CONFIG_CRC16 is not set | ||
1262 | CONFIG_CRC32=y | ||
1263 | # CONFIG_LIBCRC32C is not set | ||
1264 | CONFIG_PLIST=y | ||
1265 | |||
1266 | # | ||
1267 | # Instrumentation Support | ||
1268 | # | ||
1269 | # CONFIG_PROFILING is not set | ||
1270 | |||
1271 | # | ||
1272 | # Kernel hacking | ||
1273 | # | ||
1274 | CONFIG_PRINTK_TIME=y | ||
1275 | # CONFIG_MAGIC_SYSRQ is not set | ||
1276 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1277 | CONFIG_DEBUG_KERNEL=y | ||
1278 | CONFIG_LOG_BUF_SHIFT=17 | ||
1279 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1280 | # CONFIG_SCHEDSTATS is not set | ||
1281 | # CONFIG_DEBUG_SLAB is not set | ||
1282 | # CONFIG_DEBUG_MUTEXES is not set | ||
1283 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1284 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1285 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1286 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1287 | # CONFIG_DEBUG_KOBJECT is not set | ||
1288 | CONFIG_DEBUG_INFO=y | ||
1289 | # CONFIG_DEBUG_FS is not set | ||
1290 | # CONFIG_DEBUG_VM is not set | ||
1291 | CONFIG_FORCED_INLINING=y | ||
1292 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1293 | # CONFIG_DEBUGGER is not set | ||
1294 | # CONFIG_BDI_SWITCH is not set | ||
1295 | CONFIG_BOOTX_TEXT=y | ||
1296 | CONFIG_SERIAL_TEXT_DEBUG=y | ||
1297 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1298 | |||
1299 | # | ||
1300 | # Security options | ||
1301 | # | ||
1302 | # CONFIG_KEYS is not set | ||
1303 | # CONFIG_SECURITY is not set | ||
1304 | |||
1305 | # | ||
1306 | # Cryptographic options | ||
1307 | # | ||
1308 | CONFIG_CRYPTO=y | ||
1309 | # CONFIG_CRYPTO_HMAC is not set | ||
1310 | # CONFIG_CRYPTO_NULL is not set | ||
1311 | # CONFIG_CRYPTO_MD4 is not set | ||
1312 | CONFIG_CRYPTO_MD5=y | ||
1313 | # CONFIG_CRYPTO_SHA1 is not set | ||
1314 | # CONFIG_CRYPTO_SHA256 is not set | ||
1315 | # CONFIG_CRYPTO_SHA512 is not set | ||
1316 | # CONFIG_CRYPTO_WP512 is not set | ||
1317 | # CONFIG_CRYPTO_TGR192 is not set | ||
1318 | CONFIG_CRYPTO_DES=y | ||
1319 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1320 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1321 | # CONFIG_CRYPTO_SERPENT is not set | ||
1322 | # CONFIG_CRYPTO_AES is not set | ||
1323 | # CONFIG_CRYPTO_CAST5 is not set | ||
1324 | # CONFIG_CRYPTO_CAST6 is not set | ||
1325 | # CONFIG_CRYPTO_TEA is not set | ||
1326 | # CONFIG_CRYPTO_ARC4 is not set | ||
1327 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1328 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1329 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1330 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1331 | # CONFIG_CRYPTO_CRC32C is not set | ||
1332 | # CONFIG_CRYPTO_TEST is not set | ||
1333 | |||
1334 | # | ||
1335 | # Hardware crypto devices | ||
1336 | # | ||
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c index a6920919d68e..f4e5e14ee2b6 100644 --- a/arch/powerpc/kernel/btext.c +++ b/arch/powerpc/kernel/btext.c | |||
@@ -111,7 +111,7 @@ void __init btext_setup_display(int width, int height, int depth, int pitch, | |||
111 | logicalDisplayBase = (unsigned char *)address; | 111 | logicalDisplayBase = (unsigned char *)address; |
112 | dispDeviceBase = (unsigned char *)address; | 112 | dispDeviceBase = (unsigned char *)address; |
113 | dispDeviceRowBytes = pitch; | 113 | dispDeviceRowBytes = pitch; |
114 | dispDeviceDepth = depth; | 114 | dispDeviceDepth = depth == 15 ? 16 : depth; |
115 | dispDeviceRect[0] = dispDeviceRect[1] = 0; | 115 | dispDeviceRect[0] = dispDeviceRect[1] = 0; |
116 | dispDeviceRect[2] = width; | 116 | dispDeviceRect[2] = width; |
117 | dispDeviceRect[3] = height; | 117 | dispDeviceRect[3] = height; |
@@ -160,20 +160,28 @@ int btext_initialize(struct device_node *np) | |||
160 | unsigned long address = 0; | 160 | unsigned long address = 0; |
161 | u32 *prop; | 161 | u32 *prop; |
162 | 162 | ||
163 | prop = (u32 *)get_property(np, "width", NULL); | 163 | prop = (u32 *)get_property(np, "linux,bootx-width", NULL); |
164 | if (prop == NULL) | ||
165 | prop = (u32 *)get_property(np, "width", NULL); | ||
164 | if (prop == NULL) | 166 | if (prop == NULL) |
165 | return -EINVAL; | 167 | return -EINVAL; |
166 | width = *prop; | 168 | width = *prop; |
167 | prop = (u32 *)get_property(np, "height", NULL); | 169 | prop = (u32 *)get_property(np, "linux,bootx-height", NULL); |
170 | if (prop == NULL) | ||
171 | prop = (u32 *)get_property(np, "height", NULL); | ||
168 | if (prop == NULL) | 172 | if (prop == NULL) |
169 | return -EINVAL; | 173 | return -EINVAL; |
170 | height = *prop; | 174 | height = *prop; |
171 | prop = (u32 *)get_property(np, "depth", NULL); | 175 | prop = (u32 *)get_property(np, "linux,bootx-depth", NULL); |
176 | if (prop == NULL) | ||
177 | prop = (u32 *)get_property(np, "depth", NULL); | ||
172 | if (prop == NULL) | 178 | if (prop == NULL) |
173 | return -EINVAL; | 179 | return -EINVAL; |
174 | depth = *prop; | 180 | depth = *prop; |
175 | pitch = width * ((depth + 7) / 8); | 181 | pitch = width * ((depth + 7) / 8); |
176 | prop = (u32 *)get_property(np, "linebytes", NULL); | 182 | prop = (u32 *)get_property(np, "linux,bootx-linebytes", NULL); |
183 | if (prop == NULL) | ||
184 | prop = (u32 *)get_property(np, "linebytes", NULL); | ||
177 | if (prop) | 185 | if (prop) |
178 | pitch = *prop; | 186 | pitch = *prop; |
179 | if (pitch == 1) | 187 | if (pitch == 1) |
@@ -194,7 +202,7 @@ int btext_initialize(struct device_node *np) | |||
194 | g_max_loc_Y = height / 16; | 202 | g_max_loc_Y = height / 16; |
195 | dispDeviceBase = (unsigned char *)address; | 203 | dispDeviceBase = (unsigned char *)address; |
196 | dispDeviceRowBytes = pitch; | 204 | dispDeviceRowBytes = pitch; |
197 | dispDeviceDepth = depth; | 205 | dispDeviceDepth = depth == 15 ? 16 : depth; |
198 | dispDeviceRect[0] = dispDeviceRect[1] = 0; | 206 | dispDeviceRect[0] = dispDeviceRect[1] = 0; |
199 | dispDeviceRect[2] = width; | 207 | dispDeviceRect[2] = width; |
200 | dispDeviceRect[3] = height; | 208 | dispDeviceRect[3] = height; |
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c index e47d40ac6f39..97ddc02a3d42 100644 --- a/arch/powerpc/kernel/ibmebus.c +++ b/arch/powerpc/kernel/ibmebus.c | |||
@@ -323,13 +323,11 @@ int ibmebus_request_irq(struct ibmebus_dev *dev, | |||
323 | unsigned long irq_flags, const char * devname, | 323 | unsigned long irq_flags, const char * devname, |
324 | void *dev_id) | 324 | void *dev_id) |
325 | { | 325 | { |
326 | unsigned int irq = virt_irq_create_mapping(ist); | 326 | unsigned int irq = irq_create_mapping(NULL, ist, 0); |
327 | 327 | ||
328 | if (irq == NO_IRQ) | 328 | if (irq == NO_IRQ) |
329 | return -EINVAL; | 329 | return -EINVAL; |
330 | 330 | ||
331 | irq = irq_offset_up(irq); | ||
332 | |||
333 | return request_irq(irq, handler, | 331 | return request_irq(irq, handler, |
334 | irq_flags, devname, dev_id); | 332 | irq_flags, devname, dev_id); |
335 | } | 333 | } |
@@ -337,12 +335,9 @@ EXPORT_SYMBOL(ibmebus_request_irq); | |||
337 | 335 | ||
338 | void ibmebus_free_irq(struct ibmebus_dev *dev, u32 ist, void *dev_id) | 336 | void ibmebus_free_irq(struct ibmebus_dev *dev, u32 ist, void *dev_id) |
339 | { | 337 | { |
340 | unsigned int irq = virt_irq_create_mapping(ist); | 338 | unsigned int irq = irq_find_mapping(NULL, ist); |
341 | 339 | ||
342 | irq = irq_offset_up(irq); | ||
343 | free_irq(irq, dev_id); | 340 | free_irq(irq, dev_id); |
344 | |||
345 | return; | ||
346 | } | 341 | } |
347 | EXPORT_SYMBOL(ibmebus_free_irq); | 342 | EXPORT_SYMBOL(ibmebus_free_irq); |
348 | 343 | ||
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index e3774f6b57cc..8cf987809c66 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -29,6 +29,8 @@ | |||
29 | * to reduce code space and undefined function references. | 29 | * to reduce code space and undefined function references. |
30 | */ | 30 | */ |
31 | 31 | ||
32 | #undef DEBUG | ||
33 | |||
32 | #include <linux/module.h> | 34 | #include <linux/module.h> |
33 | #include <linux/threads.h> | 35 | #include <linux/threads.h> |
34 | #include <linux/kernel_stat.h> | 36 | #include <linux/kernel_stat.h> |
@@ -46,7 +48,10 @@ | |||
46 | #include <linux/cpumask.h> | 48 | #include <linux/cpumask.h> |
47 | #include <linux/profile.h> | 49 | #include <linux/profile.h> |
48 | #include <linux/bitops.h> | 50 | #include <linux/bitops.h> |
49 | #include <linux/pci.h> | 51 | #include <linux/list.h> |
52 | #include <linux/radix-tree.h> | ||
53 | #include <linux/mutex.h> | ||
54 | #include <linux/bootmem.h> | ||
50 | 55 | ||
51 | #include <asm/uaccess.h> | 56 | #include <asm/uaccess.h> |
52 | #include <asm/system.h> | 57 | #include <asm/system.h> |
@@ -57,39 +62,38 @@ | |||
57 | #include <asm/prom.h> | 62 | #include <asm/prom.h> |
58 | #include <asm/ptrace.h> | 63 | #include <asm/ptrace.h> |
59 | #include <asm/machdep.h> | 64 | #include <asm/machdep.h> |
65 | #include <asm/udbg.h> | ||
60 | #ifdef CONFIG_PPC_ISERIES | 66 | #ifdef CONFIG_PPC_ISERIES |
61 | #include <asm/paca.h> | 67 | #include <asm/paca.h> |
62 | #endif | 68 | #endif |
63 | 69 | ||
64 | int __irq_offset_value; | 70 | int __irq_offset_value; |
65 | #ifdef CONFIG_PPC32 | ||
66 | EXPORT_SYMBOL(__irq_offset_value); | ||
67 | #endif | ||
68 | |||
69 | static int ppc_spurious_interrupts; | 71 | static int ppc_spurious_interrupts; |
70 | 72 | ||
71 | #ifdef CONFIG_PPC32 | 73 | #ifdef CONFIG_PPC32 |
72 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | 74 | EXPORT_SYMBOL(__irq_offset_value); |
75 | atomic_t ppc_n_lost_interrupts; | ||
73 | 76 | ||
77 | #ifndef CONFIG_PPC_MERGE | ||
78 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | ||
74 | unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; | 79 | unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; |
75 | atomic_t ppc_n_lost_interrupts; | 80 | #endif |
76 | 81 | ||
77 | #ifdef CONFIG_TAU_INT | 82 | #ifdef CONFIG_TAU_INT |
78 | extern int tau_initialized; | 83 | extern int tau_initialized; |
79 | extern int tau_interrupts(int); | 84 | extern int tau_interrupts(int); |
80 | #endif | 85 | #endif |
86 | #endif /* CONFIG_PPC32 */ | ||
81 | 87 | ||
82 | #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) | 88 | #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) |
83 | extern atomic_t ipi_recv; | 89 | extern atomic_t ipi_recv; |
84 | extern atomic_t ipi_sent; | 90 | extern atomic_t ipi_sent; |
85 | #endif | 91 | #endif |
86 | #endif /* CONFIG_PPC32 */ | ||
87 | 92 | ||
88 | #ifdef CONFIG_PPC64 | 93 | #ifdef CONFIG_PPC64 |
89 | EXPORT_SYMBOL(irq_desc); | 94 | EXPORT_SYMBOL(irq_desc); |
90 | 95 | ||
91 | int distribute_irqs = 1; | 96 | int distribute_irqs = 1; |
92 | u64 ppc64_interrupt_controller; | ||
93 | #endif /* CONFIG_PPC64 */ | 97 | #endif /* CONFIG_PPC64 */ |
94 | 98 | ||
95 | int show_interrupts(struct seq_file *p, void *v) | 99 | int show_interrupts(struct seq_file *p, void *v) |
@@ -182,7 +186,7 @@ void fixup_irqs(cpumask_t map) | |||
182 | 186 | ||
183 | void do_IRQ(struct pt_regs *regs) | 187 | void do_IRQ(struct pt_regs *regs) |
184 | { | 188 | { |
185 | int irq; | 189 | unsigned int irq; |
186 | #ifdef CONFIG_IRQSTACKS | 190 | #ifdef CONFIG_IRQSTACKS |
187 | struct thread_info *curtp, *irqtp; | 191 | struct thread_info *curtp, *irqtp; |
188 | #endif | 192 | #endif |
@@ -213,22 +217,26 @@ void do_IRQ(struct pt_regs *regs) | |||
213 | */ | 217 | */ |
214 | irq = ppc_md.get_irq(regs); | 218 | irq = ppc_md.get_irq(regs); |
215 | 219 | ||
216 | if (irq >= 0) { | 220 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) { |
217 | #ifdef CONFIG_IRQSTACKS | 221 | #ifdef CONFIG_IRQSTACKS |
218 | /* Switch to the irq stack to handle this */ | 222 | /* Switch to the irq stack to handle this */ |
219 | curtp = current_thread_info(); | 223 | curtp = current_thread_info(); |
220 | irqtp = hardirq_ctx[smp_processor_id()]; | 224 | irqtp = hardirq_ctx[smp_processor_id()]; |
221 | if (curtp != irqtp) { | 225 | if (curtp != irqtp) { |
226 | struct irq_desc *desc = irq_desc + irq; | ||
227 | void *handler = desc->handle_irq; | ||
228 | if (handler == NULL) | ||
229 | handler = &__do_IRQ; | ||
222 | irqtp->task = curtp->task; | 230 | irqtp->task = curtp->task; |
223 | irqtp->flags = 0; | 231 | irqtp->flags = 0; |
224 | call___do_IRQ(irq, regs, irqtp); | 232 | call_handle_irq(irq, desc, regs, irqtp, handler); |
225 | irqtp->task = NULL; | 233 | irqtp->task = NULL; |
226 | if (irqtp->flags) | 234 | if (irqtp->flags) |
227 | set_bits(irqtp->flags, &curtp->flags); | 235 | set_bits(irqtp->flags, &curtp->flags); |
228 | } else | 236 | } else |
229 | #endif | 237 | #endif |
230 | __do_IRQ(irq, regs); | 238 | generic_handle_irq(irq, regs); |
231 | } else if (irq != -2) | 239 | } else if (irq != NO_IRQ_IGNORE) |
232 | /* That's not SMP safe ... but who cares ? */ | 240 | /* That's not SMP safe ... but who cares ? */ |
233 | ppc_spurious_interrupts++; | 241 | ppc_spurious_interrupts++; |
234 | 242 | ||
@@ -245,191 +253,562 @@ void do_IRQ(struct pt_regs *regs) | |||
245 | 253 | ||
246 | void __init init_IRQ(void) | 254 | void __init init_IRQ(void) |
247 | { | 255 | { |
256 | ppc_md.init_IRQ(); | ||
248 | #ifdef CONFIG_PPC64 | 257 | #ifdef CONFIG_PPC64 |
249 | static int once = 0; | 258 | irq_ctx_init(); |
259 | #endif | ||
260 | } | ||
261 | |||
262 | |||
263 | #ifdef CONFIG_IRQSTACKS | ||
264 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; | ||
265 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | ||
266 | |||
267 | void irq_ctx_init(void) | ||
268 | { | ||
269 | struct thread_info *tp; | ||
270 | int i; | ||
271 | |||
272 | for_each_possible_cpu(i) { | ||
273 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); | ||
274 | tp = softirq_ctx[i]; | ||
275 | tp->cpu = i; | ||
276 | tp->preempt_count = SOFTIRQ_OFFSET; | ||
277 | |||
278 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | ||
279 | tp = hardirq_ctx[i]; | ||
280 | tp->cpu = i; | ||
281 | tp->preempt_count = HARDIRQ_OFFSET; | ||
282 | } | ||
283 | } | ||
284 | |||
285 | static inline void do_softirq_onstack(void) | ||
286 | { | ||
287 | struct thread_info *curtp, *irqtp; | ||
288 | |||
289 | curtp = current_thread_info(); | ||
290 | irqtp = softirq_ctx[smp_processor_id()]; | ||
291 | irqtp->task = curtp->task; | ||
292 | call_do_softirq(irqtp); | ||
293 | irqtp->task = NULL; | ||
294 | } | ||
250 | 295 | ||
251 | if (once) | 296 | #else |
297 | #define do_softirq_onstack() __do_softirq() | ||
298 | #endif /* CONFIG_IRQSTACKS */ | ||
299 | |||
300 | void do_softirq(void) | ||
301 | { | ||
302 | unsigned long flags; | ||
303 | |||
304 | if (in_interrupt()) | ||
252 | return; | 305 | return; |
253 | 306 | ||
254 | once++; | 307 | local_irq_save(flags); |
255 | 308 | ||
256 | #endif | 309 | if (local_softirq_pending()) |
257 | ppc_md.init_IRQ(); | 310 | do_softirq_onstack(); |
258 | #ifdef CONFIG_PPC64 | 311 | |
259 | irq_ctx_init(); | 312 | local_irq_restore(flags); |
260 | #endif | ||
261 | } | 313 | } |
314 | EXPORT_SYMBOL(do_softirq); | ||
315 | |||
262 | 316 | ||
263 | #ifdef CONFIG_PPC64 | ||
264 | /* | 317 | /* |
265 | * Virtual IRQ mapping code, used on systems with XICS interrupt controllers. | 318 | * IRQ controller and virtual interrupts |
266 | */ | 319 | */ |
267 | 320 | ||
268 | #define UNDEFINED_IRQ 0xffffffff | 321 | #ifdef CONFIG_PPC_MERGE |
269 | unsigned int virt_irq_to_real_map[NR_IRQS]; | ||
270 | 322 | ||
271 | /* | 323 | static LIST_HEAD(irq_hosts); |
272 | * Don't use virtual irqs 0, 1, 2 for devices. | 324 | static spinlock_t irq_big_lock = SPIN_LOCK_UNLOCKED; |
273 | * The pcnet32 driver considers interrupt numbers < 2 to be invalid, | ||
274 | * and 2 is the XICS IPI interrupt. | ||
275 | * We limit virtual irqs to __irq_offet_value less than virt_irq_max so | ||
276 | * that when we offset them we don't end up with an interrupt | ||
277 | * number >= virt_irq_max. | ||
278 | */ | ||
279 | #define MIN_VIRT_IRQ 3 | ||
280 | 325 | ||
281 | unsigned int virt_irq_max; | 326 | struct irq_map_entry irq_map[NR_IRQS]; |
282 | static unsigned int max_virt_irq; | 327 | static unsigned int irq_virq_count = NR_IRQS; |
283 | static unsigned int nr_virt_irqs; | 328 | static struct irq_host *irq_default_host; |
284 | 329 | ||
285 | void | 330 | struct irq_host *irq_alloc_host(unsigned int revmap_type, |
286 | virt_irq_init(void) | 331 | unsigned int revmap_arg, |
332 | struct irq_host_ops *ops, | ||
333 | irq_hw_number_t inval_irq) | ||
287 | { | 334 | { |
288 | int i; | 335 | struct irq_host *host; |
336 | unsigned int size = sizeof(struct irq_host); | ||
337 | unsigned int i; | ||
338 | unsigned int *rmap; | ||
339 | unsigned long flags; | ||
340 | |||
341 | /* Allocate structure and revmap table if using linear mapping */ | ||
342 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | ||
343 | size += revmap_arg * sizeof(unsigned int); | ||
344 | if (mem_init_done) | ||
345 | host = kzalloc(size, GFP_KERNEL); | ||
346 | else { | ||
347 | host = alloc_bootmem(size); | ||
348 | if (host) | ||
349 | memset(host, 0, size); | ||
350 | } | ||
351 | if (host == NULL) | ||
352 | return NULL; | ||
289 | 353 | ||
290 | if ((virt_irq_max == 0) || (virt_irq_max > (NR_IRQS - 1))) | 354 | /* Fill structure */ |
291 | virt_irq_max = NR_IRQS - 1; | 355 | host->revmap_type = revmap_type; |
292 | max_virt_irq = virt_irq_max - __irq_offset_value; | 356 | host->inval_irq = inval_irq; |
293 | nr_virt_irqs = max_virt_irq - MIN_VIRT_IRQ + 1; | 357 | host->ops = ops; |
294 | 358 | ||
295 | for (i = 0; i < NR_IRQS; i++) | 359 | spin_lock_irqsave(&irq_big_lock, flags); |
296 | virt_irq_to_real_map[i] = UNDEFINED_IRQ; | 360 | |
361 | /* If it's a legacy controller, check for duplicates and | ||
362 | * mark it as allocated (we use irq 0 host pointer for that | ||
363 | */ | ||
364 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | ||
365 | if (irq_map[0].host != NULL) { | ||
366 | spin_unlock_irqrestore(&irq_big_lock, flags); | ||
367 | /* If we are early boot, we can't free the structure, | ||
368 | * too bad... | ||
369 | * this will be fixed once slab is made available early | ||
370 | * instead of the current cruft | ||
371 | */ | ||
372 | if (mem_init_done) | ||
373 | kfree(host); | ||
374 | return NULL; | ||
375 | } | ||
376 | irq_map[0].host = host; | ||
377 | } | ||
378 | |||
379 | list_add(&host->link, &irq_hosts); | ||
380 | spin_unlock_irqrestore(&irq_big_lock, flags); | ||
381 | |||
382 | /* Additional setups per revmap type */ | ||
383 | switch(revmap_type) { | ||
384 | case IRQ_HOST_MAP_LEGACY: | ||
385 | /* 0 is always the invalid number for legacy */ | ||
386 | host->inval_irq = 0; | ||
387 | /* setup us as the host for all legacy interrupts */ | ||
388 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | ||
389 | irq_map[i].hwirq = 0; | ||
390 | smp_wmb(); | ||
391 | irq_map[i].host = host; | ||
392 | smp_wmb(); | ||
393 | |||
394 | /* Clear some flags */ | ||
395 | get_irq_desc(i)->status | ||
396 | &= ~(IRQ_NOREQUEST | IRQ_LEVEL); | ||
397 | |||
398 | /* Legacy flags are left to default at this point, | ||
399 | * one can then use irq_create_mapping() to | ||
400 | * explicitely change them | ||
401 | */ | ||
402 | ops->map(host, i, i, 0); | ||
403 | } | ||
404 | break; | ||
405 | case IRQ_HOST_MAP_LINEAR: | ||
406 | rmap = (unsigned int *)(host + 1); | ||
407 | for (i = 0; i < revmap_arg; i++) | ||
408 | rmap[i] = IRQ_NONE; | ||
409 | host->revmap_data.linear.size = revmap_arg; | ||
410 | smp_wmb(); | ||
411 | host->revmap_data.linear.revmap = rmap; | ||
412 | break; | ||
413 | default: | ||
414 | break; | ||
415 | } | ||
416 | |||
417 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | ||
418 | |||
419 | return host; | ||
297 | } | 420 | } |
298 | 421 | ||
299 | /* Create a mapping for a real_irq if it doesn't already exist. | 422 | struct irq_host *irq_find_host(struct device_node *node) |
300 | * Return the virtual irq as a convenience. | ||
301 | */ | ||
302 | int virt_irq_create_mapping(unsigned int real_irq) | ||
303 | { | 423 | { |
304 | unsigned int virq, first_virq; | 424 | struct irq_host *h, *found = NULL; |
305 | static int warned; | 425 | unsigned long flags; |
426 | |||
427 | /* We might want to match the legacy controller last since | ||
428 | * it might potentially be set to match all interrupts in | ||
429 | * the absence of a device node. This isn't a problem so far | ||
430 | * yet though... | ||
431 | */ | ||
432 | spin_lock_irqsave(&irq_big_lock, flags); | ||
433 | list_for_each_entry(h, &irq_hosts, link) | ||
434 | if (h->ops->match == NULL || h->ops->match(h, node)) { | ||
435 | found = h; | ||
436 | break; | ||
437 | } | ||
438 | spin_unlock_irqrestore(&irq_big_lock, flags); | ||
439 | return found; | ||
440 | } | ||
441 | EXPORT_SYMBOL_GPL(irq_find_host); | ||
442 | |||
443 | void irq_set_default_host(struct irq_host *host) | ||
444 | { | ||
445 | pr_debug("irq: Default host set to @0x%p\n", host); | ||
306 | 446 | ||
307 | if (ppc64_interrupt_controller == IC_OPEN_PIC) | 447 | irq_default_host = host; |
308 | return real_irq; /* no mapping for openpic (for now) */ | 448 | } |
309 | 449 | ||
310 | if (ppc64_interrupt_controller == IC_CELL_PIC) | 450 | void irq_set_virq_count(unsigned int count) |
311 | return real_irq; /* no mapping for iic either */ | 451 | { |
452 | pr_debug("irq: Trying to set virq count to %d\n", count); | ||
312 | 453 | ||
313 | /* don't map interrupts < MIN_VIRT_IRQ */ | 454 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
314 | if (real_irq < MIN_VIRT_IRQ) { | 455 | if (count < NR_IRQS) |
315 | virt_irq_to_real_map[real_irq] = real_irq; | 456 | irq_virq_count = count; |
316 | return real_irq; | 457 | } |
458 | |||
459 | unsigned int irq_create_mapping(struct irq_host *host, | ||
460 | irq_hw_number_t hwirq, | ||
461 | unsigned int flags) | ||
462 | { | ||
463 | unsigned int virq, hint; | ||
464 | |||
465 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx, 0x%x)\n", | ||
466 | host, hwirq, flags); | ||
467 | |||
468 | /* Look for default host if nececssary */ | ||
469 | if (host == NULL) | ||
470 | host = irq_default_host; | ||
471 | if (host == NULL) { | ||
472 | printk(KERN_WARNING "irq_create_mapping called for" | ||
473 | " NULL host, hwirq=%lx\n", hwirq); | ||
474 | WARN_ON(1); | ||
475 | return NO_IRQ; | ||
317 | } | 476 | } |
477 | pr_debug("irq: -> using host @%p\n", host); | ||
318 | 478 | ||
319 | /* map to a number between MIN_VIRT_IRQ and max_virt_irq */ | 479 | /* Check if mapping already exist, if it does, call |
320 | virq = real_irq; | 480 | * host->ops->map() to update the flags |
321 | if (virq > max_virt_irq) | 481 | */ |
322 | virq = (virq % nr_virt_irqs) + MIN_VIRT_IRQ; | 482 | virq = irq_find_mapping(host, hwirq); |
323 | 483 | if (virq != IRQ_NONE) { | |
324 | /* search for this number or a free slot */ | 484 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
325 | first_virq = virq; | 485 | host->ops->map(host, virq, hwirq, flags); |
326 | while (virt_irq_to_real_map[virq] != UNDEFINED_IRQ) { | 486 | return virq; |
327 | if (virt_irq_to_real_map[virq] == real_irq) | ||
328 | return virq; | ||
329 | if (++virq > max_virt_irq) | ||
330 | virq = MIN_VIRT_IRQ; | ||
331 | if (virq == first_virq) | ||
332 | goto nospace; /* oops, no free slots */ | ||
333 | } | 487 | } |
334 | 488 | ||
335 | virt_irq_to_real_map[virq] = real_irq; | 489 | /* Get a virtual interrupt number */ |
490 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | ||
491 | /* Handle legacy */ | ||
492 | virq = (unsigned int)hwirq; | ||
493 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | ||
494 | return NO_IRQ; | ||
495 | return virq; | ||
496 | } else { | ||
497 | /* Allocate a virtual interrupt number */ | ||
498 | hint = hwirq % irq_virq_count; | ||
499 | virq = irq_alloc_virt(host, 1, hint); | ||
500 | if (virq == NO_IRQ) { | ||
501 | pr_debug("irq: -> virq allocation failed\n"); | ||
502 | return NO_IRQ; | ||
503 | } | ||
504 | } | ||
505 | pr_debug("irq: -> obtained virq %d\n", virq); | ||
506 | |||
507 | /* Clear some flags */ | ||
508 | get_irq_desc(virq)->status &= ~(IRQ_NOREQUEST | IRQ_LEVEL); | ||
509 | |||
510 | /* map it */ | ||
511 | if (host->ops->map(host, virq, hwirq, flags)) { | ||
512 | pr_debug("irq: -> mapping failed, freeing\n"); | ||
513 | irq_free_virt(virq, 1); | ||
514 | return NO_IRQ; | ||
515 | } | ||
516 | smp_wmb(); | ||
517 | irq_map[virq].hwirq = hwirq; | ||
518 | smp_mb(); | ||
336 | return virq; | 519 | return virq; |
520 | } | ||
521 | EXPORT_SYMBOL_GPL(irq_create_mapping); | ||
522 | |||
523 | extern unsigned int irq_create_of_mapping(struct device_node *controller, | ||
524 | u32 *intspec, unsigned int intsize) | ||
525 | { | ||
526 | struct irq_host *host; | ||
527 | irq_hw_number_t hwirq; | ||
528 | unsigned int flags = IRQ_TYPE_NONE; | ||
337 | 529 | ||
338 | nospace: | 530 | if (controller == NULL) |
339 | if (!warned) { | 531 | host = irq_default_host; |
340 | printk(KERN_CRIT "Interrupt table is full\n"); | 532 | else |
341 | printk(KERN_CRIT "Increase virt_irq_max (currently %d) " | 533 | host = irq_find_host(controller); |
342 | "in your kernel sources and rebuild.\n", virt_irq_max); | 534 | if (host == NULL) |
343 | warned = 1; | 535 | return NO_IRQ; |
536 | |||
537 | /* If host has no translation, then we assume interrupt line */ | ||
538 | if (host->ops->xlate == NULL) | ||
539 | hwirq = intspec[0]; | ||
540 | else { | ||
541 | if (host->ops->xlate(host, controller, intspec, intsize, | ||
542 | &hwirq, &flags)) | ||
543 | return NO_IRQ; | ||
344 | } | 544 | } |
345 | return NO_IRQ; | 545 | |
546 | return irq_create_mapping(host, hwirq, flags); | ||
346 | } | 547 | } |
548 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); | ||
347 | 549 | ||
348 | /* | 550 | unsigned int irq_of_parse_and_map(struct device_node *dev, int index) |
349 | * In most cases will get a hit on the very first slot checked in the | ||
350 | * virt_irq_to_real_map. Only when there are a large number of | ||
351 | * IRQs will this be expensive. | ||
352 | */ | ||
353 | unsigned int real_irq_to_virt_slowpath(unsigned int real_irq) | ||
354 | { | 551 | { |
355 | unsigned int virq; | 552 | struct of_irq oirq; |
356 | unsigned int first_virq; | ||
357 | 553 | ||
358 | virq = real_irq; | 554 | if (of_irq_map_one(dev, index, &oirq)) |
555 | return NO_IRQ; | ||
359 | 556 | ||
360 | if (virq > max_virt_irq) | 557 | return irq_create_of_mapping(oirq.controller, oirq.specifier, |
361 | virq = (virq % nr_virt_irqs) + MIN_VIRT_IRQ; | 558 | oirq.size); |
559 | } | ||
560 | EXPORT_SYMBOL_GPL(irq_of_parse_and_map); | ||
362 | 561 | ||
363 | first_virq = virq; | 562 | void irq_dispose_mapping(unsigned int virq) |
563 | { | ||
564 | struct irq_host *host = irq_map[virq].host; | ||
565 | irq_hw_number_t hwirq; | ||
566 | unsigned long flags; | ||
364 | 567 | ||
365 | do { | 568 | WARN_ON (host == NULL); |
366 | if (virt_irq_to_real_map[virq] == real_irq) | 569 | if (host == NULL) |
367 | return virq; | 570 | return; |
368 | 571 | ||
369 | virq++; | 572 | /* Never unmap legacy interrupts */ |
573 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | ||
574 | return; | ||
370 | 575 | ||
371 | if (virq >= max_virt_irq) | 576 | /* remove chip and handler */ |
372 | virq = 0; | 577 | set_irq_chip_and_handler(virq, NULL, NULL); |
578 | |||
579 | /* Make sure it's completed */ | ||
580 | synchronize_irq(virq); | ||
581 | |||
582 | /* Tell the PIC about it */ | ||
583 | if (host->ops->unmap) | ||
584 | host->ops->unmap(host, virq); | ||
585 | smp_mb(); | ||
586 | |||
587 | /* Clear reverse map */ | ||
588 | hwirq = irq_map[virq].hwirq; | ||
589 | switch(host->revmap_type) { | ||
590 | case IRQ_HOST_MAP_LINEAR: | ||
591 | if (hwirq < host->revmap_data.linear.size) | ||
592 | host->revmap_data.linear.revmap[hwirq] = IRQ_NONE; | ||
593 | break; | ||
594 | case IRQ_HOST_MAP_TREE: | ||
595 | /* Check if radix tree allocated yet */ | ||
596 | if (host->revmap_data.tree.gfp_mask == 0) | ||
597 | break; | ||
598 | /* XXX radix tree not safe ! remove lock whem it becomes safe | ||
599 | * and use some RCU sync to make sure everything is ok before we | ||
600 | * can re-use that map entry | ||
601 | */ | ||
602 | spin_lock_irqsave(&irq_big_lock, flags); | ||
603 | radix_tree_delete(&host->revmap_data.tree, hwirq); | ||
604 | spin_unlock_irqrestore(&irq_big_lock, flags); | ||
605 | break; | ||
606 | } | ||
373 | 607 | ||
374 | } while (first_virq != virq); | 608 | /* Destroy map */ |
609 | smp_mb(); | ||
610 | irq_map[virq].hwirq = host->inval_irq; | ||
375 | 611 | ||
376 | return NO_IRQ; | 612 | /* Set some flags */ |
613 | get_irq_desc(virq)->status |= IRQ_NOREQUEST; | ||
377 | 614 | ||
615 | /* Free it */ | ||
616 | irq_free_virt(virq, 1); | ||
378 | } | 617 | } |
379 | #endif /* CONFIG_PPC64 */ | 618 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
380 | 619 | ||
381 | #ifdef CONFIG_IRQSTACKS | 620 | unsigned int irq_find_mapping(struct irq_host *host, |
382 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; | 621 | irq_hw_number_t hwirq) |
383 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | 622 | { |
623 | unsigned int i; | ||
624 | unsigned int hint = hwirq % irq_virq_count; | ||
625 | |||
626 | /* Look for default host if nececssary */ | ||
627 | if (host == NULL) | ||
628 | host = irq_default_host; | ||
629 | if (host == NULL) | ||
630 | return NO_IRQ; | ||
631 | |||
632 | /* legacy -> bail early */ | ||
633 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | ||
634 | return hwirq; | ||
635 | |||
636 | /* Slow path does a linear search of the map */ | ||
637 | if (hint < NUM_ISA_INTERRUPTS) | ||
638 | hint = NUM_ISA_INTERRUPTS; | ||
639 | i = hint; | ||
640 | do { | ||
641 | if (irq_map[i].host == host && | ||
642 | irq_map[i].hwirq == hwirq) | ||
643 | return i; | ||
644 | i++; | ||
645 | if (i >= irq_virq_count) | ||
646 | i = NUM_ISA_INTERRUPTS; | ||
647 | } while(i != hint); | ||
648 | return NO_IRQ; | ||
649 | } | ||
650 | EXPORT_SYMBOL_GPL(irq_find_mapping); | ||
384 | 651 | ||
385 | void irq_ctx_init(void) | 652 | |
653 | unsigned int irq_radix_revmap(struct irq_host *host, | ||
654 | irq_hw_number_t hwirq) | ||
386 | { | 655 | { |
387 | struct thread_info *tp; | 656 | struct radix_tree_root *tree; |
388 | int i; | 657 | struct irq_map_entry *ptr; |
658 | unsigned int virq; | ||
659 | unsigned long flags; | ||
389 | 660 | ||
390 | for_each_possible_cpu(i) { | 661 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
391 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); | ||
392 | tp = softirq_ctx[i]; | ||
393 | tp->cpu = i; | ||
394 | tp->preempt_count = SOFTIRQ_OFFSET; | ||
395 | 662 | ||
396 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | 663 | /* Check if the radix tree exist yet. We test the value of |
397 | tp = hardirq_ctx[i]; | 664 | * the gfp_mask for that. Sneaky but saves another int in the |
398 | tp->cpu = i; | 665 | * structure. If not, we fallback to slow mode |
399 | tp->preempt_count = HARDIRQ_OFFSET; | 666 | */ |
667 | tree = &host->revmap_data.tree; | ||
668 | if (tree->gfp_mask == 0) | ||
669 | return irq_find_mapping(host, hwirq); | ||
670 | |||
671 | /* XXX Current radix trees are NOT SMP safe !!! Remove that lock | ||
672 | * when that is fixed (when Nick's patch gets in | ||
673 | */ | ||
674 | spin_lock_irqsave(&irq_big_lock, flags); | ||
675 | |||
676 | /* Now try to resolve */ | ||
677 | ptr = radix_tree_lookup(tree, hwirq); | ||
678 | /* Found it, return */ | ||
679 | if (ptr) { | ||
680 | virq = ptr - irq_map; | ||
681 | goto bail; | ||
400 | } | 682 | } |
683 | |||
684 | /* If not there, try to insert it */ | ||
685 | virq = irq_find_mapping(host, hwirq); | ||
686 | if (virq != NO_IRQ) | ||
687 | radix_tree_insert(tree, virq, &irq_map[virq]); | ||
688 | bail: | ||
689 | spin_unlock_irqrestore(&irq_big_lock, flags); | ||
690 | return virq; | ||
401 | } | 691 | } |
402 | 692 | ||
403 | static inline void do_softirq_onstack(void) | 693 | unsigned int irq_linear_revmap(struct irq_host *host, |
694 | irq_hw_number_t hwirq) | ||
404 | { | 695 | { |
405 | struct thread_info *curtp, *irqtp; | 696 | unsigned int *revmap; |
406 | 697 | ||
407 | curtp = current_thread_info(); | 698 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
408 | irqtp = softirq_ctx[smp_processor_id()]; | 699 | |
409 | irqtp->task = curtp->task; | 700 | /* Check revmap bounds */ |
410 | call_do_softirq(irqtp); | 701 | if (unlikely(hwirq >= host->revmap_data.linear.size)) |
411 | irqtp->task = NULL; | 702 | return irq_find_mapping(host, hwirq); |
703 | |||
704 | /* Check if revmap was allocated */ | ||
705 | revmap = host->revmap_data.linear.revmap; | ||
706 | if (unlikely(revmap == NULL)) | ||
707 | return irq_find_mapping(host, hwirq); | ||
708 | |||
709 | /* Fill up revmap with slow path if no mapping found */ | ||
710 | if (unlikely(revmap[hwirq] == NO_IRQ)) | ||
711 | revmap[hwirq] = irq_find_mapping(host, hwirq); | ||
712 | |||
713 | return revmap[hwirq]; | ||
412 | } | 714 | } |
413 | 715 | ||
414 | #else | 716 | unsigned int irq_alloc_virt(struct irq_host *host, |
415 | #define do_softirq_onstack() __do_softirq() | 717 | unsigned int count, |
416 | #endif /* CONFIG_IRQSTACKS */ | 718 | unsigned int hint) |
719 | { | ||
720 | unsigned long flags; | ||
721 | unsigned int i, j, found = NO_IRQ; | ||
722 | unsigned int limit = irq_virq_count - count; | ||
417 | 723 | ||
418 | void do_softirq(void) | 724 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
725 | return NO_IRQ; | ||
726 | |||
727 | spin_lock_irqsave(&irq_big_lock, flags); | ||
728 | |||
729 | /* Use hint for 1 interrupt if any */ | ||
730 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | ||
731 | hint < irq_virq_count && irq_map[hint].host == NULL) { | ||
732 | found = hint; | ||
733 | goto hint_found; | ||
734 | } | ||
735 | |||
736 | /* Look for count consecutive numbers in the allocatable | ||
737 | * (non-legacy) space | ||
738 | */ | ||
739 | for (i = NUM_ISA_INTERRUPTS; i <= limit; ) { | ||
740 | for (j = i; j < (i + count); j++) | ||
741 | if (irq_map[j].host != NULL) { | ||
742 | i = j + 1; | ||
743 | continue; | ||
744 | } | ||
745 | found = i; | ||
746 | break; | ||
747 | } | ||
748 | if (found == NO_IRQ) { | ||
749 | spin_unlock_irqrestore(&irq_big_lock, flags); | ||
750 | return NO_IRQ; | ||
751 | } | ||
752 | hint_found: | ||
753 | for (i = found; i < (found + count); i++) { | ||
754 | irq_map[i].hwirq = host->inval_irq; | ||
755 | smp_wmb(); | ||
756 | irq_map[i].host = host; | ||
757 | } | ||
758 | spin_unlock_irqrestore(&irq_big_lock, flags); | ||
759 | return found; | ||
760 | } | ||
761 | |||
762 | void irq_free_virt(unsigned int virq, unsigned int count) | ||
419 | { | 763 | { |
420 | unsigned long flags; | 764 | unsigned long flags; |
765 | unsigned int i; | ||
421 | 766 | ||
422 | if (in_interrupt()) | 767 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
423 | return; | 768 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); |
424 | 769 | ||
425 | local_irq_save(flags); | 770 | spin_lock_irqsave(&irq_big_lock, flags); |
771 | for (i = virq; i < (virq + count); i++) { | ||
772 | struct irq_host *host; | ||
426 | 773 | ||
427 | if (local_softirq_pending()) | 774 | if (i < NUM_ISA_INTERRUPTS || |
428 | do_softirq_onstack(); | 775 | (virq + count) > irq_virq_count) |
776 | continue; | ||
429 | 777 | ||
430 | local_irq_restore(flags); | 778 | host = irq_map[i].host; |
779 | irq_map[i].hwirq = host->inval_irq; | ||
780 | smp_wmb(); | ||
781 | irq_map[i].host = NULL; | ||
782 | } | ||
783 | spin_unlock_irqrestore(&irq_big_lock, flags); | ||
431 | } | 784 | } |
432 | EXPORT_SYMBOL(do_softirq); | 785 | |
786 | void irq_early_init(void) | ||
787 | { | ||
788 | unsigned int i; | ||
789 | |||
790 | for (i = 0; i < NR_IRQS; i++) | ||
791 | get_irq_desc(i)->status |= IRQ_NOREQUEST; | ||
792 | } | ||
793 | |||
794 | /* We need to create the radix trees late */ | ||
795 | static int irq_late_init(void) | ||
796 | { | ||
797 | struct irq_host *h; | ||
798 | unsigned long flags; | ||
799 | |||
800 | spin_lock_irqsave(&irq_big_lock, flags); | ||
801 | list_for_each_entry(h, &irq_hosts, link) { | ||
802 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | ||
803 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC); | ||
804 | } | ||
805 | spin_unlock_irqrestore(&irq_big_lock, flags); | ||
806 | |||
807 | return 0; | ||
808 | } | ||
809 | arch_initcall(irq_late_init); | ||
810 | |||
811 | #endif /* CONFIG_PPC_MERGE */ | ||
433 | 812 | ||
434 | #ifdef CONFIG_PCI_MSI | 813 | #ifdef CONFIG_PCI_MSI |
435 | int pci_enable_msi(struct pci_dev * pdev) | 814 | int pci_enable_msi(struct pci_dev * pdev) |
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c index 4cf0b971976b..7e98e778b52f 100644 --- a/arch/powerpc/kernel/legacy_serial.c +++ b/arch/powerpc/kernel/legacy_serial.c | |||
@@ -28,6 +28,7 @@ static struct legacy_serial_info { | |||
28 | struct device_node *np; | 28 | struct device_node *np; |
29 | unsigned int speed; | 29 | unsigned int speed; |
30 | unsigned int clock; | 30 | unsigned int clock; |
31 | int irq_check_parent; | ||
31 | phys_addr_t taddr; | 32 | phys_addr_t taddr; |
32 | } legacy_serial_infos[MAX_LEGACY_SERIAL_PORTS]; | 33 | } legacy_serial_infos[MAX_LEGACY_SERIAL_PORTS]; |
33 | static unsigned int legacy_serial_count; | 34 | static unsigned int legacy_serial_count; |
@@ -36,7 +37,7 @@ static int legacy_serial_console = -1; | |||
36 | static int __init add_legacy_port(struct device_node *np, int want_index, | 37 | static int __init add_legacy_port(struct device_node *np, int want_index, |
37 | int iotype, phys_addr_t base, | 38 | int iotype, phys_addr_t base, |
38 | phys_addr_t taddr, unsigned long irq, | 39 | phys_addr_t taddr, unsigned long irq, |
39 | upf_t flags) | 40 | upf_t flags, int irq_check_parent) |
40 | { | 41 | { |
41 | u32 *clk, *spd, clock = BASE_BAUD * 16; | 42 | u32 *clk, *spd, clock = BASE_BAUD * 16; |
42 | int index; | 43 | int index; |
@@ -68,7 +69,7 @@ static int __init add_legacy_port(struct device_node *np, int want_index, | |||
68 | if (legacy_serial_infos[index].np != 0) { | 69 | if (legacy_serial_infos[index].np != 0) { |
69 | /* if we still have some room, move it, else override */ | 70 | /* if we still have some room, move it, else override */ |
70 | if (legacy_serial_count < MAX_LEGACY_SERIAL_PORTS) { | 71 | if (legacy_serial_count < MAX_LEGACY_SERIAL_PORTS) { |
71 | printk(KERN_INFO "Moved legacy port %d -> %d\n", | 72 | printk(KERN_DEBUG "Moved legacy port %d -> %d\n", |
72 | index, legacy_serial_count); | 73 | index, legacy_serial_count); |
73 | legacy_serial_ports[legacy_serial_count] = | 74 | legacy_serial_ports[legacy_serial_count] = |
74 | legacy_serial_ports[index]; | 75 | legacy_serial_ports[index]; |
@@ -76,7 +77,7 @@ static int __init add_legacy_port(struct device_node *np, int want_index, | |||
76 | legacy_serial_infos[index]; | 77 | legacy_serial_infos[index]; |
77 | legacy_serial_count++; | 78 | legacy_serial_count++; |
78 | } else { | 79 | } else { |
79 | printk(KERN_INFO "Replacing legacy port %d\n", index); | 80 | printk(KERN_DEBUG "Replacing legacy port %d\n", index); |
80 | } | 81 | } |
81 | } | 82 | } |
82 | 83 | ||
@@ -95,10 +96,11 @@ static int __init add_legacy_port(struct device_node *np, int want_index, | |||
95 | legacy_serial_infos[index].np = of_node_get(np); | 96 | legacy_serial_infos[index].np = of_node_get(np); |
96 | legacy_serial_infos[index].clock = clock; | 97 | legacy_serial_infos[index].clock = clock; |
97 | legacy_serial_infos[index].speed = spd ? *spd : 0; | 98 | legacy_serial_infos[index].speed = spd ? *spd : 0; |
99 | legacy_serial_infos[index].irq_check_parent = irq_check_parent; | ||
98 | 100 | ||
99 | printk(KERN_INFO "Found legacy serial port %d for %s\n", | 101 | printk(KERN_DEBUG "Found legacy serial port %d for %s\n", |
100 | index, np->full_name); | 102 | index, np->full_name); |
101 | printk(KERN_INFO " %s=%llx, taddr=%llx, irq=%lx, clk=%d, speed=%d\n", | 103 | printk(KERN_DEBUG " %s=%llx, taddr=%llx, irq=%lx, clk=%d, speed=%d\n", |
102 | (iotype == UPIO_PORT) ? "port" : "mem", | 104 | (iotype == UPIO_PORT) ? "port" : "mem", |
103 | (unsigned long long)base, (unsigned long long)taddr, irq, | 105 | (unsigned long long)base, (unsigned long long)taddr, irq, |
104 | legacy_serial_ports[index].uartclk, | 106 | legacy_serial_ports[index].uartclk, |
@@ -126,11 +128,13 @@ static int __init add_legacy_soc_port(struct device_node *np, | |||
126 | return -1; | 128 | return -1; |
127 | 129 | ||
128 | addr = of_translate_address(soc_dev, addrp); | 130 | addr = of_translate_address(soc_dev, addrp); |
131 | if (addr == OF_BAD_ADDR) | ||
132 | return -1; | ||
129 | 133 | ||
130 | /* Add port, irq will be dealt with later. We passed a translated | 134 | /* Add port, irq will be dealt with later. We passed a translated |
131 | * IO port value. It will be fixed up later along with the irq | 135 | * IO port value. It will be fixed up later along with the irq |
132 | */ | 136 | */ |
133 | return add_legacy_port(np, -1, UPIO_MEM, addr, addr, NO_IRQ, flags); | 137 | return add_legacy_port(np, -1, UPIO_MEM, addr, addr, NO_IRQ, flags, 0); |
134 | } | 138 | } |
135 | 139 | ||
136 | static int __init add_legacy_isa_port(struct device_node *np, | 140 | static int __init add_legacy_isa_port(struct device_node *np, |
@@ -141,6 +145,8 @@ static int __init add_legacy_isa_port(struct device_node *np, | |||
141 | int index = -1; | 145 | int index = -1; |
142 | phys_addr_t taddr; | 146 | phys_addr_t taddr; |
143 | 147 | ||
148 | DBG(" -> add_legacy_isa_port(%s)\n", np->full_name); | ||
149 | |||
144 | /* Get the ISA port number */ | 150 | /* Get the ISA port number */ |
145 | reg = (u32 *)get_property(np, "reg", NULL); | 151 | reg = (u32 *)get_property(np, "reg", NULL); |
146 | if (reg == NULL) | 152 | if (reg == NULL) |
@@ -161,9 +167,12 @@ static int __init add_legacy_isa_port(struct device_node *np, | |||
161 | 167 | ||
162 | /* Translate ISA address */ | 168 | /* Translate ISA address */ |
163 | taddr = of_translate_address(np, reg); | 169 | taddr = of_translate_address(np, reg); |
170 | if (taddr == OF_BAD_ADDR) | ||
171 | return -1; | ||
164 | 172 | ||
165 | /* Add port, irq will be dealt with later */ | 173 | /* Add port, irq will be dealt with later */ |
166 | return add_legacy_port(np, index, UPIO_PORT, reg[1], taddr, NO_IRQ, UPF_BOOT_AUTOCONF); | 174 | return add_legacy_port(np, index, UPIO_PORT, reg[1], taddr, |
175 | NO_IRQ, UPF_BOOT_AUTOCONF, 0); | ||
167 | 176 | ||
168 | } | 177 | } |
169 | 178 | ||
@@ -176,6 +185,8 @@ static int __init add_legacy_pci_port(struct device_node *np, | |||
176 | unsigned int flags; | 185 | unsigned int flags; |
177 | int iotype, index = -1, lindex = 0; | 186 | int iotype, index = -1, lindex = 0; |
178 | 187 | ||
188 | DBG(" -> add_legacy_pci_port(%s)\n", np->full_name); | ||
189 | |||
179 | /* We only support ports that have a clock frequency properly | 190 | /* We only support ports that have a clock frequency properly |
180 | * encoded in the device-tree (that is have an fcode). Anything | 191 | * encoded in the device-tree (that is have an fcode). Anything |
181 | * else can't be used that early and will be normally probed by | 192 | * else can't be used that early and will be normally probed by |
@@ -194,6 +205,8 @@ static int __init add_legacy_pci_port(struct device_node *np, | |||
194 | /* We only support BAR 0 for now */ | 205 | /* We only support BAR 0 for now */ |
195 | iotype = (flags & IORESOURCE_MEM) ? UPIO_MEM : UPIO_PORT; | 206 | iotype = (flags & IORESOURCE_MEM) ? UPIO_MEM : UPIO_PORT; |
196 | addr = of_translate_address(pci_dev, addrp); | 207 | addr = of_translate_address(pci_dev, addrp); |
208 | if (addr == OF_BAD_ADDR) | ||
209 | return -1; | ||
197 | 210 | ||
198 | /* Set the IO base to the same as the translated address for MMIO, | 211 | /* Set the IO base to the same as the translated address for MMIO, |
199 | * or to the domain local IO base for PIO (it will be fixed up later) | 212 | * or to the domain local IO base for PIO (it will be fixed up later) |
@@ -231,7 +244,8 @@ static int __init add_legacy_pci_port(struct device_node *np, | |||
231 | /* Add port, irq will be dealt with later. We passed a translated | 244 | /* Add port, irq will be dealt with later. We passed a translated |
232 | * IO port value. It will be fixed up later along with the irq | 245 | * IO port value. It will be fixed up later along with the irq |
233 | */ | 246 | */ |
234 | return add_legacy_port(np, index, iotype, base, addr, NO_IRQ, UPF_BOOT_AUTOCONF); | 247 | return add_legacy_port(np, index, iotype, base, addr, NO_IRQ, |
248 | UPF_BOOT_AUTOCONF, np != pci_dev); | ||
235 | } | 249 | } |
236 | #endif | 250 | #endif |
237 | 251 | ||
@@ -362,27 +376,22 @@ static void __init fixup_port_irq(int index, | |||
362 | struct device_node *np, | 376 | struct device_node *np, |
363 | struct plat_serial8250_port *port) | 377 | struct plat_serial8250_port *port) |
364 | { | 378 | { |
379 | unsigned int virq; | ||
380 | |||
365 | DBG("fixup_port_irq(%d)\n", index); | 381 | DBG("fixup_port_irq(%d)\n", index); |
366 | 382 | ||
367 | /* Check for interrupts in that node */ | 383 | virq = irq_of_parse_and_map(np, 0); |
368 | if (np->n_intrs > 0) { | 384 | if (virq == NO_IRQ && legacy_serial_infos[index].irq_check_parent) { |
369 | port->irq = np->intrs[0].line; | 385 | np = of_get_parent(np); |
370 | DBG(" port %d (%s), irq=%d\n", | 386 | if (np == NULL) |
371 | index, np->full_name, port->irq); | 387 | return; |
372 | return; | 388 | virq = irq_of_parse_and_map(np, 0); |
389 | of_node_put(np); | ||
373 | } | 390 | } |
374 | 391 | if (virq == NO_IRQ) | |
375 | /* Check for interrupts in the parent */ | ||
376 | np = of_get_parent(np); | ||
377 | if (np == NULL) | ||
378 | return; | 392 | return; |
379 | 393 | ||
380 | if (np->n_intrs > 0) { | 394 | port->irq = virq; |
381 | port->irq = np->intrs[0].line; | ||
382 | DBG(" port %d (%s), irq=%d\n", | ||
383 | index, np->full_name, port->irq); | ||
384 | } | ||
385 | of_node_put(np); | ||
386 | } | 395 | } |
387 | 396 | ||
388 | static void __init fixup_port_pio(int index, | 397 | static void __init fixup_port_pio(int index, |
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index 0c3c70d115c6..bfb407fc1aa1 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S | |||
@@ -51,12 +51,14 @@ _GLOBAL(call_do_softirq) | |||
51 | mtlr r0 | 51 | mtlr r0 |
52 | blr | 52 | blr |
53 | 53 | ||
54 | _GLOBAL(call___do_IRQ) | 54 | _GLOBAL(call_handle_irq) |
55 | ld r8,0(r7) | ||
55 | mflr r0 | 56 | mflr r0 |
56 | std r0,16(r1) | 57 | std r0,16(r1) |
57 | stdu r1,THREAD_SIZE-112(r5) | 58 | mtctr r8 |
58 | mr r1,r5 | 59 | stdu r1,THREAD_SIZE-112(r6) |
59 | bl .__do_IRQ | 60 | mr r1,r6 |
61 | bctrl | ||
60 | ld r1,0(r1) | 62 | ld r1,0(r1) |
61 | ld r0,16(r1) | 63 | ld r0,16(r1) |
62 | mtlr r0 | 64 | mtlr r0 |
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c index 1333335c474e..898dae8ab6d9 100644 --- a/arch/powerpc/kernel/pci_32.c +++ b/arch/powerpc/kernel/pci_32.c | |||
@@ -1404,6 +1404,43 @@ pcibios_update_irq(struct pci_dev *dev, int irq) | |||
1404 | /* XXX FIXME - update OF device tree node interrupt property */ | 1404 | /* XXX FIXME - update OF device tree node interrupt property */ |
1405 | } | 1405 | } |
1406 | 1406 | ||
1407 | #ifdef CONFIG_PPC_MERGE | ||
1408 | /* XXX This is a copy of the ppc64 version. This is temporary until we start | ||
1409 | * merging the 2 PCI layers | ||
1410 | */ | ||
1411 | /* | ||
1412 | * Reads the interrupt pin to determine if interrupt is use by card. | ||
1413 | * If the interrupt is used, then gets the interrupt line from the | ||
1414 | * openfirmware and sets it in the pci_dev and pci_config line. | ||
1415 | */ | ||
1416 | int pci_read_irq_line(struct pci_dev *pci_dev) | ||
1417 | { | ||
1418 | struct of_irq oirq; | ||
1419 | unsigned int virq; | ||
1420 | |||
1421 | DBG("Try to map irq for %s...\n", pci_name(pci_dev)); | ||
1422 | |||
1423 | if (of_irq_map_pci(pci_dev, &oirq)) { | ||
1424 | DBG(" -> failed !\n"); | ||
1425 | return -1; | ||
1426 | } | ||
1427 | |||
1428 | DBG(" -> got one, spec %d cells (0x%08x...) on %s\n", | ||
1429 | oirq.size, oirq.specifier[0], oirq.controller->full_name); | ||
1430 | |||
1431 | virq = irq_create_of_mapping(oirq.controller, oirq.specifier, oirq.size); | ||
1432 | if(virq == NO_IRQ) { | ||
1433 | DBG(" -> failed to map !\n"); | ||
1434 | return -1; | ||
1435 | } | ||
1436 | pci_dev->irq = virq; | ||
1437 | pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, virq); | ||
1438 | |||
1439 | return 0; | ||
1440 | } | ||
1441 | EXPORT_SYMBOL(pci_read_irq_line); | ||
1442 | #endif /* CONFIG_PPC_MERGE */ | ||
1443 | |||
1407 | int pcibios_enable_device(struct pci_dev *dev, int mask) | 1444 | int pcibios_enable_device(struct pci_dev *dev, int mask) |
1408 | { | 1445 | { |
1409 | u16 cmd, old_cmd; | 1446 | u16 cmd, old_cmd; |
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index bea8451fb57b..efc0b5559ee0 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c | |||
@@ -398,12 +398,8 @@ struct pci_dev *of_create_pci_dev(struct device_node *node, | |||
398 | } else { | 398 | } else { |
399 | dev->hdr_type = PCI_HEADER_TYPE_NORMAL; | 399 | dev->hdr_type = PCI_HEADER_TYPE_NORMAL; |
400 | dev->rom_base_reg = PCI_ROM_ADDRESS; | 400 | dev->rom_base_reg = PCI_ROM_ADDRESS; |
401 | /* Maybe do a default OF mapping here */ | ||
401 | dev->irq = NO_IRQ; | 402 | dev->irq = NO_IRQ; |
402 | if (node->n_intrs > 0) { | ||
403 | dev->irq = node->intrs[0].line; | ||
404 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, | ||
405 | dev->irq); | ||
406 | } | ||
407 | } | 403 | } |
408 | 404 | ||
409 | pci_parse_of_addrs(node, dev); | 405 | pci_parse_of_addrs(node, dev); |
@@ -1288,23 +1284,26 @@ EXPORT_SYMBOL(pcibios_fixup_bus); | |||
1288 | */ | 1284 | */ |
1289 | int pci_read_irq_line(struct pci_dev *pci_dev) | 1285 | int pci_read_irq_line(struct pci_dev *pci_dev) |
1290 | { | 1286 | { |
1291 | u8 intpin; | 1287 | struct of_irq oirq; |
1292 | struct device_node *node; | 1288 | unsigned int virq; |
1293 | |||
1294 | pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &intpin); | ||
1295 | if (intpin == 0) | ||
1296 | return 0; | ||
1297 | 1289 | ||
1298 | node = pci_device_to_OF_node(pci_dev); | 1290 | DBG("Try to map irq for %s...\n", pci_name(pci_dev)); |
1299 | if (node == NULL) | ||
1300 | return -1; | ||
1301 | 1291 | ||
1302 | if (node->n_intrs == 0) | 1292 | if (of_irq_map_pci(pci_dev, &oirq)) { |
1293 | DBG(" -> failed !\n"); | ||
1303 | return -1; | 1294 | return -1; |
1295 | } | ||
1304 | 1296 | ||
1305 | pci_dev->irq = node->intrs[0].line; | 1297 | DBG(" -> got one, spec %d cells (0x%08x...) on %s\n", |
1298 | oirq.size, oirq.specifier[0], oirq.controller->full_name); | ||
1306 | 1299 | ||
1307 | pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, pci_dev->irq); | 1300 | virq = irq_create_of_mapping(oirq.controller, oirq.specifier, oirq.size); |
1301 | if(virq == NO_IRQ) { | ||
1302 | DBG(" -> failed to map !\n"); | ||
1303 | return -1; | ||
1304 | } | ||
1305 | pci_dev->irq = virq; | ||
1306 | pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, virq); | ||
1308 | 1307 | ||
1309 | return 0; | 1308 | return 0; |
1310 | } | 1309 | } |
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 4c524cb52184..a1787ffb6319 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/module.h> | 30 | #include <linux/module.h> |
31 | #include <linux/kexec.h> | 31 | #include <linux/kexec.h> |
32 | #include <linux/debugfs.h> | 32 | #include <linux/debugfs.h> |
33 | #include <linux/irq.h> | ||
33 | 34 | ||
34 | #include <asm/prom.h> | 35 | #include <asm/prom.h> |
35 | #include <asm/rtas.h> | 36 | #include <asm/rtas.h> |
@@ -86,424 +87,6 @@ static DEFINE_RWLOCK(devtree_lock); | |||
86 | /* export that to outside world */ | 87 | /* export that to outside world */ |
87 | struct device_node *of_chosen; | 88 | struct device_node *of_chosen; |
88 | 89 | ||
89 | struct device_node *dflt_interrupt_controller; | ||
90 | int num_interrupt_controllers; | ||
91 | |||
92 | /* | ||
93 | * Wrapper for allocating memory for various data that needs to be | ||
94 | * attached to device nodes as they are processed at boot or when | ||
95 | * added to the device tree later (e.g. DLPAR). At boot there is | ||
96 | * already a region reserved so we just increment *mem_start by size; | ||
97 | * otherwise we call kmalloc. | ||
98 | */ | ||
99 | static void * prom_alloc(unsigned long size, unsigned long *mem_start) | ||
100 | { | ||
101 | unsigned long tmp; | ||
102 | |||
103 | if (!mem_start) | ||
104 | return kmalloc(size, GFP_KERNEL); | ||
105 | |||
106 | tmp = *mem_start; | ||
107 | *mem_start += size; | ||
108 | return (void *)tmp; | ||
109 | } | ||
110 | |||
111 | /* | ||
112 | * Find the device_node with a given phandle. | ||
113 | */ | ||
114 | static struct device_node * find_phandle(phandle ph) | ||
115 | { | ||
116 | struct device_node *np; | ||
117 | |||
118 | for (np = allnodes; np != 0; np = np->allnext) | ||
119 | if (np->linux_phandle == ph) | ||
120 | return np; | ||
121 | return NULL; | ||
122 | } | ||
123 | |||
124 | /* | ||
125 | * Find the interrupt parent of a node. | ||
126 | */ | ||
127 | static struct device_node * __devinit intr_parent(struct device_node *p) | ||
128 | { | ||
129 | phandle *parp; | ||
130 | |||
131 | parp = (phandle *) get_property(p, "interrupt-parent", NULL); | ||
132 | if (parp == NULL) | ||
133 | return p->parent; | ||
134 | p = find_phandle(*parp); | ||
135 | if (p != NULL) | ||
136 | return p; | ||
137 | /* | ||
138 | * On a powermac booted with BootX, we don't get to know the | ||
139 | * phandles for any nodes, so find_phandle will return NULL. | ||
140 | * Fortunately these machines only have one interrupt controller | ||
141 | * so there isn't in fact any ambiguity. -- paulus | ||
142 | */ | ||
143 | if (num_interrupt_controllers == 1) | ||
144 | p = dflt_interrupt_controller; | ||
145 | return p; | ||
146 | } | ||
147 | |||
148 | /* | ||
149 | * Find out the size of each entry of the interrupts property | ||
150 | * for a node. | ||
151 | */ | ||
152 | int __devinit prom_n_intr_cells(struct device_node *np) | ||
153 | { | ||
154 | struct device_node *p; | ||
155 | unsigned int *icp; | ||
156 | |||
157 | for (p = np; (p = intr_parent(p)) != NULL; ) { | ||
158 | icp = (unsigned int *) | ||
159 | get_property(p, "#interrupt-cells", NULL); | ||
160 | if (icp != NULL) | ||
161 | return *icp; | ||
162 | if (get_property(p, "interrupt-controller", NULL) != NULL | ||
163 | || get_property(p, "interrupt-map", NULL) != NULL) { | ||
164 | printk("oops, node %s doesn't have #interrupt-cells\n", | ||
165 | p->full_name); | ||
166 | return 1; | ||
167 | } | ||
168 | } | ||
169 | #ifdef DEBUG_IRQ | ||
170 | printk("prom_n_intr_cells failed for %s\n", np->full_name); | ||
171 | #endif | ||
172 | return 1; | ||
173 | } | ||
174 | |||
175 | /* | ||
176 | * Map an interrupt from a device up to the platform interrupt | ||
177 | * descriptor. | ||
178 | */ | ||
179 | static int __devinit map_interrupt(unsigned int **irq, struct device_node **ictrler, | ||
180 | struct device_node *np, unsigned int *ints, | ||
181 | int nintrc) | ||
182 | { | ||
183 | struct device_node *p, *ipar; | ||
184 | unsigned int *imap, *imask, *ip; | ||
185 | int i, imaplen, match; | ||
186 | int newintrc = 0, newaddrc = 0; | ||
187 | unsigned int *reg; | ||
188 | int naddrc; | ||
189 | |||
190 | reg = (unsigned int *) get_property(np, "reg", NULL); | ||
191 | naddrc = prom_n_addr_cells(np); | ||
192 | p = intr_parent(np); | ||
193 | while (p != NULL) { | ||
194 | if (get_property(p, "interrupt-controller", NULL) != NULL) | ||
195 | /* this node is an interrupt controller, stop here */ | ||
196 | break; | ||
197 | imap = (unsigned int *) | ||
198 | get_property(p, "interrupt-map", &imaplen); | ||
199 | if (imap == NULL) { | ||
200 | p = intr_parent(p); | ||
201 | continue; | ||
202 | } | ||
203 | imask = (unsigned int *) | ||
204 | get_property(p, "interrupt-map-mask", NULL); | ||
205 | if (imask == NULL) { | ||
206 | printk("oops, %s has interrupt-map but no mask\n", | ||
207 | p->full_name); | ||
208 | return 0; | ||
209 | } | ||
210 | imaplen /= sizeof(unsigned int); | ||
211 | match = 0; | ||
212 | ipar = NULL; | ||
213 | while (imaplen > 0 && !match) { | ||
214 | /* check the child-interrupt field */ | ||
215 | match = 1; | ||
216 | for (i = 0; i < naddrc && match; ++i) | ||
217 | match = ((reg[i] ^ imap[i]) & imask[i]) == 0; | ||
218 | for (; i < naddrc + nintrc && match; ++i) | ||
219 | match = ((ints[i-naddrc] ^ imap[i]) & imask[i]) == 0; | ||
220 | imap += naddrc + nintrc; | ||
221 | imaplen -= naddrc + nintrc; | ||
222 | /* grab the interrupt parent */ | ||
223 | ipar = find_phandle((phandle) *imap++); | ||
224 | --imaplen; | ||
225 | if (ipar == NULL && num_interrupt_controllers == 1) | ||
226 | /* cope with BootX not giving us phandles */ | ||
227 | ipar = dflt_interrupt_controller; | ||
228 | if (ipar == NULL) { | ||
229 | printk("oops, no int parent %x in map of %s\n", | ||
230 | imap[-1], p->full_name); | ||
231 | return 0; | ||
232 | } | ||
233 | /* find the parent's # addr and intr cells */ | ||
234 | ip = (unsigned int *) | ||
235 | get_property(ipar, "#interrupt-cells", NULL); | ||
236 | if (ip == NULL) { | ||
237 | printk("oops, no #interrupt-cells on %s\n", | ||
238 | ipar->full_name); | ||
239 | return 0; | ||
240 | } | ||
241 | newintrc = *ip; | ||
242 | ip = (unsigned int *) | ||
243 | get_property(ipar, "#address-cells", NULL); | ||
244 | newaddrc = (ip == NULL)? 0: *ip; | ||
245 | imap += newaddrc + newintrc; | ||
246 | imaplen -= newaddrc + newintrc; | ||
247 | } | ||
248 | if (imaplen < 0) { | ||
249 | printk("oops, error decoding int-map on %s, len=%d\n", | ||
250 | p->full_name, imaplen); | ||
251 | return 0; | ||
252 | } | ||
253 | if (!match) { | ||
254 | #ifdef DEBUG_IRQ | ||
255 | printk("oops, no match in %s int-map for %s\n", | ||
256 | p->full_name, np->full_name); | ||
257 | #endif | ||
258 | return 0; | ||
259 | } | ||
260 | p = ipar; | ||
261 | naddrc = newaddrc; | ||
262 | nintrc = newintrc; | ||
263 | ints = imap - nintrc; | ||
264 | reg = ints - naddrc; | ||
265 | } | ||
266 | if (p == NULL) { | ||
267 | #ifdef DEBUG_IRQ | ||
268 | printk("hmmm, int tree for %s doesn't have ctrler\n", | ||
269 | np->full_name); | ||
270 | #endif | ||
271 | return 0; | ||
272 | } | ||
273 | *irq = ints; | ||
274 | *ictrler = p; | ||
275 | return nintrc; | ||
276 | } | ||
277 | |||
278 | static unsigned char map_isa_senses[4] = { | ||
279 | IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE, | ||
280 | IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE, | ||
281 | IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE, | ||
282 | IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE | ||
283 | }; | ||
284 | |||
285 | static unsigned char map_mpic_senses[4] = { | ||
286 | IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE, | ||
287 | IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE, | ||
288 | /* 2 seems to be used for the 8259 cascade... */ | ||
289 | IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE, | ||
290 | IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE, | ||
291 | }; | ||
292 | |||
293 | static int __devinit finish_node_interrupts(struct device_node *np, | ||
294 | unsigned long *mem_start, | ||
295 | int measure_only) | ||
296 | { | ||
297 | unsigned int *ints; | ||
298 | int intlen, intrcells, intrcount; | ||
299 | int i, j, n, sense; | ||
300 | unsigned int *irq, virq; | ||
301 | struct device_node *ic; | ||
302 | int trace = 0; | ||
303 | |||
304 | //#define TRACE(fmt...) do { if (trace) { printk(fmt); mdelay(1000); } } while(0) | ||
305 | #define TRACE(fmt...) | ||
306 | |||
307 | if (!strcmp(np->name, "smu-doorbell")) | ||
308 | trace = 1; | ||
309 | |||
310 | TRACE("Finishing SMU doorbell ! num_interrupt_controllers = %d\n", | ||
311 | num_interrupt_controllers); | ||
312 | |||
313 | if (num_interrupt_controllers == 0) { | ||
314 | /* | ||
315 | * Old machines just have a list of interrupt numbers | ||
316 | * and no interrupt-controller nodes. | ||
317 | */ | ||
318 | ints = (unsigned int *) get_property(np, "AAPL,interrupts", | ||
319 | &intlen); | ||
320 | /* XXX old interpret_pci_props looked in parent too */ | ||
321 | /* XXX old interpret_macio_props looked for interrupts | ||
322 | before AAPL,interrupts */ | ||
323 | if (ints == NULL) | ||
324 | ints = (unsigned int *) get_property(np, "interrupts", | ||
325 | &intlen); | ||
326 | if (ints == NULL) | ||
327 | return 0; | ||
328 | |||
329 | np->n_intrs = intlen / sizeof(unsigned int); | ||
330 | np->intrs = prom_alloc(np->n_intrs * sizeof(np->intrs[0]), | ||
331 | mem_start); | ||
332 | if (!np->intrs) | ||
333 | return -ENOMEM; | ||
334 | if (measure_only) | ||
335 | return 0; | ||
336 | |||
337 | for (i = 0; i < np->n_intrs; ++i) { | ||
338 | np->intrs[i].line = *ints++; | ||
339 | np->intrs[i].sense = IRQ_SENSE_LEVEL | ||
340 | | IRQ_POLARITY_NEGATIVE; | ||
341 | } | ||
342 | return 0; | ||
343 | } | ||
344 | |||
345 | ints = (unsigned int *) get_property(np, "interrupts", &intlen); | ||
346 | TRACE("ints=%p, intlen=%d\n", ints, intlen); | ||
347 | if (ints == NULL) | ||
348 | return 0; | ||
349 | intrcells = prom_n_intr_cells(np); | ||
350 | intlen /= intrcells * sizeof(unsigned int); | ||
351 | TRACE("intrcells=%d, new intlen=%d\n", intrcells, intlen); | ||
352 | np->intrs = prom_alloc(intlen * sizeof(*(np->intrs)), mem_start); | ||
353 | if (!np->intrs) | ||
354 | return -ENOMEM; | ||
355 | |||
356 | if (measure_only) | ||
357 | return 0; | ||
358 | |||
359 | intrcount = 0; | ||
360 | for (i = 0; i < intlen; ++i, ints += intrcells) { | ||
361 | n = map_interrupt(&irq, &ic, np, ints, intrcells); | ||
362 | TRACE("map, irq=%d, ic=%p, n=%d\n", irq, ic, n); | ||
363 | if (n <= 0) | ||
364 | continue; | ||
365 | |||
366 | /* don't map IRQ numbers under a cascaded 8259 controller */ | ||
367 | if (ic && device_is_compatible(ic, "chrp,iic")) { | ||
368 | np->intrs[intrcount].line = irq[0]; | ||
369 | sense = (n > 1)? (irq[1] & 3): 3; | ||
370 | np->intrs[intrcount].sense = map_isa_senses[sense]; | ||
371 | } else { | ||
372 | virq = virt_irq_create_mapping(irq[0]); | ||
373 | TRACE("virq=%d\n", virq); | ||
374 | #ifdef CONFIG_PPC64 | ||
375 | if (virq == NO_IRQ) { | ||
376 | printk(KERN_CRIT "Could not allocate interrupt" | ||
377 | " number for %s\n", np->full_name); | ||
378 | continue; | ||
379 | } | ||
380 | #endif | ||
381 | np->intrs[intrcount].line = irq_offset_up(virq); | ||
382 | sense = (n > 1)? (irq[1] & 3): 1; | ||
383 | |||
384 | /* Apple uses bits in there in a different way, let's | ||
385 | * only keep the real sense bit on macs | ||
386 | */ | ||
387 | if (machine_is(powermac)) | ||
388 | sense &= 0x1; | ||
389 | np->intrs[intrcount].sense = map_mpic_senses[sense]; | ||
390 | } | ||
391 | |||
392 | #ifdef CONFIG_PPC64 | ||
393 | /* We offset irq numbers for the u3 MPIC by 128 in PowerMac */ | ||
394 | if (machine_is(powermac) && ic && ic->parent) { | ||
395 | char *name = get_property(ic->parent, "name", NULL); | ||
396 | if (name && !strcmp(name, "u3")) | ||
397 | np->intrs[intrcount].line += 128; | ||
398 | else if (!(name && (!strcmp(name, "mac-io") || | ||
399 | !strcmp(name, "u4")))) | ||
400 | /* ignore other cascaded controllers, such as | ||
401 | the k2-sata-root */ | ||
402 | break; | ||
403 | } | ||
404 | #endif /* CONFIG_PPC64 */ | ||
405 | if (n > 2) { | ||
406 | printk("hmmm, got %d intr cells for %s:", n, | ||
407 | np->full_name); | ||
408 | for (j = 0; j < n; ++j) | ||
409 | printk(" %d", irq[j]); | ||
410 | printk("\n"); | ||
411 | } | ||
412 | ++intrcount; | ||
413 | } | ||
414 | np->n_intrs = intrcount; | ||
415 | |||
416 | return 0; | ||
417 | } | ||
418 | |||
419 | static int __devinit finish_node(struct device_node *np, | ||
420 | unsigned long *mem_start, | ||
421 | int measure_only) | ||
422 | { | ||
423 | struct device_node *child; | ||
424 | int rc = 0; | ||
425 | |||
426 | rc = finish_node_interrupts(np, mem_start, measure_only); | ||
427 | if (rc) | ||
428 | goto out; | ||
429 | |||
430 | for (child = np->child; child != NULL; child = child->sibling) { | ||
431 | rc = finish_node(child, mem_start, measure_only); | ||
432 | if (rc) | ||
433 | goto out; | ||
434 | } | ||
435 | out: | ||
436 | return rc; | ||
437 | } | ||
438 | |||
439 | static void __init scan_interrupt_controllers(void) | ||
440 | { | ||
441 | struct device_node *np; | ||
442 | int n = 0; | ||
443 | char *name, *ic; | ||
444 | int iclen; | ||
445 | |||
446 | for (np = allnodes; np != NULL; np = np->allnext) { | ||
447 | ic = get_property(np, "interrupt-controller", &iclen); | ||
448 | name = get_property(np, "name", NULL); | ||
449 | /* checking iclen makes sure we don't get a false | ||
450 | match on /chosen.interrupt_controller */ | ||
451 | if ((name != NULL | ||
452 | && strcmp(name, "interrupt-controller") == 0) | ||
453 | || (ic != NULL && iclen == 0 | ||
454 | && strcmp(name, "AppleKiwi"))) { | ||
455 | if (n == 0) | ||
456 | dflt_interrupt_controller = np; | ||
457 | ++n; | ||
458 | } | ||
459 | } | ||
460 | num_interrupt_controllers = n; | ||
461 | } | ||
462 | |||
463 | /** | ||
464 | * finish_device_tree is called once things are running normally | ||
465 | * (i.e. with text and data mapped to the address they were linked at). | ||
466 | * It traverses the device tree and fills in some of the additional, | ||
467 | * fields in each node like {n_}addrs and {n_}intrs, the virt interrupt | ||
468 | * mapping is also initialized at this point. | ||
469 | */ | ||
470 | void __init finish_device_tree(void) | ||
471 | { | ||
472 | unsigned long start, end, size = 0; | ||
473 | |||
474 | DBG(" -> finish_device_tree\n"); | ||
475 | |||
476 | #ifdef CONFIG_PPC64 | ||
477 | /* Initialize virtual IRQ map */ | ||
478 | virt_irq_init(); | ||
479 | #endif | ||
480 | scan_interrupt_controllers(); | ||
481 | |||
482 | /* | ||
483 | * Finish device-tree (pre-parsing some properties etc...) | ||
484 | * We do this in 2 passes. One with "measure_only" set, which | ||
485 | * will only measure the amount of memory needed, then we can | ||
486 | * allocate that memory, and call finish_node again. However, | ||
487 | * we must be careful as most routines will fail nowadays when | ||
488 | * prom_alloc() returns 0, so we must make sure our first pass | ||
489 | * doesn't start at 0. We pre-initialize size to 16 for that | ||
490 | * reason and then remove those additional 16 bytes | ||
491 | */ | ||
492 | size = 16; | ||
493 | finish_node(allnodes, &size, 1); | ||
494 | size -= 16; | ||
495 | |||
496 | if (0 == size) | ||
497 | end = start = 0; | ||
498 | else | ||
499 | end = start = (unsigned long)__va(lmb_alloc(size, 128)); | ||
500 | |||
501 | finish_node(allnodes, &end, 0); | ||
502 | BUG_ON(end != start + size); | ||
503 | |||
504 | DBG(" <- finish_device_tree\n"); | ||
505 | } | ||
506 | |||
507 | static inline char *find_flat_dt_string(u32 offset) | 90 | static inline char *find_flat_dt_string(u32 offset) |
508 | { | 91 | { |
509 | return ((char *)initial_boot_params) + | 92 | return ((char *)initial_boot_params) + |
@@ -1389,27 +972,6 @@ prom_n_size_cells(struct device_node* np) | |||
1389 | EXPORT_SYMBOL(prom_n_size_cells); | 972 | EXPORT_SYMBOL(prom_n_size_cells); |
1390 | 973 | ||
1391 | /** | 974 | /** |
1392 | * Work out the sense (active-low level / active-high edge) | ||
1393 | * of each interrupt from the device tree. | ||
1394 | */ | ||
1395 | void __init prom_get_irq_senses(unsigned char *senses, int off, int max) | ||
1396 | { | ||
1397 | struct device_node *np; | ||
1398 | int i, j; | ||
1399 | |||
1400 | /* default to level-triggered */ | ||
1401 | memset(senses, IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE, max - off); | ||
1402 | |||
1403 | for (np = allnodes; np != 0; np = np->allnext) { | ||
1404 | for (j = 0; j < np->n_intrs; j++) { | ||
1405 | i = np->intrs[j].line; | ||
1406 | if (i >= off && i < max) | ||
1407 | senses[i-off] = np->intrs[j].sense; | ||
1408 | } | ||
1409 | } | ||
1410 | } | ||
1411 | |||
1412 | /** | ||
1413 | * Construct and return a list of the device_nodes with a given name. | 975 | * Construct and return a list of the device_nodes with a given name. |
1414 | */ | 976 | */ |
1415 | struct device_node *find_devices(const char *name) | 977 | struct device_node *find_devices(const char *name) |
@@ -1808,7 +1370,6 @@ static void of_node_release(struct kref *kref) | |||
1808 | node->deadprops = NULL; | 1370 | node->deadprops = NULL; |
1809 | } | 1371 | } |
1810 | } | 1372 | } |
1811 | kfree(node->intrs); | ||
1812 | kfree(node->full_name); | 1373 | kfree(node->full_name); |
1813 | kfree(node->data); | 1374 | kfree(node->data); |
1814 | kfree(node); | 1375 | kfree(node); |
@@ -1881,13 +1442,7 @@ void of_detach_node(const struct device_node *np) | |||
1881 | #ifdef CONFIG_PPC_PSERIES | 1442 | #ifdef CONFIG_PPC_PSERIES |
1882 | /* | 1443 | /* |
1883 | * Fix up the uninitialized fields in a new device node: | 1444 | * Fix up the uninitialized fields in a new device node: |
1884 | * name, type, n_addrs, addrs, n_intrs, intrs, and pci-specific fields | 1445 | * name, type and pci-specific fields |
1885 | * | ||
1886 | * A lot of boot-time code is duplicated here, because functions such | ||
1887 | * as finish_node_interrupts, interpret_pci_props, etc. cannot use the | ||
1888 | * slab allocator. | ||
1889 | * | ||
1890 | * This should probably be split up into smaller chunks. | ||
1891 | */ | 1446 | */ |
1892 | 1447 | ||
1893 | static int of_finish_dynamic_node(struct device_node *node) | 1448 | static int of_finish_dynamic_node(struct device_node *node) |
@@ -1928,8 +1483,6 @@ static int prom_reconfig_notifier(struct notifier_block *nb, | |||
1928 | switch (action) { | 1483 | switch (action) { |
1929 | case PSERIES_RECONFIG_ADD: | 1484 | case PSERIES_RECONFIG_ADD: |
1930 | err = of_finish_dynamic_node(node); | 1485 | err = of_finish_dynamic_node(node); |
1931 | if (!err) | ||
1932 | finish_node(node, NULL, 0); | ||
1933 | if (err < 0) { | 1486 | if (err < 0) { |
1934 | printk(KERN_ERR "finish_node returned %d\n", err); | 1487 | printk(KERN_ERR "finish_node returned %d\n", err); |
1935 | err = NOTIFY_BAD; | 1488 | err = NOTIFY_BAD; |
@@ -1975,8 +1528,7 @@ struct property *of_find_property(struct device_node *np, const char *name, | |||
1975 | * Find a property with a given name for a given node | 1528 | * Find a property with a given name for a given node |
1976 | * and return the value. | 1529 | * and return the value. |
1977 | */ | 1530 | */ |
1978 | unsigned char *get_property(struct device_node *np, const char *name, | 1531 | void *get_property(struct device_node *np, const char *name, int *lenp) |
1979 | int *lenp) | ||
1980 | { | 1532 | { |
1981 | struct property *pp = of_find_property(np,name,lenp); | 1533 | struct property *pp = of_find_property(np,name,lenp); |
1982 | return pp ? pp->value : NULL; | 1534 | return pp ? pp->value : NULL; |
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 1e95a9f8cda1..ebd501a59abd 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c | |||
@@ -1990,12 +1990,22 @@ static void __init flatten_device_tree(void) | |||
1990 | static void __init fixup_device_tree_maple(void) | 1990 | static void __init fixup_device_tree_maple(void) |
1991 | { | 1991 | { |
1992 | phandle isa; | 1992 | phandle isa; |
1993 | u32 rloc = 0x01002000; /* IO space; PCI device = 4 */ | ||
1993 | u32 isa_ranges[6]; | 1994 | u32 isa_ranges[6]; |
1994 | 1995 | char *name; | |
1995 | isa = call_prom("finddevice", 1, 1, ADDR("/ht@0/isa@4")); | 1996 | |
1997 | name = "/ht@0/isa@4"; | ||
1998 | isa = call_prom("finddevice", 1, 1, ADDR(name)); | ||
1999 | if (!PHANDLE_VALID(isa)) { | ||
2000 | name = "/ht@0/isa@6"; | ||
2001 | isa = call_prom("finddevice", 1, 1, ADDR(name)); | ||
2002 | rloc = 0x01003000; /* IO space; PCI device = 6 */ | ||
2003 | } | ||
1996 | if (!PHANDLE_VALID(isa)) | 2004 | if (!PHANDLE_VALID(isa)) |
1997 | return; | 2005 | return; |
1998 | 2006 | ||
2007 | if (prom_getproplen(isa, "ranges") != 12) | ||
2008 | return; | ||
1999 | if (prom_getprop(isa, "ranges", isa_ranges, sizeof(isa_ranges)) | 2009 | if (prom_getprop(isa, "ranges", isa_ranges, sizeof(isa_ranges)) |
2000 | == PROM_ERROR) | 2010 | == PROM_ERROR) |
2001 | return; | 2011 | return; |
@@ -2005,15 +2015,15 @@ static void __init fixup_device_tree_maple(void) | |||
2005 | isa_ranges[2] != 0x00010000) | 2015 | isa_ranges[2] != 0x00010000) |
2006 | return; | 2016 | return; |
2007 | 2017 | ||
2008 | prom_printf("fixing up bogus ISA range on Maple...\n"); | 2018 | prom_printf("Fixing up bogus ISA range on Maple/Apache...\n"); |
2009 | 2019 | ||
2010 | isa_ranges[0] = 0x1; | 2020 | isa_ranges[0] = 0x1; |
2011 | isa_ranges[1] = 0x0; | 2021 | isa_ranges[1] = 0x0; |
2012 | isa_ranges[2] = 0x01002000; /* IO space; PCI device = 4 */ | 2022 | isa_ranges[2] = rloc; |
2013 | isa_ranges[3] = 0x0; | 2023 | isa_ranges[3] = 0x0; |
2014 | isa_ranges[4] = 0x0; | 2024 | isa_ranges[4] = 0x0; |
2015 | isa_ranges[5] = 0x00010000; | 2025 | isa_ranges[5] = 0x00010000; |
2016 | prom_setprop(isa, "/ht@0/isa@4", "ranges", | 2026 | prom_setprop(isa, name, "ranges", |
2017 | isa_ranges, sizeof(isa_ranges)); | 2027 | isa_ranges, sizeof(isa_ranges)); |
2018 | } | 2028 | } |
2019 | #else | 2029 | #else |
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c index 45df420383cc..21009b1f7869 100644 --- a/arch/powerpc/kernel/prom_parse.c +++ b/arch/powerpc/kernel/prom_parse.c | |||
@@ -38,14 +38,6 @@ static void of_dump_addr(const char *s, u32 *addr, int na) | |||
38 | static void of_dump_addr(const char *s, u32 *addr, int na) { } | 38 | static void of_dump_addr(const char *s, u32 *addr, int na) { } |
39 | #endif | 39 | #endif |
40 | 40 | ||
41 | /* Read a big address */ | ||
42 | static inline u64 of_read_addr(u32 *cell, int size) | ||
43 | { | ||
44 | u64 r = 0; | ||
45 | while (size--) | ||
46 | r = (r << 32) | *(cell++); | ||
47 | return r; | ||
48 | } | ||
49 | 41 | ||
50 | /* Callbacks for bus specific translators */ | 42 | /* Callbacks for bus specific translators */ |
51 | struct of_bus { | 43 | struct of_bus { |
@@ -77,9 +69,9 @@ static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna) | |||
77 | { | 69 | { |
78 | u64 cp, s, da; | 70 | u64 cp, s, da; |
79 | 71 | ||
80 | cp = of_read_addr(range, na); | 72 | cp = of_read_number(range, na); |
81 | s = of_read_addr(range + na + pna, ns); | 73 | s = of_read_number(range + na + pna, ns); |
82 | da = of_read_addr(addr, na); | 74 | da = of_read_number(addr, na); |
83 | 75 | ||
84 | DBG("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n", | 76 | DBG("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n", |
85 | cp, s, da); | 77 | cp, s, da); |
@@ -91,7 +83,7 @@ static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna) | |||
91 | 83 | ||
92 | static int of_bus_default_translate(u32 *addr, u64 offset, int na) | 84 | static int of_bus_default_translate(u32 *addr, u64 offset, int na) |
93 | { | 85 | { |
94 | u64 a = of_read_addr(addr, na); | 86 | u64 a = of_read_number(addr, na); |
95 | memset(addr, 0, na * 4); | 87 | memset(addr, 0, na * 4); |
96 | a += offset; | 88 | a += offset; |
97 | if (na > 1) | 89 | if (na > 1) |
@@ -135,9 +127,9 @@ static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna) | |||
135 | return OF_BAD_ADDR; | 127 | return OF_BAD_ADDR; |
136 | 128 | ||
137 | /* Read address values, skipping high cell */ | 129 | /* Read address values, skipping high cell */ |
138 | cp = of_read_addr(range + 1, na - 1); | 130 | cp = of_read_number(range + 1, na - 1); |
139 | s = of_read_addr(range + na + pna, ns); | 131 | s = of_read_number(range + na + pna, ns); |
140 | da = of_read_addr(addr + 1, na - 1); | 132 | da = of_read_number(addr + 1, na - 1); |
141 | 133 | ||
142 | DBG("OF: PCI map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da); | 134 | DBG("OF: PCI map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da); |
143 | 135 | ||
@@ -195,9 +187,9 @@ static u64 of_bus_isa_map(u32 *addr, u32 *range, int na, int ns, int pna) | |||
195 | return OF_BAD_ADDR; | 187 | return OF_BAD_ADDR; |
196 | 188 | ||
197 | /* Read address values, skipping high cell */ | 189 | /* Read address values, skipping high cell */ |
198 | cp = of_read_addr(range + 1, na - 1); | 190 | cp = of_read_number(range + 1, na - 1); |
199 | s = of_read_addr(range + na + pna, ns); | 191 | s = of_read_number(range + na + pna, ns); |
200 | da = of_read_addr(addr + 1, na - 1); | 192 | da = of_read_number(addr + 1, na - 1); |
201 | 193 | ||
202 | DBG("OF: ISA map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da); | 194 | DBG("OF: ISA map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da); |
203 | 195 | ||
@@ -295,7 +287,7 @@ static int of_translate_one(struct device_node *parent, struct of_bus *bus, | |||
295 | */ | 287 | */ |
296 | ranges = (u32 *)get_property(parent, "ranges", &rlen); | 288 | ranges = (u32 *)get_property(parent, "ranges", &rlen); |
297 | if (ranges == NULL || rlen == 0) { | 289 | if (ranges == NULL || rlen == 0) { |
298 | offset = of_read_addr(addr, na); | 290 | offset = of_read_number(addr, na); |
299 | memset(addr, 0, pna * 4); | 291 | memset(addr, 0, pna * 4); |
300 | DBG("OF: no ranges, 1:1 translation\n"); | 292 | DBG("OF: no ranges, 1:1 translation\n"); |
301 | goto finish; | 293 | goto finish; |
@@ -378,7 +370,7 @@ u64 of_translate_address(struct device_node *dev, u32 *in_addr) | |||
378 | /* If root, we have finished */ | 370 | /* If root, we have finished */ |
379 | if (parent == NULL) { | 371 | if (parent == NULL) { |
380 | DBG("OF: reached root node\n"); | 372 | DBG("OF: reached root node\n"); |
381 | result = of_read_addr(addr, na); | 373 | result = of_read_number(addr, na); |
382 | break; | 374 | break; |
383 | } | 375 | } |
384 | 376 | ||
@@ -442,7 +434,7 @@ u32 *of_get_address(struct device_node *dev, int index, u64 *size, | |||
442 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) | 434 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) |
443 | if (i == index) { | 435 | if (i == index) { |
444 | if (size) | 436 | if (size) |
445 | *size = of_read_addr(prop + na, ns); | 437 | *size = of_read_number(prop + na, ns); |
446 | if (flags) | 438 | if (flags) |
447 | *flags = bus->get_flags(prop); | 439 | *flags = bus->get_flags(prop); |
448 | return prop; | 440 | return prop; |
@@ -484,7 +476,7 @@ u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, | |||
484 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) | 476 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) |
485 | if ((prop[0] & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { | 477 | if ((prop[0] & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { |
486 | if (size) | 478 | if (size) |
487 | *size = of_read_addr(prop + na, ns); | 479 | *size = of_read_number(prop + na, ns); |
488 | if (flags) | 480 | if (flags) |
489 | *flags = bus->get_flags(prop); | 481 | *flags = bus->get_flags(prop); |
490 | return prop; | 482 | return prop; |
@@ -565,11 +557,414 @@ void of_parse_dma_window(struct device_node *dn, unsigned char *dma_window_prop, | |||
565 | prop = get_property(dn, "#address-cells", NULL); | 557 | prop = get_property(dn, "#address-cells", NULL); |
566 | 558 | ||
567 | cells = prop ? *(u32 *)prop : prom_n_addr_cells(dn); | 559 | cells = prop ? *(u32 *)prop : prom_n_addr_cells(dn); |
568 | *phys = of_read_addr(dma_window, cells); | 560 | *phys = of_read_number(dma_window, cells); |
569 | 561 | ||
570 | dma_window += cells; | 562 | dma_window += cells; |
571 | 563 | ||
572 | prop = get_property(dn, "ibm,#dma-size-cells", NULL); | 564 | prop = get_property(dn, "ibm,#dma-size-cells", NULL); |
573 | cells = prop ? *(u32 *)prop : prom_n_size_cells(dn); | 565 | cells = prop ? *(u32 *)prop : prom_n_size_cells(dn); |
574 | *size = of_read_addr(dma_window, cells); | 566 | *size = of_read_number(dma_window, cells); |
567 | } | ||
568 | |||
569 | /* | ||
570 | * Interrupt remapper | ||
571 | */ | ||
572 | |||
573 | static unsigned int of_irq_workarounds; | ||
574 | static struct device_node *of_irq_dflt_pic; | ||
575 | |||
576 | static struct device_node *of_irq_find_parent(struct device_node *child) | ||
577 | { | ||
578 | struct device_node *p; | ||
579 | phandle *parp; | ||
580 | |||
581 | if (!of_node_get(child)) | ||
582 | return NULL; | ||
583 | |||
584 | do { | ||
585 | parp = (phandle *)get_property(child, "interrupt-parent", NULL); | ||
586 | if (parp == NULL) | ||
587 | p = of_get_parent(child); | ||
588 | else { | ||
589 | if (of_irq_workarounds & OF_IMAP_NO_PHANDLE) | ||
590 | p = of_node_get(of_irq_dflt_pic); | ||
591 | else | ||
592 | p = of_find_node_by_phandle(*parp); | ||
593 | } | ||
594 | of_node_put(child); | ||
595 | child = p; | ||
596 | } while (p && get_property(p, "#interrupt-cells", NULL) == NULL); | ||
597 | |||
598 | return p; | ||
599 | } | ||
600 | |||
601 | static u8 of_irq_pci_swizzle(u8 slot, u8 pin) | ||
602 | { | ||
603 | return (((pin - 1) + slot) % 4) + 1; | ||
575 | } | 604 | } |
605 | |||
606 | /* This doesn't need to be called if you don't have any special workaround | ||
607 | * flags to pass | ||
608 | */ | ||
609 | void of_irq_map_init(unsigned int flags) | ||
610 | { | ||
611 | of_irq_workarounds = flags; | ||
612 | |||
613 | /* OldWorld, don't bother looking at other things */ | ||
614 | if (flags & OF_IMAP_OLDWORLD_MAC) | ||
615 | return; | ||
616 | |||
617 | /* If we don't have phandles, let's try to locate a default interrupt | ||
618 | * controller (happens when booting with BootX). We do a first match | ||
619 | * here, hopefully, that only ever happens on machines with one | ||
620 | * controller. | ||
621 | */ | ||
622 | if (flags & OF_IMAP_NO_PHANDLE) { | ||
623 | struct device_node *np; | ||
624 | |||
625 | for(np = NULL; (np = of_find_all_nodes(np)) != NULL;) { | ||
626 | if (get_property(np, "interrupt-controller", NULL) | ||
627 | == NULL) | ||
628 | continue; | ||
629 | /* Skip /chosen/interrupt-controller */ | ||
630 | if (strcmp(np->name, "chosen") == 0) | ||
631 | continue; | ||
632 | /* It seems like at least one person on this planet wants | ||
633 | * to use BootX on a machine with an AppleKiwi controller | ||
634 | * which happens to pretend to be an interrupt | ||
635 | * controller too. | ||
636 | */ | ||
637 | if (strcmp(np->name, "AppleKiwi") == 0) | ||
638 | continue; | ||
639 | /* I think we found one ! */ | ||
640 | of_irq_dflt_pic = np; | ||
641 | break; | ||
642 | } | ||
643 | } | ||
644 | |||
645 | } | ||
646 | |||
647 | int of_irq_map_raw(struct device_node *parent, u32 *intspec, u32 *addr, | ||
648 | struct of_irq *out_irq) | ||
649 | { | ||
650 | struct device_node *ipar, *tnode, *old = NULL, *newpar = NULL; | ||
651 | u32 *tmp, *imap, *imask; | ||
652 | u32 intsize = 1, addrsize, newintsize = 0, newaddrsize = 0; | ||
653 | int imaplen, match, i; | ||
654 | |||
655 | ipar = of_node_get(parent); | ||
656 | |||
657 | /* First get the #interrupt-cells property of the current cursor | ||
658 | * that tells us how to interpret the passed-in intspec. If there | ||
659 | * is none, we are nice and just walk up the tree | ||
660 | */ | ||
661 | do { | ||
662 | tmp = (u32 *)get_property(ipar, "#interrupt-cells", NULL); | ||
663 | if (tmp != NULL) { | ||
664 | intsize = *tmp; | ||
665 | break; | ||
666 | } | ||
667 | tnode = ipar; | ||
668 | ipar = of_irq_find_parent(ipar); | ||
669 | of_node_put(tnode); | ||
670 | } while (ipar); | ||
671 | if (ipar == NULL) { | ||
672 | DBG(" -> no parent found !\n"); | ||
673 | goto fail; | ||
674 | } | ||
675 | |||
676 | DBG("of_irq_map_raw: ipar=%s, size=%d\n", ipar->full_name, intsize); | ||
677 | |||
678 | /* Look for this #address-cells. We have to implement the old linux | ||
679 | * trick of looking for the parent here as some device-trees rely on it | ||
680 | */ | ||
681 | old = of_node_get(ipar); | ||
682 | do { | ||
683 | tmp = (u32 *)get_property(old, "#address-cells", NULL); | ||
684 | tnode = of_get_parent(old); | ||
685 | of_node_put(old); | ||
686 | old = tnode; | ||
687 | } while(old && tmp == NULL); | ||
688 | of_node_put(old); | ||
689 | old = NULL; | ||
690 | addrsize = (tmp == NULL) ? 2 : *tmp; | ||
691 | |||
692 | DBG(" -> addrsize=%d\n", addrsize); | ||
693 | |||
694 | /* Now start the actual "proper" walk of the interrupt tree */ | ||
695 | while (ipar != NULL) { | ||
696 | /* Now check if cursor is an interrupt-controller and if it is | ||
697 | * then we are done | ||
698 | */ | ||
699 | if (get_property(ipar, "interrupt-controller", NULL) != NULL) { | ||
700 | DBG(" -> got it !\n"); | ||
701 | memcpy(out_irq->specifier, intspec, | ||
702 | intsize * sizeof(u32)); | ||
703 | out_irq->size = intsize; | ||
704 | out_irq->controller = ipar; | ||
705 | of_node_put(old); | ||
706 | return 0; | ||
707 | } | ||
708 | |||
709 | /* Now look for an interrupt-map */ | ||
710 | imap = (u32 *)get_property(ipar, "interrupt-map", &imaplen); | ||
711 | /* No interrupt map, check for an interrupt parent */ | ||
712 | if (imap == NULL) { | ||
713 | DBG(" -> no map, getting parent\n"); | ||
714 | newpar = of_irq_find_parent(ipar); | ||
715 | goto skiplevel; | ||
716 | } | ||
717 | imaplen /= sizeof(u32); | ||
718 | |||
719 | /* Look for a mask */ | ||
720 | imask = (u32 *)get_property(ipar, "interrupt-map-mask", NULL); | ||
721 | |||
722 | /* If we were passed no "reg" property and we attempt to parse | ||
723 | * an interrupt-map, then #address-cells must be 0. | ||
724 | * Fail if it's not. | ||
725 | */ | ||
726 | if (addr == NULL && addrsize != 0) { | ||
727 | DBG(" -> no reg passed in when needed !\n"); | ||
728 | goto fail; | ||
729 | } | ||
730 | |||
731 | /* Parse interrupt-map */ | ||
732 | match = 0; | ||
733 | while (imaplen > (addrsize + intsize + 1) && !match) { | ||
734 | /* Compare specifiers */ | ||
735 | match = 1; | ||
736 | for (i = 0; i < addrsize && match; ++i) { | ||
737 | u32 mask = imask ? imask[i] : 0xffffffffu; | ||
738 | match = ((addr[i] ^ imap[i]) & mask) == 0; | ||
739 | } | ||
740 | for (; i < (addrsize + intsize) && match; ++i) { | ||
741 | u32 mask = imask ? imask[i] : 0xffffffffu; | ||
742 | match = | ||
743 | ((intspec[i-addrsize] ^ imap[i]) & mask) == 0; | ||
744 | } | ||
745 | imap += addrsize + intsize; | ||
746 | imaplen -= addrsize + intsize; | ||
747 | |||
748 | DBG(" -> match=%d (imaplen=%d)\n", match, imaplen); | ||
749 | |||
750 | /* Get the interrupt parent */ | ||
751 | if (of_irq_workarounds & OF_IMAP_NO_PHANDLE) | ||
752 | newpar = of_node_get(of_irq_dflt_pic); | ||
753 | else | ||
754 | newpar = of_find_node_by_phandle((phandle)*imap); | ||
755 | imap++; | ||
756 | --imaplen; | ||
757 | |||
758 | /* Check if not found */ | ||
759 | if (newpar == NULL) { | ||
760 | DBG(" -> imap parent not found !\n"); | ||
761 | goto fail; | ||
762 | } | ||
763 | |||
764 | /* Get #interrupt-cells and #address-cells of new | ||
765 | * parent | ||
766 | */ | ||
767 | tmp = (u32 *)get_property(newpar, "#interrupt-cells", | ||
768 | NULL); | ||
769 | if (tmp == NULL) { | ||
770 | DBG(" -> parent lacks #interrupt-cells !\n"); | ||
771 | goto fail; | ||
772 | } | ||
773 | newintsize = *tmp; | ||
774 | tmp = (u32 *)get_property(newpar, "#address-cells", | ||
775 | NULL); | ||
776 | newaddrsize = (tmp == NULL) ? 0 : *tmp; | ||
777 | |||
778 | DBG(" -> newintsize=%d, newaddrsize=%d\n", | ||
779 | newintsize, newaddrsize); | ||
780 | |||
781 | /* Check for malformed properties */ | ||
782 | if (imaplen < (newaddrsize + newintsize)) | ||
783 | goto fail; | ||
784 | |||
785 | imap += newaddrsize + newintsize; | ||
786 | imaplen -= newaddrsize + newintsize; | ||
787 | |||
788 | DBG(" -> imaplen=%d\n", imaplen); | ||
789 | } | ||
790 | if (!match) | ||
791 | goto fail; | ||
792 | |||
793 | of_node_put(old); | ||
794 | old = of_node_get(newpar); | ||
795 | addrsize = newaddrsize; | ||
796 | intsize = newintsize; | ||
797 | intspec = imap - intsize; | ||
798 | addr = intspec - addrsize; | ||
799 | |||
800 | skiplevel: | ||
801 | /* Iterate again with new parent */ | ||
802 | DBG(" -> new parent: %s\n", newpar ? newpar->full_name : "<>"); | ||
803 | of_node_put(ipar); | ||
804 | ipar = newpar; | ||
805 | newpar = NULL; | ||
806 | } | ||
807 | fail: | ||
808 | of_node_put(ipar); | ||
809 | of_node_put(old); | ||
810 | of_node_put(newpar); | ||
811 | |||
812 | return -EINVAL; | ||
813 | } | ||
814 | EXPORT_SYMBOL_GPL(of_irq_map_raw); | ||
815 | |||
816 | #if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32) | ||
817 | static int of_irq_map_oldworld(struct device_node *device, int index, | ||
818 | struct of_irq *out_irq) | ||
819 | { | ||
820 | u32 *ints; | ||
821 | int intlen; | ||
822 | |||
823 | /* | ||
824 | * Old machines just have a list of interrupt numbers | ||
825 | * and no interrupt-controller nodes. | ||
826 | */ | ||
827 | ints = (u32 *) get_property(device, "AAPL,interrupts", &intlen); | ||
828 | if (ints == NULL) | ||
829 | return -EINVAL; | ||
830 | intlen /= sizeof(u32); | ||
831 | |||
832 | if (index >= intlen) | ||
833 | return -EINVAL; | ||
834 | |||
835 | out_irq->controller = NULL; | ||
836 | out_irq->specifier[0] = ints[index]; | ||
837 | out_irq->size = 1; | ||
838 | |||
839 | return 0; | ||
840 | } | ||
841 | #else /* defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32) */ | ||
842 | static int of_irq_map_oldworld(struct device_node *device, int index, | ||
843 | struct of_irq *out_irq) | ||
844 | { | ||
845 | return -EINVAL; | ||
846 | } | ||
847 | #endif /* !(defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32)) */ | ||
848 | |||
849 | int of_irq_map_one(struct device_node *device, int index, struct of_irq *out_irq) | ||
850 | { | ||
851 | struct device_node *p; | ||
852 | u32 *intspec, *tmp, intsize, intlen, *addr; | ||
853 | int res; | ||
854 | |||
855 | DBG("of_irq_map_one: dev=%s, index=%d\n", device->full_name, index); | ||
856 | |||
857 | /* OldWorld mac stuff is "special", handle out of line */ | ||
858 | if (of_irq_workarounds & OF_IMAP_OLDWORLD_MAC) | ||
859 | return of_irq_map_oldworld(device, index, out_irq); | ||
860 | |||
861 | /* Get the interrupts property */ | ||
862 | intspec = (u32 *)get_property(device, "interrupts", &intlen); | ||
863 | if (intspec == NULL) | ||
864 | return -EINVAL; | ||
865 | intlen /= sizeof(u32); | ||
866 | |||
867 | /* Get the reg property (if any) */ | ||
868 | addr = (u32 *)get_property(device, "reg", NULL); | ||
869 | |||
870 | /* Look for the interrupt parent. */ | ||
871 | p = of_irq_find_parent(device); | ||
872 | if (p == NULL) | ||
873 | return -EINVAL; | ||
874 | |||
875 | /* Get size of interrupt specifier */ | ||
876 | tmp = (u32 *)get_property(p, "#interrupt-cells", NULL); | ||
877 | if (tmp == NULL) { | ||
878 | of_node_put(p); | ||
879 | return -EINVAL; | ||
880 | } | ||
881 | intsize = *tmp; | ||
882 | |||
883 | /* Check index */ | ||
884 | if (index * intsize >= intlen) | ||
885 | return -EINVAL; | ||
886 | |||
887 | /* Get new specifier and map it */ | ||
888 | res = of_irq_map_raw(p, intspec + index * intsize, addr, out_irq); | ||
889 | of_node_put(p); | ||
890 | return res; | ||
891 | } | ||
892 | EXPORT_SYMBOL_GPL(of_irq_map_one); | ||
893 | |||
894 | int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq) | ||
895 | { | ||
896 | struct device_node *dn, *ppnode; | ||
897 | struct pci_dev *ppdev; | ||
898 | u32 lspec; | ||
899 | u32 laddr[3]; | ||
900 | u8 pin; | ||
901 | int rc; | ||
902 | |||
903 | /* Check if we have a device node, if yes, fallback to standard OF | ||
904 | * parsing | ||
905 | */ | ||
906 | dn = pci_device_to_OF_node(pdev); | ||
907 | if (dn) | ||
908 | return of_irq_map_one(dn, 0, out_irq); | ||
909 | |||
910 | /* Ok, we don't, time to have fun. Let's start by building up an | ||
911 | * interrupt spec. we assume #interrupt-cells is 1, which is standard | ||
912 | * for PCI. If you do different, then don't use that routine. | ||
913 | */ | ||
914 | rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin); | ||
915 | if (rc != 0) | ||
916 | return rc; | ||
917 | /* No pin, exit */ | ||
918 | if (pin == 0) | ||
919 | return -ENODEV; | ||
920 | |||
921 | /* Now we walk up the PCI tree */ | ||
922 | lspec = pin; | ||
923 | for (;;) { | ||
924 | /* Get the pci_dev of our parent */ | ||
925 | ppdev = pdev->bus->self; | ||
926 | |||
927 | /* Ouch, it's a host bridge... */ | ||
928 | if (ppdev == NULL) { | ||
929 | #ifdef CONFIG_PPC64 | ||
930 | ppnode = pci_bus_to_OF_node(pdev->bus); | ||
931 | #else | ||
932 | struct pci_controller *host; | ||
933 | host = pci_bus_to_host(pdev->bus); | ||
934 | ppnode = host ? host->arch_data : NULL; | ||
935 | #endif | ||
936 | /* No node for host bridge ? give up */ | ||
937 | if (ppnode == NULL) | ||
938 | return -EINVAL; | ||
939 | } else | ||
940 | /* We found a P2P bridge, check if it has a node */ | ||
941 | ppnode = pci_device_to_OF_node(ppdev); | ||
942 | |||
943 | /* Ok, we have found a parent with a device-node, hand over to | ||
944 | * the OF parsing code. | ||
945 | * We build a unit address from the linux device to be used for | ||
946 | * resolution. Note that we use the linux bus number which may | ||
947 | * not match your firmware bus numbering. | ||
948 | * Fortunately, in most cases, interrupt-map-mask doesn't include | ||
949 | * the bus number as part of the matching. | ||
950 | * You should still be careful about that though if you intend | ||
951 | * to rely on this function (you ship a firmware that doesn't | ||
952 | * create device nodes for all PCI devices). | ||
953 | */ | ||
954 | if (ppnode) | ||
955 | break; | ||
956 | |||
957 | /* We can only get here if we hit a P2P bridge with no node, | ||
958 | * let's do standard swizzling and try again | ||
959 | */ | ||
960 | lspec = of_irq_pci_swizzle(PCI_SLOT(pdev->devfn), lspec); | ||
961 | pdev = ppdev; | ||
962 | } | ||
963 | |||
964 | laddr[0] = (pdev->bus->number << 16) | ||
965 | | (pdev->devfn << 8); | ||
966 | laddr[1] = laddr[2] = 0; | ||
967 | return of_irq_map_raw(ppnode, &lspec, laddr, out_irq); | ||
968 | } | ||
969 | EXPORT_SYMBOL_GPL(of_irq_map_pci); | ||
970 | |||
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c index 6eb7e49b394a..cda022657324 100644 --- a/arch/powerpc/kernel/rtas_pci.c +++ b/arch/powerpc/kernel/rtas_pci.c | |||
@@ -297,19 +297,9 @@ unsigned long __init find_and_init_phbs(void) | |||
297 | struct device_node *node; | 297 | struct device_node *node; |
298 | struct pci_controller *phb; | 298 | struct pci_controller *phb; |
299 | unsigned int index; | 299 | unsigned int index; |
300 | unsigned int root_size_cells = 0; | ||
301 | unsigned int *opprop = NULL; | ||
302 | struct device_node *root = of_find_node_by_path("/"); | 300 | struct device_node *root = of_find_node_by_path("/"); |
303 | 301 | ||
304 | if (ppc64_interrupt_controller == IC_OPEN_PIC) { | ||
305 | opprop = (unsigned int *)get_property(root, | ||
306 | "platform-open-pic", NULL); | ||
307 | } | ||
308 | |||
309 | root_size_cells = prom_n_size_cells(root); | ||
310 | |||
311 | index = 0; | 302 | index = 0; |
312 | |||
313 | for (node = of_get_next_child(root, NULL); | 303 | for (node = of_get_next_child(root, NULL); |
314 | node != NULL; | 304 | node != NULL; |
315 | node = of_get_next_child(root, node)) { | 305 | node = of_get_next_child(root, node)) { |
@@ -324,13 +314,6 @@ unsigned long __init find_and_init_phbs(void) | |||
324 | setup_phb(node, phb); | 314 | setup_phb(node, phb); |
325 | pci_process_bridge_OF_ranges(phb, node, 0); | 315 | pci_process_bridge_OF_ranges(phb, node, 0); |
326 | pci_setup_phb_io(phb, index == 0); | 316 | pci_setup_phb_io(phb, index == 0); |
327 | #ifdef CONFIG_PPC_PSERIES | ||
328 | /* XXX This code need serious fixing ... --BenH */ | ||
329 | if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) { | ||
330 | int addr = root_size_cells * (index + 2) - 1; | ||
331 | mpic_assign_isu(pSeries_mpic, index, opprop[addr]); | ||
332 | } | ||
333 | #endif | ||
334 | index++; | 317 | index++; |
335 | } | 318 | } |
336 | 319 | ||
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index ba7cd50d820d..e0df2ba1ab9f 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c | |||
@@ -51,7 +51,6 @@ | |||
51 | 51 | ||
52 | extern void bootx_init(unsigned long r4, unsigned long phys); | 52 | extern void bootx_init(unsigned long r4, unsigned long phys); |
53 | 53 | ||
54 | boot_infos_t *boot_infos; | ||
55 | struct ide_machdep_calls ppc_ide_md; | 54 | struct ide_machdep_calls ppc_ide_md; |
56 | 55 | ||
57 | int boot_cpuid; | 56 | int boot_cpuid; |
@@ -240,7 +239,6 @@ void __init setup_arch(char **cmdline_p) | |||
240 | ppc_md.init_early(); | 239 | ppc_md.init_early(); |
241 | 240 | ||
242 | find_legacy_serial_ports(); | 241 | find_legacy_serial_ports(); |
243 | finish_device_tree(); | ||
244 | 242 | ||
245 | smp_setup_cpu_maps(); | 243 | smp_setup_cpu_maps(); |
246 | 244 | ||
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index ac7276c40685..fd1785e4c9bb 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c | |||
@@ -361,12 +361,15 @@ void __init setup_system(void) | |||
361 | 361 | ||
362 | /* | 362 | /* |
363 | * Fill the ppc64_caches & systemcfg structures with informations | 363 | * Fill the ppc64_caches & systemcfg structures with informations |
364 | * retrieved from the device-tree. Need to be called before | 364 | * retrieved from the device-tree. |
365 | * finish_device_tree() since the later requires some of the | ||
366 | * informations filled up here to properly parse the interrupt tree. | ||
367 | */ | 365 | */ |
368 | initialize_cache_info(); | 366 | initialize_cache_info(); |
369 | 367 | ||
368 | /* | ||
369 | * Initialize irq remapping subsystem | ||
370 | */ | ||
371 | irq_early_init(); | ||
372 | |||
370 | #ifdef CONFIG_PPC_RTAS | 373 | #ifdef CONFIG_PPC_RTAS |
371 | /* | 374 | /* |
372 | * Initialize RTAS if available | 375 | * Initialize RTAS if available |
@@ -394,12 +397,6 @@ void __init setup_system(void) | |||
394 | find_legacy_serial_ports(); | 397 | find_legacy_serial_ports(); |
395 | 398 | ||
396 | /* | 399 | /* |
397 | * "Finish" the device-tree, that is do the actual parsing of | ||
398 | * some of the properties like the interrupt map | ||
399 | */ | ||
400 | finish_device_tree(); | ||
401 | |||
402 | /* | ||
403 | * Initialize xmon | 400 | * Initialize xmon |
404 | */ | 401 | */ |
405 | #ifdef CONFIG_XMON_DEFAULT | 402 | #ifdef CONFIG_XMON_DEFAULT |
@@ -427,8 +424,6 @@ void __init setup_system(void) | |||
427 | 424 | ||
428 | printk("-----------------------------------------------------\n"); | 425 | printk("-----------------------------------------------------\n"); |
429 | printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); | 426 | printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); |
430 | printk("ppc64_interrupt_controller = 0x%ld\n", | ||
431 | ppc64_interrupt_controller); | ||
432 | printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size()); | 427 | printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size()); |
433 | printk("ppc64_caches.dcache_line_size = 0x%x\n", | 428 | printk("ppc64_caches.dcache_line_size = 0x%x\n", |
434 | ppc64_caches.dline_size); | 429 | ppc64_caches.dline_size); |
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c index cdf5867838a6..fad8580f9081 100644 --- a/arch/powerpc/kernel/vio.c +++ b/arch/powerpc/kernel/vio.c | |||
@@ -218,7 +218,6 @@ struct vio_dev * __devinit vio_register_device_node(struct device_node *of_node) | |||
218 | { | 218 | { |
219 | struct vio_dev *viodev; | 219 | struct vio_dev *viodev; |
220 | unsigned int *unit_address; | 220 | unsigned int *unit_address; |
221 | unsigned int *irq_p; | ||
222 | 221 | ||
223 | /* we need the 'device_type' property, in order to match with drivers */ | 222 | /* we need the 'device_type' property, in order to match with drivers */ |
224 | if (of_node->type == NULL) { | 223 | if (of_node->type == NULL) { |
@@ -243,16 +242,7 @@ struct vio_dev * __devinit vio_register_device_node(struct device_node *of_node) | |||
243 | 242 | ||
244 | viodev->dev.platform_data = of_node_get(of_node); | 243 | viodev->dev.platform_data = of_node_get(of_node); |
245 | 244 | ||
246 | viodev->irq = NO_IRQ; | 245 | viodev->irq = irq_of_parse_and_map(of_node, 0); |
247 | irq_p = (unsigned int *)get_property(of_node, "interrupts", NULL); | ||
248 | if (irq_p) { | ||
249 | int virq = virt_irq_create_mapping(*irq_p); | ||
250 | if (virq == NO_IRQ) { | ||
251 | printk(KERN_ERR "Unable to allocate interrupt " | ||
252 | "number for %s\n", of_node->full_name); | ||
253 | } else | ||
254 | viodev->irq = irq_offset_up(virq); | ||
255 | } | ||
256 | 246 | ||
257 | snprintf(viodev->dev.bus_id, BUS_ID_SIZE, "%x", *unit_address); | 247 | snprintf(viodev->dev.bus_id, BUS_ID_SIZE, "%x", *unit_address); |
258 | viodev->name = of_node->name; | 248 | viodev->name = of_node->name; |
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index 7675e675dce1..5fe7b7faf45f 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig | |||
@@ -16,12 +16,21 @@ config MPC834x_SYS | |||
16 | 3 PCI slots. The PIBs PCI initialization is the bootloader's | 16 | 3 PCI slots. The PIBs PCI initialization is the bootloader's |
17 | responsiblilty. | 17 | responsiblilty. |
18 | 18 | ||
19 | config MPC834x_ITX | ||
20 | bool "Freescale MPC834x ITX" | ||
21 | select DEFAULT_UIMAGE | ||
22 | help | ||
23 | This option enables support for the MPC 834x ITX evaluation board. | ||
24 | |||
25 | Be aware that PCI initialization is the bootloader's | ||
26 | responsiblilty. | ||
27 | |||
19 | endchoice | 28 | endchoice |
20 | 29 | ||
21 | config MPC834x | 30 | config MPC834x |
22 | bool | 31 | bool |
23 | select PPC_UDBG_16550 | 32 | select PPC_UDBG_16550 |
24 | select PPC_INDIRECT_PCI | 33 | select PPC_INDIRECT_PCI |
25 | default y if MPC834x_SYS | 34 | default y if MPC834x_SYS || MPC834x_ITX |
26 | 35 | ||
27 | endmenu | 36 | endmenu |
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile index 5c72367441a8..9387a110d28a 100644 --- a/arch/powerpc/platforms/83xx/Makefile +++ b/arch/powerpc/platforms/83xx/Makefile | |||
@@ -4,3 +4,4 @@ | |||
4 | obj-y := misc.o | 4 | obj-y := misc.o |
5 | obj-$(CONFIG_PCI) += pci.o | 5 | obj-$(CONFIG_PCI) += pci.o |
6 | obj-$(CONFIG_MPC834x_SYS) += mpc834x_sys.o | 6 | obj-$(CONFIG_MPC834x_SYS) += mpc834x_sys.o |
7 | obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o | ||
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c new file mode 100644 index 000000000000..b46305645d38 --- /dev/null +++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c | |||
@@ -0,0 +1,156 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/83xx/mpc834x_itx.c | ||
3 | * | ||
4 | * MPC834x ITX board specific routines | ||
5 | * | ||
6 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/config.h> | ||
15 | #include <linux/stddef.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/errno.h> | ||
19 | #include <linux/reboot.h> | ||
20 | #include <linux/pci.h> | ||
21 | #include <linux/kdev_t.h> | ||
22 | #include <linux/major.h> | ||
23 | #include <linux/console.h> | ||
24 | #include <linux/delay.h> | ||
25 | #include <linux/seq_file.h> | ||
26 | #include <linux/root_dev.h> | ||
27 | |||
28 | #include <asm/system.h> | ||
29 | #include <asm/atomic.h> | ||
30 | #include <asm/time.h> | ||
31 | #include <asm/io.h> | ||
32 | #include <asm/machdep.h> | ||
33 | #include <asm/ipic.h> | ||
34 | #include <asm/bootinfo.h> | ||
35 | #include <asm/irq.h> | ||
36 | #include <asm/prom.h> | ||
37 | #include <asm/udbg.h> | ||
38 | #include <sysdev/fsl_soc.h> | ||
39 | |||
40 | #include "mpc83xx.h" | ||
41 | |||
42 | #include <platforms/83xx/mpc834x_sys.h> | ||
43 | |||
44 | #ifndef CONFIG_PCI | ||
45 | unsigned long isa_io_base = 0; | ||
46 | unsigned long isa_mem_base = 0; | ||
47 | #endif | ||
48 | |||
49 | #ifdef CONFIG_PCI | ||
50 | static int | ||
51 | mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | ||
52 | { | ||
53 | static char pci_irq_table[][4] = | ||
54 | /* | ||
55 | * PCI IDSEL/INTPIN->INTLINE | ||
56 | * A B C D | ||
57 | */ | ||
58 | { | ||
59 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x0e */ | ||
60 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x0f */ | ||
61 | {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x10 */ | ||
62 | }; | ||
63 | |||
64 | const long min_idsel = 0x0e, max_idsel = 0x10, irqs_per_slot = 4; | ||
65 | return PCI_IRQ_TABLE_LOOKUP; | ||
66 | } | ||
67 | #endif /* CONFIG_PCI */ | ||
68 | |||
69 | /* ************************************************************************ | ||
70 | * | ||
71 | * Setup the architecture | ||
72 | * | ||
73 | */ | ||
74 | static void __init mpc834x_itx_setup_arch(void) | ||
75 | { | ||
76 | struct device_node *np; | ||
77 | |||
78 | if (ppc_md.progress) | ||
79 | ppc_md.progress("mpc834x_itx_setup_arch()", 0); | ||
80 | |||
81 | np = of_find_node_by_type(NULL, "cpu"); | ||
82 | if (np != 0) { | ||
83 | unsigned int *fp = | ||
84 | (int *)get_property(np, "clock-frequency", NULL); | ||
85 | if (fp != 0) | ||
86 | loops_per_jiffy = *fp / HZ; | ||
87 | else | ||
88 | loops_per_jiffy = 50000000 / HZ; | ||
89 | of_node_put(np); | ||
90 | } | ||
91 | #ifdef CONFIG_PCI | ||
92 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | ||
93 | add_bridge(np); | ||
94 | |||
95 | ppc_md.pci_swizzle = common_swizzle; | ||
96 | ppc_md.pci_map_irq = mpc83xx_map_irq; | ||
97 | ppc_md.pci_exclude_device = mpc83xx_exclude_device; | ||
98 | #endif | ||
99 | |||
100 | #ifdef CONFIG_ROOT_NFS | ||
101 | ROOT_DEV = Root_NFS; | ||
102 | #else | ||
103 | ROOT_DEV = Root_HDA1; | ||
104 | #endif | ||
105 | } | ||
106 | |||
107 | void __init mpc834x_itx_init_IRQ(void) | ||
108 | { | ||
109 | u8 senses[8] = { | ||
110 | 0, /* EXT 0 */ | ||
111 | IRQ_SENSE_LEVEL, /* EXT 1 */ | ||
112 | IRQ_SENSE_LEVEL, /* EXT 2 */ | ||
113 | 0, /* EXT 3 */ | ||
114 | #ifdef CONFIG_PCI | ||
115 | IRQ_SENSE_LEVEL, /* EXT 4 */ | ||
116 | IRQ_SENSE_LEVEL, /* EXT 5 */ | ||
117 | IRQ_SENSE_LEVEL, /* EXT 6 */ | ||
118 | IRQ_SENSE_LEVEL, /* EXT 7 */ | ||
119 | #else | ||
120 | 0, /* EXT 4 */ | ||
121 | 0, /* EXT 5 */ | ||
122 | 0, /* EXT 6 */ | ||
123 | 0, /* EXT 7 */ | ||
124 | #endif | ||
125 | }; | ||
126 | |||
127 | ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8); | ||
128 | |||
129 | /* Initialize the default interrupt mapping priorities, | ||
130 | * in case the boot rom changed something on us. | ||
131 | */ | ||
132 | ipic_set_default_priority(); | ||
133 | } | ||
134 | |||
135 | /* | ||
136 | * Called very early, MMU is off, device-tree isn't unflattened | ||
137 | */ | ||
138 | static int __init mpc834x_itx_probe(void) | ||
139 | { | ||
140 | /* We always match for now, eventually we should look at the flat | ||
141 | dev tree to ensure this is the board we are suppose to run on | ||
142 | */ | ||
143 | return 1; | ||
144 | } | ||
145 | |||
146 | define_machine(mpc834x_itx) { | ||
147 | .name = "MPC834x ITX", | ||
148 | .probe = mpc834x_itx_probe, | ||
149 | .setup_arch = mpc834x_itx_setup_arch, | ||
150 | .init_IRQ = mpc834x_itx_init_IRQ, | ||
151 | .get_irq = ipic_get_irq, | ||
152 | .restart = mpc83xx_restart, | ||
153 | .time_init = mpc83xx_time_init, | ||
154 | .calibrate_decr = generic_calibrate_decr, | ||
155 | .progress = udbg_progress, | ||
156 | }; | ||
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.h b/arch/powerpc/platforms/83xx/mpc834x_itx.h new file mode 100644 index 000000000000..174ca4ef55f3 --- /dev/null +++ b/arch/powerpc/platforms/83xx/mpc834x_itx.h | |||
@@ -0,0 +1,23 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/83xx/mpc834x_itx.h | ||
3 | * | ||
4 | * MPC834X ITX common board definitions | ||
5 | * | ||
6 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #ifndef __MACH_MPC83XX_ITX_H__ | ||
16 | #define __MACH_MPC83XX_ITX_H__ | ||
17 | |||
18 | #define PIRQA MPC83xx_IRQ_EXT4 | ||
19 | #define PIRQB MPC83xx_IRQ_EXT5 | ||
20 | #define PIRQC MPC83xx_IRQ_EXT6 | ||
21 | #define PIRQD MPC83xx_IRQ_EXT7 | ||
22 | |||
23 | #endif /* __MACH_MPC83XX_ITX_H__ */ | ||
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c index 22da1335445a..9d5da7896892 100644 --- a/arch/powerpc/platforms/cell/interrupt.c +++ b/arch/powerpc/platforms/cell/interrupt.c | |||
@@ -1,6 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * Cell Internal Interrupt Controller | 2 | * Cell Internal Interrupt Controller |
3 | * | 3 | * |
4 | * Copyright (C) 2006 Benjamin Herrenschmidt (benh@kernel.crashing.org) | ||
5 | * IBM, Corp. | ||
6 | * | ||
4 | * (C) Copyright IBM Deutschland Entwicklung GmbH 2005 | 7 | * (C) Copyright IBM Deutschland Entwicklung GmbH 2005 |
5 | * | 8 | * |
6 | * Author: Arnd Bergmann <arndb@de.ibm.com> | 9 | * Author: Arnd Bergmann <arndb@de.ibm.com> |
@@ -25,11 +28,13 @@ | |||
25 | #include <linux/module.h> | 28 | #include <linux/module.h> |
26 | #include <linux/percpu.h> | 29 | #include <linux/percpu.h> |
27 | #include <linux/types.h> | 30 | #include <linux/types.h> |
31 | #include <linux/ioport.h> | ||
28 | 32 | ||
29 | #include <asm/io.h> | 33 | #include <asm/io.h> |
30 | #include <asm/pgtable.h> | 34 | #include <asm/pgtable.h> |
31 | #include <asm/prom.h> | 35 | #include <asm/prom.h> |
32 | #include <asm/ptrace.h> | 36 | #include <asm/ptrace.h> |
37 | #include <asm/machdep.h> | ||
33 | 38 | ||
34 | #include "interrupt.h" | 39 | #include "interrupt.h" |
35 | #include "cbe_regs.h" | 40 | #include "cbe_regs.h" |
@@ -37,231 +42,65 @@ | |||
37 | struct iic { | 42 | struct iic { |
38 | struct cbe_iic_thread_regs __iomem *regs; | 43 | struct cbe_iic_thread_regs __iomem *regs; |
39 | u8 target_id; | 44 | u8 target_id; |
45 | u8 eoi_stack[16]; | ||
46 | int eoi_ptr; | ||
47 | struct irq_host *host; | ||
40 | }; | 48 | }; |
41 | 49 | ||
42 | static DEFINE_PER_CPU(struct iic, iic); | 50 | static DEFINE_PER_CPU(struct iic, iic); |
51 | #define IIC_NODE_COUNT 2 | ||
52 | static struct irq_host *iic_hosts[IIC_NODE_COUNT]; | ||
43 | 53 | ||
44 | void iic_local_enable(void) | 54 | /* Convert between "pending" bits and hw irq number */ |
55 | static irq_hw_number_t iic_pending_to_hwnum(struct cbe_iic_pending_bits bits) | ||
45 | { | 56 | { |
46 | struct iic *iic = &__get_cpu_var(iic); | 57 | unsigned char unit = bits.source & 0xf; |
47 | u64 tmp; | ||
48 | |||
49 | /* | ||
50 | * There seems to be a bug that is present in DD2.x CPUs | ||
51 | * and still only partially fixed in DD3.1. | ||
52 | * This bug causes a value written to the priority register | ||
53 | * not to make it there, resulting in a system hang unless we | ||
54 | * write it again. | ||
55 | * Masking with 0xf0 is done because the Cell BE does not | ||
56 | * implement the lower four bits of the interrupt priority, | ||
57 | * they always read back as zeroes, although future CPUs | ||
58 | * might implement different bits. | ||
59 | */ | ||
60 | do { | ||
61 | out_be64(&iic->regs->prio, 0xff); | ||
62 | tmp = in_be64(&iic->regs->prio); | ||
63 | } while ((tmp & 0xf0) != 0xf0); | ||
64 | } | ||
65 | |||
66 | void iic_local_disable(void) | ||
67 | { | ||
68 | out_be64(&__get_cpu_var(iic).regs->prio, 0x0); | ||
69 | } | ||
70 | 58 | ||
71 | static unsigned int iic_startup(unsigned int irq) | 59 | if (bits.flags & CBE_IIC_IRQ_IPI) |
72 | { | 60 | return IIC_IRQ_IPI0 | (bits.prio >> 4); |
73 | return 0; | 61 | else if (bits.class <= 3) |
62 | return (bits.class << 4) | unit; | ||
63 | else | ||
64 | return IIC_IRQ_INVALID; | ||
74 | } | 65 | } |
75 | 66 | ||
76 | static void iic_enable(unsigned int irq) | 67 | static void iic_mask(unsigned int irq) |
77 | { | 68 | { |
78 | iic_local_enable(); | ||
79 | } | 69 | } |
80 | 70 | ||
81 | static void iic_disable(unsigned int irq) | 71 | static void iic_unmask(unsigned int irq) |
82 | { | 72 | { |
83 | } | 73 | } |
84 | 74 | ||
85 | static void iic_end(unsigned int irq) | 75 | static void iic_eoi(unsigned int irq) |
86 | { | 76 | { |
87 | iic_local_enable(); | 77 | struct iic *iic = &__get_cpu_var(iic); |
78 | out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]); | ||
79 | BUG_ON(iic->eoi_ptr < 0); | ||
88 | } | 80 | } |
89 | 81 | ||
90 | static struct hw_interrupt_type iic_pic = { | 82 | static struct irq_chip iic_chip = { |
91 | .typename = " CELL-IIC ", | 83 | .typename = " CELL-IIC ", |
92 | .startup = iic_startup, | 84 | .mask = iic_mask, |
93 | .enable = iic_enable, | 85 | .unmask = iic_unmask, |
94 | .disable = iic_disable, | 86 | .eoi = iic_eoi, |
95 | .end = iic_end, | ||
96 | }; | 87 | }; |
97 | 88 | ||
98 | static int iic_external_get_irq(struct cbe_iic_pending_bits pending) | ||
99 | { | ||
100 | int irq; | ||
101 | unsigned char node, unit; | ||
102 | |||
103 | node = pending.source >> 4; | ||
104 | unit = pending.source & 0xf; | ||
105 | irq = -1; | ||
106 | |||
107 | /* | ||
108 | * This mapping is specific to the Cell Broadband | ||
109 | * Engine. We might need to get the numbers | ||
110 | * from the device tree to support future CPUs. | ||
111 | */ | ||
112 | switch (unit) { | ||
113 | case 0x00: | ||
114 | case 0x0b: | ||
115 | /* | ||
116 | * One of these units can be connected | ||
117 | * to an external interrupt controller. | ||
118 | */ | ||
119 | if (pending.class != 2) | ||
120 | break; | ||
121 | irq = IIC_EXT_OFFSET | ||
122 | + spider_get_irq(node) | ||
123 | + node * IIC_NODE_STRIDE; | ||
124 | break; | ||
125 | case 0x01 ... 0x04: | ||
126 | case 0x07 ... 0x0a: | ||
127 | /* | ||
128 | * These units are connected to the SPEs | ||
129 | */ | ||
130 | if (pending.class > 2) | ||
131 | break; | ||
132 | irq = IIC_SPE_OFFSET | ||
133 | + pending.class * IIC_CLASS_STRIDE | ||
134 | + node * IIC_NODE_STRIDE | ||
135 | + unit; | ||
136 | break; | ||
137 | } | ||
138 | if (irq == -1) | ||
139 | printk(KERN_WARNING "Unexpected interrupt class %02x, " | ||
140 | "source %02x, prio %02x, cpu %02x\n", pending.class, | ||
141 | pending.source, pending.prio, smp_processor_id()); | ||
142 | return irq; | ||
143 | } | ||
144 | |||
145 | /* Get an IRQ number from the pending state register of the IIC */ | 89 | /* Get an IRQ number from the pending state register of the IIC */ |
146 | int iic_get_irq(struct pt_regs *regs) | 90 | static unsigned int iic_get_irq(struct pt_regs *regs) |
147 | { | 91 | { |
148 | struct iic *iic; | 92 | struct cbe_iic_pending_bits pending; |
149 | int irq; | 93 | struct iic *iic; |
150 | struct cbe_iic_pending_bits pending; | 94 | |
151 | 95 | iic = &__get_cpu_var(iic); | |
152 | iic = &__get_cpu_var(iic); | 96 | *(unsigned long *) &pending = |
153 | *(unsigned long *) &pending = | 97 | in_be64((unsigned long __iomem *) &iic->regs->pending_destr); |
154 | in_be64((unsigned long __iomem *) &iic->regs->pending_destr); | 98 | iic->eoi_stack[++iic->eoi_ptr] = pending.prio; |
155 | 99 | BUG_ON(iic->eoi_ptr > 15); | |
156 | irq = -1; | 100 | if (pending.flags & CBE_IIC_IRQ_VALID) |
157 | if (pending.flags & CBE_IIC_IRQ_VALID) { | 101 | return irq_linear_revmap(iic->host, |
158 | if (pending.flags & CBE_IIC_IRQ_IPI) { | 102 | iic_pending_to_hwnum(pending)); |
159 | irq = IIC_IPI_OFFSET + (pending.prio >> 4); | 103 | return NO_IRQ; |
160 | /* | ||
161 | if (irq > 0x80) | ||
162 | printk(KERN_WARNING "Unexpected IPI prio %02x" | ||
163 | "on CPU %02x\n", pending.prio, | ||
164 | smp_processor_id()); | ||
165 | */ | ||
166 | } else { | ||
167 | irq = iic_external_get_irq(pending); | ||
168 | } | ||
169 | } | ||
170 | return irq; | ||
171 | } | ||
172 | |||
173 | /* hardcoded part to be compatible with older firmware */ | ||
174 | |||
175 | static int setup_iic_hardcoded(void) | ||
176 | { | ||
177 | struct device_node *np; | ||
178 | int nodeid, cpu; | ||
179 | unsigned long regs; | ||
180 | struct iic *iic; | ||
181 | |||
182 | for_each_possible_cpu(cpu) { | ||
183 | iic = &per_cpu(iic, cpu); | ||
184 | nodeid = cpu/2; | ||
185 | |||
186 | for (np = of_find_node_by_type(NULL, "cpu"); | ||
187 | np; | ||
188 | np = of_find_node_by_type(np, "cpu")) { | ||
189 | if (nodeid == *(int *)get_property(np, "node-id", NULL)) | ||
190 | break; | ||
191 | } | ||
192 | |||
193 | if (!np) { | ||
194 | printk(KERN_WARNING "IIC: CPU %d not found\n", cpu); | ||
195 | iic->regs = NULL; | ||
196 | iic->target_id = 0xff; | ||
197 | return -ENODEV; | ||
198 | } | ||
199 | |||
200 | regs = *(long *)get_property(np, "iic", NULL); | ||
201 | |||
202 | /* hack until we have decided on the devtree info */ | ||
203 | regs += 0x400; | ||
204 | if (cpu & 1) | ||
205 | regs += 0x20; | ||
206 | |||
207 | printk(KERN_INFO "IIC for CPU %d at %lx\n", cpu, regs); | ||
208 | iic->regs = ioremap(regs, sizeof(struct cbe_iic_thread_regs)); | ||
209 | iic->target_id = (nodeid << 4) + ((cpu & 1) ? 0xf : 0xe); | ||
210 | } | ||
211 | |||
212 | return 0; | ||
213 | } | ||
214 | |||
215 | static int setup_iic(void) | ||
216 | { | ||
217 | struct device_node *dn; | ||
218 | unsigned long *regs; | ||
219 | char *compatible; | ||
220 | unsigned *np, found = 0; | ||
221 | struct iic *iic = NULL; | ||
222 | |||
223 | for (dn = NULL; (dn = of_find_node_by_name(dn, "interrupt-controller"));) { | ||
224 | compatible = (char *)get_property(dn, "compatible", NULL); | ||
225 | |||
226 | if (!compatible) { | ||
227 | printk(KERN_WARNING "no compatible property found !\n"); | ||
228 | continue; | ||
229 | } | ||
230 | |||
231 | if (strstr(compatible, "IBM,CBEA-Internal-Interrupt-Controller")) | ||
232 | regs = (unsigned long *)get_property(dn,"reg", NULL); | ||
233 | else | ||
234 | continue; | ||
235 | |||
236 | if (!regs) | ||
237 | printk(KERN_WARNING "IIC: no reg property\n"); | ||
238 | |||
239 | np = (unsigned int *)get_property(dn, "ibm,interrupt-server-ranges", NULL); | ||
240 | |||
241 | if (!np) { | ||
242 | printk(KERN_WARNING "IIC: CPU association not found\n"); | ||
243 | iic->regs = NULL; | ||
244 | iic->target_id = 0xff; | ||
245 | return -ENODEV; | ||
246 | } | ||
247 | |||
248 | iic = &per_cpu(iic, np[0]); | ||
249 | iic->regs = ioremap(regs[0], sizeof(struct cbe_iic_thread_regs)); | ||
250 | iic->target_id = ((np[0] & 2) << 3) + ((np[0] & 1) ? 0xf : 0xe); | ||
251 | printk("IIC for CPU %d at %lx mapped to %p\n", np[0], regs[0], iic->regs); | ||
252 | |||
253 | iic = &per_cpu(iic, np[1]); | ||
254 | iic->regs = ioremap(regs[2], sizeof(struct cbe_iic_thread_regs)); | ||
255 | iic->target_id = ((np[1] & 2) << 3) + ((np[1] & 1) ? 0xf : 0xe); | ||
256 | printk("IIC for CPU %d at %lx mapped to %p\n", np[1], regs[2], iic->regs); | ||
257 | |||
258 | found++; | ||
259 | } | ||
260 | |||
261 | if (found) | ||
262 | return 0; | ||
263 | else | ||
264 | return -ENODEV; | ||
265 | } | 104 | } |
266 | 105 | ||
267 | #ifdef CONFIG_SMP | 106 | #ifdef CONFIG_SMP |
@@ -269,12 +108,12 @@ static int setup_iic(void) | |||
269 | /* Use the highest interrupt priorities for IPI */ | 108 | /* Use the highest interrupt priorities for IPI */ |
270 | static inline int iic_ipi_to_irq(int ipi) | 109 | static inline int iic_ipi_to_irq(int ipi) |
271 | { | 110 | { |
272 | return IIC_IPI_OFFSET + IIC_NUM_IPIS - 1 - ipi; | 111 | return IIC_IRQ_IPI0 + IIC_NUM_IPIS - 1 - ipi; |
273 | } | 112 | } |
274 | 113 | ||
275 | static inline int iic_irq_to_ipi(int irq) | 114 | static inline int iic_irq_to_ipi(int irq) |
276 | { | 115 | { |
277 | return IIC_NUM_IPIS - 1 - (irq - IIC_IPI_OFFSET); | 116 | return IIC_NUM_IPIS - 1 - (irq - IIC_IRQ_IPI0); |
278 | } | 117 | } |
279 | 118 | ||
280 | void iic_setup_cpu(void) | 119 | void iic_setup_cpu(void) |
@@ -293,22 +132,51 @@ u8 iic_get_target_id(int cpu) | |||
293 | } | 132 | } |
294 | EXPORT_SYMBOL_GPL(iic_get_target_id); | 133 | EXPORT_SYMBOL_GPL(iic_get_target_id); |
295 | 134 | ||
135 | struct irq_host *iic_get_irq_host(int node) | ||
136 | { | ||
137 | if (node < 0 || node >= IIC_NODE_COUNT) | ||
138 | return NULL; | ||
139 | return iic_hosts[node]; | ||
140 | } | ||
141 | EXPORT_SYMBOL_GPL(iic_get_irq_host); | ||
142 | |||
143 | |||
296 | static irqreturn_t iic_ipi_action(int irq, void *dev_id, struct pt_regs *regs) | 144 | static irqreturn_t iic_ipi_action(int irq, void *dev_id, struct pt_regs *regs) |
297 | { | 145 | { |
298 | smp_message_recv(iic_irq_to_ipi(irq), regs); | 146 | int ipi = (int)(long)dev_id; |
147 | |||
148 | smp_message_recv(ipi, regs); | ||
149 | |||
299 | return IRQ_HANDLED; | 150 | return IRQ_HANDLED; |
300 | } | 151 | } |
301 | 152 | ||
302 | static void iic_request_ipi(int ipi, const char *name) | 153 | static void iic_request_ipi(int ipi, const char *name) |
303 | { | 154 | { |
304 | int irq; | 155 | int node, virq; |
305 | 156 | ||
306 | irq = iic_ipi_to_irq(ipi); | 157 | for (node = 0; node < IIC_NODE_COUNT; node++) { |
307 | /* IPIs are marked IRQF_DISABLED as they must run with irqs | 158 | char *rname; |
308 | * disabled */ | 159 | if (iic_hosts[node] == NULL) |
309 | get_irq_desc(irq)->chip = &iic_pic; | 160 | continue; |
310 | get_irq_desc(irq)->status |= IRQ_PER_CPU; | 161 | virq = irq_create_mapping(iic_hosts[node], |
311 | request_irq(irq, iic_ipi_action, IRQF_DISABLED, name, NULL); | 162 | iic_ipi_to_irq(ipi), 0); |
163 | if (virq == NO_IRQ) { | ||
164 | printk(KERN_ERR | ||
165 | "iic: failed to map IPI %s on node %d\n", | ||
166 | name, node); | ||
167 | continue; | ||
168 | } | ||
169 | rname = kzalloc(strlen(name) + 16, GFP_KERNEL); | ||
170 | if (rname) | ||
171 | sprintf(rname, "%s node %d", name, node); | ||
172 | else | ||
173 | rname = (char *)name; | ||
174 | if (request_irq(virq, iic_ipi_action, IRQF_DISABLED, | ||
175 | rname, (void *)(long)ipi)) | ||
176 | printk(KERN_ERR | ||
177 | "iic: failed to request IPI %s on node %d\n", | ||
178 | name, node); | ||
179 | } | ||
312 | } | 180 | } |
313 | 181 | ||
314 | void iic_request_IPIs(void) | 182 | void iic_request_IPIs(void) |
@@ -319,34 +187,119 @@ void iic_request_IPIs(void) | |||
319 | iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug"); | 187 | iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug"); |
320 | #endif /* CONFIG_DEBUGGER */ | 188 | #endif /* CONFIG_DEBUGGER */ |
321 | } | 189 | } |
190 | |||
322 | #endif /* CONFIG_SMP */ | 191 | #endif /* CONFIG_SMP */ |
323 | 192 | ||
324 | static void iic_setup_spe_handlers(void) | 193 | |
194 | static int iic_host_match(struct irq_host *h, struct device_node *node) | ||
195 | { | ||
196 | return h->host_data != NULL && node == h->host_data; | ||
197 | } | ||
198 | |||
199 | static int iic_host_map(struct irq_host *h, unsigned int virq, | ||
200 | irq_hw_number_t hw, unsigned int flags) | ||
201 | { | ||
202 | if (hw < IIC_IRQ_IPI0) | ||
203 | set_irq_chip_and_handler(virq, &iic_chip, handle_fasteoi_irq); | ||
204 | else | ||
205 | set_irq_chip_and_handler(virq, &iic_chip, handle_percpu_irq); | ||
206 | return 0; | ||
207 | } | ||
208 | |||
209 | static int iic_host_xlate(struct irq_host *h, struct device_node *ct, | ||
210 | u32 *intspec, unsigned int intsize, | ||
211 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | ||
212 | |||
213 | { | ||
214 | /* Currently, we don't translate anything. That needs to be fixed as | ||
215 | * we get better defined device-trees. iic interrupts have to be | ||
216 | * explicitely mapped by whoever needs them | ||
217 | */ | ||
218 | return -ENODEV; | ||
219 | } | ||
220 | |||
221 | static struct irq_host_ops iic_host_ops = { | ||
222 | .match = iic_host_match, | ||
223 | .map = iic_host_map, | ||
224 | .xlate = iic_host_xlate, | ||
225 | }; | ||
226 | |||
227 | static void __init init_one_iic(unsigned int hw_cpu, unsigned long addr, | ||
228 | struct irq_host *host) | ||
325 | { | 229 | { |
326 | int be, isrc; | 230 | /* XXX FIXME: should locate the linux CPU number from the HW cpu |
231 | * number properly. We are lucky for now | ||
232 | */ | ||
233 | struct iic *iic = &per_cpu(iic, hw_cpu); | ||
234 | |||
235 | iic->regs = ioremap(addr, sizeof(struct cbe_iic_thread_regs)); | ||
236 | BUG_ON(iic->regs == NULL); | ||
327 | 237 | ||
328 | /* Assume two threads per BE are present */ | 238 | iic->target_id = ((hw_cpu & 2) << 3) | ((hw_cpu & 1) ? 0xf : 0xe); |
329 | for (be=0; be < num_present_cpus() / 2; be++) { | 239 | iic->eoi_stack[0] = 0xff; |
330 | for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) { | 240 | iic->host = host; |
331 | int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc; | 241 | out_be64(&iic->regs->prio, 0); |
332 | get_irq_desc(irq)->chip = &iic_pic; | 242 | |
243 | printk(KERN_INFO "IIC for CPU %d at %lx mapped to %p, target id 0x%x\n", | ||
244 | hw_cpu, addr, iic->regs, iic->target_id); | ||
245 | } | ||
246 | |||
247 | static int __init setup_iic(void) | ||
248 | { | ||
249 | struct device_node *dn; | ||
250 | struct resource r0, r1; | ||
251 | struct irq_host *host; | ||
252 | int found = 0; | ||
253 | u32 *np; | ||
254 | |||
255 | for (dn = NULL; | ||
256 | (dn = of_find_node_by_name(dn,"interrupt-controller")) != NULL;) { | ||
257 | if (!device_is_compatible(dn, | ||
258 | "IBM,CBEA-Internal-Interrupt-Controller")) | ||
259 | continue; | ||
260 | np = (u32 *)get_property(dn, "ibm,interrupt-server-ranges", | ||
261 | NULL); | ||
262 | if (np == NULL) { | ||
263 | printk(KERN_WARNING "IIC: CPU association not found\n"); | ||
264 | of_node_put(dn); | ||
265 | return -ENODEV; | ||
266 | } | ||
267 | if (of_address_to_resource(dn, 0, &r0) || | ||
268 | of_address_to_resource(dn, 1, &r1)) { | ||
269 | printk(KERN_WARNING "IIC: Can't resolve addresses\n"); | ||
270 | of_node_put(dn); | ||
271 | return -ENODEV; | ||
333 | } | 272 | } |
273 | host = NULL; | ||
274 | if (found < IIC_NODE_COUNT) { | ||
275 | host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, | ||
276 | IIC_SOURCE_COUNT, | ||
277 | &iic_host_ops, | ||
278 | IIC_IRQ_INVALID); | ||
279 | iic_hosts[found] = host; | ||
280 | BUG_ON(iic_hosts[found] == NULL); | ||
281 | iic_hosts[found]->host_data = of_node_get(dn); | ||
282 | found++; | ||
283 | } | ||
284 | init_one_iic(np[0], r0.start, host); | ||
285 | init_one_iic(np[1], r1.start, host); | ||
334 | } | 286 | } |
287 | |||
288 | if (found) | ||
289 | return 0; | ||
290 | else | ||
291 | return -ENODEV; | ||
335 | } | 292 | } |
336 | 293 | ||
337 | void iic_init_IRQ(void) | 294 | void __init iic_init_IRQ(void) |
338 | { | 295 | { |
339 | int cpu, irq_offset; | 296 | /* Discover and initialize iics */ |
340 | struct iic *iic; | ||
341 | |||
342 | if (setup_iic() < 0) | 297 | if (setup_iic() < 0) |
343 | setup_iic_hardcoded(); | 298 | panic("IIC: Failed to initialize !\n"); |
344 | 299 | ||
345 | irq_offset = 0; | 300 | /* Set master interrupt handling function */ |
346 | for_each_possible_cpu(cpu) { | 301 | ppc_md.get_irq = iic_get_irq; |
347 | iic = &per_cpu(iic, cpu); | 302 | |
348 | if (iic->regs) | 303 | /* Enable on current CPU */ |
349 | out_be64(&iic->regs->prio, 0xff); | 304 | iic_setup_cpu(); |
350 | } | ||
351 | iic_setup_spe_handlers(); | ||
352 | } | 305 | } |
diff --git a/arch/powerpc/platforms/cell/interrupt.h b/arch/powerpc/platforms/cell/interrupt.h index 799f77d98f96..5560a92ec3ab 100644 --- a/arch/powerpc/platforms/cell/interrupt.h +++ b/arch/powerpc/platforms/cell/interrupt.h | |||
@@ -37,27 +37,24 @@ | |||
37 | */ | 37 | */ |
38 | 38 | ||
39 | enum { | 39 | enum { |
40 | IIC_EXT_OFFSET = 0x00, /* Start of south bridge IRQs */ | 40 | IIC_IRQ_INVALID = 0xff, |
41 | IIC_NUM_EXT = 0x40, /* Number of south bridge IRQs */ | 41 | IIC_IRQ_MAX = 0x3f, |
42 | IIC_SPE_OFFSET = 0x40, /* Start of SPE interrupts */ | 42 | IIC_IRQ_EXT_IOIF0 = 0x20, |
43 | IIC_CLASS_STRIDE = 0x10, /* SPE IRQs per class */ | 43 | IIC_IRQ_EXT_IOIF1 = 0x2b, |
44 | IIC_IPI_OFFSET = 0x70, /* Start of IPI IRQs */ | 44 | IIC_IRQ_IPI0 = 0x40, |
45 | IIC_NUM_IPIS = 0x10, /* IRQs reserved for IPI */ | 45 | IIC_NUM_IPIS = 0x10, /* IRQs reserved for IPI */ |
46 | IIC_NODE_STRIDE = 0x80, /* Total IRQs per node */ | 46 | IIC_SOURCE_COUNT = 0x50, |
47 | }; | 47 | }; |
48 | 48 | ||
49 | extern void iic_init_IRQ(void); | 49 | extern void iic_init_IRQ(void); |
50 | extern int iic_get_irq(struct pt_regs *regs); | ||
51 | extern void iic_cause_IPI(int cpu, int mesg); | 50 | extern void iic_cause_IPI(int cpu, int mesg); |
52 | extern void iic_request_IPIs(void); | 51 | extern void iic_request_IPIs(void); |
53 | extern void iic_setup_cpu(void); | 52 | extern void iic_setup_cpu(void); |
54 | extern void iic_local_enable(void); | ||
55 | extern void iic_local_disable(void); | ||
56 | 53 | ||
57 | extern u8 iic_get_target_id(int cpu); | 54 | extern u8 iic_get_target_id(int cpu); |
55 | extern struct irq_host *iic_get_irq_host(int node); | ||
58 | 56 | ||
59 | extern void spider_init_IRQ(void); | 57 | extern void spider_init_IRQ(void); |
60 | extern int spider_get_irq(int node); | ||
61 | 58 | ||
62 | #endif | 59 | #endif |
63 | #endif /* ASM_CELL_PIC_H */ | 60 | #endif /* ASM_CELL_PIC_H */ |
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c index d8c2a29b3c15..282987d6d4a2 100644 --- a/arch/powerpc/platforms/cell/setup.c +++ b/arch/powerpc/platforms/cell/setup.c | |||
@@ -49,6 +49,7 @@ | |||
49 | #include <asm/irq.h> | 49 | #include <asm/irq.h> |
50 | #include <asm/spu.h> | 50 | #include <asm/spu.h> |
51 | #include <asm/spu_priv1.h> | 51 | #include <asm/spu_priv1.h> |
52 | #include <asm/udbg.h> | ||
52 | 53 | ||
53 | #include "interrupt.h" | 54 | #include "interrupt.h" |
54 | #include "iommu.h" | 55 | #include "iommu.h" |
@@ -79,10 +80,22 @@ static void cell_progress(char *s, unsigned short hex) | |||
79 | printk("*** %04x : %s\n", hex, s ? s : ""); | 80 | printk("*** %04x : %s\n", hex, s ? s : ""); |
80 | } | 81 | } |
81 | 82 | ||
83 | static void __init cell_pcibios_fixup(void) | ||
84 | { | ||
85 | struct pci_dev *dev = NULL; | ||
86 | |||
87 | for_each_pci_dev(dev) | ||
88 | pci_read_irq_line(dev); | ||
89 | } | ||
90 | |||
91 | static void __init cell_init_irq(void) | ||
92 | { | ||
93 | iic_init_IRQ(); | ||
94 | spider_init_IRQ(); | ||
95 | } | ||
96 | |||
82 | static void __init cell_setup_arch(void) | 97 | static void __init cell_setup_arch(void) |
83 | { | 98 | { |
84 | ppc_md.init_IRQ = iic_init_IRQ; | ||
85 | ppc_md.get_irq = iic_get_irq; | ||
86 | #ifdef CONFIG_SPU_BASE | 99 | #ifdef CONFIG_SPU_BASE |
87 | spu_priv1_ops = &spu_priv1_mmio_ops; | 100 | spu_priv1_ops = &spu_priv1_mmio_ops; |
88 | #endif | 101 | #endif |
@@ -108,7 +121,6 @@ static void __init cell_setup_arch(void) | |||
108 | /* Find and initialize PCI host bridges */ | 121 | /* Find and initialize PCI host bridges */ |
109 | init_pci_config_tokens(); | 122 | init_pci_config_tokens(); |
110 | find_and_init_phbs(); | 123 | find_and_init_phbs(); |
111 | spider_init_IRQ(); | ||
112 | cbe_pervasive_init(); | 124 | cbe_pervasive_init(); |
113 | #ifdef CONFIG_DUMMY_CONSOLE | 125 | #ifdef CONFIG_DUMMY_CONSOLE |
114 | conswitchp = &dummy_con; | 126 | conswitchp = &dummy_con; |
@@ -126,8 +138,6 @@ static void __init cell_init_early(void) | |||
126 | 138 | ||
127 | cell_init_iommu(); | 139 | cell_init_iommu(); |
128 | 140 | ||
129 | ppc64_interrupt_controller = IC_CELL_PIC; | ||
130 | |||
131 | DBG(" <- cell_init_early()\n"); | 141 | DBG(" <- cell_init_early()\n"); |
132 | } | 142 | } |
133 | 143 | ||
@@ -173,6 +183,8 @@ define_machine(cell) { | |||
173 | .calibrate_decr = generic_calibrate_decr, | 183 | .calibrate_decr = generic_calibrate_decr, |
174 | .check_legacy_ioport = cell_check_legacy_ioport, | 184 | .check_legacy_ioport = cell_check_legacy_ioport, |
175 | .progress = cell_progress, | 185 | .progress = cell_progress, |
186 | .init_IRQ = cell_init_irq, | ||
187 | .pcibios_fixup = cell_pcibios_fixup, | ||
176 | #ifdef CONFIG_KEXEC | 188 | #ifdef CONFIG_KEXEC |
177 | .machine_kexec = default_machine_kexec, | 189 | .machine_kexec = default_machine_kexec, |
178 | .machine_kexec_prepare = default_machine_kexec_prepare, | 190 | .machine_kexec_prepare = default_machine_kexec_prepare, |
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index 7c3a0b6d34fd..ae7ef88f1a37 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c | |||
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
24 | #include <linux/irq.h> | 24 | #include <linux/irq.h> |
25 | #include <linux/ioport.h> | ||
25 | 26 | ||
26 | #include <asm/pgtable.h> | 27 | #include <asm/pgtable.h> |
27 | #include <asm/prom.h> | 28 | #include <asm/prom.h> |
@@ -56,184 +57,313 @@ enum { | |||
56 | REISWAITEN = 0x508, /* Reissue Wait Control*/ | 57 | REISWAITEN = 0x508, /* Reissue Wait Control*/ |
57 | }; | 58 | }; |
58 | 59 | ||
59 | static void __iomem *spider_pics[4]; | 60 | #define SPIDER_CHIP_COUNT 4 |
61 | #define SPIDER_SRC_COUNT 64 | ||
62 | #define SPIDER_IRQ_INVALID 63 | ||
60 | 63 | ||
61 | static void __iomem *spider_get_pic(int irq) | 64 | struct spider_pic { |
62 | { | 65 | struct irq_host *host; |
63 | int node = irq / IIC_NODE_STRIDE; | 66 | struct device_node *of_node; |
64 | irq %= IIC_NODE_STRIDE; | 67 | void __iomem *regs; |
65 | 68 | unsigned int node_id; | |
66 | if (irq >= IIC_EXT_OFFSET && | 69 | }; |
67 | irq < IIC_EXT_OFFSET + IIC_NUM_EXT && | 70 | static struct spider_pic spider_pics[SPIDER_CHIP_COUNT]; |
68 | spider_pics) | ||
69 | return spider_pics[node]; | ||
70 | return NULL; | ||
71 | } | ||
72 | 71 | ||
73 | static int spider_get_nr(unsigned int irq) | 72 | static struct spider_pic *spider_virq_to_pic(unsigned int virq) |
74 | { | 73 | { |
75 | return (irq % IIC_NODE_STRIDE) - IIC_EXT_OFFSET; | 74 | return irq_map[virq].host->host_data; |
76 | } | 75 | } |
77 | 76 | ||
78 | static void __iomem *spider_get_irq_config(int irq) | 77 | static void __iomem *spider_get_irq_config(struct spider_pic *pic, |
78 | unsigned int src) | ||
79 | { | 79 | { |
80 | void __iomem *pic; | 80 | return pic->regs + TIR_CFGA + 8 * src; |
81 | pic = spider_get_pic(irq); | ||
82 | return pic + TIR_CFGA + 8 * spider_get_nr(irq); | ||
83 | } | 81 | } |
84 | 82 | ||
85 | static void spider_enable_irq(unsigned int irq) | 83 | static void spider_unmask_irq(unsigned int virq) |
86 | { | 84 | { |
87 | int nodeid = (irq / IIC_NODE_STRIDE) * 0x10; | 85 | struct spider_pic *pic = spider_virq_to_pic(virq); |
88 | void __iomem *cfg = spider_get_irq_config(irq); | 86 | void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq); |
89 | irq = spider_get_nr(irq); | ||
90 | 87 | ||
91 | out_be32(cfg, (in_be32(cfg) & ~0xf0)| 0x3107000eu | nodeid); | 88 | /* We use no locking as we should be covered by the descriptor lock |
92 | out_be32(cfg + 4, in_be32(cfg + 4) | 0x00020000u | irq); | 89 | * for access to invidual source configuration registers |
90 | */ | ||
91 | out_be32(cfg, in_be32(cfg) | 0x30000000u); | ||
93 | } | 92 | } |
94 | 93 | ||
95 | static void spider_disable_irq(unsigned int irq) | 94 | static void spider_mask_irq(unsigned int virq) |
96 | { | 95 | { |
97 | void __iomem *cfg = spider_get_irq_config(irq); | 96 | struct spider_pic *pic = spider_virq_to_pic(virq); |
98 | irq = spider_get_nr(irq); | 97 | void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq); |
99 | 98 | ||
99 | /* We use no locking as we should be covered by the descriptor lock | ||
100 | * for access to invidual source configuration registers | ||
101 | */ | ||
100 | out_be32(cfg, in_be32(cfg) & ~0x30000000u); | 102 | out_be32(cfg, in_be32(cfg) & ~0x30000000u); |
101 | } | 103 | } |
102 | 104 | ||
103 | static unsigned int spider_startup_irq(unsigned int irq) | 105 | static void spider_ack_irq(unsigned int virq) |
104 | { | 106 | { |
105 | spider_enable_irq(irq); | 107 | struct spider_pic *pic = spider_virq_to_pic(virq); |
106 | return 0; | 108 | unsigned int src = irq_map[virq].hwirq; |
107 | } | ||
108 | 109 | ||
109 | static void spider_shutdown_irq(unsigned int irq) | 110 | /* Reset edge detection logic if necessary |
110 | { | 111 | */ |
111 | spider_disable_irq(irq); | 112 | if (get_irq_desc(virq)->status & IRQ_LEVEL) |
112 | } | 113 | return; |
113 | 114 | ||
114 | static void spider_end_irq(unsigned int irq) | 115 | /* Only interrupts 47 to 50 can be set to edge */ |
115 | { | 116 | if (src < 47 || src > 50) |
116 | spider_enable_irq(irq); | 117 | return; |
117 | } | ||
118 | 118 | ||
119 | static void spider_ack_irq(unsigned int irq) | 119 | /* Perform the clear of the edge logic */ |
120 | { | 120 | out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf)); |
121 | spider_disable_irq(irq); | ||
122 | iic_local_enable(); | ||
123 | } | 121 | } |
124 | 122 | ||
125 | static struct hw_interrupt_type spider_pic = { | 123 | static struct irq_chip spider_pic = { |
126 | .typename = " SPIDER ", | 124 | .typename = " SPIDER ", |
127 | .startup = spider_startup_irq, | 125 | .unmask = spider_unmask_irq, |
128 | .shutdown = spider_shutdown_irq, | 126 | .mask = spider_mask_irq, |
129 | .enable = spider_enable_irq, | ||
130 | .disable = spider_disable_irq, | ||
131 | .ack = spider_ack_irq, | 127 | .ack = spider_ack_irq, |
132 | .end = spider_end_irq, | ||
133 | }; | 128 | }; |
134 | 129 | ||
135 | int spider_get_irq(int node) | 130 | static int spider_host_match(struct irq_host *h, struct device_node *node) |
136 | { | 131 | { |
137 | unsigned long cs; | 132 | struct spider_pic *pic = h->host_data; |
138 | void __iomem *regs = spider_pics[node]; | 133 | return node == pic->of_node; |
139 | |||
140 | cs = in_be32(regs + TIR_CS) >> 24; | ||
141 | |||
142 | if (cs == 63) | ||
143 | return -1; | ||
144 | else | ||
145 | return cs; | ||
146 | } | 134 | } |
147 | 135 | ||
148 | /* hardcoded part to be compatible with older firmware */ | 136 | static int spider_host_map(struct irq_host *h, unsigned int virq, |
149 | 137 | irq_hw_number_t hw, unsigned int flags) | |
150 | void spider_init_IRQ_hardcoded(void) | ||
151 | { | 138 | { |
152 | int node; | 139 | unsigned int sense = flags & IRQ_TYPE_SENSE_MASK; |
153 | long spiderpic; | 140 | struct spider_pic *pic = h->host_data; |
154 | long pics[] = { 0x24000008000, 0x34000008000 }; | 141 | void __iomem *cfg = spider_get_irq_config(pic, hw); |
155 | int n; | 142 | int level = 0; |
156 | 143 | u32 ic; | |
157 | pr_debug("%s(%d): Using hardcoded defaults\n", __FUNCTION__, __LINE__); | 144 | |
158 | 145 | /* Note that only level high is supported for most interrupts */ | |
159 | for (node = 0; node < num_present_cpus()/2; node++) { | 146 | if (sense != IRQ_TYPE_NONE && sense != IRQ_TYPE_LEVEL_HIGH && |
160 | spiderpic = pics[node]; | 147 | (hw < 47 || hw > 50)) |
161 | printk(KERN_DEBUG "SPIDER addr: %lx\n", spiderpic); | 148 | return -EINVAL; |
162 | spider_pics[node] = ioremap(spiderpic, 0x800); | 149 | |
163 | for (n = 0; n < IIC_NUM_EXT; n++) { | 150 | /* Decode sense type */ |
164 | int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; | 151 | switch(sense) { |
165 | get_irq_desc(irq)->chip = &spider_pic; | 152 | case IRQ_TYPE_EDGE_RISING: |
166 | } | 153 | ic = 0x3; |
167 | 154 | break; | |
168 | /* do not mask any interrupts because of level */ | 155 | case IRQ_TYPE_EDGE_FALLING: |
169 | out_be32(spider_pics[node] + TIR_MSK, 0x0); | 156 | ic = 0x2; |
170 | 157 | break; | |
171 | /* disable edge detection clear */ | 158 | case IRQ_TYPE_LEVEL_LOW: |
172 | /* out_be32(spider_pics[node] + TIR_EDC, 0x0); */ | 159 | ic = 0x0; |
173 | 160 | level = 1; | |
174 | /* enable interrupt packets to be output */ | 161 | break; |
175 | out_be32(spider_pics[node] + TIR_PIEN, | 162 | case IRQ_TYPE_LEVEL_HIGH: |
176 | in_be32(spider_pics[node] + TIR_PIEN) | 0x1); | 163 | case IRQ_TYPE_NONE: |
177 | 164 | ic = 0x1; | |
178 | /* Enable the interrupt detection enable bit. Do this last! */ | 165 | level = 1; |
179 | out_be32(spider_pics[node] + TIR_DEN, | 166 | break; |
180 | in_be32(spider_pics[node] + TIR_DEN) | 0x1); | 167 | default: |
168 | return -EINVAL; | ||
181 | } | 169 | } |
182 | } | ||
183 | 170 | ||
184 | void spider_init_IRQ(void) | 171 | /* Configure the source. One gross hack that was there before and |
185 | { | 172 | * that I've kept around is the priority to the BE which I set to |
186 | long spider_reg; | 173 | * be the same as the interrupt source number. I don't know wether |
187 | struct device_node *dn; | 174 | * that's supposed to make any kind of sense however, we'll have to |
188 | char *compatible; | 175 | * decide that, but for now, I'm not changing the behaviour. |
189 | int n, node = 0; | 176 | */ |
177 | out_be32(cfg, (ic << 24) | (0x7 << 16) | (pic->node_id << 4) | 0xe); | ||
178 | out_be32(cfg + 4, (0x2 << 16) | (hw & 0xff)); | ||
179 | |||
180 | if (level) | ||
181 | get_irq_desc(virq)->status |= IRQ_LEVEL; | ||
182 | set_irq_chip_and_handler(virq, &spider_pic, handle_level_irq); | ||
183 | return 0; | ||
184 | } | ||
190 | 185 | ||
191 | for (dn = NULL; (dn = of_find_node_by_name(dn, "interrupt-controller"));) { | 186 | static int spider_host_xlate(struct irq_host *h, struct device_node *ct, |
192 | compatible = (char *)get_property(dn, "compatible", NULL); | 187 | u32 *intspec, unsigned int intsize, |
188 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | ||
193 | 189 | ||
194 | if (!compatible) | 190 | { |
195 | continue; | 191 | /* Spider interrupts have 2 cells, first is the interrupt source, |
192 | * second, well, I don't know for sure yet ... We mask the top bits | ||
193 | * because old device-trees encode a node number in there | ||
194 | */ | ||
195 | *out_hwirq = intspec[0] & 0x3f; | ||
196 | *out_flags = IRQ_TYPE_LEVEL_HIGH; | ||
197 | return 0; | ||
198 | } | ||
196 | 199 | ||
197 | if (strstr(compatible, "CBEA,platform-spider-pic")) | 200 | static struct irq_host_ops spider_host_ops = { |
198 | spider_reg = *(long *)get_property(dn,"reg", NULL); | 201 | .match = spider_host_match, |
199 | else if (strstr(compatible, "sti,platform-spider-pic")) { | 202 | .map = spider_host_map, |
200 | spider_init_IRQ_hardcoded(); | 203 | .xlate = spider_host_xlate, |
201 | return; | 204 | }; |
202 | } else | ||
203 | continue; | ||
204 | 205 | ||
205 | if (!spider_reg) | 206 | static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc, |
206 | printk("interrupt controller does not have reg property !\n"); | 207 | struct pt_regs *regs) |
208 | { | ||
209 | struct spider_pic *pic = desc->handler_data; | ||
210 | unsigned int cs, virq; | ||
207 | 211 | ||
208 | n = prom_n_addr_cells(dn); | 212 | cs = in_be32(pic->regs + TIR_CS) >> 24; |
213 | if (cs == SPIDER_IRQ_INVALID) | ||
214 | virq = NO_IRQ; | ||
215 | else | ||
216 | virq = irq_linear_revmap(pic->host, cs); | ||
217 | if (virq != NO_IRQ) | ||
218 | generic_handle_irq(virq, regs); | ||
219 | desc->chip->eoi(irq); | ||
220 | } | ||
209 | 221 | ||
210 | if ( n != 2) | 222 | /* For hooking up the cascace we have a problem. Our device-tree is |
211 | printk("reg property with invalid number of elements \n"); | 223 | * crap and we don't know on which BE iic interrupt we are hooked on at |
224 | * least not the "standard" way. We can reconstitute it based on two | ||
225 | * informations though: which BE node we are connected to and wether | ||
226 | * we are connected to IOIF0 or IOIF1. Right now, we really only care | ||
227 | * about the IBM cell blade and we know that its firmware gives us an | ||
228 | * interrupt-map property which is pretty strange. | ||
229 | */ | ||
230 | static unsigned int __init spider_find_cascade_and_node(struct spider_pic *pic) | ||
231 | { | ||
232 | unsigned int virq; | ||
233 | u32 *imap, *tmp; | ||
234 | int imaplen, intsize, unit; | ||
235 | struct device_node *iic; | ||
236 | struct irq_host *iic_host; | ||
237 | |||
238 | #if 0 /* Enable that when we have a way to retreive the node as well */ | ||
239 | /* First, we check wether we have a real "interrupts" in the device | ||
240 | * tree in case the device-tree is ever fixed | ||
241 | */ | ||
242 | struct of_irq oirq; | ||
243 | if (of_irq_map_one(pic->of_node, 0, &oirq) == 0) { | ||
244 | virq = irq_create_of_mapping(oirq.controller, oirq.specifier, | ||
245 | oirq.size); | ||
246 | goto bail; | ||
247 | } | ||
248 | #endif | ||
249 | |||
250 | /* Now do the horrible hacks */ | ||
251 | tmp = (u32 *)get_property(pic->of_node, "#interrupt-cells", NULL); | ||
252 | if (tmp == NULL) | ||
253 | return NO_IRQ; | ||
254 | intsize = *tmp; | ||
255 | imap = (u32 *)get_property(pic->of_node, "interrupt-map", &imaplen); | ||
256 | if (imap == NULL || imaplen < (intsize + 1)) | ||
257 | return NO_IRQ; | ||
258 | iic = of_find_node_by_phandle(imap[intsize]); | ||
259 | if (iic == NULL) | ||
260 | return NO_IRQ; | ||
261 | imap += intsize + 1; | ||
262 | tmp = (u32 *)get_property(iic, "#interrupt-cells", NULL); | ||
263 | if (tmp == NULL) | ||
264 | return NO_IRQ; | ||
265 | intsize = *tmp; | ||
266 | /* Assume unit is last entry of interrupt specifier */ | ||
267 | unit = imap[intsize - 1]; | ||
268 | /* Ok, we have a unit, now let's try to get the node */ | ||
269 | tmp = (u32 *)get_property(iic, "ibm,interrupt-server-ranges", NULL); | ||
270 | if (tmp == NULL) { | ||
271 | of_node_put(iic); | ||
272 | return NO_IRQ; | ||
273 | } | ||
274 | /* ugly as hell but works for now */ | ||
275 | pic->node_id = (*tmp) >> 1; | ||
276 | of_node_put(iic); | ||
277 | |||
278 | /* Ok, now let's get cracking. You may ask me why I just didn't match | ||
279 | * the iic host from the iic OF node, but that way I'm still compatible | ||
280 | * with really really old old firmwares for which we don't have a node | ||
281 | */ | ||
282 | iic_host = iic_get_irq_host(pic->node_id); | ||
283 | if (iic_host == NULL) | ||
284 | return NO_IRQ; | ||
285 | /* Manufacture an IIC interrupt number of class 2 */ | ||
286 | virq = irq_create_mapping(iic_host, 0x20 | unit, 0); | ||
287 | if (virq == NO_IRQ) | ||
288 | printk(KERN_ERR "spider_pic: failed to map cascade !"); | ||
289 | return virq; | ||
290 | } | ||
212 | 291 | ||
213 | spider_pics[node] = ioremap(spider_reg, 0x800); | ||
214 | 292 | ||
215 | printk("SPIDER addr: %lx with %i addr_cells mapped to %p\n", | 293 | static void __init spider_init_one(struct device_node *of_node, int chip, |
216 | spider_reg, n, spider_pics[node]); | 294 | unsigned long addr) |
295 | { | ||
296 | struct spider_pic *pic = &spider_pics[chip]; | ||
297 | int i, virq; | ||
298 | |||
299 | /* Map registers */ | ||
300 | pic->regs = ioremap(addr, 0x1000); | ||
301 | if (pic->regs == NULL) | ||
302 | panic("spider_pic: can't map registers !"); | ||
303 | |||
304 | /* Allocate a host */ | ||
305 | pic->host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, SPIDER_SRC_COUNT, | ||
306 | &spider_host_ops, SPIDER_IRQ_INVALID); | ||
307 | if (pic->host == NULL) | ||
308 | panic("spider_pic: can't allocate irq host !"); | ||
309 | pic->host->host_data = pic; | ||
310 | |||
311 | /* Fill out other bits */ | ||
312 | pic->of_node = of_node_get(of_node); | ||
313 | |||
314 | /* Go through all sources and disable them */ | ||
315 | for (i = 0; i < SPIDER_SRC_COUNT; i++) { | ||
316 | void __iomem *cfg = pic->regs + TIR_CFGA + 8 * i; | ||
317 | out_be32(cfg, in_be32(cfg) & ~0x30000000u); | ||
318 | } | ||
217 | 319 | ||
218 | for (n = 0; n < IIC_NUM_EXT; n++) { | 320 | /* do not mask any interrupts because of level */ |
219 | int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; | 321 | out_be32(pic->regs + TIR_MSK, 0x0); |
220 | get_irq_desc(irq)->chip = &spider_pic; | ||
221 | } | ||
222 | 322 | ||
223 | /* do not mask any interrupts because of level */ | 323 | /* enable interrupt packets to be output */ |
224 | out_be32(spider_pics[node] + TIR_MSK, 0x0); | 324 | out_be32(pic->regs + TIR_PIEN, in_be32(pic->regs + TIR_PIEN) | 0x1); |
225 | 325 | ||
226 | /* disable edge detection clear */ | 326 | /* Hook up the cascade interrupt to the iic and nodeid */ |
227 | /* out_be32(spider_pics[node] + TIR_EDC, 0x0); */ | 327 | virq = spider_find_cascade_and_node(pic); |
328 | if (virq == NO_IRQ) | ||
329 | return; | ||
330 | set_irq_data(virq, pic); | ||
331 | set_irq_chained_handler(virq, spider_irq_cascade); | ||
228 | 332 | ||
229 | /* enable interrupt packets to be output */ | 333 | printk(KERN_INFO "spider_pic: node %d, addr: 0x%lx %s\n", |
230 | out_be32(spider_pics[node] + TIR_PIEN, | 334 | pic->node_id, addr, of_node->full_name); |
231 | in_be32(spider_pics[node] + TIR_PIEN) | 0x1); | ||
232 | 335 | ||
233 | /* Enable the interrupt detection enable bit. Do this last! */ | 336 | /* Enable the interrupt detection enable bit. Do this last! */ |
234 | out_be32(spider_pics[node] + TIR_DEN, | 337 | out_be32(pic->regs + TIR_DEN, in_be32(pic->regs + TIR_DEN) | 0x1); |
235 | in_be32(spider_pics[node] + TIR_DEN) | 0x1); | 338 | } |
236 | 339 | ||
237 | node++; | 340 | void __init spider_init_IRQ(void) |
341 | { | ||
342 | struct resource r; | ||
343 | struct device_node *dn; | ||
344 | int chip = 0; | ||
345 | |||
346 | /* XXX node numbers are totally bogus. We _hope_ we get the device | ||
347 | * nodes in the right order here but that's definitely not guaranteed, | ||
348 | * we need to get the node from the device tree instead. | ||
349 | * There is currently no proper property for it (but our whole | ||
350 | * device-tree is bogus anyway) so all we can do is pray or maybe test | ||
351 | * the address and deduce the node-id | ||
352 | */ | ||
353 | for (dn = NULL; | ||
354 | (dn = of_find_node_by_name(dn, "interrupt-controller"));) { | ||
355 | if (device_is_compatible(dn, "CBEA,platform-spider-pic")) { | ||
356 | if (of_address_to_resource(dn, 0, &r)) { | ||
357 | printk(KERN_WARNING "spider-pic: Failed\n"); | ||
358 | continue; | ||
359 | } | ||
360 | } else if (device_is_compatible(dn, "sti,platform-spider-pic") | ||
361 | && (chip < 2)) { | ||
362 | static long hard_coded_pics[] = | ||
363 | { 0x24000008000, 0x34000008000 }; | ||
364 | r.start = hard_coded_pics[chip]; | ||
365 | } else | ||
366 | continue; | ||
367 | spider_init_one(dn, chip++, r.start); | ||
238 | } | 368 | } |
239 | } | 369 | } |
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index 656c1ef5f4ad..5d2313a6c82b 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c | |||
@@ -264,51 +264,57 @@ spu_irq_class_2(int irq, void *data, struct pt_regs *regs) | |||
264 | return stat ? IRQ_HANDLED : IRQ_NONE; | 264 | return stat ? IRQ_HANDLED : IRQ_NONE; |
265 | } | 265 | } |
266 | 266 | ||
267 | static int | 267 | static int spu_request_irqs(struct spu *spu) |
268 | spu_request_irqs(struct spu *spu) | ||
269 | { | 268 | { |
270 | int ret; | 269 | int ret = 0; |
271 | int irq_base; | ||
272 | |||
273 | irq_base = IIC_NODE_STRIDE * spu->node + IIC_SPE_OFFSET; | ||
274 | |||
275 | snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0", spu->number); | ||
276 | ret = request_irq(irq_base + spu->isrc, | ||
277 | spu_irq_class_0, IRQF_DISABLED, spu->irq_c0, spu); | ||
278 | if (ret) | ||
279 | goto out; | ||
280 | |||
281 | snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1", spu->number); | ||
282 | ret = request_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, | ||
283 | spu_irq_class_1, IRQF_DISABLED, spu->irq_c1, spu); | ||
284 | if (ret) | ||
285 | goto out1; | ||
286 | 270 | ||
287 | snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2", spu->number); | 271 | if (spu->irqs[0] != NO_IRQ) { |
288 | ret = request_irq(irq_base + 2*IIC_CLASS_STRIDE + spu->isrc, | 272 | snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0", |
289 | spu_irq_class_2, IRQF_DISABLED, spu->irq_c2, spu); | 273 | spu->number); |
290 | if (ret) | 274 | ret = request_irq(spu->irqs[0], spu_irq_class_0, |
291 | goto out2; | 275 | IRQF_DISABLED, |
292 | goto out; | 276 | spu->irq_c0, spu); |
277 | if (ret) | ||
278 | goto bail0; | ||
279 | } | ||
280 | if (spu->irqs[1] != NO_IRQ) { | ||
281 | snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1", | ||
282 | spu->number); | ||
283 | ret = request_irq(spu->irqs[1], spu_irq_class_1, | ||
284 | IRQF_DISABLED, | ||
285 | spu->irq_c1, spu); | ||
286 | if (ret) | ||
287 | goto bail1; | ||
288 | } | ||
289 | if (spu->irqs[2] != NO_IRQ) { | ||
290 | snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2", | ||
291 | spu->number); | ||
292 | ret = request_irq(spu->irqs[2], spu_irq_class_2, | ||
293 | IRQF_DISABLED, | ||
294 | spu->irq_c2, spu); | ||
295 | if (ret) | ||
296 | goto bail2; | ||
297 | } | ||
298 | return 0; | ||
293 | 299 | ||
294 | out2: | 300 | bail2: |
295 | free_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, spu); | 301 | if (spu->irqs[1] != NO_IRQ) |
296 | out1: | 302 | free_irq(spu->irqs[1], spu); |
297 | free_irq(irq_base + spu->isrc, spu); | 303 | bail1: |
298 | out: | 304 | if (spu->irqs[0] != NO_IRQ) |
305 | free_irq(spu->irqs[0], spu); | ||
306 | bail0: | ||
299 | return ret; | 307 | return ret; |
300 | } | 308 | } |
301 | 309 | ||
302 | static void | 310 | static void spu_free_irqs(struct spu *spu) |
303 | spu_free_irqs(struct spu *spu) | ||
304 | { | 311 | { |
305 | int irq_base; | 312 | if (spu->irqs[0] != NO_IRQ) |
306 | 313 | free_irq(spu->irqs[0], spu); | |
307 | irq_base = IIC_NODE_STRIDE * spu->node + IIC_SPE_OFFSET; | 314 | if (spu->irqs[1] != NO_IRQ) |
308 | 315 | free_irq(spu->irqs[1], spu); | |
309 | free_irq(irq_base + spu->isrc, spu); | 316 | if (spu->irqs[2] != NO_IRQ) |
310 | free_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, spu); | 317 | free_irq(spu->irqs[2], spu); |
311 | free_irq(irq_base + 2*IIC_CLASS_STRIDE + spu->isrc, spu); | ||
312 | } | 318 | } |
313 | 319 | ||
314 | static LIST_HEAD(spu_list); | 320 | static LIST_HEAD(spu_list); |
@@ -559,17 +565,38 @@ static void spu_unmap(struct spu *spu) | |||
559 | iounmap((u8 __iomem *)spu->local_store); | 565 | iounmap((u8 __iomem *)spu->local_store); |
560 | } | 566 | } |
561 | 567 | ||
568 | /* This function shall be abstracted for HV platforms */ | ||
569 | static int __init spu_map_interrupts(struct spu *spu, struct device_node *np) | ||
570 | { | ||
571 | struct irq_host *host; | ||
572 | unsigned int isrc; | ||
573 | u32 *tmp; | ||
574 | |||
575 | host = iic_get_irq_host(spu->node); | ||
576 | if (host == NULL) | ||
577 | return -ENODEV; | ||
578 | |||
579 | /* Get the interrupt source from the device-tree */ | ||
580 | tmp = (u32 *)get_property(np, "isrc", NULL); | ||
581 | if (!tmp) | ||
582 | return -ENODEV; | ||
583 | spu->isrc = isrc = tmp[0]; | ||
584 | |||
585 | /* Now map interrupts of all 3 classes */ | ||
586 | spu->irqs[0] = irq_create_mapping(host, 0x00 | isrc, 0); | ||
587 | spu->irqs[1] = irq_create_mapping(host, 0x10 | isrc, 0); | ||
588 | spu->irqs[2] = irq_create_mapping(host, 0x20 | isrc, 0); | ||
589 | |||
590 | /* Right now, we only fail if class 2 failed */ | ||
591 | return spu->irqs[2] == NO_IRQ ? -EINVAL : 0; | ||
592 | } | ||
593 | |||
562 | static int __init spu_map_device(struct spu *spu, struct device_node *node) | 594 | static int __init spu_map_device(struct spu *spu, struct device_node *node) |
563 | { | 595 | { |
564 | char *prop; | 596 | char *prop; |
565 | int ret; | 597 | int ret; |
566 | 598 | ||
567 | ret = -ENODEV; | 599 | ret = -ENODEV; |
568 | prop = get_property(node, "isrc", NULL); | ||
569 | if (!prop) | ||
570 | goto out; | ||
571 | spu->isrc = *(unsigned int *)prop; | ||
572 | |||
573 | spu->name = get_property(node, "name", NULL); | 600 | spu->name = get_property(node, "name", NULL); |
574 | if (!spu->name) | 601 | if (!spu->name) |
575 | goto out; | 602 | goto out; |
@@ -636,7 +663,8 @@ static int spu_create_sysdev(struct spu *spu) | |||
636 | return ret; | 663 | return ret; |
637 | } | 664 | } |
638 | 665 | ||
639 | sysdev_create_file(&spu->sysdev, &attr_isrc); | 666 | if (spu->isrc != 0) |
667 | sysdev_create_file(&spu->sysdev, &attr_isrc); | ||
640 | sysfs_add_device_to_node(&spu->sysdev, spu->nid); | 668 | sysfs_add_device_to_node(&spu->sysdev, spu->nid); |
641 | 669 | ||
642 | return 0; | 670 | return 0; |
@@ -668,6 +696,9 @@ static int __init create_spu(struct device_node *spe) | |||
668 | spu->nid = of_node_to_nid(spe); | 696 | spu->nid = of_node_to_nid(spe); |
669 | if (spu->nid == -1) | 697 | if (spu->nid == -1) |
670 | spu->nid = 0; | 698 | spu->nid = 0; |
699 | ret = spu_map_interrupts(spu, spe); | ||
700 | if (ret) | ||
701 | goto out_unmap; | ||
671 | spin_lock_init(&spu->register_lock); | 702 | spin_lock_init(&spu->register_lock); |
672 | spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1)); | 703 | spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1)); |
673 | spu_mfc_sr1_set(spu, 0x33); | 704 | spu_mfc_sr1_set(spu, 0x33); |
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c index 66c253498803..6802cdc3168a 100644 --- a/arch/powerpc/platforms/chrp/pci.c +++ b/arch/powerpc/platforms/chrp/pci.c | |||
@@ -18,7 +18,6 @@ | |||
18 | #include <asm/machdep.h> | 18 | #include <asm/machdep.h> |
19 | #include <asm/sections.h> | 19 | #include <asm/sections.h> |
20 | #include <asm/pci-bridge.h> | 20 | #include <asm/pci-bridge.h> |
21 | #include <asm/open_pic.h> | ||
22 | #include <asm/grackle.h> | 21 | #include <asm/grackle.h> |
23 | #include <asm/rtas.h> | 22 | #include <asm/rtas.h> |
24 | 23 | ||
@@ -161,15 +160,9 @@ void __init | |||
161 | chrp_pcibios_fixup(void) | 160 | chrp_pcibios_fixup(void) |
162 | { | 161 | { |
163 | struct pci_dev *dev = NULL; | 162 | struct pci_dev *dev = NULL; |
164 | struct device_node *np; | ||
165 | 163 | ||
166 | /* PCI interrupts are controlled by the OpenPIC */ | 164 | for_each_pci_dev(dev) |
167 | for_each_pci_dev(dev) { | 165 | pci_read_irq_line(dev); |
168 | np = pci_device_to_OF_node(dev); | ||
169 | if ((np != 0) && (np->n_intrs > 0) && (np->intrs[0].line != 0)) | ||
170 | dev->irq = np->intrs[0].line; | ||
171 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); | ||
172 | } | ||
173 | } | 166 | } |
174 | 167 | ||
175 | #define PRG_CL_RESET_VALID 0x00010000 | 168 | #define PRG_CL_RESET_VALID 0x00010000 |
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c index 1f1771b212b4..bb10171132fa 100644 --- a/arch/powerpc/platforms/chrp/setup.c +++ b/arch/powerpc/platforms/chrp/setup.c | |||
@@ -59,7 +59,7 @@ void rtas_indicator_progress(char *, unsigned short); | |||
59 | int _chrp_type; | 59 | int _chrp_type; |
60 | EXPORT_SYMBOL(_chrp_type); | 60 | EXPORT_SYMBOL(_chrp_type); |
61 | 61 | ||
62 | struct mpic *chrp_mpic; | 62 | static struct mpic *chrp_mpic; |
63 | 63 | ||
64 | /* Used for doing CHRP event-scans */ | 64 | /* Used for doing CHRP event-scans */ |
65 | DEFINE_PER_CPU(struct timer_list, heartbeat_timer); | 65 | DEFINE_PER_CPU(struct timer_list, heartbeat_timer); |
@@ -315,24 +315,32 @@ chrp_event_scan(unsigned long unused) | |||
315 | jiffies + event_scan_interval); | 315 | jiffies + event_scan_interval); |
316 | } | 316 | } |
317 | 317 | ||
318 | static void chrp_8259_cascade(unsigned int irq, struct irq_desc *desc, | ||
319 | struct pt_regs *regs) | ||
320 | { | ||
321 | unsigned int cascade_irq = i8259_irq(regs); | ||
322 | if (cascade_irq != NO_IRQ) | ||
323 | generic_handle_irq(cascade_irq, regs); | ||
324 | desc->chip->eoi(irq); | ||
325 | } | ||
326 | |||
318 | /* | 327 | /* |
319 | * Finds the open-pic node and sets up the mpic driver. | 328 | * Finds the open-pic node and sets up the mpic driver. |
320 | */ | 329 | */ |
321 | static void __init chrp_find_openpic(void) | 330 | static void __init chrp_find_openpic(void) |
322 | { | 331 | { |
323 | struct device_node *np, *root; | 332 | struct device_node *np, *root; |
324 | int len, i, j, irq_count; | 333 | int len, i, j; |
325 | int isu_size, idu_size; | 334 | int isu_size, idu_size; |
326 | unsigned int *iranges, *opprop = NULL; | 335 | unsigned int *iranges, *opprop = NULL; |
327 | int oplen = 0; | 336 | int oplen = 0; |
328 | unsigned long opaddr; | 337 | unsigned long opaddr; |
329 | int na = 1; | 338 | int na = 1; |
330 | unsigned char init_senses[NR_IRQS - NUM_8259_INTERRUPTS]; | ||
331 | 339 | ||
332 | np = find_type_devices("open-pic"); | 340 | np = of_find_node_by_type(NULL, "open-pic"); |
333 | if (np == NULL) | 341 | if (np == NULL) |
334 | return; | 342 | return; |
335 | root = find_path_device("/"); | 343 | root = of_find_node_by_path("/"); |
336 | if (root) { | 344 | if (root) { |
337 | opprop = (unsigned int *) get_property | 345 | opprop = (unsigned int *) get_property |
338 | (root, "platform-open-pic", &oplen); | 346 | (root, "platform-open-pic", &oplen); |
@@ -343,19 +351,15 @@ static void __init chrp_find_openpic(void) | |||
343 | oplen /= na * sizeof(unsigned int); | 351 | oplen /= na * sizeof(unsigned int); |
344 | } else { | 352 | } else { |
345 | struct resource r; | 353 | struct resource r; |
346 | if (of_address_to_resource(np, 0, &r)) | 354 | if (of_address_to_resource(np, 0, &r)) { |
347 | return; | 355 | goto bail; |
356 | } | ||
348 | opaddr = r.start; | 357 | opaddr = r.start; |
349 | oplen = 0; | 358 | oplen = 0; |
350 | } | 359 | } |
351 | 360 | ||
352 | printk(KERN_INFO "OpenPIC at %lx\n", opaddr); | 361 | printk(KERN_INFO "OpenPIC at %lx\n", opaddr); |
353 | 362 | ||
354 | irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */ | ||
355 | prom_get_irq_senses(init_senses, NUM_ISA_INTERRUPTS, NR_IRQS - 4); | ||
356 | /* i8259 cascade is always positive level */ | ||
357 | init_senses[0] = IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE; | ||
358 | |||
359 | iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len); | 363 | iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len); |
360 | if (iranges == NULL) | 364 | if (iranges == NULL) |
361 | len = 0; /* non-distributed mpic */ | 365 | len = 0; /* non-distributed mpic */ |
@@ -382,15 +386,12 @@ static void __init chrp_find_openpic(void) | |||
382 | if (len > 1) | 386 | if (len > 1) |
383 | isu_size = iranges[3]; | 387 | isu_size = iranges[3]; |
384 | 388 | ||
385 | chrp_mpic = mpic_alloc(opaddr, MPIC_PRIMARY, | 389 | chrp_mpic = mpic_alloc(np, opaddr, MPIC_PRIMARY, |
386 | isu_size, NUM_ISA_INTERRUPTS, irq_count, | 390 | isu_size, 0, " MPIC "); |
387 | NR_IRQS - 4, init_senses, irq_count, | ||
388 | " MPIC "); | ||
389 | if (chrp_mpic == NULL) { | 391 | if (chrp_mpic == NULL) { |
390 | printk(KERN_ERR "Failed to allocate MPIC structure\n"); | 392 | printk(KERN_ERR "Failed to allocate MPIC structure\n"); |
391 | return; | 393 | goto bail; |
392 | } | 394 | } |
393 | |||
394 | j = na - 1; | 395 | j = na - 1; |
395 | for (i = 1; i < len; ++i) { | 396 | for (i = 1; i < len; ++i) { |
396 | iranges += 2; | 397 | iranges += 2; |
@@ -402,7 +403,10 @@ static void __init chrp_find_openpic(void) | |||
402 | } | 403 | } |
403 | 404 | ||
404 | mpic_init(chrp_mpic); | 405 | mpic_init(chrp_mpic); |
405 | mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL); | 406 | ppc_md.get_irq = mpic_get_irq; |
407 | bail: | ||
408 | of_node_put(root); | ||
409 | of_node_put(np); | ||
406 | } | 410 | } |
407 | 411 | ||
408 | #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON) | 412 | #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON) |
@@ -413,14 +417,34 @@ static struct irqaction xmon_irqaction = { | |||
413 | }; | 417 | }; |
414 | #endif | 418 | #endif |
415 | 419 | ||
416 | void __init chrp_init_IRQ(void) | 420 | static void __init chrp_find_8259(void) |
417 | { | 421 | { |
418 | struct device_node *np; | 422 | struct device_node *np, *pic = NULL; |
419 | unsigned long chrp_int_ack = 0; | 423 | unsigned long chrp_int_ack = 0; |
420 | #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON) | 424 | unsigned int cascade_irq; |
421 | struct device_node *kbd; | 425 | |
422 | #endif | 426 | /* Look for cascade */ |
427 | for_each_node_by_type(np, "interrupt-controller") | ||
428 | if (device_is_compatible(np, "chrp,iic")) { | ||
429 | pic = np; | ||
430 | break; | ||
431 | } | ||
432 | /* Ok, 8259 wasn't found. We need to handle the case where | ||
433 | * we have a pegasos that claims to be chrp but doesn't have | ||
434 | * a proper interrupt tree | ||
435 | */ | ||
436 | if (pic == NULL && chrp_mpic != NULL) { | ||
437 | printk(KERN_ERR "i8259: Not found in device-tree" | ||
438 | " assuming no legacy interrupts\n"); | ||
439 | return; | ||
440 | } | ||
423 | 441 | ||
442 | /* Look for intack. In a perfect world, we would look for it on | ||
443 | * the ISA bus that holds the 8259 but heh... Works that way. If | ||
444 | * we ever see a problem, we can try to re-use the pSeries code here. | ||
445 | * Also, Pegasos-type platforms don't have a proper node to start | ||
446 | * from anyway | ||
447 | */ | ||
424 | for (np = find_devices("pci"); np != NULL; np = np->next) { | 448 | for (np = find_devices("pci"); np != NULL; np = np->next) { |
425 | unsigned int *addrp = (unsigned int *) | 449 | unsigned int *addrp = (unsigned int *) |
426 | get_property(np, "8259-interrupt-acknowledge", NULL); | 450 | get_property(np, "8259-interrupt-acknowledge", NULL); |
@@ -431,11 +455,29 @@ void __init chrp_init_IRQ(void) | |||
431 | break; | 455 | break; |
432 | } | 456 | } |
433 | if (np == NULL) | 457 | if (np == NULL) |
434 | printk(KERN_ERR "Cannot find PCI interrupt acknowledge address\n"); | 458 | printk(KERN_WARNING "Cannot find PCI interrupt acknowledge" |
459 | " address, polling\n"); | ||
460 | |||
461 | i8259_init(pic, chrp_int_ack); | ||
462 | if (ppc_md.get_irq == NULL) | ||
463 | ppc_md.get_irq = i8259_irq; | ||
464 | if (chrp_mpic != NULL) { | ||
465 | cascade_irq = irq_of_parse_and_map(pic, 0); | ||
466 | if (cascade_irq == NO_IRQ) | ||
467 | printk(KERN_ERR "i8259: failed to map cascade irq\n"); | ||
468 | else | ||
469 | set_irq_chained_handler(cascade_irq, | ||
470 | chrp_8259_cascade); | ||
471 | } | ||
472 | } | ||
435 | 473 | ||
474 | void __init chrp_init_IRQ(void) | ||
475 | { | ||
476 | #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON) | ||
477 | struct device_node *kbd; | ||
478 | #endif | ||
436 | chrp_find_openpic(); | 479 | chrp_find_openpic(); |
437 | 480 | chrp_find_8259(); | |
438 | i8259_init(chrp_int_ack, 0); | ||
439 | 481 | ||
440 | if (_chrp_type == _CHRP_Pegasos) | 482 | if (_chrp_type == _CHRP_Pegasos) |
441 | ppc_md.get_irq = i8259_irq; | 483 | ppc_md.get_irq = i8259_irq; |
@@ -520,10 +562,6 @@ static int __init chrp_probe(void) | |||
520 | DMA_MODE_READ = 0x44; | 562 | DMA_MODE_READ = 0x44; |
521 | DMA_MODE_WRITE = 0x48; | 563 | DMA_MODE_WRITE = 0x48; |
522 | isa_io_base = CHRP_ISA_IO_BASE; /* default value */ | 564 | isa_io_base = CHRP_ISA_IO_BASE; /* default value */ |
523 | ppc_do_canonicalize_irqs = 1; | ||
524 | |||
525 | /* Assume we have an 8259... */ | ||
526 | __irq_offset_value = NUM_ISA_INTERRUPTS; | ||
527 | 565 | ||
528 | return 1; | 566 | return 1; |
529 | } | 567 | } |
@@ -535,7 +573,6 @@ define_machine(chrp) { | |||
535 | .init = chrp_init2, | 573 | .init = chrp_init2, |
536 | .show_cpuinfo = chrp_show_cpuinfo, | 574 | .show_cpuinfo = chrp_show_cpuinfo, |
537 | .init_IRQ = chrp_init_IRQ, | 575 | .init_IRQ = chrp_init_IRQ, |
538 | .get_irq = mpic_get_irq, | ||
539 | .pcibios_fixup = chrp_pcibios_fixup, | 576 | .pcibios_fixup = chrp_pcibios_fixup, |
540 | .restart = rtas_restart, | 577 | .restart = rtas_restart, |
541 | .power_off = rtas_power_off, | 578 | .power_off = rtas_power_off, |
diff --git a/arch/powerpc/platforms/chrp/smp.c b/arch/powerpc/platforms/chrp/smp.c index c298ca1ea680..1d2307e87c30 100644 --- a/arch/powerpc/platforms/chrp/smp.c +++ b/arch/powerpc/platforms/chrp/smp.c | |||
@@ -29,7 +29,6 @@ | |||
29 | #include <asm/smp.h> | 29 | #include <asm/smp.h> |
30 | #include <asm/residual.h> | 30 | #include <asm/residual.h> |
31 | #include <asm/time.h> | 31 | #include <asm/time.h> |
32 | #include <asm/open_pic.h> | ||
33 | #include <asm/machdep.h> | 32 | #include <asm/machdep.h> |
34 | #include <asm/smp.h> | 33 | #include <asm/smp.h> |
35 | #include <asm/mpic.h> | 34 | #include <asm/mpic.h> |
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c index f70e820e7304..2275e64f3152 100644 --- a/arch/powerpc/platforms/iseries/irq.c +++ b/arch/powerpc/platforms/iseries/irq.c | |||
@@ -162,27 +162,6 @@ static void pci_event_handler(struct HvLpEvent *event, struct pt_regs *regs) | |||
162 | printk(KERN_ERR "pci_event_handler: NULL event received\n"); | 162 | printk(KERN_ERR "pci_event_handler: NULL event received\n"); |
163 | } | 163 | } |
164 | 164 | ||
165 | /* | ||
166 | * This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c | ||
167 | * It must be called before the bus walk. | ||
168 | */ | ||
169 | void __init iSeries_init_IRQ(void) | ||
170 | { | ||
171 | /* Register PCI event handler and open an event path */ | ||
172 | int ret; | ||
173 | |||
174 | ret = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo, | ||
175 | &pci_event_handler); | ||
176 | if (ret == 0) { | ||
177 | ret = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0); | ||
178 | if (ret != 0) | ||
179 | printk(KERN_ERR "iseries_init_IRQ: open event path " | ||
180 | "failed with rc 0x%x\n", ret); | ||
181 | } else | ||
182 | printk(KERN_ERR "iseries_init_IRQ: register handler " | ||
183 | "failed with rc 0x%x\n", ret); | ||
184 | } | ||
185 | |||
186 | #define REAL_IRQ_TO_SUBBUS(irq) (((irq) >> 14) & 0xff) | 165 | #define REAL_IRQ_TO_SUBBUS(irq) (((irq) >> 14) & 0xff) |
187 | #define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1) | 166 | #define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1) |
188 | #define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1) | 167 | #define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1) |
@@ -196,7 +175,7 @@ static void iseries_enable_IRQ(unsigned int irq) | |||
196 | { | 175 | { |
197 | u32 bus, dev_id, function, mask; | 176 | u32 bus, dev_id, function, mask; |
198 | const u32 sub_bus = 0; | 177 | const u32 sub_bus = 0; |
199 | unsigned int rirq = virt_irq_to_real_map[irq]; | 178 | unsigned int rirq = (unsigned int)irq_map[irq].hwirq; |
200 | 179 | ||
201 | /* The IRQ has already been locked by the caller */ | 180 | /* The IRQ has already been locked by the caller */ |
202 | bus = REAL_IRQ_TO_BUS(rirq); | 181 | bus = REAL_IRQ_TO_BUS(rirq); |
@@ -213,7 +192,7 @@ static unsigned int iseries_startup_IRQ(unsigned int irq) | |||
213 | { | 192 | { |
214 | u32 bus, dev_id, function, mask; | 193 | u32 bus, dev_id, function, mask; |
215 | const u32 sub_bus = 0; | 194 | const u32 sub_bus = 0; |
216 | unsigned int rirq = virt_irq_to_real_map[irq]; | 195 | unsigned int rirq = (unsigned int)irq_map[irq].hwirq; |
217 | 196 | ||
218 | bus = REAL_IRQ_TO_BUS(rirq); | 197 | bus = REAL_IRQ_TO_BUS(rirq); |
219 | function = REAL_IRQ_TO_FUNC(rirq); | 198 | function = REAL_IRQ_TO_FUNC(rirq); |
@@ -254,7 +233,7 @@ static void iseries_shutdown_IRQ(unsigned int irq) | |||
254 | { | 233 | { |
255 | u32 bus, dev_id, function, mask; | 234 | u32 bus, dev_id, function, mask; |
256 | const u32 sub_bus = 0; | 235 | const u32 sub_bus = 0; |
257 | unsigned int rirq = virt_irq_to_real_map[irq]; | 236 | unsigned int rirq = (unsigned int)irq_map[irq].hwirq; |
258 | 237 | ||
259 | /* irq should be locked by the caller */ | 238 | /* irq should be locked by the caller */ |
260 | bus = REAL_IRQ_TO_BUS(rirq); | 239 | bus = REAL_IRQ_TO_BUS(rirq); |
@@ -277,7 +256,7 @@ static void iseries_disable_IRQ(unsigned int irq) | |||
277 | { | 256 | { |
278 | u32 bus, dev_id, function, mask; | 257 | u32 bus, dev_id, function, mask; |
279 | const u32 sub_bus = 0; | 258 | const u32 sub_bus = 0; |
280 | unsigned int rirq = virt_irq_to_real_map[irq]; | 259 | unsigned int rirq = (unsigned int)irq_map[irq].hwirq; |
281 | 260 | ||
282 | /* The IRQ has already been locked by the caller */ | 261 | /* The IRQ has already been locked by the caller */ |
283 | bus = REAL_IRQ_TO_BUS(rirq); | 262 | bus = REAL_IRQ_TO_BUS(rirq); |
@@ -291,19 +270,19 @@ static void iseries_disable_IRQ(unsigned int irq) | |||
291 | 270 | ||
292 | static void iseries_end_IRQ(unsigned int irq) | 271 | static void iseries_end_IRQ(unsigned int irq) |
293 | { | 272 | { |
294 | unsigned int rirq = virt_irq_to_real_map[irq]; | 273 | unsigned int rirq = (unsigned int)irq_map[irq].hwirq; |
295 | 274 | ||
296 | HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq), | 275 | HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq), |
297 | (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq)); | 276 | (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq)); |
298 | } | 277 | } |
299 | 278 | ||
300 | static hw_irq_controller iSeries_IRQ_handler = { | 279 | static struct irq_chip iseries_pic = { |
301 | .typename = "iSeries irq controller", | 280 | .typename = "iSeries irq controller", |
302 | .startup = iseries_startup_IRQ, | 281 | .startup = iseries_startup_IRQ, |
303 | .shutdown = iseries_shutdown_IRQ, | 282 | .shutdown = iseries_shutdown_IRQ, |
304 | .enable = iseries_enable_IRQ, | 283 | .unmask = iseries_enable_IRQ, |
305 | .disable = iseries_disable_IRQ, | 284 | .mask = iseries_disable_IRQ, |
306 | .end = iseries_end_IRQ | 285 | .eoi = iseries_end_IRQ |
307 | }; | 286 | }; |
308 | 287 | ||
309 | /* | 288 | /* |
@@ -314,17 +293,14 @@ static hw_irq_controller iSeries_IRQ_handler = { | |||
314 | int __init iSeries_allocate_IRQ(HvBusNumber bus, | 293 | int __init iSeries_allocate_IRQ(HvBusNumber bus, |
315 | HvSubBusNumber sub_bus, u32 bsubbus) | 294 | HvSubBusNumber sub_bus, u32 bsubbus) |
316 | { | 295 | { |
317 | int virtirq; | ||
318 | unsigned int realirq; | 296 | unsigned int realirq; |
319 | u8 idsel = ISERIES_GET_DEVICE_FROM_SUBBUS(bsubbus); | 297 | u8 idsel = ISERIES_GET_DEVICE_FROM_SUBBUS(bsubbus); |
320 | u8 function = ISERIES_GET_FUNCTION_FROM_SUBBUS(bsubbus); | 298 | u8 function = ISERIES_GET_FUNCTION_FROM_SUBBUS(bsubbus); |
321 | 299 | ||
322 | realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3) | 300 | realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3) |
323 | + function; | 301 | + function; |
324 | virtirq = virt_irq_create_mapping(realirq); | ||
325 | 302 | ||
326 | irq_desc[virtirq].chip = &iSeries_IRQ_handler; | 303 | return irq_create_mapping(NULL, realirq, IRQ_TYPE_NONE); |
327 | return virtirq; | ||
328 | } | 304 | } |
329 | 305 | ||
330 | #endif /* CONFIG_PCI */ | 306 | #endif /* CONFIG_PCI */ |
@@ -332,10 +308,9 @@ int __init iSeries_allocate_IRQ(HvBusNumber bus, | |||
332 | /* | 308 | /* |
333 | * Get the next pending IRQ. | 309 | * Get the next pending IRQ. |
334 | */ | 310 | */ |
335 | int iSeries_get_irq(struct pt_regs *regs) | 311 | unsigned int iSeries_get_irq(struct pt_regs *regs) |
336 | { | 312 | { |
337 | /* -2 means ignore this interrupt */ | 313 | int irq = NO_IRQ_IGNORE; |
338 | int irq = -2; | ||
339 | 314 | ||
340 | #ifdef CONFIG_SMP | 315 | #ifdef CONFIG_SMP |
341 | if (get_lppaca()->int_dword.fields.ipi_cnt) { | 316 | if (get_lppaca()->int_dword.fields.ipi_cnt) { |
@@ -358,9 +333,57 @@ int iSeries_get_irq(struct pt_regs *regs) | |||
358 | } | 333 | } |
359 | spin_unlock(&pending_irqs_lock); | 334 | spin_unlock(&pending_irqs_lock); |
360 | if (irq >= NR_IRQS) | 335 | if (irq >= NR_IRQS) |
361 | irq = -2; | 336 | irq = NO_IRQ_IGNORE; |
362 | } | 337 | } |
363 | #endif | 338 | #endif |
364 | 339 | ||
365 | return irq; | 340 | return irq; |
366 | } | 341 | } |
342 | |||
343 | static int iseries_irq_host_map(struct irq_host *h, unsigned int virq, | ||
344 | irq_hw_number_t hw, unsigned int flags) | ||
345 | { | ||
346 | set_irq_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq); | ||
347 | |||
348 | return 0; | ||
349 | } | ||
350 | |||
351 | static struct irq_host_ops iseries_irq_host_ops = { | ||
352 | .map = iseries_irq_host_map, | ||
353 | }; | ||
354 | |||
355 | /* | ||
356 | * This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c | ||
357 | * It must be called before the bus walk. | ||
358 | */ | ||
359 | void __init iSeries_init_IRQ(void) | ||
360 | { | ||
361 | /* Register PCI event handler and open an event path */ | ||
362 | struct irq_host *host; | ||
363 | int ret; | ||
364 | |||
365 | /* | ||
366 | * The Hypervisor only allows us up to 256 interrupt | ||
367 | * sources (the irq number is passed in a u8). | ||
368 | */ | ||
369 | irq_set_virq_count(256); | ||
370 | |||
371 | /* Create irq host. No need for a revmap since HV will give us | ||
372 | * back our virtual irq number | ||
373 | */ | ||
374 | host = irq_alloc_host(IRQ_HOST_MAP_NOMAP, 0, &iseries_irq_host_ops, 0); | ||
375 | BUG_ON(host == NULL); | ||
376 | irq_set_default_host(host); | ||
377 | |||
378 | ret = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo, | ||
379 | &pci_event_handler); | ||
380 | if (ret == 0) { | ||
381 | ret = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0); | ||
382 | if (ret != 0) | ||
383 | printk(KERN_ERR "iseries_init_IRQ: open event path " | ||
384 | "failed with rc 0x%x\n", ret); | ||
385 | } else | ||
386 | printk(KERN_ERR "iseries_init_IRQ: register handler " | ||
387 | "failed with rc 0x%x\n", ret); | ||
388 | } | ||
389 | |||
diff --git a/arch/powerpc/platforms/iseries/irq.h b/arch/powerpc/platforms/iseries/irq.h index 188aa808abd7..1ee8985140e5 100644 --- a/arch/powerpc/platforms/iseries/irq.h +++ b/arch/powerpc/platforms/iseries/irq.h | |||
@@ -4,6 +4,6 @@ | |||
4 | extern void iSeries_init_IRQ(void); | 4 | extern void iSeries_init_IRQ(void); |
5 | extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, u32); | 5 | extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, u32); |
6 | extern void iSeries_activate_IRQs(void); | 6 | extern void iSeries_activate_IRQs(void); |
7 | extern int iSeries_get_irq(struct pt_regs *); | 7 | extern unsigned int iSeries_get_irq(struct pt_regs *); |
8 | 8 | ||
9 | #endif /* _ISERIES_IRQ_H */ | 9 | #endif /* _ISERIES_IRQ_H */ |
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c index c877074745b2..c9605d773a77 100644 --- a/arch/powerpc/platforms/iseries/setup.c +++ b/arch/powerpc/platforms/iseries/setup.c | |||
@@ -294,8 +294,6 @@ static void __init iSeries_init_early(void) | |||
294 | { | 294 | { |
295 | DBG(" -> iSeries_init_early()\n"); | 295 | DBG(" -> iSeries_init_early()\n"); |
296 | 296 | ||
297 | ppc64_interrupt_controller = IC_ISERIES; | ||
298 | |||
299 | #if defined(CONFIG_BLK_DEV_INITRD) | 297 | #if defined(CONFIG_BLK_DEV_INITRD) |
300 | /* | 298 | /* |
301 | * If the init RAM disk has been configured and there is | 299 | * If the init RAM disk has been configured and there is |
@@ -659,12 +657,6 @@ static int __init iseries_probe(void) | |||
659 | powerpc_firmware_features |= FW_FEATURE_ISERIES; | 657 | powerpc_firmware_features |= FW_FEATURE_ISERIES; |
660 | powerpc_firmware_features |= FW_FEATURE_LPAR; | 658 | powerpc_firmware_features |= FW_FEATURE_LPAR; |
661 | 659 | ||
662 | /* | ||
663 | * The Hypervisor only allows us up to 256 interrupt | ||
664 | * sources (the irq number is passed in a u8). | ||
665 | */ | ||
666 | virt_irq_max = 255; | ||
667 | |||
668 | hpte_init_iSeries(); | 660 | hpte_init_iSeries(); |
669 | 661 | ||
670 | return 1; | 662 | return 1; |
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c index f7170ff86dab..63a1670d3bfd 100644 --- a/arch/powerpc/platforms/maple/pci.c +++ b/arch/powerpc/platforms/maple/pci.c | |||
@@ -443,18 +443,23 @@ void __init maple_pci_init(void) | |||
443 | int maple_pci_get_legacy_ide_irq(struct pci_dev *pdev, int channel) | 443 | int maple_pci_get_legacy_ide_irq(struct pci_dev *pdev, int channel) |
444 | { | 444 | { |
445 | struct device_node *np; | 445 | struct device_node *np; |
446 | int irq = channel ? 15 : 14; | 446 | unsigned int defirq = channel ? 15 : 14; |
447 | unsigned int irq; | ||
447 | 448 | ||
448 | if (pdev->vendor != PCI_VENDOR_ID_AMD || | 449 | if (pdev->vendor != PCI_VENDOR_ID_AMD || |
449 | pdev->device != PCI_DEVICE_ID_AMD_8111_IDE) | 450 | pdev->device != PCI_DEVICE_ID_AMD_8111_IDE) |
450 | return irq; | 451 | return defirq; |
451 | 452 | ||
452 | np = pci_device_to_OF_node(pdev); | 453 | np = pci_device_to_OF_node(pdev); |
453 | if (np == NULL) | 454 | if (np == NULL) |
454 | return irq; | 455 | return defirq; |
455 | if (np->n_intrs < 2) | 456 | irq = irq_of_parse_and_map(np, channel & 0x1); |
456 | return irq; | 457 | if (irq == NO_IRQ) { |
457 | return np->intrs[channel & 0x1].line; | 458 | printk("Failed to map onboard IDE interrupt for channel %d\n", |
459 | channel); | ||
460 | return defirq; | ||
461 | } | ||
462 | return irq; | ||
458 | } | 463 | } |
459 | 464 | ||
460 | /* XXX: To remove once all firmwares are ok */ | 465 | /* XXX: To remove once all firmwares are ok */ |
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c index 5cf90c28b141..cb528c9de4c3 100644 --- a/arch/powerpc/platforms/maple/setup.c +++ b/arch/powerpc/platforms/maple/setup.c | |||
@@ -11,7 +11,7 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #define DEBUG | 14 | #undef DEBUG |
15 | 15 | ||
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/errno.h> | 17 | #include <linux/errno.h> |
@@ -198,50 +198,81 @@ static void __init maple_init_early(void) | |||
198 | { | 198 | { |
199 | DBG(" -> maple_init_early\n"); | 199 | DBG(" -> maple_init_early\n"); |
200 | 200 | ||
201 | /* Setup interrupt mapping options */ | ||
202 | ppc64_interrupt_controller = IC_OPEN_PIC; | ||
203 | |||
204 | iommu_init_early_dart(); | 201 | iommu_init_early_dart(); |
205 | 202 | ||
206 | DBG(" <- maple_init_early\n"); | 203 | DBG(" <- maple_init_early\n"); |
207 | } | 204 | } |
208 | 205 | ||
209 | 206 | /* | |
210 | static __init void maple_init_IRQ(void) | 207 | * This is almost identical to pSeries and CHRP. We need to make that |
208 | * code generic at one point, with appropriate bits in the device-tree to | ||
209 | * identify the presence of an HT APIC | ||
210 | */ | ||
211 | static void __init maple_init_IRQ(void) | ||
211 | { | 212 | { |
212 | struct device_node *root; | 213 | struct device_node *root, *np, *mpic_node = NULL; |
213 | unsigned int *opprop; | 214 | unsigned int *opprop; |
214 | unsigned long opic_addr; | 215 | unsigned long openpic_addr = 0; |
216 | int naddr, n, i, opplen, has_isus = 0; | ||
215 | struct mpic *mpic; | 217 | struct mpic *mpic; |
216 | unsigned char senses[128]; | 218 | unsigned int flags = MPIC_PRIMARY; |
217 | int n; | ||
218 | 219 | ||
219 | DBG(" -> maple_init_IRQ\n"); | 220 | /* Locate MPIC in the device-tree. Note that there is a bug |
221 | * in Maple device-tree where the type of the controller is | ||
222 | * open-pic and not interrupt-controller | ||
223 | */ | ||
224 | for_each_node_by_type(np, "open-pic") { | ||
225 | mpic_node = np; | ||
226 | break; | ||
227 | } | ||
228 | if (mpic_node == NULL) { | ||
229 | printk(KERN_ERR | ||
230 | "Failed to locate the MPIC interrupt controller\n"); | ||
231 | return; | ||
232 | } | ||
220 | 233 | ||
221 | /* XXX: Non standard, replace that with a proper openpic/mpic node | 234 | /* Find address list in /platform-open-pic */ |
222 | * in the device-tree. Find the Open PIC if present */ | ||
223 | root = of_find_node_by_path("/"); | 235 | root = of_find_node_by_path("/"); |
224 | opprop = (unsigned int *) get_property(root, | 236 | naddr = prom_n_addr_cells(root); |
225 | "platform-open-pic", NULL); | 237 | opprop = (unsigned int *) get_property(root, "platform-open-pic", |
226 | if (opprop == 0) | 238 | &opplen); |
227 | panic("OpenPIC not found !\n"); | 239 | if (opprop != 0) { |
228 | 240 | openpic_addr = of_read_number(opprop, naddr); | |
229 | n = prom_n_addr_cells(root); | 241 | has_isus = (opplen > naddr); |
230 | for (opic_addr = 0; n > 0; --n) | 242 | printk(KERN_DEBUG "OpenPIC addr: %lx, has ISUs: %d\n", |
231 | opic_addr = (opic_addr << 32) + *opprop++; | 243 | openpic_addr, has_isus); |
244 | } | ||
232 | of_node_put(root); | 245 | of_node_put(root); |
233 | 246 | ||
234 | /* Obtain sense values from device-tree */ | 247 | BUG_ON(openpic_addr == 0); |
235 | prom_get_irq_senses(senses, 0, 128); | 248 | |
249 | /* Check for a big endian MPIC */ | ||
250 | if (get_property(np, "big-endian", NULL) != NULL) | ||
251 | flags |= MPIC_BIG_ENDIAN; | ||
236 | 252 | ||
237 | mpic = mpic_alloc(opic_addr, | 253 | /* XXX Maple specific bits */ |
238 | MPIC_PRIMARY | MPIC_BIG_ENDIAN | | 254 | flags |= MPIC_BROKEN_U3 | MPIC_WANTS_RESET; |
239 | MPIC_BROKEN_U3 | MPIC_WANTS_RESET, | 255 | |
240 | 0, 0, 128, 128, senses, 128, "U3-MPIC"); | 256 | /* Setup the openpic driver. More device-tree junks, we hard code no |
257 | * ISUs for now. I'll have to revisit some stuffs with the folks doing | ||
258 | * the firmware for those | ||
259 | */ | ||
260 | mpic = mpic_alloc(mpic_node, openpic_addr, flags, | ||
261 | /*has_isus ? 16 :*/ 0, 0, " MPIC "); | ||
241 | BUG_ON(mpic == NULL); | 262 | BUG_ON(mpic == NULL); |
242 | mpic_init(mpic); | ||
243 | 263 | ||
244 | DBG(" <- maple_init_IRQ\n"); | 264 | /* Add ISUs */ |
265 | opplen /= sizeof(u32); | ||
266 | for (n = 0, i = naddr; i < opplen; i += naddr, n++) { | ||
267 | unsigned long isuaddr = of_read_number(opprop + i, naddr); | ||
268 | mpic_assign_isu(mpic, n, isuaddr); | ||
269 | } | ||
270 | |||
271 | /* All ISUs are setup, complete initialization */ | ||
272 | mpic_init(mpic); | ||
273 | ppc_md.get_irq = mpic_get_irq; | ||
274 | of_node_put(mpic_node); | ||
275 | of_node_put(root); | ||
245 | } | 276 | } |
246 | 277 | ||
247 | static void __init maple_progress(char *s, unsigned short hex) | 278 | static void __init maple_progress(char *s, unsigned short hex) |
@@ -256,7 +287,9 @@ static void __init maple_progress(char *s, unsigned short hex) | |||
256 | static int __init maple_probe(void) | 287 | static int __init maple_probe(void) |
257 | { | 288 | { |
258 | unsigned long root = of_get_flat_dt_root(); | 289 | unsigned long root = of_get_flat_dt_root(); |
259 | if (!of_flat_dt_is_compatible(root, "Momentum,Maple")) | 290 | |
291 | if (!of_flat_dt_is_compatible(root, "Momentum,Maple") && | ||
292 | !of_flat_dt_is_compatible(root, "Momentum,Apache")) | ||
260 | return 0; | 293 | return 0; |
261 | /* | 294 | /* |
262 | * On U3, the DART (iommu) must be allocated now since it | 295 | * On U3, the DART (iommu) must be allocated now since it |
@@ -277,7 +310,6 @@ define_machine(maple_md) { | |||
277 | .setup_arch = maple_setup_arch, | 310 | .setup_arch = maple_setup_arch, |
278 | .init_early = maple_init_early, | 311 | .init_early = maple_init_early, |
279 | .init_IRQ = maple_init_IRQ, | 312 | .init_IRQ = maple_init_IRQ, |
280 | .get_irq = mpic_get_irq, | ||
281 | .pcibios_fixup = maple_pcibios_fixup, | 313 | .pcibios_fixup = maple_pcibios_fixup, |
282 | .pci_get_legacy_ide_irq = maple_pci_get_legacy_ide_irq, | 314 | .pci_get_legacy_ide_irq = maple_pci_get_legacy_ide_irq, |
283 | .restart = maple_restart, | 315 | .restart = maple_restart, |
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c index cb257aeb91f6..e63d52f227ee 100644 --- a/arch/powerpc/platforms/powermac/bootx_init.c +++ b/arch/powerpc/platforms/powermac/bootx_init.c | |||
@@ -162,6 +162,8 @@ static void __init bootx_add_chosen_props(unsigned long base, | |||
162 | { | 162 | { |
163 | u32 val; | 163 | u32 val; |
164 | 164 | ||
165 | bootx_dt_add_prop("linux,bootx", NULL, 0, mem_end); | ||
166 | |||
165 | if (bootx_info->kernelParamsOffset) { | 167 | if (bootx_info->kernelParamsOffset) { |
166 | char *args = (char *)((unsigned long)bootx_info) + | 168 | char *args = (char *)((unsigned long)bootx_info) + |
167 | bootx_info->kernelParamsOffset; | 169 | bootx_info->kernelParamsOffset; |
@@ -181,8 +183,25 @@ static void __init bootx_add_chosen_props(unsigned long base, | |||
181 | static void __init bootx_add_display_props(unsigned long base, | 183 | static void __init bootx_add_display_props(unsigned long base, |
182 | unsigned long *mem_end) | 184 | unsigned long *mem_end) |
183 | { | 185 | { |
186 | boot_infos_t *bi = bootx_info; | ||
187 | u32 tmp; | ||
188 | |||
184 | bootx_dt_add_prop("linux,boot-display", NULL, 0, mem_end); | 189 | bootx_dt_add_prop("linux,boot-display", NULL, 0, mem_end); |
185 | bootx_dt_add_prop("linux,opened", NULL, 0, mem_end); | 190 | bootx_dt_add_prop("linux,opened", NULL, 0, mem_end); |
191 | tmp = bi->dispDeviceDepth; | ||
192 | bootx_dt_add_prop("linux,bootx-depth", &tmp, 4, mem_end); | ||
193 | tmp = bi->dispDeviceRect[2] - bi->dispDeviceRect[0]; | ||
194 | bootx_dt_add_prop("linux,bootx-width", &tmp, 4, mem_end); | ||
195 | tmp = bi->dispDeviceRect[3] - bi->dispDeviceRect[1]; | ||
196 | bootx_dt_add_prop("linux,bootx-height", &tmp, 4, mem_end); | ||
197 | tmp = bi->dispDeviceRowBytes; | ||
198 | bootx_dt_add_prop("linux,bootx-linebytes", &tmp, 4, mem_end); | ||
199 | tmp = (u32)bi->dispDeviceBase; | ||
200 | if (tmp == 0) | ||
201 | tmp = (u32)bi->logicalDisplayBase; | ||
202 | tmp += bi->dispDeviceRect[1] * bi->dispDeviceRowBytes; | ||
203 | tmp += bi->dispDeviceRect[0] * ((bi->dispDeviceDepth + 7) / 8); | ||
204 | bootx_dt_add_prop("linux,bootx-addr", &tmp, 4, mem_end); | ||
186 | } | 205 | } |
187 | 206 | ||
188 | static void __init bootx_dt_add_string(char *s, unsigned long *mem_end) | 207 | static void __init bootx_dt_add_string(char *s, unsigned long *mem_end) |
@@ -211,7 +230,7 @@ static void __init bootx_scan_dt_build_strings(unsigned long base, | |||
211 | 230 | ||
212 | if (!strcmp(namep, "/chosen")) { | 231 | if (!strcmp(namep, "/chosen")) { |
213 | DBG(" detected /chosen ! adding properties names !\n"); | 232 | DBG(" detected /chosen ! adding properties names !\n"); |
214 | bootx_dt_add_string("linux,platform", mem_end); | 233 | bootx_dt_add_string("linux,bootx", mem_end); |
215 | bootx_dt_add_string("linux,stdout-path", mem_end); | 234 | bootx_dt_add_string("linux,stdout-path", mem_end); |
216 | bootx_dt_add_string("linux,initrd-start", mem_end); | 235 | bootx_dt_add_string("linux,initrd-start", mem_end); |
217 | bootx_dt_add_string("linux,initrd-end", mem_end); | 236 | bootx_dt_add_string("linux,initrd-end", mem_end); |
@@ -222,6 +241,11 @@ static void __init bootx_scan_dt_build_strings(unsigned long base, | |||
222 | DBG(" detected display ! adding properties names !\n"); | 241 | DBG(" detected display ! adding properties names !\n"); |
223 | bootx_dt_add_string("linux,boot-display", mem_end); | 242 | bootx_dt_add_string("linux,boot-display", mem_end); |
224 | bootx_dt_add_string("linux,opened", mem_end); | 243 | bootx_dt_add_string("linux,opened", mem_end); |
244 | bootx_dt_add_string("linux,bootx-depth", mem_end); | ||
245 | bootx_dt_add_string("linux,bootx-width", mem_end); | ||
246 | bootx_dt_add_string("linux,bootx-height", mem_end); | ||
247 | bootx_dt_add_string("linux,bootx-linebytes", mem_end); | ||
248 | bootx_dt_add_string("linux,bootx-addr", mem_end); | ||
225 | strncpy(bootx_disp_path, namep, 255); | 249 | strncpy(bootx_disp_path, namep, 255); |
226 | } | 250 | } |
227 | 251 | ||
@@ -443,7 +467,14 @@ void __init bootx_init(unsigned long r3, unsigned long r4) | |||
443 | if (!BOOT_INFO_IS_V2_COMPATIBLE(bi)) | 467 | if (!BOOT_INFO_IS_V2_COMPATIBLE(bi)) |
444 | bi->logicalDisplayBase = bi->dispDeviceBase; | 468 | bi->logicalDisplayBase = bi->dispDeviceBase; |
445 | 469 | ||
470 | /* Fixup depth 16 -> 15 as that's what MacOS calls 16bpp */ | ||
471 | if (bi->dispDeviceDepth == 16) | ||
472 | bi->dispDeviceDepth = 15; | ||
473 | |||
446 | #ifdef CONFIG_BOOTX_TEXT | 474 | #ifdef CONFIG_BOOTX_TEXT |
475 | ptr = (unsigned long)bi->logicalDisplayBase; | ||
476 | ptr += bi->dispDeviceRect[1] * bi->dispDeviceRowBytes; | ||
477 | ptr += bi->dispDeviceRect[0] * ((bi->dispDeviceDepth + 7) / 8); | ||
447 | btext_setup_display(bi->dispDeviceRect[2] - bi->dispDeviceRect[0], | 478 | btext_setup_display(bi->dispDeviceRect[2] - bi->dispDeviceRect[0], |
448 | bi->dispDeviceRect[3] - bi->dispDeviceRect[1], | 479 | bi->dispDeviceRect[3] - bi->dispDeviceRect[1], |
449 | bi->dispDeviceDepth, bi->dispDeviceRowBytes, | 480 | bi->dispDeviceDepth, bi->dispDeviceRowBytes, |
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c index ceafaf52a668..8677f50c2586 100644 --- a/arch/powerpc/platforms/powermac/low_i2c.c +++ b/arch/powerpc/platforms/powermac/low_i2c.c | |||
@@ -522,10 +522,11 @@ static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np) | |||
522 | host->speed = KW_I2C_MODE_25KHZ; | 522 | host->speed = KW_I2C_MODE_25KHZ; |
523 | break; | 523 | break; |
524 | } | 524 | } |
525 | if (np->n_intrs > 0) | 525 | host->irq = irq_of_parse_and_map(np, 0); |
526 | host->irq = np->intrs[0].line; | 526 | if (host->irq == NO_IRQ) |
527 | else | 527 | printk(KERN_WARNING |
528 | host->irq = NO_IRQ; | 528 | "low_i2c: Failed to map interrupt for %s\n", |
529 | np->full_name); | ||
529 | 530 | ||
530 | host->base = ioremap((*addrp), 0x1000); | 531 | host->base = ioremap((*addrp), 0x1000); |
531 | if (host->base == NULL) { | 532 | if (host->base == NULL) { |
diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c index 41fa2409482a..6a36ea9bf673 100644 --- a/arch/powerpc/platforms/powermac/nvram.c +++ b/arch/powerpc/platforms/powermac/nvram.c | |||
@@ -29,6 +29,8 @@ | |||
29 | #include <asm/machdep.h> | 29 | #include <asm/machdep.h> |
30 | #include <asm/nvram.h> | 30 | #include <asm/nvram.h> |
31 | 31 | ||
32 | #include "pmac.h" | ||
33 | |||
32 | #define DEBUG | 34 | #define DEBUG |
33 | 35 | ||
34 | #ifdef DEBUG | 36 | #ifdef DEBUG |
@@ -80,9 +82,6 @@ static int nvram_partitions[3]; | |||
80 | // XXX Turn that into a sem | 82 | // XXX Turn that into a sem |
81 | static DEFINE_SPINLOCK(nv_lock); | 83 | static DEFINE_SPINLOCK(nv_lock); |
82 | 84 | ||
83 | extern int pmac_newworld; | ||
84 | extern int system_running; | ||
85 | |||
86 | static int (*core99_write_bank)(int bank, u8* datas); | 85 | static int (*core99_write_bank)(int bank, u8* datas); |
87 | static int (*core99_erase_bank)(int bank); | 86 | static int (*core99_erase_bank)(int bank); |
88 | 87 | ||
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c index d524a915aa86..556b349797e8 100644 --- a/arch/powerpc/platforms/powermac/pci.c +++ b/arch/powerpc/platforms/powermac/pci.c | |||
@@ -46,6 +46,9 @@ static int has_uninorth; | |||
46 | static struct pci_controller *u3_agp; | 46 | static struct pci_controller *u3_agp; |
47 | static struct pci_controller *u4_pcie; | 47 | static struct pci_controller *u4_pcie; |
48 | static struct pci_controller *u3_ht; | 48 | static struct pci_controller *u3_ht; |
49 | #define has_second_ohare 0 | ||
50 | #else | ||
51 | static int has_second_ohare; | ||
49 | #endif /* CONFIG_PPC64 */ | 52 | #endif /* CONFIG_PPC64 */ |
50 | 53 | ||
51 | extern u8 pci_cache_line_size; | 54 | extern u8 pci_cache_line_size; |
@@ -647,6 +650,33 @@ static void __init init_p2pbridge(void) | |||
647 | early_write_config_word(hose, bus, devfn, PCI_BRIDGE_CONTROL, val); | 650 | early_write_config_word(hose, bus, devfn, PCI_BRIDGE_CONTROL, val); |
648 | } | 651 | } |
649 | 652 | ||
653 | static void __init init_second_ohare(void) | ||
654 | { | ||
655 | struct device_node *np = of_find_node_by_name(NULL, "pci106b,7"); | ||
656 | unsigned char bus, devfn; | ||
657 | unsigned short cmd; | ||
658 | |||
659 | if (np == NULL) | ||
660 | return; | ||
661 | |||
662 | /* This must run before we initialize the PICs since the second | ||
663 | * ohare hosts a PIC that will be accessed there. | ||
664 | */ | ||
665 | if (pci_device_from_OF_node(np, &bus, &devfn) == 0) { | ||
666 | struct pci_controller* hose = | ||
667 | pci_find_hose_for_OF_device(np); | ||
668 | if (!hose) { | ||
669 | printk(KERN_ERR "Can't find PCI hose for OHare2 !\n"); | ||
670 | return; | ||
671 | } | ||
672 | early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd); | ||
673 | cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; | ||
674 | cmd &= ~PCI_COMMAND_IO; | ||
675 | early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd); | ||
676 | } | ||
677 | has_second_ohare = 1; | ||
678 | } | ||
679 | |||
650 | /* | 680 | /* |
651 | * Some Apple desktop machines have a NEC PD720100A USB2 controller | 681 | * Some Apple desktop machines have a NEC PD720100A USB2 controller |
652 | * on the motherboard. Open Firmware, on these, will disable the | 682 | * on the motherboard. Open Firmware, on these, will disable the |
@@ -688,9 +718,6 @@ static void __init fixup_nec_usb2(void) | |||
688 | " EHCI, fixing up...\n"); | 718 | " EHCI, fixing up...\n"); |
689 | data &= ~1UL; | 719 | data &= ~1UL; |
690 | early_write_config_dword(hose, bus, devfn, 0xe4, data); | 720 | early_write_config_dword(hose, bus, devfn, 0xe4, data); |
691 | early_write_config_byte(hose, bus, | ||
692 | devfn | 2, PCI_INTERRUPT_LINE, | ||
693 | nec->intrs[0].line); | ||
694 | } | 721 | } |
695 | } | 722 | } |
696 | } | 723 | } |
@@ -958,32 +985,28 @@ static int __init add_bridge(struct device_node *dev) | |||
958 | return 0; | 985 | return 0; |
959 | } | 986 | } |
960 | 987 | ||
961 | static void __init pcibios_fixup_OF_interrupts(void) | 988 | void __init pmac_pcibios_fixup(void) |
962 | { | 989 | { |
963 | struct pci_dev* dev = NULL; | 990 | struct pci_dev* dev = NULL; |
964 | 991 | ||
965 | /* | ||
966 | * Open Firmware often doesn't initialize the | ||
967 | * PCI_INTERRUPT_LINE config register properly, so we | ||
968 | * should find the device node and apply the interrupt | ||
969 | * obtained from the OF device-tree | ||
970 | */ | ||
971 | for_each_pci_dev(dev) { | 992 | for_each_pci_dev(dev) { |
972 | struct device_node *node; | 993 | /* Read interrupt from the device-tree */ |
973 | node = pci_device_to_OF_node(dev); | 994 | pci_read_irq_line(dev); |
974 | /* this is the node, see if it has interrupts */ | 995 | |
975 | if (node && node->n_intrs > 0) | 996 | /* Fixup interrupt for the modem/ethernet combo controller. |
976 | dev->irq = node->intrs[0].line; | 997 | * on machines with a second ohare chip. |
977 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); | 998 | * The number in the device tree (27) is bogus (correct for |
999 | * the ethernet-only board but not the combo ethernet/modem | ||
1000 | * board). The real interrupt is 28 on the second controller | ||
1001 | * -> 28+32 = 60. | ||
1002 | */ | ||
1003 | if (has_second_ohare && | ||
1004 | dev->vendor == PCI_VENDOR_ID_DEC && | ||
1005 | dev->device == PCI_DEVICE_ID_DEC_TULIP_PLUS) | ||
1006 | dev->irq = irq_create_mapping(NULL, 60, 0); | ||
978 | } | 1007 | } |
979 | } | 1008 | } |
980 | 1009 | ||
981 | void __init pmac_pcibios_fixup(void) | ||
982 | { | ||
983 | /* Fixup interrupts according to OF tree */ | ||
984 | pcibios_fixup_OF_interrupts(); | ||
985 | } | ||
986 | |||
987 | #ifdef CONFIG_PPC64 | 1010 | #ifdef CONFIG_PPC64 |
988 | static void __init pmac_fixup_phb_resources(void) | 1011 | static void __init pmac_fixup_phb_resources(void) |
989 | { | 1012 | { |
@@ -1071,6 +1094,7 @@ void __init pmac_pci_init(void) | |||
1071 | 1094 | ||
1072 | #else /* CONFIG_PPC64 */ | 1095 | #else /* CONFIG_PPC64 */ |
1073 | init_p2pbridge(); | 1096 | init_p2pbridge(); |
1097 | init_second_ohare(); | ||
1074 | fixup_nec_usb2(); | 1098 | fixup_nec_usb2(); |
1075 | 1099 | ||
1076 | /* We are still having some issues with the Xserve G4, enabling | 1100 | /* We are still having some issues with the Xserve G4, enabling |
diff --git a/arch/powerpc/platforms/powermac/pfunc_base.c b/arch/powerpc/platforms/powermac/pfunc_base.c index d6eab8b3f7de..6d66359ec8c8 100644 --- a/arch/powerpc/platforms/powermac/pfunc_base.c +++ b/arch/powerpc/platforms/powermac/pfunc_base.c | |||
@@ -24,19 +24,18 @@ static irqreturn_t macio_gpio_irq(int irq, void *data, struct pt_regs *regs) | |||
24 | 24 | ||
25 | static int macio_do_gpio_irq_enable(struct pmf_function *func) | 25 | static int macio_do_gpio_irq_enable(struct pmf_function *func) |
26 | { | 26 | { |
27 | if (func->node->n_intrs < 1) | 27 | unsigned int irq = irq_of_parse_and_map(func->node, 0); |
28 | if (irq == NO_IRQ) | ||
28 | return -EINVAL; | 29 | return -EINVAL; |
29 | 30 | return request_irq(irq, macio_gpio_irq, 0, func->node->name, func); | |
30 | return request_irq(func->node->intrs[0].line, macio_gpio_irq, 0, | ||
31 | func->node->name, func); | ||
32 | } | 31 | } |
33 | 32 | ||
34 | static int macio_do_gpio_irq_disable(struct pmf_function *func) | 33 | static int macio_do_gpio_irq_disable(struct pmf_function *func) |
35 | { | 34 | { |
36 | if (func->node->n_intrs < 1) | 35 | unsigned int irq = irq_of_parse_and_map(func->node, 0); |
36 | if (irq == NO_IRQ) | ||
37 | return -EINVAL; | 37 | return -EINVAL; |
38 | 38 | free_irq(irq, func); | |
39 | free_irq(func->node->intrs[0].line, func); | ||
40 | return 0; | 39 | return 0; |
41 | } | 40 | } |
42 | 41 | ||
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index c9b09a9e6050..3d328bc1f7e0 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c | |||
@@ -65,39 +65,36 @@ static u32 level_mask[4]; | |||
65 | 65 | ||
66 | static DEFINE_SPINLOCK(pmac_pic_lock); | 66 | static DEFINE_SPINLOCK(pmac_pic_lock); |
67 | 67 | ||
68 | #define GATWICK_IRQ_POOL_SIZE 10 | ||
69 | static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE]; | ||
70 | |||
71 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | 68 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) |
72 | static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; | 69 | static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; |
70 | static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; | ||
71 | static int pmac_irq_cascade = -1; | ||
72 | static struct irq_host *pmac_pic_host; | ||
73 | 73 | ||
74 | /* | 74 | static void __pmac_retrigger(unsigned int irq_nr) |
75 | * Mark an irq as "lost". This is only used on the pmac | ||
76 | * since it can lose interrupts (see pmac_set_irq_mask). | ||
77 | * -- Cort | ||
78 | */ | ||
79 | void __set_lost(unsigned long irq_nr, int nokick) | ||
80 | { | 75 | { |
81 | if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) { | 76 | if (irq_nr >= max_real_irqs && pmac_irq_cascade > 0) { |
77 | __set_bit(irq_nr, ppc_lost_interrupts); | ||
78 | irq_nr = pmac_irq_cascade; | ||
79 | mb(); | ||
80 | } | ||
81 | if (!__test_and_set_bit(irq_nr, ppc_lost_interrupts)) { | ||
82 | atomic_inc(&ppc_n_lost_interrupts); | 82 | atomic_inc(&ppc_n_lost_interrupts); |
83 | if (!nokick) | 83 | set_dec(1); |
84 | set_dec(1); | ||
85 | } | 84 | } |
86 | } | 85 | } |
87 | 86 | ||
88 | static void pmac_mask_and_ack_irq(unsigned int irq_nr) | 87 | static void pmac_mask_and_ack_irq(unsigned int virq) |
89 | { | 88 | { |
90 | unsigned long bit = 1UL << (irq_nr & 0x1f); | 89 | unsigned int src = irq_map[virq].hwirq; |
91 | int i = irq_nr >> 5; | 90 | unsigned long bit = 1UL << (virq & 0x1f); |
91 | int i = virq >> 5; | ||
92 | unsigned long flags; | 92 | unsigned long flags; |
93 | 93 | ||
94 | if ((unsigned)irq_nr >= max_irqs) | ||
95 | return; | ||
96 | |||
97 | clear_bit(irq_nr, ppc_cached_irq_mask); | ||
98 | if (test_and_clear_bit(irq_nr, ppc_lost_interrupts)) | ||
99 | atomic_dec(&ppc_n_lost_interrupts); | ||
100 | spin_lock_irqsave(&pmac_pic_lock, flags); | 94 | spin_lock_irqsave(&pmac_pic_lock, flags); |
95 | __clear_bit(src, ppc_cached_irq_mask); | ||
96 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) | ||
97 | atomic_dec(&ppc_n_lost_interrupts); | ||
101 | out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]); | 98 | out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]); |
102 | out_le32(&pmac_irq_hw[i]->ack, bit); | 99 | out_le32(&pmac_irq_hw[i]->ack, bit); |
103 | do { | 100 | do { |
@@ -109,16 +106,29 @@ static void pmac_mask_and_ack_irq(unsigned int irq_nr) | |||
109 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 106 | spin_unlock_irqrestore(&pmac_pic_lock, flags); |
110 | } | 107 | } |
111 | 108 | ||
112 | static void pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) | 109 | static void pmac_ack_irq(unsigned int virq) |
110 | { | ||
111 | unsigned int src = irq_map[virq].hwirq; | ||
112 | unsigned long bit = 1UL << (src & 0x1f); | ||
113 | int i = src >> 5; | ||
114 | unsigned long flags; | ||
115 | |||
116 | spin_lock_irqsave(&pmac_pic_lock, flags); | ||
117 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) | ||
118 | atomic_dec(&ppc_n_lost_interrupts); | ||
119 | out_le32(&pmac_irq_hw[i]->ack, bit); | ||
120 | (void)in_le32(&pmac_irq_hw[i]->ack); | ||
121 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | ||
122 | } | ||
123 | |||
124 | static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) | ||
113 | { | 125 | { |
114 | unsigned long bit = 1UL << (irq_nr & 0x1f); | 126 | unsigned long bit = 1UL << (irq_nr & 0x1f); |
115 | int i = irq_nr >> 5; | 127 | int i = irq_nr >> 5; |
116 | unsigned long flags; | ||
117 | 128 | ||
118 | if ((unsigned)irq_nr >= max_irqs) | 129 | if ((unsigned)irq_nr >= max_irqs) |
119 | return; | 130 | return; |
120 | 131 | ||
121 | spin_lock_irqsave(&pmac_pic_lock, flags); | ||
122 | /* enable unmasked interrupts */ | 132 | /* enable unmasked interrupts */ |
123 | out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]); | 133 | out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]); |
124 | 134 | ||
@@ -135,71 +145,78 @@ static void pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) | |||
135 | * the bit in the flag register or request another interrupt. | 145 | * the bit in the flag register or request another interrupt. |
136 | */ | 146 | */ |
137 | if (bit & ppc_cached_irq_mask[i] & in_le32(&pmac_irq_hw[i]->level)) | 147 | if (bit & ppc_cached_irq_mask[i] & in_le32(&pmac_irq_hw[i]->level)) |
138 | __set_lost((ulong)irq_nr, nokicklost); | 148 | __pmac_retrigger(irq_nr); |
139 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | ||
140 | } | 149 | } |
141 | 150 | ||
142 | /* When an irq gets requested for the first client, if it's an | 151 | /* When an irq gets requested for the first client, if it's an |
143 | * edge interrupt, we clear any previous one on the controller | 152 | * edge interrupt, we clear any previous one on the controller |
144 | */ | 153 | */ |
145 | static unsigned int pmac_startup_irq(unsigned int irq_nr) | 154 | static unsigned int pmac_startup_irq(unsigned int virq) |
146 | { | 155 | { |
147 | unsigned long bit = 1UL << (irq_nr & 0x1f); | 156 | unsigned long flags; |
148 | int i = irq_nr >> 5; | 157 | unsigned int src = irq_map[virq].hwirq; |
158 | unsigned long bit = 1UL << (src & 0x1f); | ||
159 | int i = src >> 5; | ||
149 | 160 | ||
150 | if ((irq_desc[irq_nr].status & IRQ_LEVEL) == 0) | 161 | spin_lock_irqsave(&pmac_pic_lock, flags); |
162 | if ((irq_desc[virq].status & IRQ_LEVEL) == 0) | ||
151 | out_le32(&pmac_irq_hw[i]->ack, bit); | 163 | out_le32(&pmac_irq_hw[i]->ack, bit); |
152 | set_bit(irq_nr, ppc_cached_irq_mask); | 164 | __set_bit(src, ppc_cached_irq_mask); |
153 | pmac_set_irq_mask(irq_nr, 0); | 165 | __pmac_set_irq_mask(src, 0); |
166 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | ||
154 | 167 | ||
155 | return 0; | 168 | return 0; |
156 | } | 169 | } |
157 | 170 | ||
158 | static void pmac_mask_irq(unsigned int irq_nr) | 171 | static void pmac_mask_irq(unsigned int virq) |
159 | { | 172 | { |
160 | clear_bit(irq_nr, ppc_cached_irq_mask); | 173 | unsigned long flags; |
161 | pmac_set_irq_mask(irq_nr, 0); | 174 | unsigned int src = irq_map[virq].hwirq; |
162 | mb(); | 175 | |
176 | spin_lock_irqsave(&pmac_pic_lock, flags); | ||
177 | __clear_bit(src, ppc_cached_irq_mask); | ||
178 | __pmac_set_irq_mask(src, 0); | ||
179 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | ||
163 | } | 180 | } |
164 | 181 | ||
165 | static void pmac_unmask_irq(unsigned int irq_nr) | 182 | static void pmac_unmask_irq(unsigned int virq) |
166 | { | 183 | { |
167 | set_bit(irq_nr, ppc_cached_irq_mask); | 184 | unsigned long flags; |
168 | pmac_set_irq_mask(irq_nr, 0); | 185 | unsigned int src = irq_map[virq].hwirq; |
186 | |||
187 | spin_lock_irqsave(&pmac_pic_lock, flags); | ||
188 | __set_bit(src, ppc_cached_irq_mask); | ||
189 | __pmac_set_irq_mask(src, 0); | ||
190 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | ||
169 | } | 191 | } |
170 | 192 | ||
171 | static void pmac_end_irq(unsigned int irq_nr) | 193 | static int pmac_retrigger(unsigned int virq) |
172 | { | 194 | { |
173 | if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) | 195 | unsigned long flags; |
174 | && irq_desc[irq_nr].action) { | ||
175 | set_bit(irq_nr, ppc_cached_irq_mask); | ||
176 | pmac_set_irq_mask(irq_nr, 1); | ||
177 | } | ||
178 | } | ||
179 | 196 | ||
197 | spin_lock_irqsave(&pmac_pic_lock, flags); | ||
198 | __pmac_retrigger(irq_map[virq].hwirq); | ||
199 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | ||
200 | return 1; | ||
201 | } | ||
180 | 202 | ||
181 | struct hw_interrupt_type pmac_pic = { | 203 | static struct irq_chip pmac_pic = { |
182 | .typename = " PMAC-PIC ", | 204 | .typename = " PMAC-PIC ", |
183 | .startup = pmac_startup_irq, | 205 | .startup = pmac_startup_irq, |
184 | .enable = pmac_unmask_irq, | 206 | .mask = pmac_mask_irq, |
185 | .disable = pmac_mask_irq, | 207 | .ack = pmac_ack_irq, |
186 | .ack = pmac_mask_and_ack_irq, | 208 | .mask_ack = pmac_mask_and_ack_irq, |
187 | .end = pmac_end_irq, | 209 | .unmask = pmac_unmask_irq, |
188 | }; | 210 | .retrigger = pmac_retrigger, |
189 | |||
190 | struct hw_interrupt_type gatwick_pic = { | ||
191 | .typename = " GATWICK ", | ||
192 | .startup = pmac_startup_irq, | ||
193 | .enable = pmac_unmask_irq, | ||
194 | .disable = pmac_mask_irq, | ||
195 | .ack = pmac_mask_and_ack_irq, | ||
196 | .end = pmac_end_irq, | ||
197 | }; | 211 | }; |
198 | 212 | ||
199 | static irqreturn_t gatwick_action(int cpl, void *dev_id, struct pt_regs *regs) | 213 | static irqreturn_t gatwick_action(int cpl, void *dev_id, struct pt_regs *regs) |
200 | { | 214 | { |
215 | unsigned long flags; | ||
201 | int irq, bits; | 216 | int irq, bits; |
217 | int rc = IRQ_NONE; | ||
202 | 218 | ||
219 | spin_lock_irqsave(&pmac_pic_lock, flags); | ||
203 | for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) { | 220 | for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) { |
204 | int i = irq >> 5; | 221 | int i = irq >> 5; |
205 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; | 222 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; |
@@ -209,17 +226,20 @@ static irqreturn_t gatwick_action(int cpl, void *dev_id, struct pt_regs *regs) | |||
209 | if (bits == 0) | 226 | if (bits == 0) |
210 | continue; | 227 | continue; |
211 | irq += __ilog2(bits); | 228 | irq += __ilog2(bits); |
229 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | ||
212 | __do_IRQ(irq, regs); | 230 | __do_IRQ(irq, regs); |
213 | return IRQ_HANDLED; | 231 | spin_lock_irqsave(&pmac_pic_lock, flags); |
232 | rc = IRQ_HANDLED; | ||
214 | } | 233 | } |
215 | printk("gatwick irq not from gatwick pic\n"); | 234 | spin_unlock_irqrestore(&pmac_pic_lock, flags); |
216 | return IRQ_NONE; | 235 | return rc; |
217 | } | 236 | } |
218 | 237 | ||
219 | static int pmac_get_irq(struct pt_regs *regs) | 238 | static unsigned int pmac_pic_get_irq(struct pt_regs *regs) |
220 | { | 239 | { |
221 | int irq; | 240 | int irq; |
222 | unsigned long bits = 0; | 241 | unsigned long bits = 0; |
242 | unsigned long flags; | ||
223 | 243 | ||
224 | #ifdef CONFIG_SMP | 244 | #ifdef CONFIG_SMP |
225 | void psurge_smp_message_recv(struct pt_regs *); | 245 | void psurge_smp_message_recv(struct pt_regs *); |
@@ -227,9 +247,10 @@ static int pmac_get_irq(struct pt_regs *regs) | |||
227 | /* IPI's are a hack on the powersurge -- Cort */ | 247 | /* IPI's are a hack on the powersurge -- Cort */ |
228 | if ( smp_processor_id() != 0 ) { | 248 | if ( smp_processor_id() != 0 ) { |
229 | psurge_smp_message_recv(regs); | 249 | psurge_smp_message_recv(regs); |
230 | return -2; /* ignore, already handled */ | 250 | return NO_IRQ_IGNORE; /* ignore, already handled */ |
231 | } | 251 | } |
232 | #endif /* CONFIG_SMP */ | 252 | #endif /* CONFIG_SMP */ |
253 | spin_lock_irqsave(&pmac_pic_lock, flags); | ||
233 | for (irq = max_real_irqs; (irq -= 32) >= 0; ) { | 254 | for (irq = max_real_irqs; (irq -= 32) >= 0; ) { |
234 | int i = irq >> 5; | 255 | int i = irq >> 5; |
235 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; | 256 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; |
@@ -241,133 +262,10 @@ static int pmac_get_irq(struct pt_regs *regs) | |||
241 | irq += __ilog2(bits); | 262 | irq += __ilog2(bits); |
242 | break; | 263 | break; |
243 | } | 264 | } |
244 | 265 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | |
245 | return irq; | 266 | if (unlikely(irq < 0)) |
246 | } | 267 | return NO_IRQ; |
247 | 268 | return irq_linear_revmap(pmac_pic_host, irq); | |
248 | /* This routine will fix some missing interrupt values in the device tree | ||
249 | * on the gatwick mac-io controller used by some PowerBooks | ||
250 | * | ||
251 | * Walking of OF nodes could use a bit more fixing up here, but it's not | ||
252 | * very important as this is all boot time code on static portions of the | ||
253 | * device-tree. | ||
254 | * | ||
255 | * However, the modifications done to "intrs" will have to be removed and | ||
256 | * replaced with proper updates of the "interrupts" properties or | ||
257 | * AAPL,interrupts, yet to be decided, once the dynamic parsing is there. | ||
258 | */ | ||
259 | static void __init pmac_fix_gatwick_interrupts(struct device_node *gw, | ||
260 | int irq_base) | ||
261 | { | ||
262 | struct device_node *node; | ||
263 | int count; | ||
264 | |||
265 | memset(gatwick_int_pool, 0, sizeof(gatwick_int_pool)); | ||
266 | count = 0; | ||
267 | for (node = NULL; (node = of_get_next_child(gw, node)) != NULL;) { | ||
268 | /* Fix SCC */ | ||
269 | if ((strcasecmp(node->name, "escc") == 0) && node->child) { | ||
270 | if (node->child->n_intrs < 3) { | ||
271 | node->child->intrs = &gatwick_int_pool[count]; | ||
272 | count += 3; | ||
273 | } | ||
274 | node->child->n_intrs = 3; | ||
275 | node->child->intrs[0].line = 15+irq_base; | ||
276 | node->child->intrs[1].line = 4+irq_base; | ||
277 | node->child->intrs[2].line = 5+irq_base; | ||
278 | printk(KERN_INFO "irq: fixed SCC on gatwick" | ||
279 | " (%d,%d,%d)\n", | ||
280 | node->child->intrs[0].line, | ||
281 | node->child->intrs[1].line, | ||
282 | node->child->intrs[2].line); | ||
283 | } | ||
284 | /* Fix media-bay & left SWIM */ | ||
285 | if (strcasecmp(node->name, "media-bay") == 0) { | ||
286 | struct device_node* ya_node; | ||
287 | |||
288 | if (node->n_intrs == 0) | ||
289 | node->intrs = &gatwick_int_pool[count++]; | ||
290 | node->n_intrs = 1; | ||
291 | node->intrs[0].line = 29+irq_base; | ||
292 | printk(KERN_INFO "irq: fixed media-bay on gatwick" | ||
293 | " (%d)\n", node->intrs[0].line); | ||
294 | |||
295 | ya_node = node->child; | ||
296 | while(ya_node) { | ||
297 | if (strcasecmp(ya_node->name, "floppy") == 0) { | ||
298 | if (ya_node->n_intrs < 2) { | ||
299 | ya_node->intrs = &gatwick_int_pool[count]; | ||
300 | count += 2; | ||
301 | } | ||
302 | ya_node->n_intrs = 2; | ||
303 | ya_node->intrs[0].line = 19+irq_base; | ||
304 | ya_node->intrs[1].line = 1+irq_base; | ||
305 | printk(KERN_INFO "irq: fixed floppy on second controller (%d,%d)\n", | ||
306 | ya_node->intrs[0].line, ya_node->intrs[1].line); | ||
307 | } | ||
308 | if (strcasecmp(ya_node->name, "ata4") == 0) { | ||
309 | if (ya_node->n_intrs < 2) { | ||
310 | ya_node->intrs = &gatwick_int_pool[count]; | ||
311 | count += 2; | ||
312 | } | ||
313 | ya_node->n_intrs = 2; | ||
314 | ya_node->intrs[0].line = 14+irq_base; | ||
315 | ya_node->intrs[1].line = 3+irq_base; | ||
316 | printk(KERN_INFO "irq: fixed ide on second controller (%d,%d)\n", | ||
317 | ya_node->intrs[0].line, ya_node->intrs[1].line); | ||
318 | } | ||
319 | ya_node = ya_node->sibling; | ||
320 | } | ||
321 | } | ||
322 | } | ||
323 | if (count > 10) { | ||
324 | printk("WARNING !! Gatwick interrupt pool overflow\n"); | ||
325 | printk(" GATWICK_IRQ_POOL_SIZE = %d\n", GATWICK_IRQ_POOL_SIZE); | ||
326 | printk(" requested = %d\n", count); | ||
327 | } | ||
328 | } | ||
329 | |||
330 | /* | ||
331 | * The PowerBook 3400/2400/3500 can have a combo ethernet/modem | ||
332 | * card which includes an ohare chip that acts as a second interrupt | ||
333 | * controller. If we find this second ohare, set it up and fix the | ||
334 | * interrupt value in the device tree for the ethernet chip. | ||
335 | */ | ||
336 | static void __init enable_second_ohare(struct device_node *np) | ||
337 | { | ||
338 | unsigned char bus, devfn; | ||
339 | unsigned short cmd; | ||
340 | struct device_node *ether; | ||
341 | |||
342 | /* This code doesn't strictly belong here, it could be part of | ||
343 | * either the PCI initialisation or the feature code. It's kept | ||
344 | * here for historical reasons. | ||
345 | */ | ||
346 | if (pci_device_from_OF_node(np, &bus, &devfn) == 0) { | ||
347 | struct pci_controller* hose = | ||
348 | pci_find_hose_for_OF_device(np); | ||
349 | if (!hose) { | ||
350 | printk(KERN_ERR "Can't find PCI hose for OHare2 !\n"); | ||
351 | return; | ||
352 | } | ||
353 | early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd); | ||
354 | cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; | ||
355 | cmd &= ~PCI_COMMAND_IO; | ||
356 | early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd); | ||
357 | } | ||
358 | |||
359 | /* Fix interrupt for the modem/ethernet combo controller. The number | ||
360 | * in the device tree (27) is bogus (correct for the ethernet-only | ||
361 | * board but not the combo ethernet/modem board). | ||
362 | * The real interrupt is 28 on the second controller -> 28+32 = 60. | ||
363 | */ | ||
364 | ether = of_find_node_by_name(NULL, "pci1011,14"); | ||
365 | if (ether && ether->n_intrs > 0) { | ||
366 | ether->intrs[0].line = 60; | ||
367 | printk(KERN_INFO "irq: Fixed ethernet IRQ to %d\n", | ||
368 | ether->intrs[0].line); | ||
369 | } | ||
370 | of_node_put(ether); | ||
371 | } | 269 | } |
372 | 270 | ||
373 | #ifdef CONFIG_XMON | 271 | #ifdef CONFIG_XMON |
@@ -386,17 +284,60 @@ static struct irqaction gatwick_cascade_action = { | |||
386 | .name = "cascade", | 284 | .name = "cascade", |
387 | }; | 285 | }; |
388 | 286 | ||
287 | static int pmac_pic_host_match(struct irq_host *h, struct device_node *node) | ||
288 | { | ||
289 | /* We match all, we don't always have a node anyway */ | ||
290 | return 1; | ||
291 | } | ||
292 | |||
293 | static int pmac_pic_host_map(struct irq_host *h, unsigned int virq, | ||
294 | irq_hw_number_t hw, unsigned int flags) | ||
295 | { | ||
296 | struct irq_desc *desc = get_irq_desc(virq); | ||
297 | int level; | ||
298 | |||
299 | if (hw >= max_irqs) | ||
300 | return -EINVAL; | ||
301 | |||
302 | /* Mark level interrupts, set delayed disable for edge ones and set | ||
303 | * handlers | ||
304 | */ | ||
305 | level = !!(level_mask[hw >> 5] & (1UL << (hw & 0x1f))); | ||
306 | if (level) | ||
307 | desc->status |= IRQ_LEVEL; | ||
308 | else | ||
309 | desc->status |= IRQ_DELAYED_DISABLE; | ||
310 | set_irq_chip_and_handler(virq, &pmac_pic, level ? | ||
311 | handle_level_irq : handle_edge_irq); | ||
312 | return 0; | ||
313 | } | ||
314 | |||
315 | static int pmac_pic_host_xlate(struct irq_host *h, struct device_node *ct, | ||
316 | u32 *intspec, unsigned int intsize, | ||
317 | irq_hw_number_t *out_hwirq, | ||
318 | unsigned int *out_flags) | ||
319 | |||
320 | { | ||
321 | *out_hwirq = *intspec; | ||
322 | return 0; | ||
323 | } | ||
324 | |||
325 | static struct irq_host_ops pmac_pic_host_ops = { | ||
326 | .match = pmac_pic_host_match, | ||
327 | .map = pmac_pic_host_map, | ||
328 | .xlate = pmac_pic_host_xlate, | ||
329 | }; | ||
330 | |||
389 | static void __init pmac_pic_probe_oldstyle(void) | 331 | static void __init pmac_pic_probe_oldstyle(void) |
390 | { | 332 | { |
391 | int i; | 333 | int i; |
392 | int irq_cascade = -1; | ||
393 | struct device_node *master = NULL; | 334 | struct device_node *master = NULL; |
394 | struct device_node *slave = NULL; | 335 | struct device_node *slave = NULL; |
395 | u8 __iomem *addr; | 336 | u8 __iomem *addr; |
396 | struct resource r; | 337 | struct resource r; |
397 | 338 | ||
398 | /* Set our get_irq function */ | 339 | /* Set our get_irq function */ |
399 | ppc_md.get_irq = pmac_get_irq; | 340 | ppc_md.get_irq = pmac_pic_get_irq; |
400 | 341 | ||
401 | /* | 342 | /* |
402 | * Find the interrupt controller type & node | 343 | * Find the interrupt controller type & node |
@@ -414,7 +355,6 @@ static void __init pmac_pic_probe_oldstyle(void) | |||
414 | if (slave) { | 355 | if (slave) { |
415 | max_irqs = 64; | 356 | max_irqs = 64; |
416 | level_mask[1] = OHARE_LEVEL_MASK; | 357 | level_mask[1] = OHARE_LEVEL_MASK; |
417 | enable_second_ohare(slave); | ||
418 | } | 358 | } |
419 | } else if ((master = of_find_node_by_name(NULL, "mac-io")) != NULL) { | 359 | } else if ((master = of_find_node_by_name(NULL, "mac-io")) != NULL) { |
420 | max_irqs = max_real_irqs = 64; | 360 | max_irqs = max_real_irqs = 64; |
@@ -438,14 +378,18 @@ static void __init pmac_pic_probe_oldstyle(void) | |||
438 | max_irqs = 128; | 378 | max_irqs = 128; |
439 | level_mask[2] = HEATHROW_LEVEL_MASK; | 379 | level_mask[2] = HEATHROW_LEVEL_MASK; |
440 | level_mask[3] = 0; | 380 | level_mask[3] = 0; |
441 | pmac_fix_gatwick_interrupts(slave, max_real_irqs); | ||
442 | } | 381 | } |
443 | } | 382 | } |
444 | BUG_ON(master == NULL); | 383 | BUG_ON(master == NULL); |
445 | 384 | ||
446 | /* Set the handler for the main PIC */ | 385 | /* |
447 | for ( i = 0; i < max_real_irqs ; i++ ) | 386 | * Allocate an irq host |
448 | irq_desc[i].chip = &pmac_pic; | 387 | */ |
388 | pmac_pic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, max_irqs, | ||
389 | &pmac_pic_host_ops, | ||
390 | max_irqs); | ||
391 | BUG_ON(pmac_pic_host == NULL); | ||
392 | irq_set_default_host(pmac_pic_host); | ||
449 | 393 | ||
450 | /* Get addresses of first controller if we have a node for it */ | 394 | /* Get addresses of first controller if we have a node for it */ |
451 | BUG_ON(of_address_to_resource(master, 0, &r)); | 395 | BUG_ON(of_address_to_resource(master, 0, &r)); |
@@ -472,39 +416,38 @@ static void __init pmac_pic_probe_oldstyle(void) | |||
472 | pmac_irq_hw[i++] = | 416 | pmac_irq_hw[i++] = |
473 | (volatile struct pmac_irq_hw __iomem *) | 417 | (volatile struct pmac_irq_hw __iomem *) |
474 | (addr + 0x10); | 418 | (addr + 0x10); |
475 | irq_cascade = slave->intrs[0].line; | 419 | pmac_irq_cascade = irq_of_parse_and_map(slave, 0); |
476 | 420 | ||
477 | printk(KERN_INFO "irq: Found slave Apple PIC %s for %d irqs" | 421 | printk(KERN_INFO "irq: Found slave Apple PIC %s for %d irqs" |
478 | " cascade: %d\n", slave->full_name, | 422 | " cascade: %d\n", slave->full_name, |
479 | max_irqs - max_real_irqs, irq_cascade); | 423 | max_irqs - max_real_irqs, pmac_irq_cascade); |
480 | } | 424 | } |
481 | of_node_put(slave); | 425 | of_node_put(slave); |
482 | 426 | ||
483 | /* disable all interrupts in all controllers */ | 427 | /* Disable all interrupts in all controllers */ |
484 | for (i = 0; i * 32 < max_irqs; ++i) | 428 | for (i = 0; i * 32 < max_irqs; ++i) |
485 | out_le32(&pmac_irq_hw[i]->enable, 0); | 429 | out_le32(&pmac_irq_hw[i]->enable, 0); |
486 | 430 | ||
487 | /* mark level interrupts */ | 431 | /* Hookup cascade irq */ |
488 | for (i = 0; i < max_irqs; i++) | 432 | if (slave && pmac_irq_cascade != NO_IRQ) |
489 | if (level_mask[i >> 5] & (1UL << (i & 0x1f))) | 433 | setup_irq(pmac_irq_cascade, &gatwick_cascade_action); |
490 | irq_desc[i].status = IRQ_LEVEL; | ||
491 | 434 | ||
492 | /* Setup handlers for secondary controller and hook cascade irq*/ | ||
493 | if (slave) { | ||
494 | for ( i = max_real_irqs ; i < max_irqs ; i++ ) | ||
495 | irq_desc[i].chip = &gatwick_pic; | ||
496 | setup_irq(irq_cascade, &gatwick_cascade_action); | ||
497 | } | ||
498 | printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); | 435 | printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); |
499 | #ifdef CONFIG_XMON | 436 | #ifdef CONFIG_XMON |
500 | setup_irq(20, &xmon_action); | 437 | setup_irq(irq_create_mapping(NULL, 20, 0), &xmon_action); |
501 | #endif | 438 | #endif |
502 | } | 439 | } |
503 | #endif /* CONFIG_PPC32 */ | 440 | #endif /* CONFIG_PPC32 */ |
504 | 441 | ||
505 | static int pmac_u3_cascade(struct pt_regs *regs, void *data) | 442 | static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc, |
443 | struct pt_regs *regs) | ||
506 | { | 444 | { |
507 | return mpic_get_one_irq((struct mpic *)data, regs); | 445 | struct mpic *mpic = desc->handler_data; |
446 | |||
447 | unsigned int cascade_irq = mpic_get_one_irq(mpic, regs); | ||
448 | if (cascade_irq != NO_IRQ) | ||
449 | generic_handle_irq(cascade_irq, regs); | ||
450 | desc->chip->eoi(irq); | ||
508 | } | 451 | } |
509 | 452 | ||
510 | static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic) | 453 | static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic) |
@@ -514,21 +457,20 @@ static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic) | |||
514 | int nmi_irq; | 457 | int nmi_irq; |
515 | 458 | ||
516 | pswitch = of_find_node_by_name(NULL, "programmer-switch"); | 459 | pswitch = of_find_node_by_name(NULL, "programmer-switch"); |
517 | if (pswitch && pswitch->n_intrs) { | 460 | if (pswitch) { |
518 | nmi_irq = pswitch->intrs[0].line; | 461 | nmi_irq = irq_of_parse_and_map(pswitch, 0); |
519 | mpic_irq_set_priority(nmi_irq, 9); | 462 | if (nmi_irq != NO_IRQ) { |
520 | setup_irq(nmi_irq, &xmon_action); | 463 | mpic_irq_set_priority(nmi_irq, 9); |
464 | setup_irq(nmi_irq, &xmon_action); | ||
465 | } | ||
466 | of_node_put(pswitch); | ||
521 | } | 467 | } |
522 | of_node_put(pswitch); | ||
523 | #endif /* defined(CONFIG_XMON) && defined(CONFIG_PPC32) */ | 468 | #endif /* defined(CONFIG_XMON) && defined(CONFIG_PPC32) */ |
524 | } | 469 | } |
525 | 470 | ||
526 | static struct mpic * __init pmac_setup_one_mpic(struct device_node *np, | 471 | static struct mpic * __init pmac_setup_one_mpic(struct device_node *np, |
527 | int master) | 472 | int master) |
528 | { | 473 | { |
529 | unsigned char senses[128]; | ||
530 | int offset = master ? 0 : 128; | ||
531 | int count = master ? 128 : 124; | ||
532 | const char *name = master ? " MPIC 1 " : " MPIC 2 "; | 474 | const char *name = master ? " MPIC 1 " : " MPIC 2 "; |
533 | struct resource r; | 475 | struct resource r; |
534 | struct mpic *mpic; | 476 | struct mpic *mpic; |
@@ -541,8 +483,6 @@ static struct mpic * __init pmac_setup_one_mpic(struct device_node *np, | |||
541 | 483 | ||
542 | pmac_call_feature(PMAC_FTR_ENABLE_MPIC, np, 0, 0); | 484 | pmac_call_feature(PMAC_FTR_ENABLE_MPIC, np, 0, 0); |
543 | 485 | ||
544 | prom_get_irq_senses(senses, offset, offset + count); | ||
545 | |||
546 | flags |= MPIC_WANTS_RESET; | 486 | flags |= MPIC_WANTS_RESET; |
547 | if (get_property(np, "big-endian", NULL)) | 487 | if (get_property(np, "big-endian", NULL)) |
548 | flags |= MPIC_BIG_ENDIAN; | 488 | flags |= MPIC_BIG_ENDIAN; |
@@ -553,8 +493,7 @@ static struct mpic * __init pmac_setup_one_mpic(struct device_node *np, | |||
553 | if (master && (flags & MPIC_BIG_ENDIAN)) | 493 | if (master && (flags & MPIC_BIG_ENDIAN)) |
554 | flags |= MPIC_BROKEN_U3; | 494 | flags |= MPIC_BROKEN_U3; |
555 | 495 | ||
556 | mpic = mpic_alloc(r.start, flags, 0, offset, count, master ? 252 : 0, | 496 | mpic = mpic_alloc(np, r.start, flags, 0, 0, name); |
557 | senses, count, name); | ||
558 | if (mpic == NULL) | 497 | if (mpic == NULL) |
559 | return NULL; | 498 | return NULL; |
560 | 499 | ||
@@ -567,6 +506,7 @@ static int __init pmac_pic_probe_mpic(void) | |||
567 | { | 506 | { |
568 | struct mpic *mpic1, *mpic2; | 507 | struct mpic *mpic1, *mpic2; |
569 | struct device_node *np, *master = NULL, *slave = NULL; | 508 | struct device_node *np, *master = NULL, *slave = NULL; |
509 | unsigned int cascade; | ||
570 | 510 | ||
571 | /* We can have up to 2 MPICs cascaded */ | 511 | /* We can have up to 2 MPICs cascaded */ |
572 | for (np = NULL; (np = of_find_node_by_type(np, "open-pic")) | 512 | for (np = NULL; (np = of_find_node_by_type(np, "open-pic")) |
@@ -603,8 +543,15 @@ static int __init pmac_pic_probe_mpic(void) | |||
603 | of_node_put(master); | 543 | of_node_put(master); |
604 | 544 | ||
605 | /* No slave, let's go out */ | 545 | /* No slave, let's go out */ |
606 | if (slave == NULL || slave->n_intrs < 1) | 546 | if (slave == NULL) |
547 | return 0; | ||
548 | |||
549 | /* Get/Map slave interrupt */ | ||
550 | cascade = irq_of_parse_and_map(slave, 0); | ||
551 | if (cascade == NO_IRQ) { | ||
552 | printk(KERN_ERR "Failed to map cascade IRQ\n"); | ||
607 | return 0; | 553 | return 0; |
554 | } | ||
608 | 555 | ||
609 | mpic2 = pmac_setup_one_mpic(slave, 0); | 556 | mpic2 = pmac_setup_one_mpic(slave, 0); |
610 | if (mpic2 == NULL) { | 557 | if (mpic2 == NULL) { |
@@ -612,7 +559,8 @@ static int __init pmac_pic_probe_mpic(void) | |||
612 | of_node_put(slave); | 559 | of_node_put(slave); |
613 | return 0; | 560 | return 0; |
614 | } | 561 | } |
615 | mpic_setup_cascade(slave->intrs[0].line, pmac_u3_cascade, mpic2); | 562 | set_irq_data(cascade, mpic2); |
563 | set_irq_chained_handler(cascade, pmac_u3_cascade); | ||
616 | 564 | ||
617 | of_node_put(slave); | 565 | of_node_put(slave); |
618 | return 0; | 566 | return 0; |
@@ -621,6 +569,19 @@ static int __init pmac_pic_probe_mpic(void) | |||
621 | 569 | ||
622 | void __init pmac_pic_init(void) | 570 | void __init pmac_pic_init(void) |
623 | { | 571 | { |
572 | unsigned int flags = 0; | ||
573 | |||
574 | /* We configure the OF parsing based on our oldworld vs. newworld | ||
575 | * platform type and wether we were booted by BootX. | ||
576 | */ | ||
577 | #ifdef CONFIG_PPC32 | ||
578 | if (!pmac_newworld) | ||
579 | flags |= OF_IMAP_OLDWORLD_MAC; | ||
580 | if (get_property(of_chosen, "linux,bootx", NULL) != NULL) | ||
581 | flags |= OF_IMAP_NO_PHANDLE; | ||
582 | of_irq_map_init(flags); | ||
583 | #endif /* CONFIG_PPC_32 */ | ||
584 | |||
624 | /* We first try to detect Apple's new Core99 chipset, since mac-io | 585 | /* We first try to detect Apple's new Core99 chipset, since mac-io |
625 | * is quite different on those machines and contains an IBM MPIC2. | 586 | * is quite different on those machines and contains an IBM MPIC2. |
626 | */ | 587 | */ |
@@ -643,6 +604,7 @@ unsigned long sleep_save_mask[2]; | |||
643 | 604 | ||
644 | /* This used to be passed by the PMU driver but that link got | 605 | /* This used to be passed by the PMU driver but that link got |
645 | * broken with the new driver model. We use this tweak for now... | 606 | * broken with the new driver model. We use this tweak for now... |
607 | * We really want to do things differently though... | ||
646 | */ | 608 | */ |
647 | static int pmacpic_find_viaint(void) | 609 | static int pmacpic_find_viaint(void) |
648 | { | 610 | { |
@@ -656,7 +618,7 @@ static int pmacpic_find_viaint(void) | |||
656 | np = of_find_node_by_name(NULL, "via-pmu"); | 618 | np = of_find_node_by_name(NULL, "via-pmu"); |
657 | if (np == NULL) | 619 | if (np == NULL) |
658 | goto not_found; | 620 | goto not_found; |
659 | viaint = np->intrs[0].line; | 621 | viaint = irq_of_parse_and_map(np, 0);; |
660 | #endif /* CONFIG_ADB_PMU */ | 622 | #endif /* CONFIG_ADB_PMU */ |
661 | 623 | ||
662 | not_found: | 624 | not_found: |
diff --git a/arch/powerpc/platforms/powermac/pmac.h b/arch/powerpc/platforms/powermac/pmac.h index 21c7b0f8f329..94e7b24b840b 100644 --- a/arch/powerpc/platforms/powermac/pmac.h +++ b/arch/powerpc/platforms/powermac/pmac.h | |||
@@ -12,6 +12,8 @@ | |||
12 | 12 | ||
13 | struct rtc_time; | 13 | struct rtc_time; |
14 | 14 | ||
15 | extern int pmac_newworld; | ||
16 | |||
15 | extern long pmac_time_init(void); | 17 | extern long pmac_time_init(void); |
16 | extern unsigned long pmac_get_boot_time(void); | 18 | extern unsigned long pmac_get_boot_time(void); |
17 | extern void pmac_get_rtc_time(struct rtc_time *); | 19 | extern void pmac_get_rtc_time(struct rtc_time *); |
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c index 8654b5f07836..31a9da769fa2 100644 --- a/arch/powerpc/platforms/powermac/setup.c +++ b/arch/powerpc/platforms/powermac/setup.c | |||
@@ -613,9 +613,6 @@ static void __init pmac_init_early(void) | |||
613 | udbg_adb_init(!!strstr(cmd_line, "btextdbg")); | 613 | udbg_adb_init(!!strstr(cmd_line, "btextdbg")); |
614 | 614 | ||
615 | #ifdef CONFIG_PPC64 | 615 | #ifdef CONFIG_PPC64 |
616 | /* Setup interrupt mapping options */ | ||
617 | ppc64_interrupt_controller = IC_OPEN_PIC; | ||
618 | |||
619 | iommu_init_early_dart(); | 616 | iommu_init_early_dart(); |
620 | #endif | 617 | #endif |
621 | } | 618 | } |
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c index 9639c66b453d..9df783088b61 100644 --- a/arch/powerpc/platforms/pseries/ras.c +++ b/arch/powerpc/platforms/pseries/ras.c | |||
@@ -72,32 +72,62 @@ static irqreturn_t ras_error_interrupt(int irq, void *dev_id, | |||
72 | 72 | ||
73 | /* #define DEBUG */ | 73 | /* #define DEBUG */ |
74 | 74 | ||
75 | static void request_ras_irqs(struct device_node *np, char *propname, | 75 | |
76 | static void request_ras_irqs(struct device_node *np, | ||
76 | irqreturn_t (*handler)(int, void *, struct pt_regs *), | 77 | irqreturn_t (*handler)(int, void *, struct pt_regs *), |
77 | const char *name) | 78 | const char *name) |
78 | { | 79 | { |
79 | unsigned int *ireg, len, i; | 80 | int i, index, count = 0; |
80 | int virq, n_intr; | 81 | struct of_irq oirq; |
81 | 82 | u32 *opicprop; | |
82 | ireg = (unsigned int *)get_property(np, propname, &len); | 83 | unsigned int opicplen; |
83 | if (ireg == NULL) | 84 | unsigned int virqs[16]; |
84 | return; | 85 | |
85 | n_intr = prom_n_intr_cells(np); | 86 | /* Check for obsolete "open-pic-interrupt" property. If present, then |
86 | len /= n_intr * sizeof(*ireg); | 87 | * map those interrupts using the default interrupt host and default |
87 | 88 | * trigger | |
88 | for (i = 0; i < len; i++) { | 89 | */ |
89 | virq = virt_irq_create_mapping(*ireg); | 90 | opicprop = (u32 *)get_property(np, "open-pic-interrupt", &opicplen); |
90 | if (virq == NO_IRQ) { | 91 | if (opicprop) { |
91 | printk(KERN_ERR "Unable to allocate interrupt " | 92 | opicplen /= sizeof(u32); |
92 | "number for %s\n", np->full_name); | 93 | for (i = 0; i < opicplen; i++) { |
93 | return; | 94 | if (count > 15) |
95 | break; | ||
96 | virqs[count] = irq_create_mapping(NULL, *(opicprop++), | ||
97 | IRQ_TYPE_NONE); | ||
98 | if (virqs[count] == NO_IRQ) | ||
99 | printk(KERN_ERR "Unable to allocate interrupt " | ||
100 | "number for %s\n", np->full_name); | ||
101 | else | ||
102 | count++; | ||
103 | |||
94 | } | 104 | } |
95 | if (request_irq(irq_offset_up(virq), handler, 0, name, NULL)) { | 105 | } |
106 | /* Else use normal interrupt tree parsing */ | ||
107 | else { | ||
108 | /* First try to do a proper OF tree parsing */ | ||
109 | for (index = 0; of_irq_map_one(np, index, &oirq) == 0; | ||
110 | index++) { | ||
111 | if (count > 15) | ||
112 | break; | ||
113 | virqs[count] = irq_create_of_mapping(oirq.controller, | ||
114 | oirq.specifier, | ||
115 | oirq.size); | ||
116 | if (virqs[count] == NO_IRQ) | ||
117 | printk(KERN_ERR "Unable to allocate interrupt " | ||
118 | "number for %s\n", np->full_name); | ||
119 | else | ||
120 | count++; | ||
121 | } | ||
122 | } | ||
123 | |||
124 | /* Now request them */ | ||
125 | for (i = 0; i < count; i++) { | ||
126 | if (request_irq(virqs[i], handler, 0, name, NULL)) { | ||
96 | printk(KERN_ERR "Unable to request interrupt %d for " | 127 | printk(KERN_ERR "Unable to request interrupt %d for " |
97 | "%s\n", irq_offset_up(virq), np->full_name); | 128 | "%s\n", virqs[i], np->full_name); |
98 | return; | 129 | return; |
99 | } | 130 | } |
100 | ireg += n_intr; | ||
101 | } | 131 | } |
102 | } | 132 | } |
103 | 133 | ||
@@ -115,20 +145,14 @@ static int __init init_ras_IRQ(void) | |||
115 | /* Internal Errors */ | 145 | /* Internal Errors */ |
116 | np = of_find_node_by_path("/event-sources/internal-errors"); | 146 | np = of_find_node_by_path("/event-sources/internal-errors"); |
117 | if (np != NULL) { | 147 | if (np != NULL) { |
118 | request_ras_irqs(np, "open-pic-interrupt", ras_error_interrupt, | 148 | request_ras_irqs(np, ras_error_interrupt, "RAS_ERROR"); |
119 | "RAS_ERROR"); | ||
120 | request_ras_irqs(np, "interrupts", ras_error_interrupt, | ||
121 | "RAS_ERROR"); | ||
122 | of_node_put(np); | 149 | of_node_put(np); |
123 | } | 150 | } |
124 | 151 | ||
125 | /* EPOW Events */ | 152 | /* EPOW Events */ |
126 | np = of_find_node_by_path("/event-sources/epow-events"); | 153 | np = of_find_node_by_path("/event-sources/epow-events"); |
127 | if (np != NULL) { | 154 | if (np != NULL) { |
128 | request_ras_irqs(np, "open-pic-interrupt", ras_epow_interrupt, | 155 | request_ras_irqs(np, ras_epow_interrupt, "RAS_EPOW"); |
129 | "RAS_EPOW"); | ||
130 | request_ras_irqs(np, "interrupts", ras_epow_interrupt, | ||
131 | "RAS_EPOW"); | ||
132 | of_node_put(np); | 156 | of_node_put(np); |
133 | } | 157 | } |
134 | 158 | ||
@@ -162,7 +186,7 @@ ras_epow_interrupt(int irq, void *dev_id, struct pt_regs * regs) | |||
162 | 186 | ||
163 | status = rtas_call(ras_check_exception_token, 6, 1, NULL, | 187 | status = rtas_call(ras_check_exception_token, 6, 1, NULL, |
164 | RAS_VECTOR_OFFSET, | 188 | RAS_VECTOR_OFFSET, |
165 | virt_irq_to_real(irq_offset_down(irq)), | 189 | irq_map[irq].hwirq, |
166 | RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS, | 190 | RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS, |
167 | critical, __pa(&ras_log_buf), | 191 | critical, __pa(&ras_log_buf), |
168 | rtas_get_error_log_max()); | 192 | rtas_get_error_log_max()); |
@@ -198,7 +222,7 @@ ras_error_interrupt(int irq, void *dev_id, struct pt_regs * regs) | |||
198 | 222 | ||
199 | status = rtas_call(ras_check_exception_token, 6, 1, NULL, | 223 | status = rtas_call(ras_check_exception_token, 6, 1, NULL, |
200 | RAS_VECTOR_OFFSET, | 224 | RAS_VECTOR_OFFSET, |
201 | virt_irq_to_real(irq_offset_down(irq)), | 225 | irq_map[irq].hwirq, |
202 | RTAS_INTERNAL_ERROR, 1 /*Time Critical */, | 226 | RTAS_INTERNAL_ERROR, 1 /*Time Critical */, |
203 | __pa(&ras_log_buf), | 227 | __pa(&ras_log_buf), |
204 | rtas_get_error_log_max()); | 228 | rtas_get_error_log_max()); |
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index 999509d28af8..54a52437265c 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
@@ -76,6 +76,9 @@ | |||
76 | #define DBG(fmt...) | 76 | #define DBG(fmt...) |
77 | #endif | 77 | #endif |
78 | 78 | ||
79 | /* move those away to a .h */ | ||
80 | extern void smp_init_pseries_mpic(void); | ||
81 | extern void smp_init_pseries_xics(void); | ||
79 | extern void find_udbg_vterm(void); | 82 | extern void find_udbg_vterm(void); |
80 | 83 | ||
81 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ | 84 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ |
@@ -83,7 +86,7 @@ int fwnmi_active; /* TRUE if an FWNMI handler is present */ | |||
83 | static void pseries_shared_idle_sleep(void); | 86 | static void pseries_shared_idle_sleep(void); |
84 | static void pseries_dedicated_idle_sleep(void); | 87 | static void pseries_dedicated_idle_sleep(void); |
85 | 88 | ||
86 | struct mpic *pSeries_mpic; | 89 | static struct device_node *pSeries_mpic_node; |
87 | 90 | ||
88 | static void pSeries_show_cpuinfo(struct seq_file *m) | 91 | static void pSeries_show_cpuinfo(struct seq_file *m) |
89 | { | 92 | { |
@@ -118,63 +121,92 @@ static void __init fwnmi_init(void) | |||
118 | fwnmi_active = 1; | 121 | fwnmi_active = 1; |
119 | } | 122 | } |
120 | 123 | ||
121 | static void __init pSeries_init_mpic(void) | 124 | void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc, |
125 | struct pt_regs *regs) | ||
122 | { | 126 | { |
123 | unsigned int *addrp; | 127 | unsigned int cascade_irq = i8259_irq(regs); |
124 | struct device_node *np; | 128 | if (cascade_irq != NO_IRQ) |
125 | unsigned long intack = 0; | 129 | generic_handle_irq(cascade_irq, regs); |
126 | 130 | desc->chip->eoi(irq); | |
127 | /* All ISUs are setup, complete initialization */ | ||
128 | mpic_init(pSeries_mpic); | ||
129 | |||
130 | /* Check what kind of cascade ACK we have */ | ||
131 | if (!(np = of_find_node_by_name(NULL, "pci")) | ||
132 | || !(addrp = (unsigned int *) | ||
133 | get_property(np, "8259-interrupt-acknowledge", NULL))) | ||
134 | printk(KERN_ERR "Cannot find pci to get ack address\n"); | ||
135 | else | ||
136 | intack = addrp[prom_n_addr_cells(np)-1]; | ||
137 | of_node_put(np); | ||
138 | |||
139 | /* Setup the legacy interrupts & controller */ | ||
140 | i8259_init(intack, 0); | ||
141 | |||
142 | /* Hook cascade to mpic */ | ||
143 | mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL); | ||
144 | } | 131 | } |
145 | 132 | ||
146 | static void __init pSeries_setup_mpic(void) | 133 | static void __init pseries_mpic_init_IRQ(void) |
147 | { | 134 | { |
135 | struct device_node *np, *old, *cascade = NULL; | ||
136 | unsigned int *addrp; | ||
137 | unsigned long intack = 0; | ||
148 | unsigned int *opprop; | 138 | unsigned int *opprop; |
149 | unsigned long openpic_addr = 0; | 139 | unsigned long openpic_addr = 0; |
150 | unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS]; | 140 | unsigned int cascade_irq; |
151 | struct device_node *root; | 141 | int naddr, n, i, opplen; |
152 | int irq_count; | 142 | struct mpic *mpic; |
153 | 143 | ||
154 | /* Find the Open PIC if present */ | 144 | np = of_find_node_by_path("/"); |
155 | root = of_find_node_by_path("/"); | 145 | naddr = prom_n_addr_cells(np); |
156 | opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL); | 146 | opprop = (unsigned int *) get_property(np, "platform-open-pic", &opplen); |
157 | if (opprop != 0) { | 147 | if (opprop != 0) { |
158 | int n = prom_n_addr_cells(root); | 148 | openpic_addr = of_read_number(opprop, naddr); |
159 | |||
160 | for (openpic_addr = 0; n > 0; --n) | ||
161 | openpic_addr = (openpic_addr << 32) + *opprop++; | ||
162 | printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); | 149 | printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); |
163 | } | 150 | } |
164 | of_node_put(root); | 151 | of_node_put(np); |
165 | 152 | ||
166 | BUG_ON(openpic_addr == 0); | 153 | BUG_ON(openpic_addr == 0); |
167 | 154 | ||
168 | /* Get the sense values from OF */ | ||
169 | prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS); | ||
170 | |||
171 | /* Setup the openpic driver */ | 155 | /* Setup the openpic driver */ |
172 | irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */ | 156 | mpic = mpic_alloc(pSeries_mpic_node, openpic_addr, |
173 | pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY, | 157 | MPIC_PRIMARY, |
174 | 16, 16, irq_count, /* isu size, irq offset, irq count */ | 158 | 16, 250, /* isu size, irq count */ |
175 | NR_IRQS - 4, /* ipi offset */ | 159 | " MPIC "); |
176 | senses, irq_count, /* sense & sense size */ | 160 | BUG_ON(mpic == NULL); |
177 | " MPIC "); | 161 | |
162 | /* Add ISUs */ | ||
163 | opplen /= sizeof(u32); | ||
164 | for (n = 0, i = naddr; i < opplen; i += naddr, n++) { | ||
165 | unsigned long isuaddr = of_read_number(opprop + i, naddr); | ||
166 | mpic_assign_isu(mpic, n, isuaddr); | ||
167 | } | ||
168 | |||
169 | /* All ISUs are setup, complete initialization */ | ||
170 | mpic_init(mpic); | ||
171 | |||
172 | /* Look for cascade */ | ||
173 | for_each_node_by_type(np, "interrupt-controller") | ||
174 | if (device_is_compatible(np, "chrp,iic")) { | ||
175 | cascade = np; | ||
176 | break; | ||
177 | } | ||
178 | if (cascade == NULL) | ||
179 | return; | ||
180 | |||
181 | cascade_irq = irq_of_parse_and_map(cascade, 0); | ||
182 | if (cascade == NO_IRQ) { | ||
183 | printk(KERN_ERR "xics: failed to map cascade interrupt"); | ||
184 | return; | ||
185 | } | ||
186 | |||
187 | /* Check ACK type */ | ||
188 | for (old = of_node_get(cascade); old != NULL ; old = np) { | ||
189 | np = of_get_parent(old); | ||
190 | of_node_put(old); | ||
191 | if (np == NULL) | ||
192 | break; | ||
193 | if (strcmp(np->name, "pci") != 0) | ||
194 | continue; | ||
195 | addrp = (u32 *)get_property(np, "8259-interrupt-acknowledge", | ||
196 | NULL); | ||
197 | if (addrp == NULL) | ||
198 | continue; | ||
199 | naddr = prom_n_addr_cells(np); | ||
200 | intack = addrp[naddr-1]; | ||
201 | if (naddr > 1) | ||
202 | intack |= ((unsigned long)addrp[naddr-2]) << 32; | ||
203 | } | ||
204 | if (intack) | ||
205 | printk(KERN_DEBUG "mpic: PCI 8259 intack at 0x%016lx\n", | ||
206 | intack); | ||
207 | i8259_init(cascade, intack); | ||
208 | of_node_put(cascade); | ||
209 | set_irq_chained_handler(cascade_irq, pseries_8259_cascade); | ||
178 | } | 210 | } |
179 | 211 | ||
180 | static void pseries_lpar_enable_pmcs(void) | 212 | static void pseries_lpar_enable_pmcs(void) |
@@ -192,23 +224,67 @@ static void pseries_lpar_enable_pmcs(void) | |||
192 | get_lppaca()->pmcregs_in_use = 1; | 224 | get_lppaca()->pmcregs_in_use = 1; |
193 | } | 225 | } |
194 | 226 | ||
195 | static void __init pSeries_setup_arch(void) | 227 | #ifdef CONFIG_KEXEC |
228 | static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary) | ||
196 | { | 229 | { |
197 | /* Fixup ppc_md depending on the type of interrupt controller */ | 230 | mpic_teardown_this_cpu(secondary); |
198 | if (ppc64_interrupt_controller == IC_OPEN_PIC) { | 231 | } |
199 | ppc_md.init_IRQ = pSeries_init_mpic; | 232 | |
200 | ppc_md.get_irq = mpic_get_irq; | 233 | static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary) |
201 | /* Allocate the mpic now, so that find_and_init_phbs() can | 234 | { |
202 | * fill the ISUs */ | 235 | /* Don't risk a hypervisor call if we're crashing */ |
203 | pSeries_setup_mpic(); | 236 | if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) { |
204 | } else { | 237 | unsigned long vpa = __pa(get_lppaca()); |
205 | ppc_md.init_IRQ = xics_init_IRQ; | 238 | |
206 | ppc_md.get_irq = xics_get_irq; | 239 | if (unregister_vpa(hard_smp_processor_id(), vpa)) { |
240 | printk("VPA deregistration of cpu %u (hw_cpu_id %d) " | ||
241 | "failed\n", smp_processor_id(), | ||
242 | hard_smp_processor_id()); | ||
243 | } | ||
207 | } | 244 | } |
245 | xics_teardown_cpu(secondary); | ||
246 | } | ||
247 | #endif /* CONFIG_KEXEC */ | ||
208 | 248 | ||
249 | static void __init pseries_discover_pic(void) | ||
250 | { | ||
251 | struct device_node *np; | ||
252 | char *typep; | ||
253 | |||
254 | for (np = NULL; (np = of_find_node_by_name(np, | ||
255 | "interrupt-controller"));) { | ||
256 | typep = (char *)get_property(np, "compatible", NULL); | ||
257 | if (strstr(typep, "open-pic")) { | ||
258 | pSeries_mpic_node = of_node_get(np); | ||
259 | ppc_md.init_IRQ = pseries_mpic_init_IRQ; | ||
260 | ppc_md.get_irq = mpic_get_irq; | ||
261 | #ifdef CONFIG_KEXEC | ||
262 | ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic; | ||
263 | #endif | ||
264 | #ifdef CONFIG_SMP | ||
265 | smp_init_pseries_mpic(); | ||
266 | #endif | ||
267 | return; | ||
268 | } else if (strstr(typep, "ppc-xicp")) { | ||
269 | ppc_md.init_IRQ = xics_init_IRQ; | ||
270 | #ifdef CONFIG_KEXEC | ||
271 | ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics; | ||
272 | #endif | ||
209 | #ifdef CONFIG_SMP | 273 | #ifdef CONFIG_SMP |
210 | smp_init_pSeries(); | 274 | smp_init_pseries_xics(); |
211 | #endif | 275 | #endif |
276 | return; | ||
277 | } | ||
278 | } | ||
279 | printk(KERN_ERR "pSeries_discover_pic: failed to recognize" | ||
280 | " interrupt-controller\n"); | ||
281 | } | ||
282 | |||
283 | static void __init pSeries_setup_arch(void) | ||
284 | { | ||
285 | /* Discover PIC type and setup ppc_md accordingly */ | ||
286 | pseries_discover_pic(); | ||
287 | |||
212 | /* openpic global configuration register (64-bit format). */ | 288 | /* openpic global configuration register (64-bit format). */ |
213 | /* openpic Interrupt Source Unit pointer (64-bit format). */ | 289 | /* openpic Interrupt Source Unit pointer (64-bit format). */ |
214 | /* python0 facility area (mmio) (64-bit format) REAL address. */ | 290 | /* python0 facility area (mmio) (64-bit format) REAL address. */ |
@@ -260,41 +336,11 @@ static int __init pSeries_init_panel(void) | |||
260 | } | 336 | } |
261 | arch_initcall(pSeries_init_panel); | 337 | arch_initcall(pSeries_init_panel); |
262 | 338 | ||
263 | static void __init pSeries_discover_pic(void) | ||
264 | { | ||
265 | struct device_node *np; | ||
266 | char *typep; | ||
267 | |||
268 | /* | ||
269 | * Setup interrupt mapping options that are needed for finish_device_tree | ||
270 | * to properly parse the OF interrupt tree & do the virtual irq mapping | ||
271 | */ | ||
272 | __irq_offset_value = NUM_ISA_INTERRUPTS; | ||
273 | ppc64_interrupt_controller = IC_INVALID; | ||
274 | for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) { | ||
275 | typep = (char *)get_property(np, "compatible", NULL); | ||
276 | if (strstr(typep, "open-pic")) { | ||
277 | ppc64_interrupt_controller = IC_OPEN_PIC; | ||
278 | break; | ||
279 | } else if (strstr(typep, "ppc-xicp")) { | ||
280 | ppc64_interrupt_controller = IC_PPC_XIC; | ||
281 | break; | ||
282 | } | ||
283 | } | ||
284 | if (ppc64_interrupt_controller == IC_INVALID) | ||
285 | printk("pSeries_discover_pic: failed to recognize" | ||
286 | " interrupt-controller\n"); | ||
287 | |||
288 | } | ||
289 | |||
290 | static void pSeries_mach_cpu_die(void) | 339 | static void pSeries_mach_cpu_die(void) |
291 | { | 340 | { |
292 | local_irq_disable(); | 341 | local_irq_disable(); |
293 | idle_task_exit(); | 342 | idle_task_exit(); |
294 | /* Some hardware requires clearing the CPPR, while other hardware does not | 343 | xics_teardown_cpu(0); |
295 | * it is safe either way | ||
296 | */ | ||
297 | pSeriesLP_cppr_info(0, 0); | ||
298 | rtas_stop_self(); | 344 | rtas_stop_self(); |
299 | /* Should never get here... */ | 345 | /* Should never get here... */ |
300 | BUG(); | 346 | BUG(); |
@@ -332,8 +378,6 @@ static void __init pSeries_init_early(void) | |||
332 | 378 | ||
333 | iommu_init_early_pSeries(); | 379 | iommu_init_early_pSeries(); |
334 | 380 | ||
335 | pSeries_discover_pic(); | ||
336 | |||
337 | DBG(" <- pSeries_init_early()\n"); | 381 | DBG(" <- pSeries_init_early()\n"); |
338 | } | 382 | } |
339 | 383 | ||
@@ -505,27 +549,6 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus) | |||
505 | return PCI_PROBE_NORMAL; | 549 | return PCI_PROBE_NORMAL; |
506 | } | 550 | } |
507 | 551 | ||
508 | #ifdef CONFIG_KEXEC | ||
509 | static void pseries_kexec_cpu_down(int crash_shutdown, int secondary) | ||
510 | { | ||
511 | /* Don't risk a hypervisor call if we're crashing */ | ||
512 | if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) { | ||
513 | unsigned long vpa = __pa(get_lppaca()); | ||
514 | |||
515 | if (unregister_vpa(hard_smp_processor_id(), vpa)) { | ||
516 | printk("VPA deregistration of cpu %u (hw_cpu_id %d) " | ||
517 | "failed\n", smp_processor_id(), | ||
518 | hard_smp_processor_id()); | ||
519 | } | ||
520 | } | ||
521 | |||
522 | if (ppc64_interrupt_controller == IC_OPEN_PIC) | ||
523 | mpic_teardown_this_cpu(secondary); | ||
524 | else | ||
525 | xics_teardown_cpu(secondary); | ||
526 | } | ||
527 | #endif | ||
528 | |||
529 | define_machine(pseries) { | 552 | define_machine(pseries) { |
530 | .name = "pSeries", | 553 | .name = "pSeries", |
531 | .probe = pSeries_probe, | 554 | .probe = pSeries_probe, |
@@ -550,7 +573,6 @@ define_machine(pseries) { | |||
550 | .system_reset_exception = pSeries_system_reset_exception, | 573 | .system_reset_exception = pSeries_system_reset_exception, |
551 | .machine_check_exception = pSeries_machine_check_exception, | 574 | .machine_check_exception = pSeries_machine_check_exception, |
552 | #ifdef CONFIG_KEXEC | 575 | #ifdef CONFIG_KEXEC |
553 | .kexec_cpu_down = pseries_kexec_cpu_down, | ||
554 | .machine_kexec = default_machine_kexec, | 576 | .machine_kexec = default_machine_kexec, |
555 | .machine_kexec_prepare = default_machine_kexec_prepare, | 577 | .machine_kexec_prepare = default_machine_kexec_prepare, |
556 | .machine_crash_shutdown = default_machine_crash_shutdown, | 578 | .machine_crash_shutdown = default_machine_crash_shutdown, |
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c index 4ad144df49c2..ac61098ff401 100644 --- a/arch/powerpc/platforms/pseries/smp.c +++ b/arch/powerpc/platforms/pseries/smp.c | |||
@@ -416,27 +416,12 @@ static struct smp_ops_t pSeries_xics_smp_ops = { | |||
416 | #endif | 416 | #endif |
417 | 417 | ||
418 | /* This is called very early */ | 418 | /* This is called very early */ |
419 | void __init smp_init_pSeries(void) | 419 | static void __init smp_init_pseries(void) |
420 | { | 420 | { |
421 | int i; | 421 | int i; |
422 | 422 | ||
423 | DBG(" -> smp_init_pSeries()\n"); | 423 | DBG(" -> smp_init_pSeries()\n"); |
424 | 424 | ||
425 | switch (ppc64_interrupt_controller) { | ||
426 | #ifdef CONFIG_MPIC | ||
427 | case IC_OPEN_PIC: | ||
428 | smp_ops = &pSeries_mpic_smp_ops; | ||
429 | break; | ||
430 | #endif | ||
431 | #ifdef CONFIG_XICS | ||
432 | case IC_PPC_XIC: | ||
433 | smp_ops = &pSeries_xics_smp_ops; | ||
434 | break; | ||
435 | #endif | ||
436 | default: | ||
437 | panic("Invalid interrupt controller"); | ||
438 | } | ||
439 | |||
440 | #ifdef CONFIG_HOTPLUG_CPU | 425 | #ifdef CONFIG_HOTPLUG_CPU |
441 | smp_ops->cpu_disable = pSeries_cpu_disable; | 426 | smp_ops->cpu_disable = pSeries_cpu_disable; |
442 | smp_ops->cpu_die = pSeries_cpu_die; | 427 | smp_ops->cpu_die = pSeries_cpu_die; |
@@ -471,3 +456,18 @@ void __init smp_init_pSeries(void) | |||
471 | DBG(" <- smp_init_pSeries()\n"); | 456 | DBG(" <- smp_init_pSeries()\n"); |
472 | } | 457 | } |
473 | 458 | ||
459 | #ifdef CONFIG_MPIC | ||
460 | void __init smp_init_pseries_mpic(void) | ||
461 | { | ||
462 | smp_ops = &pSeries_mpic_smp_ops; | ||
463 | |||
464 | smp_init_pseries(); | ||
465 | } | ||
466 | #endif | ||
467 | |||
468 | void __init smp_init_pseries_xics(void) | ||
469 | { | ||
470 | smp_ops = &pSeries_xics_smp_ops; | ||
471 | |||
472 | smp_init_pseries(); | ||
473 | } | ||
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index 2ffebe31cb2d..716972aa9777 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c | |||
@@ -8,6 +8,9 @@ | |||
8 | * as published by the Free Software Foundation; either version | 8 | * as published by the Free Software Foundation; either version |
9 | * 2 of the License, or (at your option) any later version. | 9 | * 2 of the License, or (at your option) any later version. |
10 | */ | 10 | */ |
11 | |||
12 | #undef DEBUG | ||
13 | |||
11 | #include <linux/types.h> | 14 | #include <linux/types.h> |
12 | #include <linux/threads.h> | 15 | #include <linux/threads.h> |
13 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
@@ -19,6 +22,7 @@ | |||
19 | #include <linux/gfp.h> | 22 | #include <linux/gfp.h> |
20 | #include <linux/radix-tree.h> | 23 | #include <linux/radix-tree.h> |
21 | #include <linux/cpu.h> | 24 | #include <linux/cpu.h> |
25 | |||
22 | #include <asm/firmware.h> | 26 | #include <asm/firmware.h> |
23 | #include <asm/prom.h> | 27 | #include <asm/prom.h> |
24 | #include <asm/io.h> | 28 | #include <asm/io.h> |
@@ -31,26 +35,6 @@ | |||
31 | 35 | ||
32 | #include "xics.h" | 36 | #include "xics.h" |
33 | 37 | ||
34 | static unsigned int xics_startup(unsigned int irq); | ||
35 | static void xics_enable_irq(unsigned int irq); | ||
36 | static void xics_disable_irq(unsigned int irq); | ||
37 | static void xics_mask_and_ack_irq(unsigned int irq); | ||
38 | static void xics_end_irq(unsigned int irq); | ||
39 | static void xics_set_affinity(unsigned int irq_nr, cpumask_t cpumask); | ||
40 | |||
41 | static struct hw_interrupt_type xics_pic = { | ||
42 | .typename = " XICS ", | ||
43 | .startup = xics_startup, | ||
44 | .enable = xics_enable_irq, | ||
45 | .disable = xics_disable_irq, | ||
46 | .ack = xics_mask_and_ack_irq, | ||
47 | .end = xics_end_irq, | ||
48 | .set_affinity = xics_set_affinity | ||
49 | }; | ||
50 | |||
51 | /* This is used to map real irq numbers to virtual */ | ||
52 | static struct radix_tree_root irq_map = RADIX_TREE_INIT(GFP_ATOMIC); | ||
53 | |||
54 | #define XICS_IPI 2 | 38 | #define XICS_IPI 2 |
55 | #define XICS_IRQ_SPURIOUS 0 | 39 | #define XICS_IRQ_SPURIOUS 0 |
56 | 40 | ||
@@ -81,12 +65,12 @@ struct xics_ipl { | |||
81 | 65 | ||
82 | static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS]; | 66 | static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS]; |
83 | 67 | ||
84 | static int xics_irq_8259_cascade = 0; | ||
85 | static int xics_irq_8259_cascade_real = 0; | ||
86 | static unsigned int default_server = 0xFF; | 68 | static unsigned int default_server = 0xFF; |
87 | static unsigned int default_distrib_server = 0; | 69 | static unsigned int default_distrib_server = 0; |
88 | static unsigned int interrupt_server_size = 8; | 70 | static unsigned int interrupt_server_size = 8; |
89 | 71 | ||
72 | static struct irq_host *xics_host; | ||
73 | |||
90 | /* | 74 | /* |
91 | * XICS only has a single IPI, so encode the messages per CPU | 75 | * XICS only has a single IPI, so encode the messages per CPU |
92 | */ | 76 | */ |
@@ -98,48 +82,34 @@ static int ibm_set_xive; | |||
98 | static int ibm_int_on; | 82 | static int ibm_int_on; |
99 | static int ibm_int_off; | 83 | static int ibm_int_off; |
100 | 84 | ||
101 | typedef struct { | ||
102 | int (*xirr_info_get)(int cpu); | ||
103 | void (*xirr_info_set)(int cpu, int val); | ||
104 | void (*cppr_info)(int cpu, u8 val); | ||
105 | void (*qirr_info)(int cpu, u8 val); | ||
106 | } xics_ops; | ||
107 | 85 | ||
86 | /* Direct HW low level accessors */ | ||
108 | 87 | ||
109 | /* SMP */ | ||
110 | 88 | ||
111 | static int pSeries_xirr_info_get(int n_cpu) | 89 | static inline unsigned int direct_xirr_info_get(int n_cpu) |
112 | { | 90 | { |
113 | return in_be32(&xics_per_cpu[n_cpu]->xirr.word); | 91 | return in_be32(&xics_per_cpu[n_cpu]->xirr.word); |
114 | } | 92 | } |
115 | 93 | ||
116 | static void pSeries_xirr_info_set(int n_cpu, int value) | 94 | static inline void direct_xirr_info_set(int n_cpu, int value) |
117 | { | 95 | { |
118 | out_be32(&xics_per_cpu[n_cpu]->xirr.word, value); | 96 | out_be32(&xics_per_cpu[n_cpu]->xirr.word, value); |
119 | } | 97 | } |
120 | 98 | ||
121 | static void pSeries_cppr_info(int n_cpu, u8 value) | 99 | static inline void direct_cppr_info(int n_cpu, u8 value) |
122 | { | 100 | { |
123 | out_8(&xics_per_cpu[n_cpu]->xirr.bytes[0], value); | 101 | out_8(&xics_per_cpu[n_cpu]->xirr.bytes[0], value); |
124 | } | 102 | } |
125 | 103 | ||
126 | static void pSeries_qirr_info(int n_cpu, u8 value) | 104 | static inline void direct_qirr_info(int n_cpu, u8 value) |
127 | { | 105 | { |
128 | out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value); | 106 | out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value); |
129 | } | 107 | } |
130 | 108 | ||
131 | static xics_ops pSeries_ops = { | ||
132 | pSeries_xirr_info_get, | ||
133 | pSeries_xirr_info_set, | ||
134 | pSeries_cppr_info, | ||
135 | pSeries_qirr_info | ||
136 | }; | ||
137 | 109 | ||
138 | static xics_ops *ops = &pSeries_ops; | 110 | /* LPAR low level accessors */ |
139 | 111 | ||
140 | 112 | ||
141 | /* LPAR */ | ||
142 | |||
143 | static inline long plpar_eoi(unsigned long xirr) | 113 | static inline long plpar_eoi(unsigned long xirr) |
144 | { | 114 | { |
145 | return plpar_hcall_norets(H_EOI, xirr); | 115 | return plpar_hcall_norets(H_EOI, xirr); |
@@ -161,7 +131,7 @@ static inline long plpar_xirr(unsigned long *xirr_ret) | |||
161 | return plpar_hcall(H_XIRR, 0, 0, 0, 0, xirr_ret, &dummy, &dummy); | 131 | return plpar_hcall(H_XIRR, 0, 0, 0, 0, xirr_ret, &dummy, &dummy); |
162 | } | 132 | } |
163 | 133 | ||
164 | static int pSeriesLP_xirr_info_get(int n_cpu) | 134 | static inline unsigned int lpar_xirr_info_get(int n_cpu) |
165 | { | 135 | { |
166 | unsigned long lpar_rc; | 136 | unsigned long lpar_rc; |
167 | unsigned long return_value; | 137 | unsigned long return_value; |
@@ -169,10 +139,10 @@ static int pSeriesLP_xirr_info_get(int n_cpu) | |||
169 | lpar_rc = plpar_xirr(&return_value); | 139 | lpar_rc = plpar_xirr(&return_value); |
170 | if (lpar_rc != H_SUCCESS) | 140 | if (lpar_rc != H_SUCCESS) |
171 | panic(" bad return code xirr - rc = %lx \n", lpar_rc); | 141 | panic(" bad return code xirr - rc = %lx \n", lpar_rc); |
172 | return (int)return_value; | 142 | return (unsigned int)return_value; |
173 | } | 143 | } |
174 | 144 | ||
175 | static void pSeriesLP_xirr_info_set(int n_cpu, int value) | 145 | static inline void lpar_xirr_info_set(int n_cpu, int value) |
176 | { | 146 | { |
177 | unsigned long lpar_rc; | 147 | unsigned long lpar_rc; |
178 | unsigned long val64 = value & 0xffffffff; | 148 | unsigned long val64 = value & 0xffffffff; |
@@ -183,7 +153,7 @@ static void pSeriesLP_xirr_info_set(int n_cpu, int value) | |||
183 | val64); | 153 | val64); |
184 | } | 154 | } |
185 | 155 | ||
186 | void pSeriesLP_cppr_info(int n_cpu, u8 value) | 156 | static inline void lpar_cppr_info(int n_cpu, u8 value) |
187 | { | 157 | { |
188 | unsigned long lpar_rc; | 158 | unsigned long lpar_rc; |
189 | 159 | ||
@@ -192,7 +162,7 @@ void pSeriesLP_cppr_info(int n_cpu, u8 value) | |||
192 | panic("bad return code cppr - rc = %lx\n", lpar_rc); | 162 | panic("bad return code cppr - rc = %lx\n", lpar_rc); |
193 | } | 163 | } |
194 | 164 | ||
195 | static void pSeriesLP_qirr_info(int n_cpu , u8 value) | 165 | static inline void lpar_qirr_info(int n_cpu , u8 value) |
196 | { | 166 | { |
197 | unsigned long lpar_rc; | 167 | unsigned long lpar_rc; |
198 | 168 | ||
@@ -201,43 +171,16 @@ static void pSeriesLP_qirr_info(int n_cpu , u8 value) | |||
201 | panic("bad return code qirr - rc = %lx\n", lpar_rc); | 171 | panic("bad return code qirr - rc = %lx\n", lpar_rc); |
202 | } | 172 | } |
203 | 173 | ||
204 | xics_ops pSeriesLP_ops = { | ||
205 | pSeriesLP_xirr_info_get, | ||
206 | pSeriesLP_xirr_info_set, | ||
207 | pSeriesLP_cppr_info, | ||
208 | pSeriesLP_qirr_info | ||
209 | }; | ||
210 | |||
211 | static unsigned int xics_startup(unsigned int virq) | ||
212 | { | ||
213 | unsigned int irq; | ||
214 | |||
215 | irq = irq_offset_down(virq); | ||
216 | if (radix_tree_insert(&irq_map, virt_irq_to_real(irq), | ||
217 | &virt_irq_to_real_map[irq]) == -ENOMEM) | ||
218 | printk(KERN_CRIT "Out of memory creating real -> virtual" | ||
219 | " IRQ mapping for irq %u (real 0x%x)\n", | ||
220 | virq, virt_irq_to_real(irq)); | ||
221 | xics_enable_irq(virq); | ||
222 | return 0; /* return value is ignored */ | ||
223 | } | ||
224 | 174 | ||
225 | static unsigned int real_irq_to_virt(unsigned int real_irq) | 175 | /* High level handlers and init code */ |
226 | { | ||
227 | unsigned int *ptr; | ||
228 | 176 | ||
229 | ptr = radix_tree_lookup(&irq_map, real_irq); | ||
230 | if (ptr == NULL) | ||
231 | return NO_IRQ; | ||
232 | return ptr - virt_irq_to_real_map; | ||
233 | } | ||
234 | 177 | ||
235 | #ifdef CONFIG_SMP | 178 | #ifdef CONFIG_SMP |
236 | static int get_irq_server(unsigned int irq) | 179 | static int get_irq_server(unsigned int virq) |
237 | { | 180 | { |
238 | unsigned int server; | 181 | unsigned int server; |
239 | /* For the moment only implement delivery to all cpus or one cpu */ | 182 | /* For the moment only implement delivery to all cpus or one cpu */ |
240 | cpumask_t cpumask = irq_desc[irq].affinity; | 183 | cpumask_t cpumask = irq_desc[virq].affinity; |
241 | cpumask_t tmp = CPU_MASK_NONE; | 184 | cpumask_t tmp = CPU_MASK_NONE; |
242 | 185 | ||
243 | if (!distribute_irqs) | 186 | if (!distribute_irqs) |
@@ -258,23 +201,28 @@ static int get_irq_server(unsigned int irq) | |||
258 | 201 | ||
259 | } | 202 | } |
260 | #else | 203 | #else |
261 | static int get_irq_server(unsigned int irq) | 204 | static int get_irq_server(unsigned int virq) |
262 | { | 205 | { |
263 | return default_server; | 206 | return default_server; |
264 | } | 207 | } |
265 | #endif | 208 | #endif |
266 | 209 | ||
267 | static void xics_enable_irq(unsigned int virq) | 210 | |
211 | static void xics_unmask_irq(unsigned int virq) | ||
268 | { | 212 | { |
269 | unsigned int irq; | 213 | unsigned int irq; |
270 | int call_status; | 214 | int call_status; |
271 | unsigned int server; | 215 | unsigned int server; |
272 | 216 | ||
273 | irq = virt_irq_to_real(irq_offset_down(virq)); | 217 | pr_debug("xics: unmask virq %d\n", virq); |
274 | if (irq == XICS_IPI) | 218 | |
219 | irq = (unsigned int)irq_map[virq].hwirq; | ||
220 | pr_debug(" -> map to hwirq 0x%x\n", irq); | ||
221 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) | ||
275 | return; | 222 | return; |
276 | 223 | ||
277 | server = get_irq_server(virq); | 224 | server = get_irq_server(virq); |
225 | |||
278 | call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server, | 226 | call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server, |
279 | DEFAULT_PRIORITY); | 227 | DEFAULT_PRIORITY); |
280 | if (call_status != 0) { | 228 | if (call_status != 0) { |
@@ -293,7 +241,7 @@ static void xics_enable_irq(unsigned int virq) | |||
293 | } | 241 | } |
294 | } | 242 | } |
295 | 243 | ||
296 | static void xics_disable_real_irq(unsigned int irq) | 244 | static void xics_mask_real_irq(unsigned int irq) |
297 | { | 245 | { |
298 | int call_status; | 246 | int call_status; |
299 | unsigned int server; | 247 | unsigned int server; |
@@ -318,75 +266,86 @@ static void xics_disable_real_irq(unsigned int irq) | |||
318 | } | 266 | } |
319 | } | 267 | } |
320 | 268 | ||
321 | static void xics_disable_irq(unsigned int virq) | 269 | static void xics_mask_irq(unsigned int virq) |
322 | { | 270 | { |
323 | unsigned int irq; | 271 | unsigned int irq; |
324 | 272 | ||
325 | irq = virt_irq_to_real(irq_offset_down(virq)); | 273 | pr_debug("xics: mask virq %d\n", virq); |
326 | xics_disable_real_irq(irq); | 274 | |
275 | irq = (unsigned int)irq_map[virq].hwirq; | ||
276 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) | ||
277 | return; | ||
278 | xics_mask_real_irq(irq); | ||
279 | } | ||
280 | |||
281 | static unsigned int xics_startup(unsigned int virq) | ||
282 | { | ||
283 | unsigned int irq; | ||
284 | |||
285 | /* force a reverse mapping of the interrupt so it gets in the cache */ | ||
286 | irq = (unsigned int)irq_map[virq].hwirq; | ||
287 | irq_radix_revmap(xics_host, irq); | ||
288 | |||
289 | /* unmask it */ | ||
290 | xics_unmask_irq(virq); | ||
291 | return 0; | ||
327 | } | 292 | } |
328 | 293 | ||
329 | static void xics_end_irq(unsigned int irq) | 294 | static void xics_eoi_direct(unsigned int virq) |
330 | { | 295 | { |
331 | int cpu = smp_processor_id(); | 296 | int cpu = smp_processor_id(); |
297 | unsigned int irq = (unsigned int)irq_map[virq].hwirq; | ||
332 | 298 | ||
333 | iosync(); | 299 | iosync(); |
334 | ops->xirr_info_set(cpu, ((0xff << 24) | | 300 | direct_xirr_info_set(cpu, (0xff << 24) | irq); |
335 | (virt_irq_to_real(irq_offset_down(irq))))); | ||
336 | |||
337 | } | 301 | } |
338 | 302 | ||
339 | static void xics_mask_and_ack_irq(unsigned int irq) | 303 | |
304 | static void xics_eoi_lpar(unsigned int virq) | ||
340 | { | 305 | { |
341 | int cpu = smp_processor_id(); | 306 | int cpu = smp_processor_id(); |
307 | unsigned int irq = (unsigned int)irq_map[virq].hwirq; | ||
342 | 308 | ||
343 | if (irq < irq_offset_value()) { | 309 | iosync(); |
344 | i8259_pic.ack(irq); | 310 | lpar_xirr_info_set(cpu, (0xff << 24) | irq); |
345 | iosync(); | ||
346 | ops->xirr_info_set(cpu, ((0xff<<24) | | ||
347 | xics_irq_8259_cascade_real)); | ||
348 | iosync(); | ||
349 | } | ||
350 | } | 311 | } |
351 | 312 | ||
352 | int xics_get_irq(struct pt_regs *regs) | 313 | static inline unsigned int xics_remap_irq(unsigned int vec) |
353 | { | 314 | { |
354 | unsigned int cpu = smp_processor_id(); | 315 | unsigned int irq; |
355 | unsigned int vec; | ||
356 | int irq; | ||
357 | 316 | ||
358 | vec = ops->xirr_info_get(cpu); | ||
359 | /* (vec >> 24) == old priority */ | ||
360 | vec &= 0x00ffffff; | 317 | vec &= 0x00ffffff; |
361 | 318 | ||
362 | /* for sanity, this had better be < NR_IRQS - 16 */ | 319 | if (vec == XICS_IRQ_SPURIOUS) |
363 | if (vec == xics_irq_8259_cascade_real) { | 320 | return NO_IRQ; |
364 | irq = i8259_irq(regs); | 321 | irq = irq_radix_revmap(xics_host, vec); |
365 | xics_end_irq(irq_offset_up(xics_irq_8259_cascade)); | 322 | if (likely(irq != NO_IRQ)) |
366 | } else if (vec == XICS_IRQ_SPURIOUS) { | 323 | return irq; |
367 | irq = -1; | 324 | |
368 | } else { | 325 | printk(KERN_ERR "Interrupt %u (real) is invalid," |
369 | irq = real_irq_to_virt(vec); | 326 | " disabling it.\n", vec); |
370 | if (irq == NO_IRQ) | 327 | xics_mask_real_irq(vec); |
371 | irq = real_irq_to_virt_slowpath(vec); | 328 | return NO_IRQ; |
372 | if (irq == NO_IRQ) { | ||
373 | printk(KERN_ERR "Interrupt %u (real) is invalid," | ||
374 | " disabling it.\n", vec); | ||
375 | xics_disable_real_irq(vec); | ||
376 | } else | ||
377 | irq = irq_offset_up(irq); | ||
378 | } | ||
379 | return irq; | ||
380 | } | 329 | } |
381 | 330 | ||
382 | #ifdef CONFIG_SMP | 331 | static unsigned int xics_get_irq_direct(struct pt_regs *regs) |
332 | { | ||
333 | unsigned int cpu = smp_processor_id(); | ||
383 | 334 | ||
384 | static irqreturn_t xics_ipi_action(int irq, void *dev_id, struct pt_regs *regs) | 335 | return xics_remap_irq(direct_xirr_info_get(cpu)); |
336 | } | ||
337 | |||
338 | static unsigned int xics_get_irq_lpar(struct pt_regs *regs) | ||
385 | { | 339 | { |
386 | int cpu = smp_processor_id(); | 340 | unsigned int cpu = smp_processor_id(); |
341 | |||
342 | return xics_remap_irq(lpar_xirr_info_get(cpu)); | ||
343 | } | ||
387 | 344 | ||
388 | ops->qirr_info(cpu, 0xff); | 345 | #ifdef CONFIG_SMP |
389 | 346 | ||
347 | static irqreturn_t xics_ipi_dispatch(int cpu, struct pt_regs *regs) | ||
348 | { | ||
390 | WARN_ON(cpu_is_offline(cpu)); | 349 | WARN_ON(cpu_is_offline(cpu)); |
391 | 350 | ||
392 | while (xics_ipi_message[cpu].value) { | 351 | while (xics_ipi_message[cpu].value) { |
@@ -418,18 +377,88 @@ static irqreturn_t xics_ipi_action(int irq, void *dev_id, struct pt_regs *regs) | |||
418 | return IRQ_HANDLED; | 377 | return IRQ_HANDLED; |
419 | } | 378 | } |
420 | 379 | ||
380 | static irqreturn_t xics_ipi_action_direct(int irq, void *dev_id, struct pt_regs *regs) | ||
381 | { | ||
382 | int cpu = smp_processor_id(); | ||
383 | |||
384 | direct_qirr_info(cpu, 0xff); | ||
385 | |||
386 | return xics_ipi_dispatch(cpu, regs); | ||
387 | } | ||
388 | |||
389 | static irqreturn_t xics_ipi_action_lpar(int irq, void *dev_id, struct pt_regs *regs) | ||
390 | { | ||
391 | int cpu = smp_processor_id(); | ||
392 | |||
393 | lpar_qirr_info(cpu, 0xff); | ||
394 | |||
395 | return xics_ipi_dispatch(cpu, regs); | ||
396 | } | ||
397 | |||
421 | void xics_cause_IPI(int cpu) | 398 | void xics_cause_IPI(int cpu) |
422 | { | 399 | { |
423 | ops->qirr_info(cpu, IPI_PRIORITY); | 400 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
401 | lpar_qirr_info(cpu, IPI_PRIORITY); | ||
402 | else | ||
403 | direct_qirr_info(cpu, IPI_PRIORITY); | ||
424 | } | 404 | } |
405 | |||
425 | #endif /* CONFIG_SMP */ | 406 | #endif /* CONFIG_SMP */ |
426 | 407 | ||
408 | static void xics_set_cpu_priority(int cpu, unsigned char cppr) | ||
409 | { | ||
410 | if (firmware_has_feature(FW_FEATURE_LPAR)) | ||
411 | lpar_cppr_info(cpu, cppr); | ||
412 | else | ||
413 | direct_cppr_info(cpu, cppr); | ||
414 | iosync(); | ||
415 | } | ||
416 | |||
417 | static void xics_set_affinity(unsigned int virq, cpumask_t cpumask) | ||
418 | { | ||
419 | unsigned int irq; | ||
420 | int status; | ||
421 | int xics_status[2]; | ||
422 | unsigned long newmask; | ||
423 | cpumask_t tmp = CPU_MASK_NONE; | ||
424 | |||
425 | irq = (unsigned int)irq_map[virq].hwirq; | ||
426 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) | ||
427 | return; | ||
428 | |||
429 | status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); | ||
430 | |||
431 | if (status) { | ||
432 | printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive " | ||
433 | "returns %d\n", irq, status); | ||
434 | return; | ||
435 | } | ||
436 | |||
437 | /* For the moment only implement delivery to all cpus or one cpu */ | ||
438 | if (cpus_equal(cpumask, CPU_MASK_ALL)) { | ||
439 | newmask = default_distrib_server; | ||
440 | } else { | ||
441 | cpus_and(tmp, cpu_online_map, cpumask); | ||
442 | if (cpus_empty(tmp)) | ||
443 | return; | ||
444 | newmask = get_hard_smp_processor_id(first_cpu(tmp)); | ||
445 | } | ||
446 | |||
447 | status = rtas_call(ibm_set_xive, 3, 1, NULL, | ||
448 | irq, newmask, xics_status[1]); | ||
449 | |||
450 | if (status) { | ||
451 | printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive " | ||
452 | "returns %d\n", irq, status); | ||
453 | return; | ||
454 | } | ||
455 | } | ||
456 | |||
427 | void xics_setup_cpu(void) | 457 | void xics_setup_cpu(void) |
428 | { | 458 | { |
429 | int cpu = smp_processor_id(); | 459 | int cpu = smp_processor_id(); |
430 | 460 | ||
431 | ops->cppr_info(cpu, 0xff); | 461 | xics_set_cpu_priority(cpu, 0xff); |
432 | iosync(); | ||
433 | 462 | ||
434 | /* | 463 | /* |
435 | * Put the calling processor into the GIQ. This is really only | 464 | * Put the calling processor into the GIQ. This is really only |
@@ -442,72 +471,266 @@ void xics_setup_cpu(void) | |||
442 | (1UL << interrupt_server_size) - 1 - default_distrib_server, 1); | 471 | (1UL << interrupt_server_size) - 1 - default_distrib_server, 1); |
443 | } | 472 | } |
444 | 473 | ||
445 | void xics_init_IRQ(void) | 474 | |
475 | static struct irq_chip xics_pic_direct = { | ||
476 | .typename = " XICS ", | ||
477 | .startup = xics_startup, | ||
478 | .mask = xics_mask_irq, | ||
479 | .unmask = xics_unmask_irq, | ||
480 | .eoi = xics_eoi_direct, | ||
481 | .set_affinity = xics_set_affinity | ||
482 | }; | ||
483 | |||
484 | |||
485 | static struct irq_chip xics_pic_lpar = { | ||
486 | .typename = " XICS ", | ||
487 | .startup = xics_startup, | ||
488 | .mask = xics_mask_irq, | ||
489 | .unmask = xics_unmask_irq, | ||
490 | .eoi = xics_eoi_lpar, | ||
491 | .set_affinity = xics_set_affinity | ||
492 | }; | ||
493 | |||
494 | |||
495 | static int xics_host_match(struct irq_host *h, struct device_node *node) | ||
496 | { | ||
497 | /* IBM machines have interrupt parents of various funky types for things | ||
498 | * like vdevices, events, etc... The trick we use here is to match | ||
499 | * everything here except the legacy 8259 which is compatible "chrp,iic" | ||
500 | */ | ||
501 | return !device_is_compatible(node, "chrp,iic"); | ||
502 | } | ||
503 | |||
504 | static int xics_host_map_direct(struct irq_host *h, unsigned int virq, | ||
505 | irq_hw_number_t hw, unsigned int flags) | ||
506 | { | ||
507 | unsigned int sense = flags & IRQ_TYPE_SENSE_MASK; | ||
508 | |||
509 | pr_debug("xics: map_direct virq %d, hwirq 0x%lx, flags: 0x%x\n", | ||
510 | virq, hw, flags); | ||
511 | |||
512 | if (sense && sense != IRQ_TYPE_LEVEL_LOW) | ||
513 | printk(KERN_WARNING "xics: using unsupported sense 0x%x" | ||
514 | " for irq %d (h: 0x%lx)\n", flags, virq, hw); | ||
515 | |||
516 | get_irq_desc(virq)->status |= IRQ_LEVEL; | ||
517 | set_irq_chip_and_handler(virq, &xics_pic_direct, handle_fasteoi_irq); | ||
518 | return 0; | ||
519 | } | ||
520 | |||
521 | static int xics_host_map_lpar(struct irq_host *h, unsigned int virq, | ||
522 | irq_hw_number_t hw, unsigned int flags) | ||
523 | { | ||
524 | unsigned int sense = flags & IRQ_TYPE_SENSE_MASK; | ||
525 | |||
526 | pr_debug("xics: map_lpar virq %d, hwirq 0x%lx, flags: 0x%x\n", | ||
527 | virq, hw, flags); | ||
528 | |||
529 | if (sense && sense != IRQ_TYPE_LEVEL_LOW) | ||
530 | printk(KERN_WARNING "xics: using unsupported sense 0x%x" | ||
531 | " for irq %d (h: 0x%lx)\n", flags, virq, hw); | ||
532 | |||
533 | get_irq_desc(virq)->status |= IRQ_LEVEL; | ||
534 | set_irq_chip_and_handler(virq, &xics_pic_lpar, handle_fasteoi_irq); | ||
535 | return 0; | ||
536 | } | ||
537 | |||
538 | static int xics_host_xlate(struct irq_host *h, struct device_node *ct, | ||
539 | u32 *intspec, unsigned int intsize, | ||
540 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | ||
541 | |||
542 | { | ||
543 | /* Current xics implementation translates everything | ||
544 | * to level. It is not technically right for MSIs but this | ||
545 | * is irrelevant at this point. We might get smarter in the future | ||
546 | */ | ||
547 | *out_hwirq = intspec[0]; | ||
548 | *out_flags = IRQ_TYPE_LEVEL_LOW; | ||
549 | |||
550 | return 0; | ||
551 | } | ||
552 | |||
553 | static struct irq_host_ops xics_host_direct_ops = { | ||
554 | .match = xics_host_match, | ||
555 | .map = xics_host_map_direct, | ||
556 | .xlate = xics_host_xlate, | ||
557 | }; | ||
558 | |||
559 | static struct irq_host_ops xics_host_lpar_ops = { | ||
560 | .match = xics_host_match, | ||
561 | .map = xics_host_map_lpar, | ||
562 | .xlate = xics_host_xlate, | ||
563 | }; | ||
564 | |||
565 | static void __init xics_init_host(void) | ||
566 | { | ||
567 | struct irq_host_ops *ops; | ||
568 | |||
569 | if (firmware_has_feature(FW_FEATURE_LPAR)) | ||
570 | ops = &xics_host_lpar_ops; | ||
571 | else | ||
572 | ops = &xics_host_direct_ops; | ||
573 | xics_host = irq_alloc_host(IRQ_HOST_MAP_TREE, 0, ops, | ||
574 | XICS_IRQ_SPURIOUS); | ||
575 | BUG_ON(xics_host == NULL); | ||
576 | irq_set_default_host(xics_host); | ||
577 | } | ||
578 | |||
579 | static void __init xics_map_one_cpu(int hw_id, unsigned long addr, | ||
580 | unsigned long size) | ||
446 | { | 581 | { |
582 | #ifdef CONFIG_SMP | ||
447 | int i; | 583 | int i; |
448 | unsigned long intr_size = 0; | ||
449 | struct device_node *np; | ||
450 | uint *ireg, ilen, indx = 0; | ||
451 | unsigned long intr_base = 0; | ||
452 | struct xics_interrupt_node { | ||
453 | unsigned long addr; | ||
454 | unsigned long size; | ||
455 | } intnodes[NR_CPUS]; | ||
456 | 584 | ||
457 | ppc64_boot_msg(0x20, "XICS Init"); | 585 | /* This may look gross but it's good enough for now, we don't quite |
586 | * have a hard -> linux processor id matching. | ||
587 | */ | ||
588 | for_each_possible_cpu(i) { | ||
589 | if (!cpu_present(i)) | ||
590 | continue; | ||
591 | if (hw_id == get_hard_smp_processor_id(i)) { | ||
592 | xics_per_cpu[i] = ioremap(addr, size); | ||
593 | return; | ||
594 | } | ||
595 | } | ||
596 | #else | ||
597 | if (hw_id != 0) | ||
598 | return; | ||
599 | xics_per_cpu[0] = ioremap(addr, size); | ||
600 | #endif /* CONFIG_SMP */ | ||
601 | } | ||
458 | 602 | ||
459 | ibm_get_xive = rtas_token("ibm,get-xive"); | 603 | static void __init xics_init_one_node(struct device_node *np, |
460 | ibm_set_xive = rtas_token("ibm,set-xive"); | 604 | unsigned int *indx) |
461 | ibm_int_on = rtas_token("ibm,int-on"); | 605 | { |
462 | ibm_int_off = rtas_token("ibm,int-off"); | 606 | unsigned int ilen; |
607 | u32 *ireg; | ||
463 | 608 | ||
464 | np = of_find_node_by_type(NULL, "PowerPC-External-Interrupt-Presentation"); | 609 | /* This code does the theorically broken assumption that the interrupt |
465 | if (!np) | 610 | * server numbers are the same as the hard CPU numbers. |
466 | panic("xics_init_IRQ: can't find interrupt presentation"); | 611 | * This happens to be the case so far but we are playing with fire... |
612 | * should be fixed one of these days. -BenH. | ||
613 | */ | ||
614 | ireg = (u32 *)get_property(np, "ibm,interrupt-server-ranges", NULL); | ||
467 | 615 | ||
468 | nextnode: | 616 | /* Do that ever happen ? we'll know soon enough... but even good'old |
469 | ireg = (uint *)get_property(np, "ibm,interrupt-server-ranges", NULL); | 617 | * f80 does have that property .. |
618 | */ | ||
619 | WARN_ON(ireg == NULL); | ||
470 | if (ireg) { | 620 | if (ireg) { |
471 | /* | 621 | /* |
472 | * set node starting index for this node | 622 | * set node starting index for this node |
473 | */ | 623 | */ |
474 | indx = *ireg; | 624 | *indx = *ireg; |
475 | } | 625 | } |
476 | 626 | ireg = (u32 *)get_property(np, "reg", &ilen); | |
477 | ireg = (uint *)get_property(np, "reg", &ilen); | ||
478 | if (!ireg) | 627 | if (!ireg) |
479 | panic("xics_init_IRQ: can't find interrupt reg property"); | 628 | panic("xics_init_IRQ: can't find interrupt reg property"); |
480 | 629 | ||
481 | while (ilen) { | 630 | while (ilen >= (4 * sizeof(u32))) { |
482 | intnodes[indx].addr = (unsigned long)*ireg++ << 32; | 631 | unsigned long addr, size; |
483 | ilen -= sizeof(uint); | 632 | |
484 | intnodes[indx].addr |= *ireg++; | 633 | /* XXX Use proper OF parsing code here !!! */ |
485 | ilen -= sizeof(uint); | 634 | addr = (unsigned long)*ireg++ << 32; |
486 | intnodes[indx].size = (unsigned long)*ireg++ << 32; | 635 | ilen -= sizeof(u32); |
487 | ilen -= sizeof(uint); | 636 | addr |= *ireg++; |
488 | intnodes[indx].size |= *ireg++; | 637 | ilen -= sizeof(u32); |
489 | ilen -= sizeof(uint); | 638 | size = (unsigned long)*ireg++ << 32; |
490 | indx++; | 639 | ilen -= sizeof(u32); |
491 | if (indx >= NR_CPUS) break; | 640 | size |= *ireg++; |
641 | ilen -= sizeof(u32); | ||
642 | xics_map_one_cpu(*indx, addr, size); | ||
643 | (*indx)++; | ||
644 | } | ||
645 | } | ||
646 | |||
647 | |||
648 | static void __init xics_setup_8259_cascade(void) | ||
649 | { | ||
650 | struct device_node *np, *old, *found = NULL; | ||
651 | int cascade, naddr; | ||
652 | u32 *addrp; | ||
653 | unsigned long intack = 0; | ||
654 | |||
655 | for_each_node_by_type(np, "interrupt-controller") | ||
656 | if (device_is_compatible(np, "chrp,iic")) { | ||
657 | found = np; | ||
658 | break; | ||
659 | } | ||
660 | if (found == NULL) { | ||
661 | printk(KERN_DEBUG "xics: no ISA interrupt controller\n"); | ||
662 | return; | ||
663 | } | ||
664 | cascade = irq_of_parse_and_map(found, 0); | ||
665 | if (cascade == NO_IRQ) { | ||
666 | printk(KERN_ERR "xics: failed to map cascade interrupt"); | ||
667 | return; | ||
668 | } | ||
669 | pr_debug("xics: cascade mapped to irq %d\n", cascade); | ||
670 | |||
671 | for (old = of_node_get(found); old != NULL ; old = np) { | ||
672 | np = of_get_parent(old); | ||
673 | of_node_put(old); | ||
674 | if (np == NULL) | ||
675 | break; | ||
676 | if (strcmp(np->name, "pci") != 0) | ||
677 | continue; | ||
678 | addrp = (u32 *)get_property(np, "8259-interrupt-acknowledge", NULL); | ||
679 | if (addrp == NULL) | ||
680 | continue; | ||
681 | naddr = prom_n_addr_cells(np); | ||
682 | intack = addrp[naddr-1]; | ||
683 | if (naddr > 1) | ||
684 | intack |= ((unsigned long)addrp[naddr-2]) << 32; | ||
685 | } | ||
686 | if (intack) | ||
687 | printk(KERN_DEBUG "xics: PCI 8259 intack at 0x%016lx\n", intack); | ||
688 | i8259_init(found, intack); | ||
689 | of_node_put(found); | ||
690 | set_irq_chained_handler(cascade, pseries_8259_cascade); | ||
691 | } | ||
692 | |||
693 | void __init xics_init_IRQ(void) | ||
694 | { | ||
695 | int i; | ||
696 | struct device_node *np; | ||
697 | u32 *ireg, ilen, indx = 0; | ||
698 | int found = 0; | ||
699 | |||
700 | ppc64_boot_msg(0x20, "XICS Init"); | ||
701 | |||
702 | ibm_get_xive = rtas_token("ibm,get-xive"); | ||
703 | ibm_set_xive = rtas_token("ibm,set-xive"); | ||
704 | ibm_int_on = rtas_token("ibm,int-on"); | ||
705 | ibm_int_off = rtas_token("ibm,int-off"); | ||
706 | |||
707 | for_each_node_by_type(np, "PowerPC-External-Interrupt-Presentation") { | ||
708 | found = 1; | ||
709 | if (firmware_has_feature(FW_FEATURE_LPAR)) | ||
710 | break; | ||
711 | xics_init_one_node(np, &indx); | ||
492 | } | 712 | } |
713 | if (found == 0) | ||
714 | return; | ||
493 | 715 | ||
494 | np = of_find_node_by_type(np, "PowerPC-External-Interrupt-Presentation"); | 716 | xics_init_host(); |
495 | if ((indx < NR_CPUS) && np) goto nextnode; | ||
496 | 717 | ||
497 | /* Find the server numbers for the boot cpu. */ | 718 | /* Find the server numbers for the boot cpu. */ |
498 | for (np = of_find_node_by_type(NULL, "cpu"); | 719 | for (np = of_find_node_by_type(NULL, "cpu"); |
499 | np; | 720 | np; |
500 | np = of_find_node_by_type(np, "cpu")) { | 721 | np = of_find_node_by_type(np, "cpu")) { |
501 | ireg = (uint *)get_property(np, "reg", &ilen); | 722 | ireg = (u32 *)get_property(np, "reg", &ilen); |
502 | if (ireg && ireg[0] == get_hard_smp_processor_id(boot_cpuid)) { | 723 | if (ireg && ireg[0] == get_hard_smp_processor_id(boot_cpuid)) { |
503 | ireg = (uint *)get_property(np, "ibm,ppc-interrupt-gserver#s", | 724 | ireg = (u32 *)get_property(np, |
504 | &ilen); | 725 | "ibm,ppc-interrupt-gserver#s", |
726 | &ilen); | ||
505 | i = ilen / sizeof(int); | 727 | i = ilen / sizeof(int); |
506 | if (ireg && i > 0) { | 728 | if (ireg && i > 0) { |
507 | default_server = ireg[0]; | 729 | default_server = ireg[0]; |
508 | default_distrib_server = ireg[i-1]; /* take last element */ | 730 | /* take last element */ |
731 | default_distrib_server = ireg[i-1]; | ||
509 | } | 732 | } |
510 | ireg = (uint *)get_property(np, | 733 | ireg = (u32 *)get_property(np, |
511 | "ibm,interrupt-server#-size", NULL); | 734 | "ibm,interrupt-server#-size", NULL); |
512 | if (ireg) | 735 | if (ireg) |
513 | interrupt_server_size = *ireg; | 736 | interrupt_server_size = *ireg; |
@@ -516,135 +739,48 @@ nextnode: | |||
516 | } | 739 | } |
517 | of_node_put(np); | 740 | of_node_put(np); |
518 | 741 | ||
519 | intr_base = intnodes[0].addr; | ||
520 | intr_size = intnodes[0].size; | ||
521 | |||
522 | np = of_find_node_by_type(NULL, "interrupt-controller"); | ||
523 | if (!np) { | ||
524 | printk(KERN_DEBUG "xics: no ISA interrupt controller\n"); | ||
525 | xics_irq_8259_cascade_real = -1; | ||
526 | xics_irq_8259_cascade = -1; | ||
527 | } else { | ||
528 | ireg = (uint *) get_property(np, "interrupts", NULL); | ||
529 | if (!ireg) | ||
530 | panic("xics_init_IRQ: can't find ISA interrupts property"); | ||
531 | |||
532 | xics_irq_8259_cascade_real = *ireg; | ||
533 | xics_irq_8259_cascade | ||
534 | = virt_irq_create_mapping(xics_irq_8259_cascade_real); | ||
535 | i8259_init(0, 0); | ||
536 | of_node_put(np); | ||
537 | } | ||
538 | |||
539 | if (firmware_has_feature(FW_FEATURE_LPAR)) | 742 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
540 | ops = &pSeriesLP_ops; | 743 | ppc_md.get_irq = xics_get_irq_lpar; |
541 | else { | 744 | else |
542 | #ifdef CONFIG_SMP | 745 | ppc_md.get_irq = xics_get_irq_direct; |
543 | for_each_possible_cpu(i) { | ||
544 | int hard_id; | ||
545 | |||
546 | /* FIXME: Do this dynamically! --RR */ | ||
547 | if (!cpu_present(i)) | ||
548 | continue; | ||
549 | |||
550 | hard_id = get_hard_smp_processor_id(i); | ||
551 | xics_per_cpu[i] = ioremap(intnodes[hard_id].addr, | ||
552 | intnodes[hard_id].size); | ||
553 | } | ||
554 | #else | ||
555 | xics_per_cpu[0] = ioremap(intr_base, intr_size); | ||
556 | #endif /* CONFIG_SMP */ | ||
557 | } | ||
558 | |||
559 | for (i = irq_offset_value(); i < NR_IRQS; ++i) | ||
560 | get_irq_desc(i)->chip = &xics_pic; | ||
561 | 746 | ||
562 | xics_setup_cpu(); | 747 | xics_setup_cpu(); |
563 | 748 | ||
749 | xics_setup_8259_cascade(); | ||
750 | |||
564 | ppc64_boot_msg(0x21, "XICS Done"); | 751 | ppc64_boot_msg(0x21, "XICS Done"); |
565 | } | 752 | } |
566 | 753 | ||
567 | /* | ||
568 | * We cant do this in init_IRQ because we need the memory subsystem up for | ||
569 | * request_irq() | ||
570 | */ | ||
571 | static int __init xics_setup_i8259(void) | ||
572 | { | ||
573 | if (ppc64_interrupt_controller == IC_PPC_XIC && | ||
574 | xics_irq_8259_cascade != -1) { | ||
575 | if (request_irq(irq_offset_up(xics_irq_8259_cascade), | ||
576 | no_action, 0, "8259 cascade", NULL)) | ||
577 | printk(KERN_ERR "xics_setup_i8259: couldn't get 8259 " | ||
578 | "cascade\n"); | ||
579 | } | ||
580 | return 0; | ||
581 | } | ||
582 | arch_initcall(xics_setup_i8259); | ||
583 | 754 | ||
584 | #ifdef CONFIG_SMP | 755 | #ifdef CONFIG_SMP |
585 | void xics_request_IPIs(void) | 756 | void xics_request_IPIs(void) |
586 | { | 757 | { |
587 | virt_irq_to_real_map[XICS_IPI] = XICS_IPI; | 758 | unsigned int ipi; |
759 | |||
760 | ipi = irq_create_mapping(xics_host, XICS_IPI, 0); | ||
761 | BUG_ON(ipi == NO_IRQ); | ||
588 | 762 | ||
589 | /* | 763 | /* |
590 | * IPIs are marked IRQF_DISABLED as they must run with irqs | 764 | * IPIs are marked IRQF_DISABLED as they must run with irqs |
591 | * disabled | 765 | * disabled |
592 | */ | 766 | */ |
593 | request_irq(irq_offset_up(XICS_IPI), xics_ipi_action, | 767 | set_irq_handler(ipi, handle_percpu_irq); |
594 | IRQF_DISABLED, "IPI", NULL); | 768 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
595 | get_irq_desc(irq_offset_up(XICS_IPI))->status |= IRQ_PER_CPU; | 769 | request_irq(ipi, xics_ipi_action_lpar, IRQF_DISABLED, |
596 | } | 770 | "IPI", NULL); |
597 | #endif | 771 | else |
598 | 772 | request_irq(ipi, xics_ipi_action_direct, IRQF_DISABLED, | |
599 | static void xics_set_affinity(unsigned int virq, cpumask_t cpumask) | 773 | "IPI", NULL); |
600 | { | ||
601 | unsigned int irq; | ||
602 | int status; | ||
603 | int xics_status[2]; | ||
604 | unsigned long newmask; | ||
605 | cpumask_t tmp = CPU_MASK_NONE; | ||
606 | |||
607 | irq = virt_irq_to_real(irq_offset_down(virq)); | ||
608 | if (irq == XICS_IPI || irq == NO_IRQ) | ||
609 | return; | ||
610 | |||
611 | status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); | ||
612 | |||
613 | if (status) { | ||
614 | printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive " | ||
615 | "returns %d\n", irq, status); | ||
616 | return; | ||
617 | } | ||
618 | |||
619 | /* For the moment only implement delivery to all cpus or one cpu */ | ||
620 | if (cpus_equal(cpumask, CPU_MASK_ALL)) { | ||
621 | newmask = default_distrib_server; | ||
622 | } else { | ||
623 | cpus_and(tmp, cpu_online_map, cpumask); | ||
624 | if (cpus_empty(tmp)) | ||
625 | return; | ||
626 | newmask = get_hard_smp_processor_id(first_cpu(tmp)); | ||
627 | } | ||
628 | |||
629 | status = rtas_call(ibm_set_xive, 3, 1, NULL, | ||
630 | irq, newmask, xics_status[1]); | ||
631 | |||
632 | if (status) { | ||
633 | printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive " | ||
634 | "returns %d\n", irq, status); | ||
635 | return; | ||
636 | } | ||
637 | } | 774 | } |
775 | #endif /* CONFIG_SMP */ | ||
638 | 776 | ||
639 | void xics_teardown_cpu(int secondary) | 777 | void xics_teardown_cpu(int secondary) |
640 | { | 778 | { |
641 | int cpu = smp_processor_id(); | 779 | int cpu = smp_processor_id(); |
780 | unsigned int ipi; | ||
781 | struct irq_desc *desc; | ||
642 | 782 | ||
643 | ops->cppr_info(cpu, 0x00); | 783 | xics_set_cpu_priority(cpu, 0); |
644 | iosync(); | ||
645 | |||
646 | /* Clear IPI */ | ||
647 | ops->qirr_info(cpu, 0xff); | ||
648 | 784 | ||
649 | /* | 785 | /* |
650 | * we need to EOI the IPI if we got here from kexec down IPI | 786 | * we need to EOI the IPI if we got here from kexec down IPI |
@@ -653,7 +789,13 @@ void xics_teardown_cpu(int secondary) | |||
653 | * should we be flagging idle loop instead? | 789 | * should we be flagging idle loop instead? |
654 | * or creating some task to be scheduled? | 790 | * or creating some task to be scheduled? |
655 | */ | 791 | */ |
656 | ops->xirr_info_set(cpu, XICS_IPI); | 792 | |
793 | ipi = irq_find_mapping(xics_host, XICS_IPI); | ||
794 | if (ipi == XICS_IRQ_SPURIOUS) | ||
795 | return; | ||
796 | desc = get_irq_desc(ipi); | ||
797 | if (desc->chip && desc->chip->eoi) | ||
798 | desc->chip->eoi(XICS_IPI); | ||
657 | 799 | ||
658 | /* | 800 | /* |
659 | * Some machines need to have at least one cpu in the GIQ, | 801 | * Some machines need to have at least one cpu in the GIQ, |
@@ -661,8 +803,8 @@ void xics_teardown_cpu(int secondary) | |||
661 | */ | 803 | */ |
662 | if (secondary) | 804 | if (secondary) |
663 | rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, | 805 | rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, |
664 | (1UL << interrupt_server_size) - 1 - | 806 | (1UL << interrupt_server_size) - 1 - |
665 | default_distrib_server, 0); | 807 | default_distrib_server, 0); |
666 | } | 808 | } |
667 | 809 | ||
668 | #ifdef CONFIG_HOTPLUG_CPU | 810 | #ifdef CONFIG_HOTPLUG_CPU |
@@ -674,8 +816,7 @@ void xics_migrate_irqs_away(void) | |||
674 | unsigned int irq, virq, cpu = smp_processor_id(); | 816 | unsigned int irq, virq, cpu = smp_processor_id(); |
675 | 817 | ||
676 | /* Reject any interrupt that was queued to us... */ | 818 | /* Reject any interrupt that was queued to us... */ |
677 | ops->cppr_info(cpu, 0); | 819 | xics_set_cpu_priority(cpu, 0); |
678 | iosync(); | ||
679 | 820 | ||
680 | /* remove ourselves from the global interrupt queue */ | 821 | /* remove ourselves from the global interrupt queue */ |
681 | status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, | 822 | status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, |
@@ -683,24 +824,23 @@ void xics_migrate_irqs_away(void) | |||
683 | WARN_ON(status < 0); | 824 | WARN_ON(status < 0); |
684 | 825 | ||
685 | /* Allow IPIs again... */ | 826 | /* Allow IPIs again... */ |
686 | ops->cppr_info(cpu, DEFAULT_PRIORITY); | 827 | xics_set_cpu_priority(cpu, DEFAULT_PRIORITY); |
687 | iosync(); | ||
688 | 828 | ||
689 | for_each_irq(virq) { | 829 | for_each_irq(virq) { |
690 | irq_desc_t *desc; | 830 | struct irq_desc *desc; |
691 | int xics_status[2]; | 831 | int xics_status[2]; |
692 | unsigned long flags; | 832 | unsigned long flags; |
693 | 833 | ||
694 | /* We cant set affinity on ISA interrupts */ | 834 | /* We cant set affinity on ISA interrupts */ |
695 | if (virq < irq_offset_value()) | 835 | if (virq < NUM_ISA_INTERRUPTS) |
696 | continue; | 836 | continue; |
697 | 837 | if (irq_map[virq].host != xics_host) | |
698 | desc = get_irq_desc(virq); | 838 | continue; |
699 | irq = virt_irq_to_real(irq_offset_down(virq)); | 839 | irq = (unsigned int)irq_map[virq].hwirq; |
700 | |||
701 | /* We need to get IPIs still. */ | 840 | /* We need to get IPIs still. */ |
702 | if (irq == XICS_IPI || irq == NO_IRQ) | 841 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) |
703 | continue; | 842 | continue; |
843 | desc = get_irq_desc(virq); | ||
704 | 844 | ||
705 | /* We only need to migrate enabled IRQS */ | 845 | /* We only need to migrate enabled IRQS */ |
706 | if (desc == NULL || desc->chip == NULL | 846 | if (desc == NULL || desc->chip == NULL |
diff --git a/arch/powerpc/platforms/pseries/xics.h b/arch/powerpc/platforms/pseries/xics.h index e14c70868f1d..6ee1055b0ffb 100644 --- a/arch/powerpc/platforms/pseries/xics.h +++ b/arch/powerpc/platforms/pseries/xics.h | |||
@@ -14,13 +14,12 @@ | |||
14 | 14 | ||
15 | #include <linux/cache.h> | 15 | #include <linux/cache.h> |
16 | 16 | ||
17 | void xics_init_IRQ(void); | 17 | extern void xics_init_IRQ(void); |
18 | int xics_get_irq(struct pt_regs *); | 18 | extern void xics_setup_cpu(void); |
19 | void xics_setup_cpu(void); | 19 | extern void xics_teardown_cpu(int secondary); |
20 | void xics_teardown_cpu(int secondary); | 20 | extern void xics_cause_IPI(int cpu); |
21 | void xics_cause_IPI(int cpu); | 21 | extern void xics_request_IPIs(void); |
22 | void xics_request_IPIs(void); | 22 | extern void xics_migrate_irqs_away(void); |
23 | void xics_migrate_irqs_away(void); | ||
24 | 23 | ||
25 | /* first argument is ignored for now*/ | 24 | /* first argument is ignored for now*/ |
26 | void pSeriesLP_cppr_info(int n_cpu, u8 value); | 25 | void pSeriesLP_cppr_info(int n_cpu, u8 value); |
@@ -31,4 +30,8 @@ struct xics_ipi_struct { | |||
31 | 30 | ||
32 | extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned; | 31 | extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned; |
33 | 32 | ||
33 | struct irq_desc; | ||
34 | extern void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc, | ||
35 | struct pt_regs *regs); | ||
36 | |||
34 | #endif /* _POWERPC_KERNEL_XICS_H */ | 37 | #endif /* _POWERPC_KERNEL_XICS_H */ |
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 054bd8b41ef5..cebfae242602 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile | |||
@@ -4,7 +4,6 @@ endif | |||
4 | 4 | ||
5 | obj-$(CONFIG_MPIC) += mpic.o | 5 | obj-$(CONFIG_MPIC) += mpic.o |
6 | obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o | 6 | obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o |
7 | obj-$(CONFIG_PPC_I8259) += i8259.o | ||
8 | obj-$(CONFIG_PPC_MPC106) += grackle.o | 7 | obj-$(CONFIG_PPC_MPC106) += grackle.o |
9 | obj-$(CONFIG_BOOKE) += dcr.o | 8 | obj-$(CONFIG_BOOKE) += dcr.o |
10 | obj-$(CONFIG_40x) += dcr.o | 9 | obj-$(CONFIG_40x) += dcr.o |
@@ -14,3 +13,7 @@ obj-$(CONFIG_PPC_83xx) += ipic.o | |||
14 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o | 13 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o |
15 | obj-$(CONFIG_PPC_TODC) += todc.o | 14 | obj-$(CONFIG_PPC_TODC) += todc.o |
16 | obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o | 15 | obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o |
16 | |||
17 | ifeq ($(CONFIG_PPC_MERGE),y) | ||
18 | obj-$(CONFIG_PPC_I8259) += i8259.o | ||
19 | endif | ||
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c index 1a3ef1ab9d6e..72c73a6105cd 100644 --- a/arch/powerpc/sysdev/i8259.c +++ b/arch/powerpc/sysdev/i8259.c | |||
@@ -6,11 +6,16 @@ | |||
6 | * as published by the Free Software Foundation; either version | 6 | * as published by the Free Software Foundation; either version |
7 | * 2 of the License, or (at your option) any later version. | 7 | * 2 of the License, or (at your option) any later version. |
8 | */ | 8 | */ |
9 | #undef DEBUG | ||
10 | |||
9 | #include <linux/init.h> | 11 | #include <linux/init.h> |
10 | #include <linux/ioport.h> | 12 | #include <linux/ioport.h> |
11 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
14 | #include <linux/kernel.h> | ||
15 | #include <linux/delay.h> | ||
12 | #include <asm/io.h> | 16 | #include <asm/io.h> |
13 | #include <asm/i8259.h> | 17 | #include <asm/i8259.h> |
18 | #include <asm/prom.h> | ||
14 | 19 | ||
15 | static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */ | 20 | static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */ |
16 | 21 | ||
@@ -20,7 +25,8 @@ static unsigned char cached_8259[2] = { 0xff, 0xff }; | |||
20 | 25 | ||
21 | static DEFINE_SPINLOCK(i8259_lock); | 26 | static DEFINE_SPINLOCK(i8259_lock); |
22 | 27 | ||
23 | static int i8259_pic_irq_offset; | 28 | static struct device_node *i8259_node; |
29 | static struct irq_host *i8259_host; | ||
24 | 30 | ||
25 | /* | 31 | /* |
26 | * Acknowledge the IRQ using either the PCI host bridge's interrupt | 32 | * Acknowledge the IRQ using either the PCI host bridge's interrupt |
@@ -28,16 +34,18 @@ static int i8259_pic_irq_offset; | |||
28 | * which is called. It should be noted that polling is broken on some | 34 | * which is called. It should be noted that polling is broken on some |
29 | * IBM and Motorola PReP boxes so we must use the int-ack feature on them. | 35 | * IBM and Motorola PReP boxes so we must use the int-ack feature on them. |
30 | */ | 36 | */ |
31 | int i8259_irq(struct pt_regs *regs) | 37 | unsigned int i8259_irq(struct pt_regs *regs) |
32 | { | 38 | { |
33 | int irq; | 39 | int irq; |
34 | 40 | int lock = 0; | |
35 | spin_lock(&i8259_lock); | ||
36 | 41 | ||
37 | /* Either int-ack or poll for the IRQ */ | 42 | /* Either int-ack or poll for the IRQ */ |
38 | if (pci_intack) | 43 | if (pci_intack) |
39 | irq = readb(pci_intack); | 44 | irq = readb(pci_intack); |
40 | else { | 45 | else { |
46 | spin_lock(&i8259_lock); | ||
47 | lock = 1; | ||
48 | |||
41 | /* Perform an interrupt acknowledge cycle on controller 1. */ | 49 | /* Perform an interrupt acknowledge cycle on controller 1. */ |
42 | outb(0x0C, 0x20); /* prepare for poll */ | 50 | outb(0x0C, 0x20); /* prepare for poll */ |
43 | irq = inb(0x20) & 7; | 51 | irq = inb(0x20) & 7; |
@@ -62,16 +70,13 @@ int i8259_irq(struct pt_regs *regs) | |||
62 | if (!pci_intack) | 70 | if (!pci_intack) |
63 | outb(0x0B, 0x20); /* ISR register */ | 71 | outb(0x0B, 0x20); /* ISR register */ |
64 | if(~inb(0x20) & 0x80) | 72 | if(~inb(0x20) & 0x80) |
65 | irq = -1; | 73 | irq = NO_IRQ; |
66 | } | 74 | } else if (irq == 0xff) |
75 | irq = NO_IRQ; | ||
67 | 76 | ||
68 | spin_unlock(&i8259_lock); | 77 | if (lock) |
69 | return irq + i8259_pic_irq_offset; | 78 | spin_unlock(&i8259_lock); |
70 | } | 79 | return irq; |
71 | |||
72 | int i8259_irq_cascade(struct pt_regs *regs, void *unused) | ||
73 | { | ||
74 | return i8259_irq(regs); | ||
75 | } | 80 | } |
76 | 81 | ||
77 | static void i8259_mask_and_ack_irq(unsigned int irq_nr) | 82 | static void i8259_mask_and_ack_irq(unsigned int irq_nr) |
@@ -79,7 +84,6 @@ static void i8259_mask_and_ack_irq(unsigned int irq_nr) | |||
79 | unsigned long flags; | 84 | unsigned long flags; |
80 | 85 | ||
81 | spin_lock_irqsave(&i8259_lock, flags); | 86 | spin_lock_irqsave(&i8259_lock, flags); |
82 | irq_nr -= i8259_pic_irq_offset; | ||
83 | if (irq_nr > 7) { | 87 | if (irq_nr > 7) { |
84 | cached_A1 |= 1 << (irq_nr-8); | 88 | cached_A1 |= 1 << (irq_nr-8); |
85 | inb(0xA1); /* DUMMY */ | 89 | inb(0xA1); /* DUMMY */ |
@@ -105,8 +109,9 @@ static void i8259_mask_irq(unsigned int irq_nr) | |||
105 | { | 109 | { |
106 | unsigned long flags; | 110 | unsigned long flags; |
107 | 111 | ||
112 | pr_debug("i8259_mask_irq(%d)\n", irq_nr); | ||
113 | |||
108 | spin_lock_irqsave(&i8259_lock, flags); | 114 | spin_lock_irqsave(&i8259_lock, flags); |
109 | irq_nr -= i8259_pic_irq_offset; | ||
110 | if (irq_nr < 8) | 115 | if (irq_nr < 8) |
111 | cached_21 |= 1 << irq_nr; | 116 | cached_21 |= 1 << irq_nr; |
112 | else | 117 | else |
@@ -119,8 +124,9 @@ static void i8259_unmask_irq(unsigned int irq_nr) | |||
119 | { | 124 | { |
120 | unsigned long flags; | 125 | unsigned long flags; |
121 | 126 | ||
127 | pr_debug("i8259_unmask_irq(%d)\n", irq_nr); | ||
128 | |||
122 | spin_lock_irqsave(&i8259_lock, flags); | 129 | spin_lock_irqsave(&i8259_lock, flags); |
123 | irq_nr -= i8259_pic_irq_offset; | ||
124 | if (irq_nr < 8) | 130 | if (irq_nr < 8) |
125 | cached_21 &= ~(1 << irq_nr); | 131 | cached_21 &= ~(1 << irq_nr); |
126 | else | 132 | else |
@@ -129,19 +135,11 @@ static void i8259_unmask_irq(unsigned int irq_nr) | |||
129 | spin_unlock_irqrestore(&i8259_lock, flags); | 135 | spin_unlock_irqrestore(&i8259_lock, flags); |
130 | } | 136 | } |
131 | 137 | ||
132 | static void i8259_end_irq(unsigned int irq) | 138 | static struct irq_chip i8259_pic = { |
133 | { | 139 | .typename = " i8259 ", |
134 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) | 140 | .mask = i8259_mask_irq, |
135 | && irq_desc[irq].action) | 141 | .unmask = i8259_unmask_irq, |
136 | i8259_unmask_irq(irq); | 142 | .mask_ack = i8259_mask_and_ack_irq, |
137 | } | ||
138 | |||
139 | struct hw_interrupt_type i8259_pic = { | ||
140 | .typename = " i8259 ", | ||
141 | .enable = i8259_unmask_irq, | ||
142 | .disable = i8259_mask_irq, | ||
143 | .ack = i8259_mask_and_ack_irq, | ||
144 | .end = i8259_end_irq, | ||
145 | }; | 143 | }; |
146 | 144 | ||
147 | static struct resource pic1_iores = { | 145 | static struct resource pic1_iores = { |
@@ -165,25 +163,84 @@ static struct resource pic_edgectrl_iores = { | |||
165 | .flags = IORESOURCE_BUSY, | 163 | .flags = IORESOURCE_BUSY, |
166 | }; | 164 | }; |
167 | 165 | ||
168 | static struct irqaction i8259_irqaction = { | 166 | static int i8259_host_match(struct irq_host *h, struct device_node *node) |
169 | .handler = no_action, | 167 | { |
170 | .flags = IRQF_DISABLED, | 168 | return i8259_node == NULL || i8259_node == node; |
171 | .mask = CPU_MASK_NONE, | 169 | } |
172 | .name = "82c59 secondary cascade", | 170 | |
171 | static int i8259_host_map(struct irq_host *h, unsigned int virq, | ||
172 | irq_hw_number_t hw, unsigned int flags) | ||
173 | { | ||
174 | pr_debug("i8259_host_map(%d, 0x%lx)\n", virq, hw); | ||
175 | |||
176 | /* We block the internal cascade */ | ||
177 | if (hw == 2) | ||
178 | get_irq_desc(virq)->status |= IRQ_NOREQUEST; | ||
179 | |||
180 | /* We use the level stuff only for now, we might want to | ||
181 | * be more cautious here but that works for now | ||
182 | */ | ||
183 | get_irq_desc(virq)->status |= IRQ_LEVEL; | ||
184 | set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq); | ||
185 | return 0; | ||
186 | } | ||
187 | |||
188 | static void i8259_host_unmap(struct irq_host *h, unsigned int virq) | ||
189 | { | ||
190 | /* Make sure irq is masked in hardware */ | ||
191 | i8259_mask_irq(virq); | ||
192 | |||
193 | /* remove chip and handler */ | ||
194 | set_irq_chip_and_handler(virq, NULL, NULL); | ||
195 | |||
196 | /* Make sure it's completed */ | ||
197 | synchronize_irq(virq); | ||
198 | } | ||
199 | |||
200 | static int i8259_host_xlate(struct irq_host *h, struct device_node *ct, | ||
201 | u32 *intspec, unsigned int intsize, | ||
202 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | ||
203 | { | ||
204 | static unsigned char map_isa_senses[4] = { | ||
205 | IRQ_TYPE_LEVEL_LOW, | ||
206 | IRQ_TYPE_LEVEL_HIGH, | ||
207 | IRQ_TYPE_EDGE_FALLING, | ||
208 | IRQ_TYPE_EDGE_RISING, | ||
209 | }; | ||
210 | |||
211 | *out_hwirq = intspec[0]; | ||
212 | if (intsize > 1 && intspec[1] < 4) | ||
213 | *out_flags = map_isa_senses[intspec[1]]; | ||
214 | else | ||
215 | *out_flags = IRQ_TYPE_NONE; | ||
216 | |||
217 | return 0; | ||
218 | } | ||
219 | |||
220 | static struct irq_host_ops i8259_host_ops = { | ||
221 | .match = i8259_host_match, | ||
222 | .map = i8259_host_map, | ||
223 | .unmap = i8259_host_unmap, | ||
224 | .xlate = i8259_host_xlate, | ||
173 | }; | 225 | }; |
174 | 226 | ||
175 | /* | 227 | /**** |
176 | * i8259_init() | 228 | * i8259_init - Initialize the legacy controller |
177 | * intack_addr - PCI interrupt acknowledge (real) address which will return | 229 | * @node: device node of the legacy PIC (can be NULL, but then, it will match |
178 | * the active irq from the 8259 | 230 | * all interrupts, so beware) |
231 | * @intack_addr: PCI interrupt acknowledge (real) address which will return | ||
232 | * the active irq from the 8259 | ||
179 | */ | 233 | */ |
180 | void __init i8259_init(unsigned long intack_addr, int offset) | 234 | void i8259_init(struct device_node *node, unsigned long intack_addr) |
181 | { | 235 | { |
182 | unsigned long flags; | 236 | unsigned long flags; |
183 | int i; | ||
184 | 237 | ||
238 | /* initialize the controller */ | ||
185 | spin_lock_irqsave(&i8259_lock, flags); | 239 | spin_lock_irqsave(&i8259_lock, flags); |
186 | i8259_pic_irq_offset = offset; | 240 | |
241 | /* Mask all first */ | ||
242 | outb(0xff, 0xA1); | ||
243 | outb(0xff, 0x21); | ||
187 | 244 | ||
188 | /* init master interrupt controller */ | 245 | /* init master interrupt controller */ |
189 | outb(0x11, 0x20); /* Start init sequence */ | 246 | outb(0x11, 0x20); /* Start init sequence */ |
@@ -197,21 +254,36 @@ void __init i8259_init(unsigned long intack_addr, int offset) | |||
197 | outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */ | 254 | outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */ |
198 | outb(0x01, 0xA1); /* Select 8086 mode */ | 255 | outb(0x01, 0xA1); /* Select 8086 mode */ |
199 | 256 | ||
257 | /* That thing is slow */ | ||
258 | udelay(100); | ||
259 | |||
200 | /* always read ISR */ | 260 | /* always read ISR */ |
201 | outb(0x0B, 0x20); | 261 | outb(0x0B, 0x20); |
202 | outb(0x0B, 0xA0); | 262 | outb(0x0B, 0xA0); |
203 | 263 | ||
204 | /* Mask all interrupts */ | 264 | /* Unmask the internal cascade */ |
265 | cached_21 &= ~(1 << 2); | ||
266 | |||
267 | /* Set interrupt masks */ | ||
205 | outb(cached_A1, 0xA1); | 268 | outb(cached_A1, 0xA1); |
206 | outb(cached_21, 0x21); | 269 | outb(cached_21, 0x21); |
207 | 270 | ||
208 | spin_unlock_irqrestore(&i8259_lock, flags); | 271 | spin_unlock_irqrestore(&i8259_lock, flags); |
209 | 272 | ||
210 | for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) | 273 | /* create a legacy host */ |
211 | irq_desc[offset + i].chip = &i8259_pic; | 274 | if (node) |
275 | i8259_node = of_node_get(node); | ||
276 | i8259_host = irq_alloc_host(IRQ_HOST_MAP_LEGACY, 0, &i8259_host_ops, 0); | ||
277 | if (i8259_host == NULL) { | ||
278 | printk(KERN_ERR "i8259: failed to allocate irq host !\n"); | ||
279 | return; | ||
280 | } | ||
212 | 281 | ||
213 | /* reserve our resources */ | 282 | /* reserve our resources */ |
214 | setup_irq(offset + 2, &i8259_irqaction); | 283 | /* XXX should we continue doing that ? it seems to cause problems |
284 | * with further requesting of PCI IO resources for that range... | ||
285 | * need to look into it. | ||
286 | */ | ||
215 | request_resource(&ioport_resource, &pic1_iores); | 287 | request_resource(&ioport_resource, &pic1_iores); |
216 | request_resource(&ioport_resource, &pic2_iores); | 288 | request_resource(&ioport_resource, &pic2_iores); |
217 | request_resource(&ioport_resource, &pic_edgectrl_iores); | 289 | request_resource(&ioport_resource, &pic_edgectrl_iores); |
@@ -219,4 +291,5 @@ void __init i8259_init(unsigned long intack_addr, int offset) | |||
219 | if (intack_addr != 0) | 291 | if (intack_addr != 0) |
220 | pci_intack = ioremap(intack_addr, 1); | 292 | pci_intack = ioremap(intack_addr, 1); |
221 | 293 | ||
294 | printk(KERN_INFO "i8259 legacy interrupt controller initialized\n"); | ||
222 | } | 295 | } |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 7e469358895f..7d31d7cc392d 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -100,8 +100,8 @@ static inline u32 _mpic_cpu_read(struct mpic *mpic, unsigned int reg) | |||
100 | 100 | ||
101 | if (mpic->flags & MPIC_PRIMARY) | 101 | if (mpic->flags & MPIC_PRIMARY) |
102 | cpu = hard_smp_processor_id(); | 102 | cpu = hard_smp_processor_id(); |
103 | 103 | return _mpic_read(mpic->flags & MPIC_BIG_ENDIAN, | |
104 | return _mpic_read(mpic->flags & MPIC_BIG_ENDIAN, mpic->cpuregs[cpu], reg); | 104 | mpic->cpuregs[cpu], reg); |
105 | } | 105 | } |
106 | 106 | ||
107 | static inline void _mpic_cpu_write(struct mpic *mpic, unsigned int reg, u32 value) | 107 | static inline void _mpic_cpu_write(struct mpic *mpic, unsigned int reg, u32 value) |
@@ -340,27 +340,19 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic) | |||
340 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | 340 | #endif /* CONFIG_MPIC_BROKEN_U3 */ |
341 | 341 | ||
342 | 342 | ||
343 | #define mpic_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | ||
344 | |||
343 | /* Find an mpic associated with a given linux interrupt */ | 345 | /* Find an mpic associated with a given linux interrupt */ |
344 | static struct mpic *mpic_find(unsigned int irq, unsigned int *is_ipi) | 346 | static struct mpic *mpic_find(unsigned int irq, unsigned int *is_ipi) |
345 | { | 347 | { |
346 | struct mpic *mpic = mpics; | 348 | unsigned int src = mpic_irq_to_hw(irq); |
347 | 349 | ||
348 | while(mpic) { | 350 | if (irq < NUM_ISA_INTERRUPTS) |
349 | /* search IPIs first since they may override the main interrupts */ | 351 | return NULL; |
350 | if (irq >= mpic->ipi_offset && irq < (mpic->ipi_offset + 4)) { | 352 | if (is_ipi) |
351 | if (is_ipi) | 353 | *is_ipi = (src >= MPIC_VEC_IPI_0 && src <= MPIC_VEC_IPI_3); |
352 | *is_ipi = 1; | 354 | |
353 | return mpic; | 355 | return irq_desc[irq].chip_data; |
354 | } | ||
355 | if (irq >= mpic->irq_offset && | ||
356 | irq < (mpic->irq_offset + mpic->irq_count)) { | ||
357 | if (is_ipi) | ||
358 | *is_ipi = 0; | ||
359 | return mpic; | ||
360 | } | ||
361 | mpic = mpic -> next; | ||
362 | } | ||
363 | return NULL; | ||
364 | } | 356 | } |
365 | 357 | ||
366 | /* Convert a cpu mask from logical to physical cpu numbers. */ | 358 | /* Convert a cpu mask from logical to physical cpu numbers. */ |
@@ -378,14 +370,14 @@ static inline u32 mpic_physmask(u32 cpumask) | |||
378 | /* Get the mpic structure from the IPI number */ | 370 | /* Get the mpic structure from the IPI number */ |
379 | static inline struct mpic * mpic_from_ipi(unsigned int ipi) | 371 | static inline struct mpic * mpic_from_ipi(unsigned int ipi) |
380 | { | 372 | { |
381 | return container_of(irq_desc[ipi].chip, struct mpic, hc_ipi); | 373 | return irq_desc[ipi].chip_data; |
382 | } | 374 | } |
383 | #endif | 375 | #endif |
384 | 376 | ||
385 | /* Get the mpic structure from the irq number */ | 377 | /* Get the mpic structure from the irq number */ |
386 | static inline struct mpic * mpic_from_irq(unsigned int irq) | 378 | static inline struct mpic * mpic_from_irq(unsigned int irq) |
387 | { | 379 | { |
388 | return container_of(irq_desc[irq].chip, struct mpic, hc_irq); | 380 | return irq_desc[irq].chip_data; |
389 | } | 381 | } |
390 | 382 | ||
391 | /* Send an EOI */ | 383 | /* Send an EOI */ |
@@ -398,9 +390,7 @@ static inline void mpic_eoi(struct mpic *mpic) | |||
398 | #ifdef CONFIG_SMP | 390 | #ifdef CONFIG_SMP |
399 | static irqreturn_t mpic_ipi_action(int irq, void *dev_id, struct pt_regs *regs) | 391 | static irqreturn_t mpic_ipi_action(int irq, void *dev_id, struct pt_regs *regs) |
400 | { | 392 | { |
401 | struct mpic *mpic = dev_id; | 393 | smp_message_recv(mpic_irq_to_hw(irq) - MPIC_VEC_IPI_0, regs); |
402 | |||
403 | smp_message_recv(irq - mpic->ipi_offset, regs); | ||
404 | return IRQ_HANDLED; | 394 | return IRQ_HANDLED; |
405 | } | 395 | } |
406 | #endif /* CONFIG_SMP */ | 396 | #endif /* CONFIG_SMP */ |
@@ -410,11 +400,11 @@ static irqreturn_t mpic_ipi_action(int irq, void *dev_id, struct pt_regs *regs) | |||
410 | */ | 400 | */ |
411 | 401 | ||
412 | 402 | ||
413 | static void mpic_enable_irq(unsigned int irq) | 403 | static void mpic_unmask_irq(unsigned int irq) |
414 | { | 404 | { |
415 | unsigned int loops = 100000; | 405 | unsigned int loops = 100000; |
416 | struct mpic *mpic = mpic_from_irq(irq); | 406 | struct mpic *mpic = mpic_from_irq(irq); |
417 | unsigned int src = irq - mpic->irq_offset; | 407 | unsigned int src = mpic_irq_to_hw(irq); |
418 | 408 | ||
419 | DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); | 409 | DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); |
420 | 410 | ||
@@ -429,39 +419,13 @@ static void mpic_enable_irq(unsigned int irq) | |||
429 | break; | 419 | break; |
430 | } | 420 | } |
431 | } while(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK); | 421 | } while(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK); |
432 | |||
433 | #ifdef CONFIG_MPIC_BROKEN_U3 | ||
434 | if (mpic->flags & MPIC_BROKEN_U3) { | ||
435 | unsigned int src = irq - mpic->irq_offset; | ||
436 | if (mpic_is_ht_interrupt(mpic, src) && | ||
437 | (irq_desc[irq].status & IRQ_LEVEL)) | ||
438 | mpic_ht_end_irq(mpic, src); | ||
439 | } | ||
440 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | ||
441 | } | ||
442 | |||
443 | static unsigned int mpic_startup_irq(unsigned int irq) | ||
444 | { | ||
445 | #ifdef CONFIG_MPIC_BROKEN_U3 | ||
446 | struct mpic *mpic = mpic_from_irq(irq); | ||
447 | unsigned int src = irq - mpic->irq_offset; | ||
448 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | ||
449 | |||
450 | mpic_enable_irq(irq); | ||
451 | |||
452 | #ifdef CONFIG_MPIC_BROKEN_U3 | ||
453 | if (mpic_is_ht_interrupt(mpic, src)) | ||
454 | mpic_startup_ht_interrupt(mpic, src, irq_desc[irq].status); | ||
455 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | ||
456 | |||
457 | return 0; | ||
458 | } | 422 | } |
459 | 423 | ||
460 | static void mpic_disable_irq(unsigned int irq) | 424 | static void mpic_mask_irq(unsigned int irq) |
461 | { | 425 | { |
462 | unsigned int loops = 100000; | 426 | unsigned int loops = 100000; |
463 | struct mpic *mpic = mpic_from_irq(irq); | 427 | struct mpic *mpic = mpic_from_irq(irq); |
464 | unsigned int src = irq - mpic->irq_offset; | 428 | unsigned int src = mpic_irq_to_hw(irq); |
465 | 429 | ||
466 | DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src); | 430 | DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src); |
467 | 431 | ||
@@ -478,23 +442,58 @@ static void mpic_disable_irq(unsigned int irq) | |||
478 | } while(!(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK)); | 442 | } while(!(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK)); |
479 | } | 443 | } |
480 | 444 | ||
481 | static void mpic_shutdown_irq(unsigned int irq) | 445 | static void mpic_end_irq(unsigned int irq) |
482 | { | 446 | { |
447 | struct mpic *mpic = mpic_from_irq(irq); | ||
448 | |||
449 | #ifdef DEBUG_IRQ | ||
450 | DBG("%s: end_irq: %d\n", mpic->name, irq); | ||
451 | #endif | ||
452 | /* We always EOI on end_irq() even for edge interrupts since that | ||
453 | * should only lower the priority, the MPIC should have properly | ||
454 | * latched another edge interrupt coming in anyway | ||
455 | */ | ||
456 | |||
457 | mpic_eoi(mpic); | ||
458 | } | ||
459 | |||
483 | #ifdef CONFIG_MPIC_BROKEN_U3 | 460 | #ifdef CONFIG_MPIC_BROKEN_U3 |
461 | |||
462 | static void mpic_unmask_ht_irq(unsigned int irq) | ||
463 | { | ||
484 | struct mpic *mpic = mpic_from_irq(irq); | 464 | struct mpic *mpic = mpic_from_irq(irq); |
485 | unsigned int src = irq - mpic->irq_offset; | 465 | unsigned int src = mpic_irq_to_hw(irq); |
486 | 466 | ||
487 | if (mpic_is_ht_interrupt(mpic, src)) | 467 | mpic_unmask_irq(irq); |
488 | mpic_shutdown_ht_interrupt(mpic, src, irq_desc[irq].status); | ||
489 | 468 | ||
490 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | 469 | if (irq_desc[irq].status & IRQ_LEVEL) |
470 | mpic_ht_end_irq(mpic, src); | ||
471 | } | ||
472 | |||
473 | static unsigned int mpic_startup_ht_irq(unsigned int irq) | ||
474 | { | ||
475 | struct mpic *mpic = mpic_from_irq(irq); | ||
476 | unsigned int src = mpic_irq_to_hw(irq); | ||
477 | |||
478 | mpic_unmask_irq(irq); | ||
479 | mpic_startup_ht_interrupt(mpic, src, irq_desc[irq].status); | ||
491 | 480 | ||
492 | mpic_disable_irq(irq); | 481 | return 0; |
493 | } | 482 | } |
494 | 483 | ||
495 | static void mpic_end_irq(unsigned int irq) | 484 | static void mpic_shutdown_ht_irq(unsigned int irq) |
496 | { | 485 | { |
497 | struct mpic *mpic = mpic_from_irq(irq); | 486 | struct mpic *mpic = mpic_from_irq(irq); |
487 | unsigned int src = mpic_irq_to_hw(irq); | ||
488 | |||
489 | mpic_shutdown_ht_interrupt(mpic, src, irq_desc[irq].status); | ||
490 | mpic_mask_irq(irq); | ||
491 | } | ||
492 | |||
493 | static void mpic_end_ht_irq(unsigned int irq) | ||
494 | { | ||
495 | struct mpic *mpic = mpic_from_irq(irq); | ||
496 | unsigned int src = mpic_irq_to_hw(irq); | ||
498 | 497 | ||
499 | #ifdef DEBUG_IRQ | 498 | #ifdef DEBUG_IRQ |
500 | DBG("%s: end_irq: %d\n", mpic->name, irq); | 499 | DBG("%s: end_irq: %d\n", mpic->name, irq); |
@@ -504,30 +503,25 @@ static void mpic_end_irq(unsigned int irq) | |||
504 | * latched another edge interrupt coming in anyway | 503 | * latched another edge interrupt coming in anyway |
505 | */ | 504 | */ |
506 | 505 | ||
507 | #ifdef CONFIG_MPIC_BROKEN_U3 | 506 | if (irq_desc[irq].status & IRQ_LEVEL) |
508 | if (mpic->flags & MPIC_BROKEN_U3) { | 507 | mpic_ht_end_irq(mpic, src); |
509 | unsigned int src = irq - mpic->irq_offset; | ||
510 | if (mpic_is_ht_interrupt(mpic, src) && | ||
511 | (irq_desc[irq].status & IRQ_LEVEL)) | ||
512 | mpic_ht_end_irq(mpic, src); | ||
513 | } | ||
514 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | ||
515 | |||
516 | mpic_eoi(mpic); | 508 | mpic_eoi(mpic); |
517 | } | 509 | } |
518 | 510 | ||
511 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | ||
512 | |||
519 | #ifdef CONFIG_SMP | 513 | #ifdef CONFIG_SMP |
520 | 514 | ||
521 | static void mpic_enable_ipi(unsigned int irq) | 515 | static void mpic_unmask_ipi(unsigned int irq) |
522 | { | 516 | { |
523 | struct mpic *mpic = mpic_from_ipi(irq); | 517 | struct mpic *mpic = mpic_from_ipi(irq); |
524 | unsigned int src = irq - mpic->ipi_offset; | 518 | unsigned int src = mpic_irq_to_hw(irq) - MPIC_VEC_IPI_0; |
525 | 519 | ||
526 | DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, irq, src); | 520 | DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, irq, src); |
527 | mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK); | 521 | mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK); |
528 | } | 522 | } |
529 | 523 | ||
530 | static void mpic_disable_ipi(unsigned int irq) | 524 | static void mpic_mask_ipi(unsigned int irq) |
531 | { | 525 | { |
532 | /* NEVER disable an IPI... that's just plain wrong! */ | 526 | /* NEVER disable an IPI... that's just plain wrong! */ |
533 | } | 527 | } |
@@ -551,29 +545,176 @@ static void mpic_end_ipi(unsigned int irq) | |||
551 | static void mpic_set_affinity(unsigned int irq, cpumask_t cpumask) | 545 | static void mpic_set_affinity(unsigned int irq, cpumask_t cpumask) |
552 | { | 546 | { |
553 | struct mpic *mpic = mpic_from_irq(irq); | 547 | struct mpic *mpic = mpic_from_irq(irq); |
548 | unsigned int src = mpic_irq_to_hw(irq); | ||
554 | 549 | ||
555 | cpumask_t tmp; | 550 | cpumask_t tmp; |
556 | 551 | ||
557 | cpus_and(tmp, cpumask, cpu_online_map); | 552 | cpus_and(tmp, cpumask, cpu_online_map); |
558 | 553 | ||
559 | mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_DESTINATION, | 554 | mpic_irq_write(src, MPIC_IRQ_DESTINATION, |
560 | mpic_physmask(cpus_addr(tmp)[0])); | 555 | mpic_physmask(cpus_addr(tmp)[0])); |
561 | } | 556 | } |
562 | 557 | ||
558 | static unsigned int mpic_flags_to_vecpri(unsigned int flags, int *level) | ||
559 | { | ||
560 | unsigned int vecpri; | ||
561 | |||
562 | /* Now convert sense value */ | ||
563 | switch(flags & IRQ_TYPE_SENSE_MASK) { | ||
564 | case IRQ_TYPE_EDGE_RISING: | ||
565 | vecpri = MPIC_VECPRI_SENSE_EDGE | | ||
566 | MPIC_VECPRI_POLARITY_POSITIVE; | ||
567 | *level = 0; | ||
568 | break; | ||
569 | case IRQ_TYPE_EDGE_FALLING: | ||
570 | vecpri = MPIC_VECPRI_SENSE_EDGE | | ||
571 | MPIC_VECPRI_POLARITY_NEGATIVE; | ||
572 | *level = 0; | ||
573 | break; | ||
574 | case IRQ_TYPE_LEVEL_HIGH: | ||
575 | vecpri = MPIC_VECPRI_SENSE_LEVEL | | ||
576 | MPIC_VECPRI_POLARITY_POSITIVE; | ||
577 | *level = 1; | ||
578 | break; | ||
579 | case IRQ_TYPE_LEVEL_LOW: | ||
580 | default: | ||
581 | vecpri = MPIC_VECPRI_SENSE_LEVEL | | ||
582 | MPIC_VECPRI_POLARITY_NEGATIVE; | ||
583 | *level = 1; | ||
584 | } | ||
585 | return vecpri; | ||
586 | } | ||
587 | |||
588 | static struct irq_chip mpic_irq_chip = { | ||
589 | .mask = mpic_mask_irq, | ||
590 | .unmask = mpic_unmask_irq, | ||
591 | .eoi = mpic_end_irq, | ||
592 | }; | ||
593 | |||
594 | #ifdef CONFIG_SMP | ||
595 | static struct irq_chip mpic_ipi_chip = { | ||
596 | .mask = mpic_mask_ipi, | ||
597 | .unmask = mpic_unmask_ipi, | ||
598 | .eoi = mpic_end_ipi, | ||
599 | }; | ||
600 | #endif /* CONFIG_SMP */ | ||
601 | |||
602 | #ifdef CONFIG_MPIC_BROKEN_U3 | ||
603 | static struct irq_chip mpic_irq_ht_chip = { | ||
604 | .startup = mpic_startup_ht_irq, | ||
605 | .shutdown = mpic_shutdown_ht_irq, | ||
606 | .mask = mpic_mask_irq, | ||
607 | .unmask = mpic_unmask_ht_irq, | ||
608 | .eoi = mpic_end_ht_irq, | ||
609 | }; | ||
610 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | ||
611 | |||
612 | |||
613 | static int mpic_host_match(struct irq_host *h, struct device_node *node) | ||
614 | { | ||
615 | struct mpic *mpic = h->host_data; | ||
616 | |||
617 | /* Exact match, unless mpic node is NULL */ | ||
618 | return mpic->of_node == NULL || mpic->of_node == node; | ||
619 | } | ||
620 | |||
621 | static int mpic_host_map(struct irq_host *h, unsigned int virq, | ||
622 | irq_hw_number_t hw, unsigned int flags) | ||
623 | { | ||
624 | struct irq_desc *desc = get_irq_desc(virq); | ||
625 | struct irq_chip *chip; | ||
626 | struct mpic *mpic = h->host_data; | ||
627 | unsigned int vecpri = MPIC_VECPRI_SENSE_LEVEL | | ||
628 | MPIC_VECPRI_POLARITY_NEGATIVE; | ||
629 | int level; | ||
630 | |||
631 | pr_debug("mpic: map virq %d, hwirq 0x%lx, flags: 0x%x\n", | ||
632 | virq, hw, flags); | ||
633 | |||
634 | if (hw == MPIC_VEC_SPURRIOUS) | ||
635 | return -EINVAL; | ||
636 | #ifdef CONFIG_SMP | ||
637 | else if (hw >= MPIC_VEC_IPI_0) { | ||
638 | WARN_ON(!(mpic->flags & MPIC_PRIMARY)); | ||
639 | |||
640 | pr_debug("mpic: mapping as IPI\n"); | ||
641 | set_irq_chip_data(virq, mpic); | ||
642 | set_irq_chip_and_handler(virq, &mpic->hc_ipi, | ||
643 | handle_percpu_irq); | ||
644 | return 0; | ||
645 | } | ||
646 | #endif /* CONFIG_SMP */ | ||
647 | |||
648 | if (hw >= mpic->irq_count) | ||
649 | return -EINVAL; | ||
650 | |||
651 | /* If no sense provided, check default sense array */ | ||
652 | if (((flags & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_NONE) && | ||
653 | mpic->senses && hw < mpic->senses_count) | ||
654 | flags |= mpic->senses[hw]; | ||
655 | |||
656 | vecpri = mpic_flags_to_vecpri(flags, &level); | ||
657 | if (level) | ||
658 | desc->status |= IRQ_LEVEL; | ||
659 | chip = &mpic->hc_irq; | ||
660 | |||
661 | #ifdef CONFIG_MPIC_BROKEN_U3 | ||
662 | /* Check for HT interrupts, override vecpri */ | ||
663 | if (mpic_is_ht_interrupt(mpic, hw)) { | ||
664 | vecpri &= ~(MPIC_VECPRI_SENSE_MASK | | ||
665 | MPIC_VECPRI_POLARITY_MASK); | ||
666 | vecpri |= MPIC_VECPRI_POLARITY_POSITIVE; | ||
667 | chip = &mpic->hc_ht_irq; | ||
668 | } | ||
669 | #endif | ||
670 | |||
671 | /* Reconfigure irq */ | ||
672 | vecpri |= MPIC_VECPRI_MASK | hw | (8 << MPIC_VECPRI_PRIORITY_SHIFT); | ||
673 | mpic_irq_write(hw, MPIC_IRQ_VECTOR_PRI, vecpri); | ||
674 | |||
675 | pr_debug("mpic: mapping as IRQ\n"); | ||
676 | |||
677 | set_irq_chip_data(virq, mpic); | ||
678 | set_irq_chip_and_handler(virq, chip, handle_fasteoi_irq); | ||
679 | return 0; | ||
680 | } | ||
681 | |||
682 | static int mpic_host_xlate(struct irq_host *h, struct device_node *ct, | ||
683 | u32 *intspec, unsigned int intsize, | ||
684 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | ||
685 | |||
686 | { | ||
687 | static unsigned char map_mpic_senses[4] = { | ||
688 | IRQ_TYPE_EDGE_RISING, | ||
689 | IRQ_TYPE_LEVEL_LOW, | ||
690 | IRQ_TYPE_LEVEL_HIGH, | ||
691 | IRQ_TYPE_EDGE_FALLING, | ||
692 | }; | ||
693 | |||
694 | *out_hwirq = intspec[0]; | ||
695 | if (intsize > 1 && intspec[1] < 4) | ||
696 | *out_flags = map_mpic_senses[intspec[1]]; | ||
697 | else | ||
698 | *out_flags = IRQ_TYPE_NONE; | ||
699 | |||
700 | return 0; | ||
701 | } | ||
702 | |||
703 | static struct irq_host_ops mpic_host_ops = { | ||
704 | .match = mpic_host_match, | ||
705 | .map = mpic_host_map, | ||
706 | .xlate = mpic_host_xlate, | ||
707 | }; | ||
563 | 708 | ||
564 | /* | 709 | /* |
565 | * Exported functions | 710 | * Exported functions |
566 | */ | 711 | */ |
567 | 712 | ||
568 | 713 | struct mpic * __init mpic_alloc(struct device_node *node, | |
569 | struct mpic * __init mpic_alloc(unsigned long phys_addr, | 714 | unsigned long phys_addr, |
570 | unsigned int flags, | 715 | unsigned int flags, |
571 | unsigned int isu_size, | 716 | unsigned int isu_size, |
572 | unsigned int irq_offset, | ||
573 | unsigned int irq_count, | 717 | unsigned int irq_count, |
574 | unsigned int ipi_offset, | ||
575 | unsigned char *senses, | ||
576 | unsigned int senses_count, | ||
577 | const char *name) | 718 | const char *name) |
578 | { | 719 | { |
579 | struct mpic *mpic; | 720 | struct mpic *mpic; |
@@ -585,33 +726,38 @@ struct mpic * __init mpic_alloc(unsigned long phys_addr, | |||
585 | if (mpic == NULL) | 726 | if (mpic == NULL) |
586 | return NULL; | 727 | return NULL; |
587 | 728 | ||
588 | |||
589 | memset(mpic, 0, sizeof(struct mpic)); | 729 | memset(mpic, 0, sizeof(struct mpic)); |
590 | mpic->name = name; | 730 | mpic->name = name; |
731 | mpic->of_node = node ? of_node_get(node) : NULL; | ||
591 | 732 | ||
733 | mpic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 256, | ||
734 | &mpic_host_ops, | ||
735 | MPIC_VEC_SPURRIOUS); | ||
736 | if (mpic->irqhost == NULL) { | ||
737 | of_node_put(node); | ||
738 | return NULL; | ||
739 | } | ||
740 | |||
741 | mpic->irqhost->host_data = mpic; | ||
742 | mpic->hc_irq = mpic_irq_chip; | ||
592 | mpic->hc_irq.typename = name; | 743 | mpic->hc_irq.typename = name; |
593 | mpic->hc_irq.startup = mpic_startup_irq; | ||
594 | mpic->hc_irq.shutdown = mpic_shutdown_irq; | ||
595 | mpic->hc_irq.enable = mpic_enable_irq; | ||
596 | mpic->hc_irq.disable = mpic_disable_irq; | ||
597 | mpic->hc_irq.end = mpic_end_irq; | ||
598 | if (flags & MPIC_PRIMARY) | 744 | if (flags & MPIC_PRIMARY) |
599 | mpic->hc_irq.set_affinity = mpic_set_affinity; | 745 | mpic->hc_irq.set_affinity = mpic_set_affinity; |
746 | #ifdef CONFIG_MPIC_BROKEN_U3 | ||
747 | mpic->hc_ht_irq = mpic_irq_ht_chip; | ||
748 | mpic->hc_ht_irq.typename = name; | ||
749 | if (flags & MPIC_PRIMARY) | ||
750 | mpic->hc_ht_irq.set_affinity = mpic_set_affinity; | ||
751 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | ||
600 | #ifdef CONFIG_SMP | 752 | #ifdef CONFIG_SMP |
753 | mpic->hc_ipi = mpic_ipi_chip; | ||
601 | mpic->hc_ipi.typename = name; | 754 | mpic->hc_ipi.typename = name; |
602 | mpic->hc_ipi.enable = mpic_enable_ipi; | ||
603 | mpic->hc_ipi.disable = mpic_disable_ipi; | ||
604 | mpic->hc_ipi.end = mpic_end_ipi; | ||
605 | #endif /* CONFIG_SMP */ | 755 | #endif /* CONFIG_SMP */ |
606 | 756 | ||
607 | mpic->flags = flags; | 757 | mpic->flags = flags; |
608 | mpic->isu_size = isu_size; | 758 | mpic->isu_size = isu_size; |
609 | mpic->irq_offset = irq_offset; | ||
610 | mpic->irq_count = irq_count; | 759 | mpic->irq_count = irq_count; |
611 | mpic->ipi_offset = ipi_offset; | ||
612 | mpic->num_sources = 0; /* so far */ | 760 | mpic->num_sources = 0; /* so far */ |
613 | mpic->senses = senses; | ||
614 | mpic->senses_count = senses_count; | ||
615 | 761 | ||
616 | /* Map the global registers */ | 762 | /* Map the global registers */ |
617 | mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x1000); | 763 | mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x1000); |
@@ -679,8 +825,10 @@ struct mpic * __init mpic_alloc(unsigned long phys_addr, | |||
679 | mpic->next = mpics; | 825 | mpic->next = mpics; |
680 | mpics = mpic; | 826 | mpics = mpic; |
681 | 827 | ||
682 | if (flags & MPIC_PRIMARY) | 828 | if (flags & MPIC_PRIMARY) { |
683 | mpic_primary = mpic; | 829 | mpic_primary = mpic; |
830 | irq_set_default_host(mpic->irqhost); | ||
831 | } | ||
684 | 832 | ||
685 | return mpic; | 833 | return mpic; |
686 | } | 834 | } |
@@ -697,26 +845,10 @@ void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, | |||
697 | mpic->num_sources = isu_first + mpic->isu_size; | 845 | mpic->num_sources = isu_first + mpic->isu_size; |
698 | } | 846 | } |
699 | 847 | ||
700 | void __init mpic_setup_cascade(unsigned int irq, mpic_cascade_t handler, | 848 | void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count) |
701 | void *data) | ||
702 | { | 849 | { |
703 | struct mpic *mpic = mpic_find(irq, NULL); | 850 | mpic->senses = senses; |
704 | unsigned long flags; | 851 | mpic->senses_count = count; |
705 | |||
706 | /* Synchronization here is a bit dodgy, so don't try to replace cascade | ||
707 | * interrupts on the fly too often ... but normally it's set up at boot. | ||
708 | */ | ||
709 | spin_lock_irqsave(&mpic_lock, flags); | ||
710 | if (mpic->cascade) | ||
711 | mpic_disable_irq(mpic->cascade_vec + mpic->irq_offset); | ||
712 | mpic->cascade = NULL; | ||
713 | wmb(); | ||
714 | mpic->cascade_vec = irq - mpic->irq_offset; | ||
715 | mpic->cascade_data = data; | ||
716 | wmb(); | ||
717 | mpic->cascade = handler; | ||
718 | mpic_enable_irq(irq); | ||
719 | spin_unlock_irqrestore(&mpic_lock, flags); | ||
720 | } | 852 | } |
721 | 853 | ||
722 | void __init mpic_init(struct mpic *mpic) | 854 | void __init mpic_init(struct mpic *mpic) |
@@ -724,6 +856,11 @@ void __init mpic_init(struct mpic *mpic) | |||
724 | int i; | 856 | int i; |
725 | 857 | ||
726 | BUG_ON(mpic->num_sources == 0); | 858 | BUG_ON(mpic->num_sources == 0); |
859 | WARN_ON(mpic->num_sources > MPIC_VEC_IPI_0); | ||
860 | |||
861 | /* Sanitize source count */ | ||
862 | if (mpic->num_sources > MPIC_VEC_IPI_0) | ||
863 | mpic->num_sources = MPIC_VEC_IPI_0; | ||
727 | 864 | ||
728 | printk(KERN_INFO "mpic: Initializing for %d sources\n", mpic->num_sources); | 865 | printk(KERN_INFO "mpic: Initializing for %d sources\n", mpic->num_sources); |
729 | 866 | ||
@@ -747,12 +884,6 @@ void __init mpic_init(struct mpic *mpic) | |||
747 | MPIC_VECPRI_MASK | | 884 | MPIC_VECPRI_MASK | |
748 | (10 << MPIC_VECPRI_PRIORITY_SHIFT) | | 885 | (10 << MPIC_VECPRI_PRIORITY_SHIFT) | |
749 | (MPIC_VEC_IPI_0 + i)); | 886 | (MPIC_VEC_IPI_0 + i)); |
750 | #ifdef CONFIG_SMP | ||
751 | if (!(mpic->flags & MPIC_PRIMARY)) | ||
752 | continue; | ||
753 | irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU; | ||
754 | irq_desc[mpic->ipi_offset+i].chip = &mpic->hc_ipi; | ||
755 | #endif /* CONFIG_SMP */ | ||
756 | } | 887 | } |
757 | 888 | ||
758 | /* Initialize interrupt sources */ | 889 | /* Initialize interrupt sources */ |
@@ -763,31 +894,21 @@ void __init mpic_init(struct mpic *mpic) | |||
763 | /* Do the HT PIC fixups on U3 broken mpic */ | 894 | /* Do the HT PIC fixups on U3 broken mpic */ |
764 | DBG("MPIC flags: %x\n", mpic->flags); | 895 | DBG("MPIC flags: %x\n", mpic->flags); |
765 | if ((mpic->flags & MPIC_BROKEN_U3) && (mpic->flags & MPIC_PRIMARY)) | 896 | if ((mpic->flags & MPIC_BROKEN_U3) && (mpic->flags & MPIC_PRIMARY)) |
766 | mpic_scan_ht_pics(mpic); | 897 | mpic_scan_ht_pics(mpic); |
767 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | 898 | #endif /* CONFIG_MPIC_BROKEN_U3 */ |
768 | 899 | ||
769 | for (i = 0; i < mpic->num_sources; i++) { | 900 | for (i = 0; i < mpic->num_sources; i++) { |
770 | /* start with vector = source number, and masked */ | 901 | /* start with vector = source number, and masked */ |
771 | u32 vecpri = MPIC_VECPRI_MASK | i | (8 << MPIC_VECPRI_PRIORITY_SHIFT); | 902 | u32 vecpri = MPIC_VECPRI_MASK | i | (8 << MPIC_VECPRI_PRIORITY_SHIFT); |
772 | int level = 0; | 903 | int level = 1; |
773 | 904 | ||
774 | /* if it's an IPI, we skip it */ | ||
775 | if ((mpic->irq_offset + i) >= (mpic->ipi_offset + i) && | ||
776 | (mpic->irq_offset + i) < (mpic->ipi_offset + i + 4)) | ||
777 | continue; | ||
778 | |||
779 | /* do senses munging */ | 905 | /* do senses munging */ |
780 | if (mpic->senses && i < mpic->senses_count) { | 906 | if (mpic->senses && i < mpic->senses_count) |
781 | if (mpic->senses[i] & IRQ_SENSE_LEVEL) | 907 | vecpri = mpic_flags_to_vecpri(mpic->senses[i], |
782 | vecpri |= MPIC_VECPRI_SENSE_LEVEL; | 908 | &level); |
783 | if (mpic->senses[i] & IRQ_POLARITY_POSITIVE) | 909 | else |
784 | vecpri |= MPIC_VECPRI_POLARITY_POSITIVE; | ||
785 | } else | ||
786 | vecpri |= MPIC_VECPRI_SENSE_LEVEL; | 910 | vecpri |= MPIC_VECPRI_SENSE_LEVEL; |
787 | 911 | ||
788 | /* remember if it was a level interrupts */ | ||
789 | level = (vecpri & MPIC_VECPRI_SENSE_LEVEL); | ||
790 | |||
791 | /* deal with broken U3 */ | 912 | /* deal with broken U3 */ |
792 | if (mpic->flags & MPIC_BROKEN_U3) { | 913 | if (mpic->flags & MPIC_BROKEN_U3) { |
793 | #ifdef CONFIG_MPIC_BROKEN_U3 | 914 | #ifdef CONFIG_MPIC_BROKEN_U3 |
@@ -808,12 +929,6 @@ void __init mpic_init(struct mpic *mpic) | |||
808 | mpic_irq_write(i, MPIC_IRQ_VECTOR_PRI, vecpri); | 929 | mpic_irq_write(i, MPIC_IRQ_VECTOR_PRI, vecpri); |
809 | mpic_irq_write(i, MPIC_IRQ_DESTINATION, | 930 | mpic_irq_write(i, MPIC_IRQ_DESTINATION, |
810 | 1 << hard_smp_processor_id()); | 931 | 1 << hard_smp_processor_id()); |
811 | |||
812 | /* init linux descriptors */ | ||
813 | if (i < mpic->irq_count) { | ||
814 | irq_desc[mpic->irq_offset+i].status = level ? IRQ_LEVEL : 0; | ||
815 | irq_desc[mpic->irq_offset+i].chip = &mpic->hc_irq; | ||
816 | } | ||
817 | } | 932 | } |
818 | 933 | ||
819 | /* Init spurrious vector */ | 934 | /* Init spurrious vector */ |
@@ -854,19 +969,20 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | |||
854 | { | 969 | { |
855 | int is_ipi; | 970 | int is_ipi; |
856 | struct mpic *mpic = mpic_find(irq, &is_ipi); | 971 | struct mpic *mpic = mpic_find(irq, &is_ipi); |
972 | unsigned int src = mpic_irq_to_hw(irq); | ||
857 | unsigned long flags; | 973 | unsigned long flags; |
858 | u32 reg; | 974 | u32 reg; |
859 | 975 | ||
860 | spin_lock_irqsave(&mpic_lock, flags); | 976 | spin_lock_irqsave(&mpic_lock, flags); |
861 | if (is_ipi) { | 977 | if (is_ipi) { |
862 | reg = mpic_ipi_read(irq - mpic->ipi_offset) & | 978 | reg = mpic_ipi_read(src - MPIC_VEC_IPI_0) & |
863 | ~MPIC_VECPRI_PRIORITY_MASK; | 979 | ~MPIC_VECPRI_PRIORITY_MASK; |
864 | mpic_ipi_write(irq - mpic->ipi_offset, | 980 | mpic_ipi_write(src - MPIC_VEC_IPI_0, |
865 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); | 981 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); |
866 | } else { | 982 | } else { |
867 | reg = mpic_irq_read(irq - mpic->irq_offset,MPIC_IRQ_VECTOR_PRI) | 983 | reg = mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) |
868 | & ~MPIC_VECPRI_PRIORITY_MASK; | 984 | & ~MPIC_VECPRI_PRIORITY_MASK; |
869 | mpic_irq_write(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI, | 985 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, |
870 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); | 986 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); |
871 | } | 987 | } |
872 | spin_unlock_irqrestore(&mpic_lock, flags); | 988 | spin_unlock_irqrestore(&mpic_lock, flags); |
@@ -876,14 +992,15 @@ unsigned int mpic_irq_get_priority(unsigned int irq) | |||
876 | { | 992 | { |
877 | int is_ipi; | 993 | int is_ipi; |
878 | struct mpic *mpic = mpic_find(irq, &is_ipi); | 994 | struct mpic *mpic = mpic_find(irq, &is_ipi); |
995 | unsigned int src = mpic_irq_to_hw(irq); | ||
879 | unsigned long flags; | 996 | unsigned long flags; |
880 | u32 reg; | 997 | u32 reg; |
881 | 998 | ||
882 | spin_lock_irqsave(&mpic_lock, flags); | 999 | spin_lock_irqsave(&mpic_lock, flags); |
883 | if (is_ipi) | 1000 | if (is_ipi) |
884 | reg = mpic_ipi_read(irq - mpic->ipi_offset); | 1001 | reg = mpic_ipi_read(src = MPIC_VEC_IPI_0); |
885 | else | 1002 | else |
886 | reg = mpic_irq_read(irq - mpic->irq_offset, MPIC_IRQ_VECTOR_PRI); | 1003 | reg = mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI); |
887 | spin_unlock_irqrestore(&mpic_lock, flags); | 1004 | spin_unlock_irqrestore(&mpic_lock, flags); |
888 | return (reg & MPIC_VECPRI_PRIORITY_MASK) >> MPIC_VECPRI_PRIORITY_SHIFT; | 1005 | return (reg & MPIC_VECPRI_PRIORITY_MASK) >> MPIC_VECPRI_PRIORITY_SHIFT; |
889 | } | 1006 | } |
@@ -978,37 +1095,20 @@ void mpic_send_ipi(unsigned int ipi_no, unsigned int cpu_mask) | |||
978 | mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0])); | 1095 | mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0])); |
979 | } | 1096 | } |
980 | 1097 | ||
981 | int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs) | 1098 | unsigned int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs) |
982 | { | 1099 | { |
983 | u32 irq; | 1100 | u32 src; |
984 | 1101 | ||
985 | irq = mpic_cpu_read(MPIC_CPU_INTACK) & MPIC_VECPRI_VECTOR_MASK; | 1102 | src = mpic_cpu_read(MPIC_CPU_INTACK) & MPIC_VECPRI_VECTOR_MASK; |
986 | #ifdef DEBUG_LOW | 1103 | #ifdef DEBUG_LOW |
987 | DBG("%s: get_one_irq(): %d\n", mpic->name, irq); | 1104 | DBG("%s: get_one_irq(): %d\n", mpic->name, src); |
988 | #endif | 1105 | #endif |
989 | if (mpic->cascade && irq == mpic->cascade_vec) { | 1106 | if (unlikely(src == MPIC_VEC_SPURRIOUS)) |
990 | #ifdef DEBUG_LOW | 1107 | return NO_IRQ; |
991 | DBG("%s: cascading ...\n", mpic->name); | 1108 | return irq_linear_revmap(mpic->irqhost, src); |
992 | #endif | ||
993 | irq = mpic->cascade(regs, mpic->cascade_data); | ||
994 | mpic_eoi(mpic); | ||
995 | return irq; | ||
996 | } | ||
997 | if (unlikely(irq == MPIC_VEC_SPURRIOUS)) | ||
998 | return -1; | ||
999 | if (irq < MPIC_VEC_IPI_0) { | ||
1000 | #ifdef DEBUG_IRQ | ||
1001 | DBG("%s: irq %d\n", mpic->name, irq + mpic->irq_offset); | ||
1002 | #endif | ||
1003 | return irq + mpic->irq_offset; | ||
1004 | } | ||
1005 | #ifdef DEBUG_IPI | ||
1006 | DBG("%s: ipi %d !\n", mpic->name, irq - MPIC_VEC_IPI_0); | ||
1007 | #endif | ||
1008 | return irq - MPIC_VEC_IPI_0 + mpic->ipi_offset; | ||
1009 | } | 1109 | } |
1010 | 1110 | ||
1011 | int mpic_get_irq(struct pt_regs *regs) | 1111 | unsigned int mpic_get_irq(struct pt_regs *regs) |
1012 | { | 1112 | { |
1013 | struct mpic *mpic = mpic_primary; | 1113 | struct mpic *mpic = mpic_primary; |
1014 | 1114 | ||
@@ -1022,25 +1122,27 @@ int mpic_get_irq(struct pt_regs *regs) | |||
1022 | void mpic_request_ipis(void) | 1122 | void mpic_request_ipis(void) |
1023 | { | 1123 | { |
1024 | struct mpic *mpic = mpic_primary; | 1124 | struct mpic *mpic = mpic_primary; |
1025 | 1125 | int i; | |
1126 | static char *ipi_names[] = { | ||
1127 | "IPI0 (call function)", | ||
1128 | "IPI1 (reschedule)", | ||
1129 | "IPI2 (unused)", | ||
1130 | "IPI3 (debugger break)", | ||
1131 | }; | ||
1026 | BUG_ON(mpic == NULL); | 1132 | BUG_ON(mpic == NULL); |
1027 | |||
1028 | printk("requesting IPIs ... \n"); | ||
1029 | 1133 | ||
1030 | /* | 1134 | printk(KERN_INFO "mpic: requesting IPIs ... \n"); |
1031 | * IPIs are marked IRQF_DISABLED as they must run with irqs | 1135 | |
1032 | * disabled | 1136 | for (i = 0; i < 4; i++) { |
1033 | */ | 1137 | unsigned int vipi = irq_create_mapping(mpic->irqhost, |
1034 | request_irq(mpic->ipi_offset+0, mpic_ipi_action, IRQF_DISABLED, | 1138 | MPIC_VEC_IPI_0 + i, 0); |
1035 | "IPI0 (call function)", mpic); | 1139 | if (vipi == NO_IRQ) { |
1036 | request_irq(mpic->ipi_offset+1, mpic_ipi_action, IRQF_DISABLED, | 1140 | printk(KERN_ERR "Failed to map IPI %d\n", i); |
1037 | "IPI1 (reschedule)", mpic); | 1141 | break; |
1038 | request_irq(mpic->ipi_offset+2, mpic_ipi_action, IRQF_DISABLED, | 1142 | } |
1039 | "IPI2 (unused)", mpic); | 1143 | request_irq(vipi, mpic_ipi_action, IRQF_DISABLED, |
1040 | request_irq(mpic->ipi_offset+3, mpic_ipi_action, IRQF_DISABLED, | 1144 | ipi_names[i], mpic); |
1041 | "IPI3 (debugger break)", mpic); | 1145 | } |
1042 | |||
1043 | printk("IPIs requested... \n"); | ||
1044 | } | 1146 | } |
1045 | 1147 | ||
1046 | void smp_mpic_message_pass(int target, int msg) | 1148 | void smp_mpic_message_pass(int target, int msg) |
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile index 490749ca88f9..2497bbc07e76 100644 --- a/arch/ppc/syslib/Makefile +++ b/arch/ppc/syslib/Makefile | |||
@@ -104,3 +104,5 @@ obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o \ | |||
104 | ifeq ($(CONFIG_PPC_MPC52xx),y) | 104 | ifeq ($(CONFIG_PPC_MPC52xx),y) |
105 | obj-$(CONFIG_PCI) += mpc52xx_pci.o | 105 | obj-$(CONFIG_PCI) += mpc52xx_pci.o |
106 | endif | 106 | endif |
107 | |||
108 | obj-$(CONFIG_PPC_I8259) += i8259.o | ||
diff --git a/arch/ppc/syslib/i8259.c b/arch/ppc/syslib/i8259.c new file mode 100644 index 000000000000..eb35353af837 --- /dev/null +++ b/arch/ppc/syslib/i8259.c | |||
@@ -0,0 +1,212 @@ | |||
1 | /* | ||
2 | * i8259 interrupt controller driver. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version | ||
7 | * 2 of the License, or (at your option) any later version. | ||
8 | */ | ||
9 | #include <linux/init.h> | ||
10 | #include <linux/ioport.h> | ||
11 | #include <linux/interrupt.h> | ||
12 | #include <asm/io.h> | ||
13 | #include <asm/i8259.h> | ||
14 | |||
15 | static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */ | ||
16 | |||
17 | static unsigned char cached_8259[2] = { 0xff, 0xff }; | ||
18 | #define cached_A1 (cached_8259[0]) | ||
19 | #define cached_21 (cached_8259[1]) | ||
20 | |||
21 | static DEFINE_SPINLOCK(i8259_lock); | ||
22 | |||
23 | static int i8259_pic_irq_offset; | ||
24 | |||
25 | /* | ||
26 | * Acknowledge the IRQ using either the PCI host bridge's interrupt | ||
27 | * acknowledge feature or poll. How i8259_init() is called determines | ||
28 | * which is called. It should be noted that polling is broken on some | ||
29 | * IBM and Motorola PReP boxes so we must use the int-ack feature on them. | ||
30 | */ | ||
31 | int i8259_irq(struct pt_regs *regs) | ||
32 | { | ||
33 | int irq; | ||
34 | |||
35 | spin_lock(&i8259_lock); | ||
36 | |||
37 | /* Either int-ack or poll for the IRQ */ | ||
38 | if (pci_intack) | ||
39 | irq = readb(pci_intack); | ||
40 | else { | ||
41 | /* Perform an interrupt acknowledge cycle on controller 1. */ | ||
42 | outb(0x0C, 0x20); /* prepare for poll */ | ||
43 | irq = inb(0x20) & 7; | ||
44 | if (irq == 2 ) { | ||
45 | /* | ||
46 | * Interrupt is cascaded so perform interrupt | ||
47 | * acknowledge on controller 2. | ||
48 | */ | ||
49 | outb(0x0C, 0xA0); /* prepare for poll */ | ||
50 | irq = (inb(0xA0) & 7) + 8; | ||
51 | } | ||
52 | } | ||
53 | |||
54 | if (irq == 7) { | ||
55 | /* | ||
56 | * This may be a spurious interrupt. | ||
57 | * | ||
58 | * Read the interrupt status register (ISR). If the most | ||
59 | * significant bit is not set then there is no valid | ||
60 | * interrupt. | ||
61 | */ | ||
62 | if (!pci_intack) | ||
63 | outb(0x0B, 0x20); /* ISR register */ | ||
64 | if(~inb(0x20) & 0x80) | ||
65 | irq = -1; | ||
66 | } | ||
67 | |||
68 | spin_unlock(&i8259_lock); | ||
69 | return irq + i8259_pic_irq_offset; | ||
70 | } | ||
71 | |||
72 | static void i8259_mask_and_ack_irq(unsigned int irq_nr) | ||
73 | { | ||
74 | unsigned long flags; | ||
75 | |||
76 | spin_lock_irqsave(&i8259_lock, flags); | ||
77 | irq_nr -= i8259_pic_irq_offset; | ||
78 | if (irq_nr > 7) { | ||
79 | cached_A1 |= 1 << (irq_nr-8); | ||
80 | inb(0xA1); /* DUMMY */ | ||
81 | outb(cached_A1, 0xA1); | ||
82 | outb(0x20, 0xA0); /* Non-specific EOI */ | ||
83 | outb(0x20, 0x20); /* Non-specific EOI to cascade */ | ||
84 | } else { | ||
85 | cached_21 |= 1 << irq_nr; | ||
86 | inb(0x21); /* DUMMY */ | ||
87 | outb(cached_21, 0x21); | ||
88 | outb(0x20, 0x20); /* Non-specific EOI */ | ||
89 | } | ||
90 | spin_unlock_irqrestore(&i8259_lock, flags); | ||
91 | } | ||
92 | |||
93 | static void i8259_set_irq_mask(int irq_nr) | ||
94 | { | ||
95 | outb(cached_A1,0xA1); | ||
96 | outb(cached_21,0x21); | ||
97 | } | ||
98 | |||
99 | static void i8259_mask_irq(unsigned int irq_nr) | ||
100 | { | ||
101 | unsigned long flags; | ||
102 | |||
103 | spin_lock_irqsave(&i8259_lock, flags); | ||
104 | irq_nr -= i8259_pic_irq_offset; | ||
105 | if (irq_nr < 8) | ||
106 | cached_21 |= 1 << irq_nr; | ||
107 | else | ||
108 | cached_A1 |= 1 << (irq_nr-8); | ||
109 | i8259_set_irq_mask(irq_nr); | ||
110 | spin_unlock_irqrestore(&i8259_lock, flags); | ||
111 | } | ||
112 | |||
113 | static void i8259_unmask_irq(unsigned int irq_nr) | ||
114 | { | ||
115 | unsigned long flags; | ||
116 | |||
117 | spin_lock_irqsave(&i8259_lock, flags); | ||
118 | irq_nr -= i8259_pic_irq_offset; | ||
119 | if (irq_nr < 8) | ||
120 | cached_21 &= ~(1 << irq_nr); | ||
121 | else | ||
122 | cached_A1 &= ~(1 << (irq_nr-8)); | ||
123 | i8259_set_irq_mask(irq_nr); | ||
124 | spin_unlock_irqrestore(&i8259_lock, flags); | ||
125 | } | ||
126 | |||
127 | static struct irq_chip i8259_pic = { | ||
128 | .typename = " i8259 ", | ||
129 | .mask = i8259_mask_irq, | ||
130 | .unmask = i8259_unmask_irq, | ||
131 | .mask_ack = i8259_mask_and_ack_irq, | ||
132 | }; | ||
133 | |||
134 | static struct resource pic1_iores = { | ||
135 | .name = "8259 (master)", | ||
136 | .start = 0x20, | ||
137 | .end = 0x21, | ||
138 | .flags = IORESOURCE_BUSY, | ||
139 | }; | ||
140 | |||
141 | static struct resource pic2_iores = { | ||
142 | .name = "8259 (slave)", | ||
143 | .start = 0xa0, | ||
144 | .end = 0xa1, | ||
145 | .flags = IORESOURCE_BUSY, | ||
146 | }; | ||
147 | |||
148 | static struct resource pic_edgectrl_iores = { | ||
149 | .name = "8259 edge control", | ||
150 | .start = 0x4d0, | ||
151 | .end = 0x4d1, | ||
152 | .flags = IORESOURCE_BUSY, | ||
153 | }; | ||
154 | |||
155 | static struct irqaction i8259_irqaction = { | ||
156 | .handler = no_action, | ||
157 | .flags = SA_INTERRUPT, | ||
158 | .mask = CPU_MASK_NONE, | ||
159 | .name = "82c59 secondary cascade", | ||
160 | }; | ||
161 | |||
162 | /* | ||
163 | * i8259_init() | ||
164 | * intack_addr - PCI interrupt acknowledge (real) address which will return | ||
165 | * the active irq from the 8259 | ||
166 | */ | ||
167 | void __init i8259_init(unsigned long intack_addr, int offset) | ||
168 | { | ||
169 | unsigned long flags; | ||
170 | int i; | ||
171 | |||
172 | spin_lock_irqsave(&i8259_lock, flags); | ||
173 | i8259_pic_irq_offset = offset; | ||
174 | |||
175 | /* init master interrupt controller */ | ||
176 | outb(0x11, 0x20); /* Start init sequence */ | ||
177 | outb(0x00, 0x21); /* Vector base */ | ||
178 | outb(0x04, 0x21); /* edge tiggered, Cascade (slave) on IRQ2 */ | ||
179 | outb(0x01, 0x21); /* Select 8086 mode */ | ||
180 | |||
181 | /* init slave interrupt controller */ | ||
182 | outb(0x11, 0xA0); /* Start init sequence */ | ||
183 | outb(0x08, 0xA1); /* Vector base */ | ||
184 | outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */ | ||
185 | outb(0x01, 0xA1); /* Select 8086 mode */ | ||
186 | |||
187 | /* always read ISR */ | ||
188 | outb(0x0B, 0x20); | ||
189 | outb(0x0B, 0xA0); | ||
190 | |||
191 | /* Mask all interrupts */ | ||
192 | outb(cached_A1, 0xA1); | ||
193 | outb(cached_21, 0x21); | ||
194 | |||
195 | spin_unlock_irqrestore(&i8259_lock, flags); | ||
196 | |||
197 | for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) { | ||
198 | set_irq_chip_and_handler(offset + i, &i8259_pic, | ||
199 | handle_level_irq); | ||
200 | irq_desc[offset + i].status |= IRQ_LEVEL; | ||
201 | } | ||
202 | |||
203 | /* reserve our resources */ | ||
204 | setup_irq(offset + 2, &i8259_irqaction); | ||
205 | request_resource(&ioport_resource, &pic1_iores); | ||
206 | request_resource(&ioport_resource, &pic2_iores); | ||
207 | request_resource(&ioport_resource, &pic_edgectrl_iores); | ||
208 | |||
209 | if (intack_addr != 0) | ||
210 | pci_intack = ioremap(intack_addr, 1); | ||
211 | |||
212 | } | ||