Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Fix smp barriers in test_and_{change,clear,set}_bit
  [MIPS] Fix IP27 build
  [MIPS] Fix modpost warnings by making start_secondary __cpuinit
  [MIPS] SMTC: Fix build error caused by nonsense code.
  [MIPS] SMTC: The MT ASE requires to initialize c0_pagemask and c0_wired.
  [MIPS] SMTC: Don't continue in set_vi_srs_handler on detected bad arguments.
  [MIPS] SMTC: Fix warning.
  [MIPS] Wire up utimensat, signalfd, timerfd, eventfd
  [MIPS] Atlas: Fix build.
  [MIPS] Always install the DSP exception handler.
  [MIPS] SMTC: Don't set and restore irqregs ptr from self_ipi.
  [MIPS] Fix KMODE for the R3000

11 files changed, 36 insertions, 29 deletions

diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 0c9a9ff8cd25..ae985d1fcca1 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -657,7 +657,11 @@ einval:	li	v0, -EINVAL
         sys     sys_getcpu              3
         sys     sys_epoll_pwait         6
         sys     sys_ioprio_set          3
-        sys     sys_ioprio_get          2
+        sys     sys_ioprio_get          2       /* 4315 */
+        sys     sys_utimensat           4
+        sys     sys_signalfd            3
+        sys     sys_timerfd             4
+        sys     sys_eventfd             1
         .endm
 
         /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 23f3b118f718..7bcd5a1a85f5 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -473,4 +473,8 @@ sys_call_table:
         PTR     sys_epoll_pwait
         PTR     sys_ioprio_set
         PTR     sys_ioprio_get
+        PTR     sys_utimensat                   /* 5275 */
+        PTR     sys_signalfd
+        PTR     sys_timerfd
+        PTR     sys_eventfd
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 1631035ffc24..532a2f3b42fc 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -399,4 +399,8 @@ EXPORT(sysn32_call_table)
         PTR     compat_sys_epoll_pwait
         PTR     sys_ioprio_set
         PTR     sys_ioprio_get
+        PTR     compat_sys_utimensat
+        PTR     compat_sys_signalfd             /* 5280 */
+        PTR     compat_sys_timerfd
+        PTR     sys_eventfd
         .size   sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 2aa99426ac1c..6bbe0f4ed8ba 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -521,4 +521,8 @@ sys_call_table:
         PTR     compat_sys_epoll_pwait
         PTR     sys_ioprio_set
         PTR     sys_ioprio_get                  /* 4315 */
+        PTR     compat_sys_utimensat
+        PTR     compat_sys_signalfd
+        PTR     compat_sys_timerfd
+        PTR     sys_eventfd
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index c46e479c992b..67edfa7ed93a 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -68,7 +68,7 @@ extern ATTRIB_NORET void cpu_idle(void);
  * First C code run on the secondary CPUs after being started up by
  * the master.
  */
-asmlinkage void start_secondary(void)
+asmlinkage __cpuinit void start_secondary(void)
 {
         unsigned int cpu;
 
diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S
index 921207c4a83c..20938a4cb52d 100644
--- a/arch/mips/kernel/smtc-asm.S
+++ b/arch/mips/kernel/smtc-asm.S
@@ -121,10 +121,7 @@ LEAF(self_ipi)
         subu    t1,sp,PT_SIZE
         sw      ra,PT_EPC(t1)
         sw      a0,PT_PADSLOT4(t1)
-        LONG_L  s0, TI_REGS($28)
-        LONG_S  sp, TI_REGS($28)
         la      t2,ipi_decode
-        LONG_S  s0, TI_REGS($28)
         sw      t2,PT_PADSLOT5(t1)
         /* Save pre-disable value of TCStatus */
         sw      t0,PT_TCSTATUS(t1)
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index b361edb83dc6..21eb5993a19f 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -611,12 +611,12 @@ void smtc_cpus_done(void)
 int setup_irq_smtc(unsigned int irq, struct irqaction * new,
                         unsigned long hwmask)
 {
+#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG
         unsigned int vpe = current_cpu_data.vpe_id;
 
-        irq_hwmask[irq] = hwmask;
-#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG
         vpemask[vpe][irq - MIPSCPU_INT_BASE] = 1;
 #endif
+        irq_hwmask[irq] = hwmask;
 
         return setup_irq(irq, new);
 }
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 3f58b6ac1358..a7a17eb9bfcd 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -11,6 +11,7 @@
  * Copyright (C) 2000, 01 MIPS Technologies, Inc.
  * Copyright (C) 2002, 2003, 2004, 2005  Maciej W. Rozycki
  */
+#include <linux/bug.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/module.h>
@@ -1190,8 +1191,8 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
 
                 memcpy (b, &except_vec_vi, handler_len);
 #ifdef CONFIG_MIPS_MT_SMTC
-                if (n > 7)
-                        printk("Vector index %d exceeds SMTC maximum\n", n);
+                BUG_ON(n > 7);  /* Vector index %d exceeds SMTC maximum. */
+
                 w = (u32 *)(b + mori_offset);
                 *w = (*w & 0xffff0000) | (0x100 << n);
 #endif /* CONFIG_MIPS_MT_SMTC */
@@ -1383,6 +1384,13 @@ void __init per_cpu_trap_init(void)
                 cpu_cache_init();
                 tlb_init();
 #ifdef CONFIG_MIPS_MT_SMTC
+        } else if (!secondaryTC) {
+                /*
+                 * First TC in non-boot VPE must do subset of tlb_init()
+                 * for MMU countrol registers.
+                 */
+                write_c0_pagemask(PM_DEFAULT_MASK);
+                write_c0_wired(0);
         }
 #endif /* CONFIG_MIPS_MT_SMTC */
 }
@@ -1531,8 +1539,7 @@ void __init trap_init(void)
         if (cpu_has_mipsmt)
                 set_except_vector(25, handle_mt);
 
-        if (cpu_has_dsp)
-                set_except_vector(26, handle_dsp);
+        set_except_vector(26, handle_dsp);
 
         if (cpu_has_vce)
                 /* Special exception: R4[04]00 uses also the divec space. */
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index dfa0acbd7fc2..9f49da95aacf 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -248,14 +248,13 @@ void __init arch_init_irq(void)
         case MIPS_REVISION_CORID_CORE_24K:
         case MIPS_REVISION_CORID_CORE_EMUL_MSC:
                 if (cpu_has_veic)
-                        init_msc_irqs (MSC01E_INT_BASE,
+                        init_msc_irqs (MSC01E_INT_BASE, MSC01E_INT_BASE,
                                        msc_eicirqmap, msc_nr_eicirqs);
                 else
-                        init_msc_irqs (MSC01C_INT_BASE,
+                        init_msc_irqs (MSC01E_INT_BASE, MSC01C_INT_BASE,
                                        msc_irqmap, msc_nr_irqs);
         }
 
-
         if (cpu_has_veic) {
                 set_vi_handler (MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
                 setup_irq (MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 37735bfc3afd..b41db9e7ab1f 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -88,8 +88,6 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id)
          *  the general MIPS timer_interrupt routine.
          */
 
-        int vpflags;
-
         /*
          * We could be here due to timer interrupt,
          * perf counter overflow, or both.
@@ -98,15 +96,6 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id)
                 perf_irq();
 
         if (read_c0_cause() & (1 << 30)) {
-                /* If timer interrupt, make it de-assert */
-                write_c0_compare (read_c0_count() - 1);
-                /*
-                 * DVPE is necessary so long as cross-VPE interrupts
-                 * are done via read-modify-write of Cause register.
-                 */
-                vpflags = dvpe();
-                clear_c0_cause(CPUCTR_IMASKBIT);
-                evpe(vpflags);
                 /*
                  * There are things we only want to do once per tick
                  * in an "MP" system.   One TC of each VPE will take
@@ -115,14 +104,13 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id)
                  * the tick on VPE 0 to run the full timer_interrupt().
                  */
                 if (cpu_data[cpu].vpe_id == 0) {
-                                timer_interrupt(irq, NULL);
-                                smtc_timer_broadcast(cpu_data[cpu].vpe_id);
+                        timer_interrupt(irq, NULL);
                 } else {
                         write_c0_compare(read_c0_count() +
                                          (mips_hpt_frequency/HZ));
                         local_timer_interrupt(irq, dev_id);
-                        smtc_timer_broadcast(cpu_data[cpu].vpe_id);
                 }
+                smtc_timer_broadcast(cpu_data[cpu].vpe_id);
         }
 #else /* CONFIG_MIPS_MT_SMTC */
         int r2 = cpu_has_mips_r2;
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
index fe8a1066aec1..e5e023f50a07 100644
--- a/arch/mips/sgi-ip27/ip27-memory.c
+++ b/arch/mips/sgi-ip27/ip27-memory.c
@@ -517,7 +517,7 @@ void __init paging_init(void)
                 pfn_t start_pfn = slot_getbasepfn(node, 0);
                 pfn_t end_pfn = node_getmaxclick(node) + 1;
 
-                zones_size[ZONE_DMA] = end_pfn - start_pfn;
+                zones_size[ZONE_NORMAL] = end_pfn - start_pfn;
                 free_area_init_node(node, NODE_DATA(node),
                                 zones_size, start_pfn, NULL);