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authorChris Wright <chrisw@sous-sol.org>2009-06-16 03:01:37 -0400
committerJoerg Roedel <joerg.roedel@amd.com>2009-06-16 04:19:16 -0400
commit6a047d8b9efc4b7d0c57ca4835f7e519e5c90d3f (patch)
tree3d6d4b1f79a0d542b1c481dd1310a3bbf92b3bc9 /arch
parent09067207f6eacb7f00c8f7f0623c3696083ce042 (diff)
amd-iommu: resume cleanup
Now that enable_iommus() will call iommu_disable() for each iommu, the call to disable_iommus() during resume is redundant. Also, the order for an invalidation is to invalidate device table entries first, then domain translations. Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/amd_iommu_init.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 068a3569f837..10b2accd12ea 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -1079,12 +1079,6 @@ static void disable_iommus(void)
1079 1079
1080static int amd_iommu_resume(struct sys_device *dev) 1080static int amd_iommu_resume(struct sys_device *dev)
1081{ 1081{
1082 /*
1083 * Disable IOMMUs before reprogramming the hardware registers.
1084 * IOMMU is still enabled from the resume kernel.
1085 */
1086 disable_iommus();
1087
1088 /* re-load the hardware */ 1082 /* re-load the hardware */
1089 enable_iommus(); 1083 enable_iommus();
1090 1084
@@ -1092,8 +1086,8 @@ static int amd_iommu_resume(struct sys_device *dev)
1092 * we have to flush after the IOMMUs are enabled because a 1086 * we have to flush after the IOMMUs are enabled because a
1093 * disabled IOMMU will never execute the commands we send 1087 * disabled IOMMU will never execute the commands we send
1094 */ 1088 */
1095 amd_iommu_flush_all_domains();
1096 amd_iommu_flush_all_devices(); 1089 amd_iommu_flush_all_devices();
1090 amd_iommu_flush_all_domains();
1097 1091
1098 return 0; 1092 return 0;
1099} 1093}