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authorKirill A. Shutemov <kirill@shutemov.name>2009-09-25 08:39:47 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-10-02 17:34:32 -0400
commit4fb2847437d871fe579f820ceb18031db3359901 (patch)
treee2015dbc54178dd114eb0c41fa5a29d89dd15b41 /arch
parent6806bfe18fca92e2001538b84cab5f63c5ea4bed (diff)
ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()
Instruction fault status register, IFSR, was introduced on ARMv6 to provide status information about the last insturction fault. It needed for proper prefetch abort handling. Now we have three prefetch abort model: * legacy - for CPUs before ARMv6. They doesn't provide neither IFSR nor IFAR. We simulate IFSR with section translation fault status for them to generalize code; * ARMv6 - provides IFSR, but not IFAR; * ARMv7 - provides both IFSR and IFAR. Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/glue.h26
-rw-r--r--arch/arm/kernel/entry-armv.S18
-rw-r--r--arch/arm/kernel/entry-common.S7
-rw-r--r--arch/arm/mm/Kconfig57
-rw-r--r--arch/arm/mm/Makefile4
-rw-r--r--arch/arm/mm/fault.c2
-rw-r--r--arch/arm/mm/pabort-legacy.S19
-rw-r--r--arch/arm/mm/pabort-v6.S19
-rw-r--r--arch/arm/mm/pabort-v7.S20
-rw-r--r--arch/arm/mm/proc-arm1020.S2
-rw-r--r--arch/arm/mm/proc-arm1020e.S2
-rw-r--r--arch/arm/mm/proc-arm1022.S2
-rw-r--r--arch/arm/mm/proc-arm1026.S2
-rw-r--r--arch/arm/mm/proc-arm6_7.S4
-rw-r--r--arch/arm/mm/proc-arm720.S2
-rw-r--r--arch/arm/mm/proc-arm740.S2
-rw-r--r--arch/arm/mm/proc-arm7tdmi.S2
-rw-r--r--arch/arm/mm/proc-arm920.S2
-rw-r--r--arch/arm/mm/proc-arm922.S2
-rw-r--r--arch/arm/mm/proc-arm925.S2
-rw-r--r--arch/arm/mm/proc-arm926.S2
-rw-r--r--arch/arm/mm/proc-arm940.S2
-rw-r--r--arch/arm/mm/proc-arm946.S2
-rw-r--r--arch/arm/mm/proc-arm9tdmi.S2
-rw-r--r--arch/arm/mm/proc-fa526.S2
-rw-r--r--arch/arm/mm/proc-feroceon.S2
-rw-r--r--arch/arm/mm/proc-mohawk.S2
-rw-r--r--arch/arm/mm/proc-sa110.S2
-rw-r--r--arch/arm/mm/proc-sa1100.S2
-rw-r--r--arch/arm/mm/proc-v6.S2
-rw-r--r--arch/arm/mm/proc-v7.S2
-rw-r--r--arch/arm/mm/proc-xsc3.S2
-rw-r--r--arch/arm/mm/proc-xscale.S2
33 files changed, 144 insertions, 78 deletions
diff --git a/arch/arm/include/asm/glue.h b/arch/arm/include/asm/glue.h
index a0e39d5d00c9..234a3fc1c78e 100644
--- a/arch/arm/include/asm/glue.h
+++ b/arch/arm/include/asm/glue.h
@@ -120,25 +120,39 @@
120#endif 120#endif
121 121
122/* 122/*
123 * Prefetch abort handler. If the CPU has an IFAR use that, otherwise 123 * Prefetch Abort Model
124 * use the address of the aborted instruction 124 * ================
125 *
126 * We have the following to choose from:
127 * legacy - no IFSR, no IFAR
128 * v6 - ARMv6: IFSR, no IFAR
129 * v7 - ARMv7: IFSR and IFAR
125 */ 130 */
131
126#undef CPU_PABORT_HANDLER 132#undef CPU_PABORT_HANDLER
127#undef MULTI_PABORT 133#undef MULTI_PABORT
128 134
129#ifdef CONFIG_CPU_PABRT_IFAR 135#ifdef CONFIG_CPU_PABRT_LEGACY
136# ifdef CPU_PABORT_HANDLER
137# define MULTI_PABORT 1
138# else
139# define CPU_PABORT_HANDLER legacy_pabort
140# endif
141#endif
142
143#ifdef CONFIG_CPU_PABRT_V6
130# ifdef CPU_PABORT_HANDLER 144# ifdef CPU_PABORT_HANDLER
131# define MULTI_PABORT 1 145# define MULTI_PABORT 1
132# else 146# else
133# define CPU_PABORT_HANDLER(reg, insn) mrc p15, 0, reg, cr6, cr0, 2 147# define CPU_PABORT_HANDLER v6_pabort
134# endif 148# endif
135#endif 149#endif
136 150
137#ifdef CONFIG_CPU_PABRT_NOIFAR 151#ifdef CONFIG_CPU_PABRT_V7
138# ifdef CPU_PABORT_HANDLER 152# ifdef CPU_PABORT_HANDLER
139# define MULTI_PABORT 1 153# define MULTI_PABORT 1
140# else 154# else
141# define CPU_PABORT_HANDLER(reg, insn) mov reg, insn 155# define CPU_PABORT_HANDLER v7_pabort
142# endif 156# endif
143#endif 157#endif
144 158
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 0a2ba51cf35d..322410be573c 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -311,22 +311,16 @@ __pabt_svc:
311 tst r3, #PSR_I_BIT 311 tst r3, #PSR_I_BIT
312 biceq r9, r9, #PSR_I_BIT 312 biceq r9, r9, #PSR_I_BIT
313 313
314 @
315 @ set args, then call main handler
316 @
317 @ r0 - address of faulting instruction
318 @ r1 - pointer to registers on stack
319 @
320#ifdef MULTI_PABORT
321 mov r0, r2 @ pass address of aborted instruction. 314 mov r0, r2 @ pass address of aborted instruction.
315#ifdef MULTI_PABORT
322 ldr r4, .LCprocfns 316 ldr r4, .LCprocfns
323 mov lr, pc 317 mov lr, pc
324 ldr pc, [r4, #PROCESSOR_PABT_FUNC] 318 ldr pc, [r4, #PROCESSOR_PABT_FUNC]
325#else 319#else
326 CPU_PABORT_HANDLER(r0, r2) 320 bl CPU_PABORT_HANDLER
327#endif 321#endif
328 msr cpsr_c, r9 @ Maybe enable interrupts 322 msr cpsr_c, r9 @ Maybe enable interrupts
329 mov r1, sp @ regs 323 mov r2, sp @ regs
330 bl do_PrefetchAbort @ call abort handler 324 bl do_PrefetchAbort @ call abort handler
331 325
332 @ 326 @
@@ -701,16 +695,16 @@ ENDPROC(__und_usr_unknown)
701__pabt_usr: 695__pabt_usr:
702 usr_entry 696 usr_entry
703 697
704#ifdef MULTI_PABORT
705 mov r0, r2 @ pass address of aborted instruction. 698 mov r0, r2 @ pass address of aborted instruction.
699#ifdef MULTI_PABORT
706 ldr r4, .LCprocfns 700 ldr r4, .LCprocfns
707 mov lr, pc 701 mov lr, pc
708 ldr pc, [r4, #PROCESSOR_PABT_FUNC] 702 ldr pc, [r4, #PROCESSOR_PABT_FUNC]
709#else 703#else
710 CPU_PABORT_HANDLER(r0, r2) 704 bl CPU_PABORT_HANDLER
711#endif 705#endif
712 enable_irq @ Enable interrupts 706 enable_irq @ Enable interrupts
713 mov r1, sp @ regs 707 mov r2, sp @ regs
714 bl do_PrefetchAbort @ call abort handler 708 bl do_PrefetchAbort @ call abort handler
715 UNWIND(.fnend ) 709 UNWIND(.fnend )
716 /* fall through */ 710 /* fall through */
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 825db52e558a..f0fe95b7085d 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -425,13 +425,6 @@ sys_mmap2:
425#endif 425#endif
426ENDPROC(sys_mmap2) 426ENDPROC(sys_mmap2)
427 427
428ENTRY(pabort_ifar)
429 mrc p15, 0, r0, cr6, cr0, 2
430ENTRY(pabort_noifar)
431 mov pc, lr
432ENDPROC(pabort_ifar)
433ENDPROC(pabort_noifar)
434
435#ifdef CONFIG_OABI_COMPAT 428#ifdef CONFIG_OABI_COMPAT
436 429
437/* 430/*
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 8d43e58f9244..e993140edd88 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -17,7 +17,7 @@ config CPU_ARM610
17 select CPU_CP15_MMU 17 select CPU_CP15_MMU
18 select CPU_COPY_V3 if MMU 18 select CPU_COPY_V3 if MMU
19 select CPU_TLB_V3 if MMU 19 select CPU_TLB_V3 if MMU
20 select CPU_PABRT_NOIFAR 20 select CPU_PABRT_LEGACY
21 help 21 help
22 The ARM610 is the successor to the ARM3 processor 22 The ARM610 is the successor to the ARM3 processor
23 and was produced by VLSI Technology Inc. 23 and was produced by VLSI Technology Inc.
@@ -31,7 +31,7 @@ config CPU_ARM7TDMI
31 depends on !MMU 31 depends on !MMU
32 select CPU_32v4T 32 select CPU_32v4T
33 select CPU_ABRT_LV4T 33 select CPU_ABRT_LV4T
34 select CPU_PABRT_NOIFAR 34 select CPU_PABRT_LEGACY
35 select CPU_CACHE_V4 35 select CPU_CACHE_V4
36 help 36 help
37 A 32-bit RISC microprocessor based on the ARM7 processor core 37 A 32-bit RISC microprocessor based on the ARM7 processor core
@@ -49,7 +49,7 @@ config CPU_ARM710
49 select CPU_CP15_MMU 49 select CPU_CP15_MMU
50 select CPU_COPY_V3 if MMU 50 select CPU_COPY_V3 if MMU
51 select CPU_TLB_V3 if MMU 51 select CPU_TLB_V3 if MMU
52 select CPU_PABRT_NOIFAR 52 select CPU_PABRT_LEGACY
53 help 53 help
54 A 32-bit RISC microprocessor based on the ARM7 processor core 54 A 32-bit RISC microprocessor based on the ARM7 processor core
55 designed by Advanced RISC Machines Ltd. The ARM710 is the 55 designed by Advanced RISC Machines Ltd. The ARM710 is the
@@ -64,7 +64,7 @@ config CPU_ARM720T
64 bool "Support ARM720T processor" if ARCH_INTEGRATOR 64 bool "Support ARM720T processor" if ARCH_INTEGRATOR
65 select CPU_32v4T 65 select CPU_32v4T
66 select CPU_ABRT_LV4T 66 select CPU_ABRT_LV4T
67 select CPU_PABRT_NOIFAR 67 select CPU_PABRT_LEGACY
68 select CPU_CACHE_V4 68 select CPU_CACHE_V4
69 select CPU_CACHE_VIVT 69 select CPU_CACHE_VIVT
70 select CPU_CP15_MMU 70 select CPU_CP15_MMU
@@ -83,7 +83,7 @@ config CPU_ARM740T
83 depends on !MMU 83 depends on !MMU
84 select CPU_32v4T 84 select CPU_32v4T
85 select CPU_ABRT_LV4T 85 select CPU_ABRT_LV4T
86 select CPU_PABRT_NOIFAR 86 select CPU_PABRT_LEGACY
87 select CPU_CACHE_V3 # although the core is v4t 87 select CPU_CACHE_V3 # although the core is v4t
88 select CPU_CP15_MPU 88 select CPU_CP15_MPU
89 help 89 help
@@ -100,7 +100,7 @@ config CPU_ARM9TDMI
100 depends on !MMU 100 depends on !MMU
101 select CPU_32v4T 101 select CPU_32v4T
102 select CPU_ABRT_NOMMU 102 select CPU_ABRT_NOMMU
103 select CPU_PABRT_NOIFAR 103 select CPU_PABRT_LEGACY
104 select CPU_CACHE_V4 104 select CPU_CACHE_V4
105 help 105 help
106 A 32-bit RISC microprocessor based on the ARM9 processor core 106 A 32-bit RISC microprocessor based on the ARM9 processor core
@@ -114,7 +114,7 @@ config CPU_ARM920T
114 bool "Support ARM920T processor" if ARCH_INTEGRATOR 114 bool "Support ARM920T processor" if ARCH_INTEGRATOR
115 select CPU_32v4T 115 select CPU_32v4T
116 select CPU_ABRT_EV4T 116 select CPU_ABRT_EV4T
117 select CPU_PABRT_NOIFAR 117 select CPU_PABRT_LEGACY
118 select CPU_CACHE_V4WT 118 select CPU_CACHE_V4WT
119 select CPU_CACHE_VIVT 119 select CPU_CACHE_VIVT
120 select CPU_CP15_MMU 120 select CPU_CP15_MMU
@@ -135,7 +135,7 @@ config CPU_ARM922T
135 bool "Support ARM922T processor" if ARCH_INTEGRATOR 135 bool "Support ARM922T processor" if ARCH_INTEGRATOR
136 select CPU_32v4T 136 select CPU_32v4T
137 select CPU_ABRT_EV4T 137 select CPU_ABRT_EV4T
138 select CPU_PABRT_NOIFAR 138 select CPU_PABRT_LEGACY
139 select CPU_CACHE_V4WT 139 select CPU_CACHE_V4WT
140 select CPU_CACHE_VIVT 140 select CPU_CACHE_VIVT
141 select CPU_CP15_MMU 141 select CPU_CP15_MMU
@@ -154,7 +154,7 @@ config CPU_ARM925T
154 bool "Support ARM925T processor" if ARCH_OMAP1 154 bool "Support ARM925T processor" if ARCH_OMAP1
155 select CPU_32v4T 155 select CPU_32v4T
156 select CPU_ABRT_EV4T 156 select CPU_ABRT_EV4T
157 select CPU_PABRT_NOIFAR 157 select CPU_PABRT_LEGACY
158 select CPU_CACHE_V4WT 158 select CPU_CACHE_V4WT
159 select CPU_CACHE_VIVT 159 select CPU_CACHE_VIVT
160 select CPU_CP15_MMU 160 select CPU_CP15_MMU
@@ -173,7 +173,7 @@ config CPU_ARM926T
173 bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB 173 bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
174 select CPU_32v5 174 select CPU_32v5
175 select CPU_ABRT_EV5TJ 175 select CPU_ABRT_EV5TJ
176 select CPU_PABRT_NOIFAR 176 select CPU_PABRT_LEGACY
177 select CPU_CACHE_VIVT 177 select CPU_CACHE_VIVT
178 select CPU_CP15_MMU 178 select CPU_CP15_MMU
179 select CPU_COPY_V4WB if MMU 179 select CPU_COPY_V4WB if MMU
@@ -191,7 +191,7 @@ config CPU_FA526
191 bool 191 bool
192 select CPU_32v4 192 select CPU_32v4
193 select CPU_ABRT_EV4 193 select CPU_ABRT_EV4
194 select CPU_PABRT_NOIFAR 194 select CPU_PABRT_LEGACY
195 select CPU_CACHE_VIVT 195 select CPU_CACHE_VIVT
196 select CPU_CP15_MMU 196 select CPU_CP15_MMU
197 select CPU_CACHE_FA 197 select CPU_CACHE_FA
@@ -210,7 +210,7 @@ config CPU_ARM940T
210 depends on !MMU 210 depends on !MMU
211 select CPU_32v4T 211 select CPU_32v4T
212 select CPU_ABRT_NOMMU 212 select CPU_ABRT_NOMMU
213 select CPU_PABRT_NOIFAR 213 select CPU_PABRT_LEGACY
214 select CPU_CACHE_VIVT 214 select CPU_CACHE_VIVT
215 select CPU_CP15_MPU 215 select CPU_CP15_MPU
216 help 216 help
@@ -228,7 +228,7 @@ config CPU_ARM946E
228 depends on !MMU 228 depends on !MMU
229 select CPU_32v5 229 select CPU_32v5
230 select CPU_ABRT_NOMMU 230 select CPU_ABRT_NOMMU
231 select CPU_PABRT_NOIFAR 231 select CPU_PABRT_LEGACY
232 select CPU_CACHE_VIVT 232 select CPU_CACHE_VIVT
233 select CPU_CP15_MPU 233 select CPU_CP15_MPU
234 help 234 help
@@ -244,7 +244,7 @@ config CPU_ARM1020
244 bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR 244 bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR
245 select CPU_32v5 245 select CPU_32v5
246 select CPU_ABRT_EV4T 246 select CPU_ABRT_EV4T
247 select CPU_PABRT_NOIFAR 247 select CPU_PABRT_LEGACY
248 select CPU_CACHE_V4WT 248 select CPU_CACHE_V4WT
249 select CPU_CACHE_VIVT 249 select CPU_CACHE_VIVT
250 select CPU_CP15_MMU 250 select CPU_CP15_MMU
@@ -262,7 +262,7 @@ config CPU_ARM1020E
262 bool "Support ARM1020E processor" if ARCH_INTEGRATOR 262 bool "Support ARM1020E processor" if ARCH_INTEGRATOR
263 select CPU_32v5 263 select CPU_32v5
264 select CPU_ABRT_EV4T 264 select CPU_ABRT_EV4T
265 select CPU_PABRT_NOIFAR 265 select CPU_PABRT_LEGACY
266 select CPU_CACHE_V4WT 266 select CPU_CACHE_V4WT
267 select CPU_CACHE_VIVT 267 select CPU_CACHE_VIVT
268 select CPU_CP15_MMU 268 select CPU_CP15_MMU
@@ -275,7 +275,7 @@ config CPU_ARM1022
275 bool "Support ARM1022E processor" if ARCH_INTEGRATOR 275 bool "Support ARM1022E processor" if ARCH_INTEGRATOR
276 select CPU_32v5 276 select CPU_32v5
277 select CPU_ABRT_EV4T 277 select CPU_ABRT_EV4T
278 select CPU_PABRT_NOIFAR 278 select CPU_PABRT_LEGACY
279 select CPU_CACHE_VIVT 279 select CPU_CACHE_VIVT
280 select CPU_CP15_MMU 280 select CPU_CP15_MMU
281 select CPU_COPY_V4WB if MMU # can probably do better 281 select CPU_COPY_V4WB if MMU # can probably do better
@@ -293,7 +293,7 @@ config CPU_ARM1026
293 bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR 293 bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR
294 select CPU_32v5 294 select CPU_32v5
295 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10 295 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10
296 select CPU_PABRT_NOIFAR 296 select CPU_PABRT_LEGACY
297 select CPU_CACHE_VIVT 297 select CPU_CACHE_VIVT
298 select CPU_CP15_MMU 298 select CPU_CP15_MMU
299 select CPU_COPY_V4WB if MMU # can probably do better 299 select CPU_COPY_V4WB if MMU # can probably do better
@@ -311,7 +311,7 @@ config CPU_SA110
311 select CPU_32v3 if ARCH_RPC 311 select CPU_32v3 if ARCH_RPC
312 select CPU_32v4 if !ARCH_RPC 312 select CPU_32v4 if !ARCH_RPC
313 select CPU_ABRT_EV4 313 select CPU_ABRT_EV4
314 select CPU_PABRT_NOIFAR 314 select CPU_PABRT_LEGACY
315 select CPU_CACHE_V4WB 315 select CPU_CACHE_V4WB
316 select CPU_CACHE_VIVT 316 select CPU_CACHE_VIVT
317 select CPU_CP15_MMU 317 select CPU_CP15_MMU
@@ -331,7 +331,7 @@ config CPU_SA1100
331 bool 331 bool
332 select CPU_32v4 332 select CPU_32v4
333 select CPU_ABRT_EV4 333 select CPU_ABRT_EV4
334 select CPU_PABRT_NOIFAR 334 select CPU_PABRT_LEGACY
335 select CPU_CACHE_V4WB 335 select CPU_CACHE_V4WB
336 select CPU_CACHE_VIVT 336 select CPU_CACHE_VIVT
337 select CPU_CP15_MMU 337 select CPU_CP15_MMU
@@ -342,7 +342,7 @@ config CPU_XSCALE
342 bool 342 bool
343 select CPU_32v5 343 select CPU_32v5
344 select CPU_ABRT_EV5T 344 select CPU_ABRT_EV5T
345 select CPU_PABRT_NOIFAR 345 select CPU_PABRT_LEGACY
346 select CPU_CACHE_VIVT 346 select CPU_CACHE_VIVT
347 select CPU_CP15_MMU 347 select CPU_CP15_MMU
348 select CPU_TLB_V4WBI if MMU 348 select CPU_TLB_V4WBI if MMU
@@ -352,7 +352,7 @@ config CPU_XSC3
352 bool 352 bool
353 select CPU_32v5 353 select CPU_32v5
354 select CPU_ABRT_EV5T 354 select CPU_ABRT_EV5T
355 select CPU_PABRT_NOIFAR 355 select CPU_PABRT_LEGACY
356 select CPU_CACHE_VIVT 356 select CPU_CACHE_VIVT
357 select CPU_CP15_MMU 357 select CPU_CP15_MMU
358 select CPU_TLB_V4WBI if MMU 358 select CPU_TLB_V4WBI if MMU
@@ -363,7 +363,7 @@ config CPU_MOHAWK
363 bool 363 bool
364 select CPU_32v5 364 select CPU_32v5
365 select CPU_ABRT_EV5T 365 select CPU_ABRT_EV5T
366 select CPU_PABRT_NOIFAR 366 select CPU_PABRT_LEGACY
367 select CPU_CACHE_VIVT 367 select CPU_CACHE_VIVT
368 select CPU_CP15_MMU 368 select CPU_CP15_MMU
369 select CPU_TLB_V4WBI if MMU 369 select CPU_TLB_V4WBI if MMU
@@ -374,7 +374,7 @@ config CPU_FEROCEON
374 bool 374 bool
375 select CPU_32v5 375 select CPU_32v5
376 select CPU_ABRT_EV5T 376 select CPU_ABRT_EV5T
377 select CPU_PABRT_NOIFAR 377 select CPU_PABRT_LEGACY
378 select CPU_CACHE_VIVT 378 select CPU_CACHE_VIVT
379 select CPU_CP15_MMU 379 select CPU_CP15_MMU
380 select CPU_COPY_FEROCEON if MMU 380 select CPU_COPY_FEROCEON if MMU
@@ -394,7 +394,7 @@ config CPU_V6
394 bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX 394 bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
395 select CPU_32v6 395 select CPU_32v6
396 select CPU_ABRT_EV6 396 select CPU_ABRT_EV6
397 select CPU_PABRT_NOIFAR 397 select CPU_PABRT_V6
398 select CPU_CACHE_V6 398 select CPU_CACHE_V6
399 select CPU_CACHE_VIPT 399 select CPU_CACHE_VIPT
400 select CPU_CP15_MMU 400 select CPU_CP15_MMU
@@ -420,7 +420,7 @@ config CPU_V7
420 select CPU_32v6K 420 select CPU_32v6K
421 select CPU_32v7 421 select CPU_32v7
422 select CPU_ABRT_EV7 422 select CPU_ABRT_EV7
423 select CPU_PABRT_IFAR 423 select CPU_PABRT_V7
424 select CPU_CACHE_V7 424 select CPU_CACHE_V7
425 select CPU_CACHE_VIPT 425 select CPU_CACHE_VIPT
426 select CPU_CP15_MMU 426 select CPU_CP15_MMU
@@ -482,10 +482,13 @@ config CPU_ABRT_EV6
482config CPU_ABRT_EV7 482config CPU_ABRT_EV7
483 bool 483 bool
484 484
485config CPU_PABRT_IFAR 485config CPU_PABRT_LEGACY
486 bool 486 bool
487 487
488config CPU_PABRT_NOIFAR 488config CPU_PABRT_V6
489 bool
490
491config CPU_PABRT_V7
489 bool 492 bool
490 493
491# The cache model 494# The cache model
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 63e3f6dd0e21..055cb2aa8134 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -27,6 +27,10 @@ obj-$(CONFIG_CPU_ABRT_EV5TJ) += abort-ev5tj.o
27obj-$(CONFIG_CPU_ABRT_EV6) += abort-ev6.o 27obj-$(CONFIG_CPU_ABRT_EV6) += abort-ev6.o
28obj-$(CONFIG_CPU_ABRT_EV7) += abort-ev7.o 28obj-$(CONFIG_CPU_ABRT_EV7) += abort-ev7.o
29 29
30obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o
31obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
32obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
33
30obj-$(CONFIG_CPU_CACHE_V3) += cache-v3.o 34obj-$(CONFIG_CPU_CACHE_V3) += cache-v3.o
31obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o 35obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o
32obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o 36obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 379f78556055..fd2375f84994 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -520,7 +520,7 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
520} 520}
521 521
522asmlinkage void __exception 522asmlinkage void __exception
523do_PrefetchAbort(unsigned long addr, struct pt_regs *regs) 523do_PrefetchAbort(unsigned long addr, unsigned int ifsr, struct pt_regs *regs)
524{ 524{
525 do_translation_fault(addr, FSR_LNX_PF, regs); 525 do_translation_fault(addr, FSR_LNX_PF, regs);
526} 526}
diff --git a/arch/arm/mm/pabort-legacy.S b/arch/arm/mm/pabort-legacy.S
new file mode 100644
index 000000000000..87970eba88ea
--- /dev/null
+++ b/arch/arm/mm/pabort-legacy.S
@@ -0,0 +1,19 @@
1#include <linux/linkage.h>
2#include <asm/assembler.h>
3
4/*
5 * Function: legacy_pabort
6 *
7 * Params : r0 = address of aborted instruction
8 *
9 * Returns : r0 = address of abort
10 * : r1 = Simulated IFSR with section translation fault status
11 *
12 * Purpose : obtain information about current prefetch abort.
13 */
14
15 .align 5
16ENTRY(legacy_pabort)
17 mov r1, #5
18 mov pc, lr
19ENDPROC(legacy_pabort)
diff --git a/arch/arm/mm/pabort-v6.S b/arch/arm/mm/pabort-v6.S
new file mode 100644
index 000000000000..06e3d1ef2115
--- /dev/null
+++ b/arch/arm/mm/pabort-v6.S
@@ -0,0 +1,19 @@
1#include <linux/linkage.h>
2#include <asm/assembler.h>
3
4/*
5 * Function: v6_pabort
6 *
7 * Params : r0 = address of aborted instruction
8 *
9 * Returns : r0 = address of abort
10 * : r1 = IFSR
11 *
12 * Purpose : obtain information about current prefetch abort.
13 */
14
15 .align 5
16ENTRY(v6_pabort)
17 mrc p15, 0, r1, c5, c0, 1 @ get IFSR
18 mov pc, lr
19ENDPROC(v6_pabort)
diff --git a/arch/arm/mm/pabort-v7.S b/arch/arm/mm/pabort-v7.S
new file mode 100644
index 000000000000..a8b3b300a18d
--- /dev/null
+++ b/arch/arm/mm/pabort-v7.S
@@ -0,0 +1,20 @@
1#include <linux/linkage.h>
2#include <asm/assembler.h>
3
4/*
5 * Function: v6_pabort
6 *
7 * Params : r0 = address of aborted instruction
8 *
9 * Returns : r0 = address of abort
10 * : r1 = IFSR
11 *
12 * Purpose : obtain information about current prefetch abort.
13 */
14
15 .align 5
16ENTRY(v7_pabort)
17 mrc p15, 0, r0, c6, c0, 2 @ get IFAR
18 mrc p15, 0, r1, c5, c0, 1 @ get IFSR
19 mov pc, lr
20ENDPROC(v7_pabort)
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index b5551bf010aa..d9fb4b98c49f 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -449,7 +449,7 @@ arm1020_crval:
449 .type arm1020_processor_functions, #object 449 .type arm1020_processor_functions, #object
450arm1020_processor_functions: 450arm1020_processor_functions:
451 .word v4t_early_abort 451 .word v4t_early_abort
452 .word pabort_noifar 452 .word legacy_pabort
453 .word cpu_arm1020_proc_init 453 .word cpu_arm1020_proc_init
454 .word cpu_arm1020_proc_fin 454 .word cpu_arm1020_proc_fin
455 .word cpu_arm1020_reset 455 .word cpu_arm1020_reset
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 8bc6740c29eb..7453b75dcea5 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -430,7 +430,7 @@ arm1020e_crval:
430 .type arm1020e_processor_functions, #object 430 .type arm1020e_processor_functions, #object
431arm1020e_processor_functions: 431arm1020e_processor_functions:
432 .word v4t_early_abort 432 .word v4t_early_abort
433 .word pabort_noifar 433 .word legacy_pabort
434 .word cpu_arm1020e_proc_init 434 .word cpu_arm1020e_proc_init
435 .word cpu_arm1020e_proc_fin 435 .word cpu_arm1020e_proc_fin
436 .word cpu_arm1020e_reset 436 .word cpu_arm1020e_reset
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 2cd03e66c0a3..8eb72d75a8b6 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -413,7 +413,7 @@ arm1022_crval:
413 .type arm1022_processor_functions, #object 413 .type arm1022_processor_functions, #object
414arm1022_processor_functions: 414arm1022_processor_functions:
415 .word v4t_early_abort 415 .word v4t_early_abort
416 .word pabort_noifar 416 .word legacy_pabort
417 .word cpu_arm1022_proc_init 417 .word cpu_arm1022_proc_init
418 .word cpu_arm1022_proc_fin 418 .word cpu_arm1022_proc_fin
419 .word cpu_arm1022_reset 419 .word cpu_arm1022_reset
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index ad961a897f6e..3b59f0d67139 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -408,7 +408,7 @@ arm1026_crval:
408 .type arm1026_processor_functions, #object 408 .type arm1026_processor_functions, #object
409arm1026_processor_functions: 409arm1026_processor_functions:
410 .word v5t_early_abort 410 .word v5t_early_abort
411 .word pabort_noifar 411 .word legacy_pabort
412 .word cpu_arm1026_proc_init 412 .word cpu_arm1026_proc_init
413 .word cpu_arm1026_proc_fin 413 .word cpu_arm1026_proc_fin
414 .word cpu_arm1026_reset 414 .word cpu_arm1026_reset
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index 80d6e1de069a..3f9cd3d8f6d5 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -278,7 +278,7 @@ __arm7_setup: mov r0, #0
278 .type arm6_processor_functions, #object 278 .type arm6_processor_functions, #object
279ENTRY(arm6_processor_functions) 279ENTRY(arm6_processor_functions)
280 .word cpu_arm6_data_abort 280 .word cpu_arm6_data_abort
281 .word pabort_noifar 281 .word legacy_pabort
282 .word cpu_arm6_proc_init 282 .word cpu_arm6_proc_init
283 .word cpu_arm6_proc_fin 283 .word cpu_arm6_proc_fin
284 .word cpu_arm6_reset 284 .word cpu_arm6_reset
@@ -295,7 +295,7 @@ ENTRY(arm6_processor_functions)
295 .type arm7_processor_functions, #object 295 .type arm7_processor_functions, #object
296ENTRY(arm7_processor_functions) 296ENTRY(arm7_processor_functions)
297 .word cpu_arm7_data_abort 297 .word cpu_arm7_data_abort
298 .word pabort_noifar 298 .word legacy_pabort
299 .word cpu_arm7_proc_init 299 .word cpu_arm7_proc_init
300 .word cpu_arm7_proc_fin 300 .word cpu_arm7_proc_fin
301 .word cpu_arm7_reset 301 .word cpu_arm7_reset
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 85ae18695f10..0b62de244666 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -181,7 +181,7 @@ arm720_crval:
181 .type arm720_processor_functions, #object 181 .type arm720_processor_functions, #object
182ENTRY(arm720_processor_functions) 182ENTRY(arm720_processor_functions)
183 .word v4t_late_abort 183 .word v4t_late_abort
184 .word pabort_noifar 184 .word legacy_pabort
185 .word cpu_arm720_proc_init 185 .word cpu_arm720_proc_init
186 .word cpu_arm720_proc_fin 186 .word cpu_arm720_proc_fin
187 .word cpu_arm720_reset 187 .word cpu_arm720_reset
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index 4f95bee63e95..01860cdeb2ec 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -126,7 +126,7 @@ __arm740_setup:
126 .type arm740_processor_functions, #object 126 .type arm740_processor_functions, #object
127ENTRY(arm740_processor_functions) 127ENTRY(arm740_processor_functions)
128 .word v4t_late_abort 128 .word v4t_late_abort
129 .word pabort_noifar 129 .word legacy_pabort
130 .word cpu_arm740_proc_init 130 .word cpu_arm740_proc_init
131 .word cpu_arm740_proc_fin 131 .word cpu_arm740_proc_fin
132 .word cpu_arm740_reset 132 .word cpu_arm740_reset
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
index 93e05fa7bed4..1201b9863829 100644
--- a/arch/arm/mm/proc-arm7tdmi.S
+++ b/arch/arm/mm/proc-arm7tdmi.S
@@ -64,7 +64,7 @@ __arm7tdmi_setup:
64 .type arm7tdmi_processor_functions, #object 64 .type arm7tdmi_processor_functions, #object
65ENTRY(arm7tdmi_processor_functions) 65ENTRY(arm7tdmi_processor_functions)
66 .word v4t_late_abort 66 .word v4t_late_abort
67 .word pabort_noifar 67 .word legacy_pabort
68 .word cpu_arm7tdmi_proc_init 68 .word cpu_arm7tdmi_proc_init
69 .word cpu_arm7tdmi_proc_fin 69 .word cpu_arm7tdmi_proc_fin
70 .word cpu_arm7tdmi_reset 70 .word cpu_arm7tdmi_reset
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 914d688394fc..2b7c197cc58d 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -395,7 +395,7 @@ arm920_crval:
395 .type arm920_processor_functions, #object 395 .type arm920_processor_functions, #object
396arm920_processor_functions: 396arm920_processor_functions:
397 .word v4t_early_abort 397 .word v4t_early_abort
398 .word pabort_noifar 398 .word legacy_pabort
399 .word cpu_arm920_proc_init 399 .word cpu_arm920_proc_init
400 .word cpu_arm920_proc_fin 400 .word cpu_arm920_proc_fin
401 .word cpu_arm920_reset 401 .word cpu_arm920_reset
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 51c9c9859e58..06a1aa4e3398 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -399,7 +399,7 @@ arm922_crval:
399 .type arm922_processor_functions, #object 399 .type arm922_processor_functions, #object
400arm922_processor_functions: 400arm922_processor_functions:
401 .word v4t_early_abort 401 .word v4t_early_abort
402 .word pabort_noifar 402 .word legacy_pabort
403 .word cpu_arm922_proc_init 403 .word cpu_arm922_proc_init
404 .word cpu_arm922_proc_fin 404 .word cpu_arm922_proc_fin
405 .word cpu_arm922_reset 405 .word cpu_arm922_reset
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 2724526d89c1..cb53435a85ae 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -462,7 +462,7 @@ arm925_crval:
462 .type arm925_processor_functions, #object 462 .type arm925_processor_functions, #object
463arm925_processor_functions: 463arm925_processor_functions:
464 .word v4t_early_abort 464 .word v4t_early_abort
465 .word pabort_noifar 465 .word legacy_pabort
466 .word cpu_arm925_proc_init 466 .word cpu_arm925_proc_init
467 .word cpu_arm925_proc_fin 467 .word cpu_arm925_proc_fin
468 .word cpu_arm925_reset 468 .word cpu_arm925_reset
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 54466937bff9..1c4848704bb3 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -415,7 +415,7 @@ arm926_crval:
415 .type arm926_processor_functions, #object 415 .type arm926_processor_functions, #object
416arm926_processor_functions: 416arm926_processor_functions:
417 .word v5tj_early_abort 417 .word v5tj_early_abort
418 .word pabort_noifar 418 .word legacy_pabort
419 .word cpu_arm926_proc_init 419 .word cpu_arm926_proc_init
420 .word cpu_arm926_proc_fin 420 .word cpu_arm926_proc_fin
421 .word cpu_arm926_reset 421 .word cpu_arm926_reset
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index f595117caf55..5b0f8464c8f2 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -322,7 +322,7 @@ __arm940_setup:
322 .type arm940_processor_functions, #object 322 .type arm940_processor_functions, #object
323ENTRY(arm940_processor_functions) 323ENTRY(arm940_processor_functions)
324 .word nommu_early_abort 324 .word nommu_early_abort
325 .word pabort_noifar 325 .word legacy_pabort
326 .word cpu_arm940_proc_init 326 .word cpu_arm940_proc_init
327 .word cpu_arm940_proc_fin 327 .word cpu_arm940_proc_fin
328 .word cpu_arm940_reset 328 .word cpu_arm940_reset
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index e03f6ff1fb26..40c0449a139b 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -377,7 +377,7 @@ __arm946_setup:
377 .type arm946_processor_functions, #object 377 .type arm946_processor_functions, #object
378ENTRY(arm946_processor_functions) 378ENTRY(arm946_processor_functions)
379 .word nommu_early_abort 379 .word nommu_early_abort
380 .word pabort_noifar 380 .word legacy_pabort
381 .word cpu_arm946_proc_init 381 .word cpu_arm946_proc_init
382 .word cpu_arm946_proc_fin 382 .word cpu_arm946_proc_fin
383 .word cpu_arm946_reset 383 .word cpu_arm946_reset
diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S
index be6c11d2b3fb..28545c29dbcd 100644
--- a/arch/arm/mm/proc-arm9tdmi.S
+++ b/arch/arm/mm/proc-arm9tdmi.S
@@ -64,7 +64,7 @@ __arm9tdmi_setup:
64 .type arm9tdmi_processor_functions, #object 64 .type arm9tdmi_processor_functions, #object
65ENTRY(arm9tdmi_processor_functions) 65ENTRY(arm9tdmi_processor_functions)
66 .word nommu_early_abort 66 .word nommu_early_abort
67 .word pabort_noifar 67 .word legacy_pabort
68 .word cpu_arm9tdmi_proc_init 68 .word cpu_arm9tdmi_proc_init
69 .word cpu_arm9tdmi_proc_fin 69 .word cpu_arm9tdmi_proc_fin
70 .word cpu_arm9tdmi_reset 70 .word cpu_arm9tdmi_reset
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
index 08b8a955d5d7..08f5ac237ad4 100644
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -191,7 +191,7 @@ fa526_cr1_set:
191 .type fa526_processor_functions, #object 191 .type fa526_processor_functions, #object
192fa526_processor_functions: 192fa526_processor_functions:
193 .word v4_early_abort 193 .word v4_early_abort
194 .word pabort_noifar 194 .word legacy_pabort
195 .word cpu_fa526_proc_init 195 .word cpu_fa526_proc_init
196 .word cpu_fa526_proc_fin 196 .word cpu_fa526_proc_fin
197 .word cpu_fa526_reset 197 .word cpu_fa526_reset
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index 0fe1f8fc3488..d0d7795200fc 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -499,7 +499,7 @@ feroceon_crval:
499 .type feroceon_processor_functions, #object 499 .type feroceon_processor_functions, #object
500feroceon_processor_functions: 500feroceon_processor_functions:
501 .word v5t_early_abort 501 .word v5t_early_abort
502 .word pabort_noifar 502 .word legacy_pabort
503 .word cpu_feroceon_proc_init 503 .word cpu_feroceon_proc_init
504 .word cpu_feroceon_proc_fin 504 .word cpu_feroceon_proc_fin
505 .word cpu_feroceon_reset 505 .word cpu_feroceon_reset
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index 540f5078496b..52b5fd74fbb3 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -359,7 +359,7 @@ mohawk_crval:
359 .type mohawk_processor_functions, #object 359 .type mohawk_processor_functions, #object
360mohawk_processor_functions: 360mohawk_processor_functions:
361 .word v5t_early_abort 361 .word v5t_early_abort
362 .word pabort_noifar 362 .word legacy_pabort
363 .word cpu_mohawk_proc_init 363 .word cpu_mohawk_proc_init
364 .word cpu_mohawk_proc_fin 364 .word cpu_mohawk_proc_fin
365 .word cpu_mohawk_reset 365 .word cpu_mohawk_reset
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index 90a7e5279f29..7b706b389906 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -199,7 +199,7 @@ sa110_crval:
199 .type sa110_processor_functions, #object 199 .type sa110_processor_functions, #object
200ENTRY(sa110_processor_functions) 200ENTRY(sa110_processor_functions)
201 .word v4_early_abort 201 .word v4_early_abort
202 .word pabort_noifar 202 .word legacy_pabort
203 .word cpu_sa110_proc_init 203 .word cpu_sa110_proc_init
204 .word cpu_sa110_proc_fin 204 .word cpu_sa110_proc_fin
205 .word cpu_sa110_reset 205 .word cpu_sa110_reset
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 451e2d953e2a..ee7700242c19 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -214,7 +214,7 @@ sa1100_crval:
214 .type sa1100_processor_functions, #object 214 .type sa1100_processor_functions, #object
215ENTRY(sa1100_processor_functions) 215ENTRY(sa1100_processor_functions)
216 .word v4_early_abort 216 .word v4_early_abort
217 .word pabort_noifar 217 .word legacy_pabort
218 .word cpu_sa1100_proc_init 218 .word cpu_sa1100_proc_init
219 .word cpu_sa1100_proc_fin 219 .word cpu_sa1100_proc_fin
220 .word cpu_sa1100_reset 220 .word cpu_sa1100_reset
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 524ddae92595..194737d60a22 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -191,7 +191,7 @@ v6_crval:
191 .type v6_processor_functions, #object 191 .type v6_processor_functions, #object
192ENTRY(v6_processor_functions) 192ENTRY(v6_processor_functions)
193 .word v6_early_abort 193 .word v6_early_abort
194 .word pabort_noifar 194 .word v6_pabort
195 .word cpu_v6_proc_init 195 .word cpu_v6_proc_init
196 .word cpu_v6_proc_fin 196 .word cpu_v6_proc_fin
197 .word cpu_v6_reset 197 .word cpu_v6_reset
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index f3fa1c32fe92..23ebcf6eab9f 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -295,7 +295,7 @@ __v7_setup_stack:
295 .type v7_processor_functions, #object 295 .type v7_processor_functions, #object
296ENTRY(v7_processor_functions) 296ENTRY(v7_processor_functions)
297 .word v7_early_abort 297 .word v7_early_abort
298 .word pabort_ifar 298 .word v7_pabort
299 .word cpu_v7_proc_init 299 .word cpu_v7_proc_init
300 .word cpu_v7_proc_fin 300 .word cpu_v7_proc_fin
301 .word cpu_v7_reset 301 .word cpu_v7_reset
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 33515c214b92..2028f3702881 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -428,7 +428,7 @@ xsc3_crval:
428 .type xsc3_processor_functions, #object 428 .type xsc3_processor_functions, #object
429ENTRY(xsc3_processor_functions) 429ENTRY(xsc3_processor_functions)
430 .word v5t_early_abort 430 .word v5t_early_abort
431 .word pabort_noifar 431 .word legacy_pabort
432 .word cpu_xsc3_proc_init 432 .word cpu_xsc3_proc_init
433 .word cpu_xsc3_proc_fin 433 .word cpu_xsc3_proc_fin
434 .word cpu_xsc3_reset 434 .word cpu_xsc3_reset
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 423394260bcb..f056c283682d 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -511,7 +511,7 @@ xscale_crval:
511 .type xscale_processor_functions, #object 511 .type xscale_processor_functions, #object
512ENTRY(xscale_processor_functions) 512ENTRY(xscale_processor_functions)
513 .word v5t_early_abort 513 .word v5t_early_abort
514 .word pabort_noifar 514 .word legacy_pabort
515 .word cpu_xscale_proc_init 515 .word cpu_xscale_proc_init
516 .word cpu_xscale_proc_fin 516 .word cpu_xscale_proc_fin
517 .word cpu_xscale_reset 517 .word cpu_xscale_reset
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 01:51:55 -0500