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authorIngo Molnar <mingo@elte.hu>2009-04-08 06:31:25 -0400
committerH. Peter Anvin <hpa@zytor.com>2009-05-28 12:24:11 -0400
commita988d334ae8213c0e0e62327222f6e5e6e52bcf1 (patch)
treefbb639e5c65db00f2354398fec00cfdcddb0c34f /arch
parent06b851d98266b812b2fa23d007cdf53f41194bbb (diff)
x86, mce: unify, prepare codes
Move current 32-bit mce_32.c code into mce_64.c. [ Remove unused artifact stop/restart_mce pointed by Andi Kleen ] Signed-off-by: Ingo Molnar <mingo@elte.hu> Cc: Andi Kleen <ak@firstfloor.org> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_64.c65
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 1491246c4d69..ce48ae75e1dc 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -1240,3 +1240,68 @@ static __init int mce_init_device(void)
1240} 1240}
1241 1241
1242device_initcall(mce_init_device); 1242device_initcall(mce_init_device);
1243
1244#ifdef CONFIG_X86_32
1245
1246int mce_disabled;
1247
1248int nr_mce_banks;
1249EXPORT_SYMBOL_GPL(nr_mce_banks); /* non-fatal.o */
1250
1251/* Handle unconfigured int18 (should never happen) */
1252static void unexpected_machine_check(struct pt_regs *regs, long error_code)
1253{
1254 printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n",
1255 smp_processor_id());
1256}
1257
1258/* Call the installed machine check handler for this CPU setup. */
1259void (*machine_check_vector)(struct pt_regs *, long error_code) =
1260 unexpected_machine_check;
1261
1262/* This has to be run for each processor */
1263void mcheck_init(struct cpuinfo_x86 *c)
1264{
1265 if (mce_disabled == 1)
1266 return;
1267
1268 switch (c->x86_vendor) {
1269 case X86_VENDOR_AMD:
1270 amd_mcheck_init(c);
1271 break;
1272
1273 case X86_VENDOR_INTEL:
1274 if (c->x86 == 5)
1275 intel_p5_mcheck_init(c);
1276 if (c->x86 == 6)
1277 intel_p6_mcheck_init(c);
1278 if (c->x86 == 15)
1279 intel_p4_mcheck_init(c);
1280 break;
1281
1282 case X86_VENDOR_CENTAUR:
1283 if (c->x86 == 5)
1284 winchip_mcheck_init(c);
1285 break;
1286
1287 default:
1288 break;
1289 }
1290}
1291
1292static int __init mcheck_disable(char *str)
1293{
1294 mce_disabled = 1;
1295 return 1;
1296}
1297
1298static int __init mcheck_enable(char *str)
1299{
1300 mce_disabled = -1;
1301 return 1;
1302}
1303
1304__setup("nomce", mcheck_disable);
1305__setup("mce", mcheck_enable);
1306
1307#endif /* CONFIG_X86_32 */