diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2007-03-02 06:59:16 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-03-02 07:04:16 -0500 |
commit | 6139dbbb7769c7251e04813f577454c6c9293e15 (patch) | |
tree | 588b44b4b8929caf812d440ec371331658fd7da3 /arch | |
parent | 9623b3732d11b0a18d9af3419f680d27ea24b014 (diff) | |
parent | 1f4d1774133f596a3c4f520859890ad93769e523 (diff) |
Merge branch 'omap-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-omap1/board-nokia770.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap1/clock.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-omap1/irq.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap1/pm.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-omap1/serial.c | 18 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-h4.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-omap2/timer-gp.c | 3 | ||||
-rw-r--r-- | arch/arm/plat-omap/dma.c | 14 | ||||
-rw-r--r-- | arch/arm/plat-omap/dmtimer.c | 6 | ||||
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 9 | ||||
-rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/mux.c | 4 |
12 files changed, 59 insertions, 48 deletions
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index cbe909bad79b..70014f751bc4 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
@@ -16,6 +16,8 @@ | |||
16 | 16 | ||
17 | #include <linux/spi/spi.h> | 17 | #include <linux/spi/spi.h> |
18 | #include <linux/spi/ads7846.h> | 18 | #include <linux/spi/ads7846.h> |
19 | #include <linux/workqueue.h> | ||
20 | #include <linux/delay.h> | ||
19 | 21 | ||
20 | #include <asm/hardware.h> | 22 | #include <asm/hardware.h> |
21 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
@@ -103,7 +105,7 @@ static struct ads7846_platform_data nokia770_ads7846_platform_data __initdata = | |||
103 | 105 | ||
104 | static struct spi_board_info nokia770_spi_board_info[] __initdata = { | 106 | static struct spi_board_info nokia770_spi_board_info[] __initdata = { |
105 | [0] = { | 107 | [0] = { |
106 | .modalias = "lcd_lph8923", | 108 | .modalias = "lcd_mipid", |
107 | .bus_num = 2, | 109 | .bus_num = 2, |
108 | .chip_select = 3, | 110 | .chip_select = 3, |
109 | .max_speed_hz = 12000000, | 111 | .max_speed_hz = 12000000, |
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 638490e62d5f..f625f6dd228a 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
@@ -432,8 +432,7 @@ static int omap1_clk_enable(struct clk *clk) | |||
432 | } | 432 | } |
433 | 433 | ||
434 | if (clk->flags & CLOCK_NO_IDLE_PARENT) | 434 | if (clk->flags & CLOCK_NO_IDLE_PARENT) |
435 | if (!cpu_is_omap24xx()) | 435 | omap1_clk_deny_idle(clk->parent); |
436 | omap1_clk_deny_idle(clk->parent); | ||
437 | } | 436 | } |
438 | 437 | ||
439 | ret = clk->enable(clk); | 438 | ret = clk->enable(clk); |
@@ -454,8 +453,7 @@ static void omap1_clk_disable(struct clk *clk) | |||
454 | if (likely(clk->parent)) { | 453 | if (likely(clk->parent)) { |
455 | omap1_clk_disable(clk->parent); | 454 | omap1_clk_disable(clk->parent); |
456 | if (clk->flags & CLOCK_NO_IDLE_PARENT) | 455 | if (clk->flags & CLOCK_NO_IDLE_PARENT) |
457 | if (!cpu_is_omap24xx()) | 456 | omap1_clk_allow_idle(clk->parent); |
458 | omap1_clk_allow_idle(clk->parent); | ||
459 | } | 457 | } |
460 | } | 458 | } |
461 | } | 459 | } |
@@ -471,7 +469,7 @@ static int omap1_clk_enable_generic(struct clk *clk) | |||
471 | if (unlikely(clk->enable_reg == 0)) { | 469 | if (unlikely(clk->enable_reg == 0)) { |
472 | printk(KERN_ERR "clock.c: Enable for %s without enable code\n", | 470 | printk(KERN_ERR "clock.c: Enable for %s without enable code\n", |
473 | clk->name); | 471 | clk->name); |
474 | return 0; | 472 | return -EINVAL; |
475 | } | 473 | } |
476 | 474 | ||
477 | if (clk->flags & ENABLE_REG_32BIT) { | 475 | if (clk->flags & ENABLE_REG_32BIT) { |
@@ -651,10 +649,18 @@ int __init omap1_clk_init(void) | |||
651 | int crystal_type = 0; /* Default 12 MHz */ | 649 | int crystal_type = 0; /* Default 12 MHz */ |
652 | u32 reg; | 650 | u32 reg; |
653 | 651 | ||
652 | #ifdef CONFIG_DEBUG_LL | ||
653 | /* Resets some clocks that may be left on from bootloader, | ||
654 | * but leaves serial clocks on. | ||
655 | */ | ||
656 | omap_writel(0x3 << 29, MOD_CONF_CTRL_0); | ||
657 | #endif | ||
658 | |||
654 | /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ | 659 | /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ |
655 | reg = omap_readw(SOFT_REQ_REG) & (1 << 4); | 660 | reg = omap_readw(SOFT_REQ_REG) & (1 << 4); |
656 | omap_writew(reg, SOFT_REQ_REG); | 661 | omap_writew(reg, SOFT_REQ_REG); |
657 | omap_writew(0, SOFT_REQ_REG2); | 662 | if (!cpu_is_omap15xx()) |
663 | omap_writew(0, SOFT_REQ_REG2); | ||
658 | 664 | ||
659 | clk_init(&omap1_clk_functions); | 665 | clk_init(&omap1_clk_functions); |
660 | 666 | ||
@@ -685,7 +691,7 @@ int __init omap1_clk_init(void) | |||
685 | 691 | ||
686 | info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); | 692 | info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); |
687 | if (info != NULL) { | 693 | if (info != NULL) { |
688 | if (!cpu_is_omap1510()) | 694 | if (!cpu_is_omap15xx()) |
689 | crystal_type = info->system_clock_type; | 695 | crystal_type = info->system_clock_type; |
690 | } | 696 | } |
691 | 697 | ||
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 6383a12ad970..410d3e78dd0f 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c | |||
@@ -238,7 +238,7 @@ void __init omap_init_irq(void) | |||
238 | 238 | ||
239 | if (cpu_is_omap730()) | 239 | if (cpu_is_omap730()) |
240 | omap_unmask_irq(INT_730_IH2_IRQ); | 240 | omap_unmask_irq(INT_730_IH2_IRQ); |
241 | else if (cpu_is_omap1510()) | 241 | else if (cpu_is_omap15xx()) |
242 | omap_unmask_irq(INT_1510_IH2_IRQ); | 242 | omap_unmask_irq(INT_1510_IH2_IRQ); |
243 | else if (cpu_is_omap16xx()) | 243 | else if (cpu_is_omap16xx()) |
244 | omap_unmask_irq(INT_1610_IH2_IRQ); | 244 | omap_unmask_irq(INT_1610_IH2_IRQ); |
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 4834758d340c..49efe903dacd 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
@@ -256,7 +256,8 @@ void omap_pm_suspend(void) | |||
256 | tps65010_set_led(LED1, OFF); | 256 | tps65010_set_led(LED1, OFF); |
257 | } | 257 | } |
258 | 258 | ||
259 | omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG); | 259 | if (!cpu_is_omap15xx()) |
260 | omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG); | ||
260 | 261 | ||
261 | /* | 262 | /* |
262 | * Step 1: turn off interrupts (FIXME: NOTE: already disabled) | 263 | * Step 1: turn off interrupts (FIXME: NOTE: already disabled) |
@@ -434,7 +435,8 @@ void omap_pm_suspend(void) | |||
434 | MPUI1610_RESTORE(OMAP_IH2_3_MIR); | 435 | MPUI1610_RESTORE(OMAP_IH2_3_MIR); |
435 | } | 436 | } |
436 | 437 | ||
437 | omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG); | 438 | if (!cpu_is_omap15xx()) |
439 | omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG); | ||
438 | 440 | ||
439 | /* | 441 | /* |
440 | * Reenable interrupts | 442 | * Reenable interrupts |
@@ -704,6 +706,8 @@ static struct pm_ops omap_pm_ops ={ | |||
704 | 706 | ||
705 | static int __init omap_pm_init(void) | 707 | static int __init omap_pm_init(void) |
706 | { | 708 | { |
709 | int error; | ||
710 | |||
707 | printk("Power Management for TI OMAP.\n"); | 711 | printk("Power Management for TI OMAP.\n"); |
708 | 712 | ||
709 | /* | 713 | /* |
@@ -760,7 +764,9 @@ static int __init omap_pm_init(void) | |||
760 | omap_pm_init_proc(); | 764 | omap_pm_init_proc(); |
761 | #endif | 765 | #endif |
762 | 766 | ||
763 | subsys_create_file(&power_subsys, &sleep_while_idle_attr); | 767 | error = subsys_create_file(&power_subsys, &sleep_while_idle_attr); |
768 | if (error) | ||
769 | printk(KERN_ERR "subsys_create_file failed: %d\n", error); | ||
764 | 770 | ||
765 | if (cpu_is_omap16xx()) { | 771 | if (cpu_is_omap16xx()) { |
766 | /* configure LOW_PWR pin */ | 772 | /* configure LOW_PWR pin */ |
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 4cc98a578e4b..10a4fe88b2fd 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-omap1/serial.c | 2 | * linux/arch/arm/mach-omap1/serial.c |
3 | * | 3 | * |
4 | * OMAP1 CPU identification code | 4 | * OMAP1 serial support. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
@@ -59,7 +59,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p) | |||
59 | omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ | 59 | omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ |
60 | omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ | 60 | omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ |
61 | 61 | ||
62 | if (!cpu_is_omap1510()) { | 62 | if (!cpu_is_omap15xx()) { |
63 | omap_serial_outp(p, UART_OMAP_SYSC, 0x01); | 63 | omap_serial_outp(p, UART_OMAP_SYSC, 0x01); |
64 | while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01)); | 64 | while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01)); |
65 | } | 65 | } |
@@ -121,7 +121,7 @@ void __init omap_serial_init(void) | |||
121 | serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; | 121 | serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; |
122 | } | 122 | } |
123 | 123 | ||
124 | if (cpu_is_omap1510()) { | 124 | if (cpu_is_omap15xx()) { |
125 | serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; | 125 | serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; |
126 | serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; | 126 | serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; |
127 | serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; | 127 | serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; |
@@ -147,10 +147,10 @@ void __init omap_serial_init(void) | |||
147 | printk("Could not get uart1_ck\n"); | 147 | printk("Could not get uart1_ck\n"); |
148 | else { | 148 | else { |
149 | clk_enable(uart1_ck); | 149 | clk_enable(uart1_ck); |
150 | if (cpu_is_omap1510()) | 150 | if (cpu_is_omap15xx()) |
151 | clk_set_rate(uart1_ck, 12000000); | 151 | clk_set_rate(uart1_ck, 12000000); |
152 | } | 152 | } |
153 | if (cpu_is_omap1510()) { | 153 | if (cpu_is_omap15xx()) { |
154 | omap_cfg_reg(UART1_TX); | 154 | omap_cfg_reg(UART1_TX); |
155 | omap_cfg_reg(UART1_RTS); | 155 | omap_cfg_reg(UART1_RTS); |
156 | if (machine_is_omap_innovator()) { | 156 | if (machine_is_omap_innovator()) { |
@@ -167,12 +167,12 @@ void __init omap_serial_init(void) | |||
167 | printk("Could not get uart2_ck\n"); | 167 | printk("Could not get uart2_ck\n"); |
168 | else { | 168 | else { |
169 | clk_enable(uart2_ck); | 169 | clk_enable(uart2_ck); |
170 | if (cpu_is_omap1510()) | 170 | if (cpu_is_omap15xx()) |
171 | clk_set_rate(uart2_ck, 12000000); | 171 | clk_set_rate(uart2_ck, 12000000); |
172 | else | 172 | else |
173 | clk_set_rate(uart2_ck, 48000000); | 173 | clk_set_rate(uart2_ck, 48000000); |
174 | } | 174 | } |
175 | if (cpu_is_omap1510()) { | 175 | if (cpu_is_omap15xx()) { |
176 | omap_cfg_reg(UART2_TX); | 176 | omap_cfg_reg(UART2_TX); |
177 | omap_cfg_reg(UART2_RTS); | 177 | omap_cfg_reg(UART2_RTS); |
178 | if (machine_is_omap_innovator()) { | 178 | if (machine_is_omap_innovator()) { |
@@ -189,10 +189,10 @@ void __init omap_serial_init(void) | |||
189 | printk("Could not get uart3_ck\n"); | 189 | printk("Could not get uart3_ck\n"); |
190 | else { | 190 | else { |
191 | clk_enable(uart3_ck); | 191 | clk_enable(uart3_ck); |
192 | if (cpu_is_omap1510()) | 192 | if (cpu_is_omap15xx()) |
193 | clk_set_rate(uart3_ck, 12000000); | 193 | clk_set_rate(uart3_ck, 12000000); |
194 | } | 194 | } |
195 | if (cpu_is_omap1510()) { | 195 | if (cpu_is_omap15xx()) { |
196 | omap_cfg_reg(UART3_TX); | 196 | omap_cfg_reg(UART3_TX); |
197 | omap_cfg_reg(UART3_RX); | 197 | omap_cfg_reg(UART3_RX); |
198 | } | 198 | } |
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 3b1ad1d981a3..1e7ed6d22ca9 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c | |||
@@ -39,7 +39,6 @@ | |||
39 | #include "prcm-regs.h" | 39 | #include "prcm-regs.h" |
40 | 40 | ||
41 | #include <asm/io.h> | 41 | #include <asm/io.h> |
42 | #include <asm/delay.h> | ||
43 | 42 | ||
44 | static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 }; | 43 | static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 }; |
45 | static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 }; | 44 | static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 }; |
@@ -179,9 +178,11 @@ static int h4_select_irda(struct device *dev, int state) | |||
179 | return err; | 178 | return err; |
180 | } | 179 | } |
181 | 180 | ||
182 | static void set_trans_mode(void *data) | 181 | static void set_trans_mode(struct work_struct *work) |
183 | { | 182 | { |
184 | int *mode = data; | 183 | struct omap_irda_config *irda_config = |
184 | container_of(work, struct omap_irda_config, gpio_expa.work); | ||
185 | int mode = irda_config->mode; | ||
185 | unsigned char expa; | 186 | unsigned char expa; |
186 | int err = 0; | 187 | int err = 0; |
187 | 188 | ||
@@ -191,7 +192,7 @@ static void set_trans_mode(void *data) | |||
191 | 192 | ||
192 | expa &= ~0x01; | 193 | expa &= ~0x01; |
193 | 194 | ||
194 | if (!(*mode & IR_SIRMODE)) { /* MIR/FIR */ | 195 | if (!(mode & IR_SIRMODE)) { /* MIR/FIR */ |
195 | expa |= 0x01; | 196 | expa |= 0x01; |
196 | } | 197 | } |
197 | 198 | ||
@@ -204,9 +205,9 @@ static int h4_transceiver_mode(struct device *dev, int mode) | |||
204 | { | 205 | { |
205 | struct omap_irda_config *irda_config = dev->platform_data; | 206 | struct omap_irda_config *irda_config = dev->platform_data; |
206 | 207 | ||
208 | irda_config->mode = mode; | ||
207 | cancel_delayed_work(&irda_config->gpio_expa); | 209 | cancel_delayed_work(&irda_config->gpio_expa); |
208 | PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode); | 210 | PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode); |
209 | #error this is not permitted - mode is an argument variable | ||
210 | schedule_delayed_work(&irda_config->gpio_expa, 0); | 211 | schedule_delayed_work(&irda_config->gpio_expa, 0); |
211 | 212 | ||
212 | return 0; | 213 | return 0; |
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 973189cd9766..45d1aaa51b57 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/err.h> | 24 | #include <linux/err.h> |
25 | #include <linux/clk.h> | 25 | #include <linux/clk.h> |
26 | #include <linux/delay.h> | 26 | #include <linux/delay.h> |
27 | #include <linux/irq.h> | ||
27 | 28 | ||
28 | #include <asm/mach/time.h> | 29 | #include <asm/mach/time.h> |
29 | #include <asm/arch/dmtimer.h> | 30 | #include <asm/arch/dmtimer.h> |
@@ -64,7 +65,7 @@ static void __init omap2_gp_timer_init(void) | |||
64 | BUG_ON(gptimer == NULL); | 65 | BUG_ON(gptimer == NULL); |
65 | 66 | ||
66 | omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK); | 67 | omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK); |
67 | tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / 100; | 68 | tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; |
68 | tick_period -= 1; | 69 | tick_period -= 1; |
69 | 70 | ||
70 | setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); | 71 | setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index bb045e5ddbd8..f3f84fbf8b87 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -557,7 +557,7 @@ int omap_request_dma(int dev_id, const char *dev_name, | |||
557 | omap_enable_channel_irq(free_ch); | 557 | omap_enable_channel_irq(free_ch); |
558 | /* Clear the CSR register and IRQ status register */ | 558 | /* Clear the CSR register and IRQ status register */ |
559 | OMAP_DMA_CSR_REG(free_ch) = OMAP2_DMA_CSR_CLEAR_MASK; | 559 | OMAP_DMA_CSR_REG(free_ch) = OMAP2_DMA_CSR_CLEAR_MASK; |
560 | omap_writel(~0x0, OMAP_DMA4_IRQSTATUS_L0); | 560 | omap_writel(1 << free_ch, OMAP_DMA4_IRQSTATUS_L0); |
561 | } | 561 | } |
562 | 562 | ||
563 | *dma_ch_out = free_ch; | 563 | *dma_ch_out = free_ch; |
@@ -597,10 +597,7 @@ void omap_free_dma(int lch) | |||
597 | 597 | ||
598 | /* Clear the CSR register and IRQ status register */ | 598 | /* Clear the CSR register and IRQ status register */ |
599 | OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK; | 599 | OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK; |
600 | 600 | omap_writel(1 << lch, OMAP_DMA4_IRQSTATUS_L0); | |
601 | val = omap_readl(OMAP_DMA4_IRQSTATUS_L0); | ||
602 | val |= 1 << lch; | ||
603 | omap_writel(val, OMAP_DMA4_IRQSTATUS_L0); | ||
604 | 601 | ||
605 | /* Disable all DMA interrupts for the channel. */ | 602 | /* Disable all DMA interrupts for the channel. */ |
606 | OMAP_DMA_CICR_REG(lch) = 0; | 603 | OMAP_DMA_CICR_REG(lch) = 0; |
@@ -927,7 +924,6 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id) | |||
927 | static int omap2_dma_handle_ch(int ch) | 924 | static int omap2_dma_handle_ch(int ch) |
928 | { | 925 | { |
929 | u32 status = OMAP_DMA_CSR_REG(ch); | 926 | u32 status = OMAP_DMA_CSR_REG(ch); |
930 | u32 val; | ||
931 | 927 | ||
932 | if (!status) | 928 | if (!status) |
933 | return 0; | 929 | return 0; |
@@ -948,11 +944,7 @@ static int omap2_dma_handle_ch(int ch) | |||
948 | dma_chan[ch].dev_id); | 944 | dma_chan[ch].dev_id); |
949 | 945 | ||
950 | OMAP_DMA_CSR_REG(ch) = OMAP2_DMA_CSR_CLEAR_MASK; | 946 | OMAP_DMA_CSR_REG(ch) = OMAP2_DMA_CSR_CLEAR_MASK; |
951 | 947 | omap_writel(1 << ch, OMAP_DMA4_IRQSTATUS_L0); | |
952 | val = omap_readl(OMAP_DMA4_IRQSTATUS_L0); | ||
953 | /* ch in this function is from 0-31 while in register it is 1-32 */ | ||
954 | val = 1 << (ch); | ||
955 | omap_writel(val, OMAP_DMA4_IRQSTATUS_L0); | ||
956 | 948 | ||
957 | if (likely(dma_chan[ch].callback != NULL)) | 949 | if (likely(dma_chan[ch].callback != NULL)) |
958 | dma_chan[ch].callback(ch, status, dma_chan[ch].data); | 950 | dma_chan[ch].callback(ch, status, dma_chan[ch].data); |
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index bcbb8d7392be..45f0439bffba 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c | |||
@@ -90,8 +90,8 @@ static struct omap_dm_timer dm_timers[] = { | |||
90 | { .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 }, | 90 | { .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 }, |
91 | { .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 }, | 91 | { .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 }, |
92 | { .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 }, | 92 | { .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 }, |
93 | { .phys_base = 0xfffb4400, .irq = INT_1610_GPTIMER7 }, | 93 | { .phys_base = 0xfffb7400, .irq = INT_1610_GPTIMER7 }, |
94 | { .phys_base = 0xfffb4c00, .irq = INT_1610_GPTIMER8 }, | 94 | { .phys_base = 0xfffbd400, .irq = INT_1610_GPTIMER8 }, |
95 | }; | 95 | }; |
96 | 96 | ||
97 | #elif defined(CONFIG_ARCH_OMAP2) | 97 | #elif defined(CONFIG_ARCH_OMAP2) |
@@ -314,6 +314,8 @@ struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) | |||
314 | __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) | 314 | __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) |
315 | { | 315 | { |
316 | BUG(); | 316 | BUG(); |
317 | |||
318 | return 0; | ||
317 | } | 319 | } |
318 | 320 | ||
319 | #endif | 321 | #endif |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 4f2fd5591337..b8c01de208b4 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -974,10 +974,11 @@ static struct irq_chip gpio_irq_chip = { | |||
974 | }; | 974 | }; |
975 | 975 | ||
976 | static struct irq_chip mpuio_irq_chip = { | 976 | static struct irq_chip mpuio_irq_chip = { |
977 | .name = "MPUIO", | 977 | .name = "MPUIO", |
978 | .ack = mpuio_ack_irq, | 978 | .ack = mpuio_ack_irq, |
979 | .mask = mpuio_mask_irq, | 979 | .mask = mpuio_mask_irq, |
980 | .unmask = mpuio_unmask_irq | 980 | .unmask = mpuio_unmask_irq, |
981 | .set_type = gpio_irq_type, | ||
981 | }; | 982 | }; |
982 | 983 | ||
983 | static int initialized; | 984 | static int initialized; |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index ec50008a2df6..b8d6f17ff58f 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -20,8 +20,8 @@ | |||
20 | #include <linux/interrupt.h> | 20 | #include <linux/interrupt.h> |
21 | #include <linux/err.h> | 21 | #include <linux/err.h> |
22 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
23 | #include <linux/delay.h> | ||
23 | 24 | ||
24 | #include <asm/delay.h> | ||
25 | #include <asm/io.h> | 25 | #include <asm/io.h> |
26 | #include <asm/irq.h> | 26 | #include <asm/irq.h> |
27 | 27 | ||
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c index 042105ac30b8..6c798d288688 100644 --- a/arch/arm/plat-omap/mux.c +++ b/arch/arm/plat-omap/mux.c | |||
@@ -116,7 +116,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index) | |||
116 | } | 116 | } |
117 | 117 | ||
118 | /* Check for pull up or pull down selection on 1610 */ | 118 | /* Check for pull up or pull down selection on 1610 */ |
119 | if (!cpu_is_omap1510()) { | 119 | if (!cpu_is_omap15xx()) { |
120 | if (cfg->pu_pd_reg && cfg->pull_val) { | 120 | if (cfg->pu_pd_reg && cfg->pull_val) { |
121 | spin_lock_irqsave(&mux_spin_lock, flags); | 121 | spin_lock_irqsave(&mux_spin_lock, flags); |
122 | pu_pd_orig = omap_readl(cfg->pu_pd_reg); | 122 | pu_pd_orig = omap_readl(cfg->pu_pd_reg); |
@@ -172,7 +172,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index) | |||
172 | printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", | 172 | printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", |
173 | cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); | 173 | cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); |
174 | 174 | ||
175 | if (!cpu_is_omap1510()) { | 175 | if (!cpu_is_omap15xx()) { |
176 | if (cfg->pu_pd_reg && cfg->pull_val) { | 176 | if (cfg->pu_pd_reg && cfg->pull_val) { |
177 | printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", | 177 | printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", |
178 | cfg->pu_pd_name, cfg->pu_pd_reg, | 178 | cfg->pu_pd_name, cfg->pu_pd_reg, |