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authorMagnus Damm <damm@igel.co.jp>2008-10-22 05:29:17 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-10-22 05:34:16 -0400
commit42eed42bac41c8106ed52b6b84409d84c0981e36 (patch)
tree2ba3f575af09ef9dcea7bb38e2ce7e39524562da /arch
parent22ee3ba611e0aa73228ae64fa68d89c52367702a (diff)
sh: improve pinmux support for single direction pins
This patch improves the support for gpio pins that are hard wired to either input or output and lack control register association. A special force enum id is used to allow use without control register but still mark the gpio pin as input or output. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/include/asm/gpio.h1
-rw-r--r--arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c43
-rw-r--r--arch/sh/kernel/gpio.c6
3 files changed, 27 insertions, 23 deletions
diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h
index 02de5b609ba5..74c31a678a52 100644
--- a/arch/sh/include/asm/gpio.h
+++ b/arch/sh/include/asm/gpio.h
@@ -64,6 +64,7 @@ struct pinmux_data_reg {
64struct pinmux_range { 64struct pinmux_range {
65 pinmux_enum_t begin; 65 pinmux_enum_t begin;
66 pinmux_enum_t end; 66 pinmux_enum_t end;
67 pinmux_enum_t force;
67}; 68};
68 69
69struct pinmux_info { 70struct pinmux_info {
diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c
index 6fbc2aa10831..c465af7283fc 100644
--- a/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c
@@ -46,11 +46,10 @@ enum {
46 PINMUX_DATA_END, 46 PINMUX_DATA_END,
47 47
48 PINMUX_INPUT_BEGIN, 48 PINMUX_INPUT_BEGIN,
49 FORCE_IN,
49 PA7_IN, PA6_IN, PA5_IN, PA4_IN, 50 PA7_IN, PA6_IN, PA5_IN, PA4_IN,
50 PA3_IN, PA2_IN, PA1_IN, PA0_IN, 51 PA3_IN, PA2_IN, PA1_IN, PA0_IN,
51 PB11_IN, PB10_IN, PB9_IN, PB8_IN, 52 PB11_IN, PB10_IN, PB9_IN, PB8_IN,
52 PB7_IN, PB6_IN, PB5_IN, PB4_IN,
53 PB3_IN, PB2_IN, PB1_IN, PB0_IN,
54 PC14_IN, PC13_IN, PC12_IN, 53 PC14_IN, PC13_IN, PC12_IN,
55 PC11_IN, PC10_IN, PC9_IN, PC8_IN, 54 PC11_IN, PC10_IN, PC9_IN, PC8_IN,
56 PC7_IN, PC6_IN, PC5_IN, PC4_IN, 55 PC7_IN, PC6_IN, PC5_IN, PC4_IN,
@@ -74,7 +73,7 @@ enum {
74 PINMUX_INPUT_END, 73 PINMUX_INPUT_END,
75 74
76 PINMUX_OUTPUT_BEGIN, 75 PINMUX_OUTPUT_BEGIN,
77 PB12_OUT, 76 FORCE_OUT,
78 PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT, 77 PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
79 PC14_OUT, PC13_OUT, PC12_OUT, 78 PC14_OUT, PC13_OUT, PC12_OUT,
80 PC11_OUT, PC10_OUT, PC9_OUT, PC8_OUT, 79 PC11_OUT, PC10_OUT, PC9_OUT, PC8_OUT,
@@ -285,7 +284,7 @@ static pinmux_enum_t pinmux_data[] = {
285 PINMUX_DATA(PA0_DATA, PA0_IN), 284 PINMUX_DATA(PA0_DATA, PA0_IN),
286 285
287 /* PB */ 286 /* PB */
288 PINMUX_DATA(PB12_DATA, PB12MD_00, PB12_OUT), 287 PINMUX_DATA(PB12_DATA, PB12MD_00, FORCE_OUT),
289 PINMUX_DATA(WDTOVF_MARK, PB12MD_01), 288 PINMUX_DATA(WDTOVF_MARK, PB12MD_01),
290 PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00), 289 PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00),
291 PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01), 290 PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01),
@@ -306,42 +305,42 @@ static pinmux_enum_t pinmux_data[] = {
306 PINMUX_DATA(CRX0_MARK, PB8MD_01), 305 PINMUX_DATA(CRX0_MARK, PB8MD_01),
307 PINMUX_DATA(CRX0_CRX1_MARK, PB8MD_10), 306 PINMUX_DATA(CRX0_CRX1_MARK, PB8MD_10),
308 307
309 PINMUX_DATA(PB7_DATA, PB7MD_00, PB7_IN), 308 PINMUX_DATA(PB7_DATA, PB7MD_00, FORCE_IN),
310 PINMUX_DATA(SDA3_MARK, PB7MD_01), 309 PINMUX_DATA(SDA3_MARK, PB7MD_01),
311 PINMUX_DATA(PINT7_PB_MARK, PB7MD_10), 310 PINMUX_DATA(PINT7_PB_MARK, PB7MD_10),
312 PINMUX_DATA(IRQ7_PB_MARK, PB7MD_11), 311 PINMUX_DATA(IRQ7_PB_MARK, PB7MD_11),
313 312
314 PINMUX_DATA(PB6_DATA, PB6MD_00, PB6_IN), 313 PINMUX_DATA(PB6_DATA, PB6MD_00, FORCE_IN),
315 PINMUX_DATA(SCL3_MARK, PB6MD_01), 314 PINMUX_DATA(SCL3_MARK, PB6MD_01),
316 PINMUX_DATA(PINT6_PB_MARK, PB6MD_10), 315 PINMUX_DATA(PINT6_PB_MARK, PB6MD_10),
317 PINMUX_DATA(IRQ6_PB_MARK, PB6MD_11), 316 PINMUX_DATA(IRQ6_PB_MARK, PB6MD_11),
318 317
319 PINMUX_DATA(PB5_DATA, PB5MD_00, PB5_IN), 318 PINMUX_DATA(PB5_DATA, PB5MD_00, FORCE_IN),
320 PINMUX_DATA(SDA2_MARK, PB6MD_01), 319 PINMUX_DATA(SDA2_MARK, PB6MD_01),
321 PINMUX_DATA(PINT5_PB_MARK, PB6MD_10), 320 PINMUX_DATA(PINT5_PB_MARK, PB6MD_10),
322 PINMUX_DATA(IRQ5_PB_MARK, PB6MD_11), 321 PINMUX_DATA(IRQ5_PB_MARK, PB6MD_11),
323 322
324 PINMUX_DATA(PB4_DATA, PB4MD_00, PB4_IN), 323 PINMUX_DATA(PB4_DATA, PB4MD_00, FORCE_IN),
325 PINMUX_DATA(SCL2_MARK, PB4MD_01), 324 PINMUX_DATA(SCL2_MARK, PB4MD_01),
326 PINMUX_DATA(PINT4_PB_MARK, PB4MD_10), 325 PINMUX_DATA(PINT4_PB_MARK, PB4MD_10),
327 PINMUX_DATA(IRQ4_PB_MARK, PB4MD_11), 326 PINMUX_DATA(IRQ4_PB_MARK, PB4MD_11),
328 327
329 PINMUX_DATA(PB3_DATA, PB3MD_00, PB3_IN), 328 PINMUX_DATA(PB3_DATA, PB3MD_00, FORCE_IN),
330 PINMUX_DATA(SDA1_MARK, PB3MD_01), 329 PINMUX_DATA(SDA1_MARK, PB3MD_01),
331 PINMUX_DATA(PINT3_PB_MARK, PB3MD_10), 330 PINMUX_DATA(PINT3_PB_MARK, PB3MD_10),
332 PINMUX_DATA(IRQ3_PB_MARK, PB3MD_11), 331 PINMUX_DATA(IRQ3_PB_MARK, PB3MD_11),
333 332
334 PINMUX_DATA(PB2_DATA, PB2MD_00, PB2_IN), 333 PINMUX_DATA(PB2_DATA, PB2MD_00, FORCE_IN),
335 PINMUX_DATA(SCL1_MARK, PB2MD_01), 334 PINMUX_DATA(SCL1_MARK, PB2MD_01),
336 PINMUX_DATA(PINT2_PB_MARK, PB2MD_10), 335 PINMUX_DATA(PINT2_PB_MARK, PB2MD_10),
337 PINMUX_DATA(IRQ2_PB_MARK, PB2MD_11), 336 PINMUX_DATA(IRQ2_PB_MARK, PB2MD_11),
338 337
339 PINMUX_DATA(PB1_DATA, PB1MD_00, PB1_IN), 338 PINMUX_DATA(PB1_DATA, PB1MD_00, FORCE_IN),
340 PINMUX_DATA(SDA0_MARK, PB1MD_01), 339 PINMUX_DATA(SDA0_MARK, PB1MD_01),
341 PINMUX_DATA(PINT1_PB_MARK, PB1MD_10), 340 PINMUX_DATA(PINT1_PB_MARK, PB1MD_10),
342 PINMUX_DATA(IRQ1_PB_MARK, PB1MD_11), 341 PINMUX_DATA(IRQ1_PB_MARK, PB1MD_11),
343 342
344 PINMUX_DATA(PB0_DATA, PB0MD_00, PB0_IN), 343 PINMUX_DATA(PB0_DATA, PB0MD_00, FORCE_IN),
345 PINMUX_DATA(SCL0_MARK, PB0MD_01), 344 PINMUX_DATA(SCL0_MARK, PB0MD_01),
346 PINMUX_DATA(PINT0_PB_MARK, PB0MD_10), 345 PINMUX_DATA(PINT0_PB_MARK, PB0MD_10),
347 PINMUX_DATA(IRQ0_PB_MARK, PB0MD_11), 346 PINMUX_DATA(IRQ0_PB_MARK, PB0MD_11),
@@ -1083,14 +1082,14 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
1083 PB10_IN, PB10_OUT, 1082 PB10_IN, PB10_OUT,
1084 PB9_IN, PB9_OUT, 1083 PB9_IN, PB9_OUT,
1085 PB8_IN, PB8_OUT, 1084 PB8_IN, PB8_OUT,
1086 PB7_IN, 0, 1085 0, 0,
1087 PB6_IN, 0, 1086 0, 0,
1088 PB5_IN, 0, 1087 0, 0,
1089 PB4_IN, 0, 1088 0, 0,
1090 PB3_IN, 0, 1089 0, 0,
1091 PB2_IN, 0, 1090 0, 0,
1092 PB1_IN, 0, 1091 0, 0,
1093 PB0_IN, 0 } 1092 0, 0 }
1094 }, 1093 },
1095 { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4) { 1094 { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4) {
1096 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1095 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -1575,8 +1574,8 @@ static struct pinmux_info sh7203_pinmux_info = {
1575 .name = "sh7203_pfc", 1574 .name = "sh7203_pfc",
1576 .reserved_id = PINMUX_RESERVED, 1575 .reserved_id = PINMUX_RESERVED,
1577 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, 1576 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1578 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, 1577 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
1579 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, 1578 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
1580 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, 1579 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1581 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 1580 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1582 1581
diff --git a/arch/sh/kernel/gpio.c b/arch/sh/kernel/gpio.c
index 9ac0b8e6c217..d37165361034 100644
--- a/arch/sh/kernel/gpio.c
+++ b/arch/sh/kernel/gpio.c
@@ -267,9 +267,13 @@ int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
267 break; 267 break;
268 268
269 in_range = enum_in_range(enum_id, &gpioc->function); 269 in_range = enum_in_range(enum_id, &gpioc->function);
270 if (!in_range && range) 270 if (!in_range && range) {
271 in_range = enum_in_range(enum_id, range); 271 in_range = enum_in_range(enum_id, range);
272 272
273 if (in_range && enum_id == range->force)
274 continue;
275 }
276
273 if (!in_range) 277 if (!in_range)
274 continue; 278 continue;
275 279