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authorIngo Molnar <mingo@elte.hu>2008-02-06 16:39:44 -0500
committerIngo Molnar <mingo@elte.hu>2008-02-06 16:39:44 -0500
commit2d684cd6d9cf0c6a0e28978362671b6e2d8fb56c (patch)
treea952b8ceb00c63254dec4fb709ab8410d45c71cd /arch
parentd8b57bb700a73872fd06b891d7c9bc4cea1a6af4 (diff)
x86: remove X2 workaround
With the spurious handler fix, the X2 does not lock up anymore. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/mm/pageattr.c11
1 files changed, 0 insertions, 11 deletions
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 16ce841f08d6..c870424aa9ad 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -260,17 +260,6 @@ try_preserve_large_page(pte_t *kpte, unsigned long address,
260 pgprot_t old_prot, new_prot; 260 pgprot_t old_prot, new_prot;
261 int level, do_split = 1; 261 int level, do_split = 1;
262 262
263 /*
264 * An Athlon 64 X2 showed hard hangs if we tried to preserve
265 * largepages and changed the PSE entry from RW to RO.
266 *
267 * As AMD CPUs have a long series of erratas in this area,
268 * (and none of the known ones seem to explain this hang),
269 * disable this code until the hang can be debugged:
270 */
271 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
272 return 1;
273
274 spin_lock_irqsave(&pgd_lock, flags); 263 spin_lock_irqsave(&pgd_lock, flags);
275 /* 264 /*
276 * Check for races, another CPU might have split this page 265 * Check for races, another CPU might have split this page