diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-11-11 10:10:28 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-29 20:14:49 -0500 |
commit | 005985609ff72df3257fde6b29aa9d71342c2a6b (patch) | |
tree | 1cf86359ccd44f2b5fbb88f13059b18bafd505fd /arch | |
parent | 187933f23679c413706030aefad9e85e79164c44 (diff) |
[MIPS] mips HPT cleanup: make clocksource_mips public
Make clocksource_mips public and get rid of mips_hpt_read,
mips_hpt_mask.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/dec/time.c | 4 | ||||
-rw-r--r-- | arch/mips/jmr3927/rbhma3100/setup.c | 4 | ||||
-rw-r--r-- | arch/mips/kernel/time.c | 42 | ||||
-rw-r--r-- | arch/mips/sgi-ip27/ip27-timer.c | 4 | ||||
-rw-r--r-- | arch/mips/sibyte/bcm1480/time.c | 4 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/time.c | 8 |
6 files changed, 28 insertions, 38 deletions
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c index 69e424e9ab6f..8b7e0c17ac35 100644 --- a/arch/mips/dec/time.c +++ b/arch/mips/dec/time.c | |||
@@ -151,7 +151,7 @@ static void dec_timer_ack(void) | |||
151 | CMOS_READ(RTC_REG_C); /* Ack the RTC interrupt. */ | 151 | CMOS_READ(RTC_REG_C); /* Ack the RTC interrupt. */ |
152 | } | 152 | } |
153 | 153 | ||
154 | static unsigned int dec_ioasic_hpt_read(void) | 154 | static cycle_t dec_ioasic_hpt_read(void) |
155 | { | 155 | { |
156 | /* | 156 | /* |
157 | * The free-running counter is 32-bit which is good for about | 157 | * The free-running counter is 32-bit which is good for about |
@@ -171,7 +171,7 @@ void __init dec_time_init(void) | |||
171 | 171 | ||
172 | if (!cpu_has_counter && IOASIC) | 172 | if (!cpu_has_counter && IOASIC) |
173 | /* For pre-R4k systems we use the I/O ASIC's counter. */ | 173 | /* For pre-R4k systems we use the I/O ASIC's counter. */ |
174 | mips_hpt_read = dec_ioasic_hpt_read; | 174 | clocksource_mips.read = dec_ioasic_hpt_read; |
175 | 175 | ||
176 | /* Set up the rate of periodic DS1287 interrupts. */ | 176 | /* Set up the rate of periodic DS1287 interrupts. */ |
177 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A); | 177 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A); |
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index 16e5dfe7aa8a..138f25efe38a 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c | |||
@@ -170,7 +170,7 @@ static void jmr3927_machine_power_off(void) | |||
170 | while (1); | 170 | while (1); |
171 | } | 171 | } |
172 | 172 | ||
173 | static unsigned int jmr3927_hpt_read(void) | 173 | static cycle_t jmr3927_hpt_read(void) |
174 | { | 174 | { |
175 | /* We assume this function is called xtime_lock held. */ | 175 | /* We assume this function is called xtime_lock held. */ |
176 | return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; | 176 | return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; |
@@ -182,7 +182,7 @@ extern void rtc_ds1742_init(unsigned long base); | |||
182 | #endif | 182 | #endif |
183 | static void __init jmr3927_time_init(void) | 183 | static void __init jmr3927_time_init(void) |
184 | { | 184 | { |
185 | mips_hpt_read = jmr3927_hpt_read; | 185 | clocksource_mips.read = jmr3927_hpt_read; |
186 | mips_hpt_frequency = JMR3927_TIMER_CLK; | 186 | mips_hpt_frequency = JMR3927_TIMER_CLK; |
187 | #ifdef USE_RTC_DS1742 | 187 | #ifdef USE_RTC_DS1742 |
188 | if (jmr3927_have_nvram()) { | 188 | if (jmr3927_have_nvram()) { |
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 111d1baa3b22..11aab6d6bfe5 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c | |||
@@ -11,7 +11,6 @@ | |||
11 | * Free Software Foundation; either version 2 of the License, or (at your | 11 | * Free Software Foundation; either version 2 of the License, or (at your |
12 | * option) any later version. | 12 | * option) any later version. |
13 | */ | 13 | */ |
14 | #include <linux/clocksource.h> | ||
15 | #include <linux/types.h> | 14 | #include <linux/types.h> |
16 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
17 | #include <linux/init.h> | 16 | #include <linux/init.h> |
@@ -83,7 +82,7 @@ static void null_timer_ack(void) { /* nothing */ } | |||
83 | /* | 82 | /* |
84 | * Null high precision timer functions for systems lacking one. | 83 | * Null high precision timer functions for systems lacking one. |
85 | */ | 84 | */ |
86 | static unsigned int null_hpt_read(void) | 85 | static cycle_t null_hpt_read(void) |
87 | { | 86 | { |
88 | return 0; | 87 | return 0; |
89 | } | 88 | } |
@@ -112,7 +111,7 @@ static void c0_timer_ack(void) | |||
112 | /* | 111 | /* |
113 | * High precision timer functions for a R4k-compatible timer. | 112 | * High precision timer functions for a R4k-compatible timer. |
114 | */ | 113 | */ |
115 | static unsigned int c0_hpt_read(void) | 114 | static cycle_t c0_hpt_read(void) |
116 | { | 115 | { |
117 | return read_c0_count(); | 116 | return read_c0_count(); |
118 | } | 117 | } |
@@ -126,8 +125,6 @@ static void __init c0_hpt_timer_init(void) | |||
126 | 125 | ||
127 | int (*mips_timer_state)(void); | 126 | int (*mips_timer_state)(void); |
128 | void (*mips_timer_ack)(void); | 127 | void (*mips_timer_ack)(void); |
129 | unsigned int (*mips_hpt_read)(void); | ||
130 | unsigned int mips_hpt_mask = 0xffffffff; | ||
131 | 128 | ||
132 | /* last time when xtime and rtc are sync'ed up */ | 129 | /* last time when xtime and rtc are sync'ed up */ |
133 | static long last_rtc_update; | 130 | static long last_rtc_update; |
@@ -269,8 +266,7 @@ static struct irqaction timer_irqaction = { | |||
269 | 266 | ||
270 | static unsigned int __init calibrate_hpt(void) | 267 | static unsigned int __init calibrate_hpt(void) |
271 | { | 268 | { |
272 | u64 frequency; | 269 | cycle_t frequency, hpt_start, hpt_end, hpt_count, hz; |
273 | u32 hpt_start, hpt_end, hpt_count, hz; | ||
274 | 270 | ||
275 | const int loops = HZ / 10; | 271 | const int loops = HZ / 10; |
276 | int log_2_loops = 0; | 272 | int log_2_loops = 0; |
@@ -296,28 +292,23 @@ static unsigned int __init calibrate_hpt(void) | |||
296 | * during the calculated number of periods between timer | 292 | * during the calculated number of periods between timer |
297 | * interrupts. | 293 | * interrupts. |
298 | */ | 294 | */ |
299 | hpt_start = mips_hpt_read(); | 295 | hpt_start = clocksource_mips.read(); |
300 | do { | 296 | do { |
301 | while (mips_timer_state()); | 297 | while (mips_timer_state()); |
302 | while (!mips_timer_state()); | 298 | while (!mips_timer_state()); |
303 | } while (--i); | 299 | } while (--i); |
304 | hpt_end = mips_hpt_read(); | 300 | hpt_end = clocksource_mips.read(); |
305 | 301 | ||
306 | hpt_count = (hpt_end - hpt_start) & mips_hpt_mask; | 302 | hpt_count = (hpt_end - hpt_start) & clocksource_mips.mask; |
307 | hz = HZ; | 303 | hz = HZ; |
308 | frequency = (u64)hpt_count * (u64)hz; | 304 | frequency = hpt_count * hz; |
309 | 305 | ||
310 | return frequency >> log_2_loops; | 306 | return frequency >> log_2_loops; |
311 | } | 307 | } |
312 | 308 | ||
313 | static cycle_t read_mips_hpt(void) | 309 | struct clocksource clocksource_mips = { |
314 | { | ||
315 | return (cycle_t)mips_hpt_read(); | ||
316 | } | ||
317 | |||
318 | static struct clocksource clocksource_mips = { | ||
319 | .name = "MIPS", | 310 | .name = "MIPS", |
320 | .read = read_mips_hpt, | 311 | .mask = 0xffffffff, |
321 | .is_continuous = 1, | 312 | .is_continuous = 1, |
322 | }; | 313 | }; |
323 | 314 | ||
@@ -326,7 +317,7 @@ static void __init init_mips_clocksource(void) | |||
326 | u64 temp; | 317 | u64 temp; |
327 | u32 shift; | 318 | u32 shift; |
328 | 319 | ||
329 | if (!mips_hpt_frequency || mips_hpt_read == null_hpt_read) | 320 | if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read) |
330 | return; | 321 | return; |
331 | 322 | ||
332 | /* Calclate a somewhat reasonable rating value */ | 323 | /* Calclate a somewhat reasonable rating value */ |
@@ -340,7 +331,6 @@ static void __init init_mips_clocksource(void) | |||
340 | } | 331 | } |
341 | clocksource_mips.shift = shift; | 332 | clocksource_mips.shift = shift; |
342 | clocksource_mips.mult = (u32)temp; | 333 | clocksource_mips.mult = (u32)temp; |
343 | clocksource_mips.mask = mips_hpt_mask; | ||
344 | 334 | ||
345 | clocksource_register(&clocksource_mips); | 335 | clocksource_register(&clocksource_mips); |
346 | } | 336 | } |
@@ -360,19 +350,19 @@ void __init time_init(void) | |||
360 | -xtime.tv_sec, -xtime.tv_nsec); | 350 | -xtime.tv_sec, -xtime.tv_nsec); |
361 | 351 | ||
362 | /* Choose appropriate high precision timer routines. */ | 352 | /* Choose appropriate high precision timer routines. */ |
363 | if (!cpu_has_counter && !mips_hpt_read) | 353 | if (!cpu_has_counter && !clocksource_mips.read) |
364 | /* No high precision timer -- sorry. */ | 354 | /* No high precision timer -- sorry. */ |
365 | mips_hpt_read = null_hpt_read; | 355 | clocksource_mips.read = null_hpt_read; |
366 | else if (!mips_hpt_frequency && !mips_timer_state) { | 356 | else if (!mips_hpt_frequency && !mips_timer_state) { |
367 | /* A high precision timer of unknown frequency. */ | 357 | /* A high precision timer of unknown frequency. */ |
368 | if (!mips_hpt_read) | 358 | if (!clocksource_mips.read) |
369 | /* No external high precision timer -- use R4k. */ | 359 | /* No external high precision timer -- use R4k. */ |
370 | mips_hpt_read = c0_hpt_read; | 360 | clocksource_mips.read = c0_hpt_read; |
371 | } else { | 361 | } else { |
372 | /* We know counter frequency. Or we can get it. */ | 362 | /* We know counter frequency. Or we can get it. */ |
373 | if (!mips_hpt_read) { | 363 | if (!clocksource_mips.read) { |
374 | /* No external high precision timer -- use R4k. */ | 364 | /* No external high precision timer -- use R4k. */ |
375 | mips_hpt_read = c0_hpt_read; | 365 | clocksource_mips.read = c0_hpt_read; |
376 | 366 | ||
377 | if (!mips_timer_state) { | 367 | if (!mips_timer_state) { |
378 | /* No external timer interrupt -- use R4k. */ | 368 | /* No external timer interrupt -- use R4k. */ |
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index e5441c3a0b07..7d361726bbfb 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c | |||
@@ -223,14 +223,14 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
223 | setup_irq(irqno, &rt_irqaction); | 223 | setup_irq(irqno, &rt_irqaction); |
224 | } | 224 | } |
225 | 225 | ||
226 | static unsigned int ip27_hpt_read(void) | 226 | static cycle_t ip27_hpt_read(void) |
227 | { | 227 | { |
228 | return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT); | 228 | return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT); |
229 | } | 229 | } |
230 | 230 | ||
231 | void __init ip27_time_init(void) | 231 | void __init ip27_time_init(void) |
232 | { | 232 | { |
233 | mips_hpt_read = ip27_hpt_read; | 233 | clocksource_mips.read = ip27_hpt_read; |
234 | mips_hpt_frequency = CYCLES_PER_SEC; | 234 | mips_hpt_frequency = CYCLES_PER_SEC; |
235 | xtime.tv_sec = get_m48t35_time(); | 235 | xtime.tv_sec = get_m48t35_time(); |
236 | xtime.tv_nsec = 0; | 236 | xtime.tv_nsec = 0; |
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c index 03d5822d3a73..6f3f71bf4244 100644 --- a/arch/mips/sibyte/bcm1480/time.c +++ b/arch/mips/sibyte/bcm1480/time.c | |||
@@ -117,7 +117,7 @@ void bcm1480_timer_interrupt(void) | |||
117 | } | 117 | } |
118 | } | 118 | } |
119 | 119 | ||
120 | static unsigned int bcm1480_hpt_read(void) | 120 | static cycle_t bcm1480_hpt_read(void) |
121 | { | 121 | { |
122 | /* We assume this function is called xtime_lock held. */ | 122 | /* We assume this function is called xtime_lock held. */ |
123 | unsigned long count = | 123 | unsigned long count = |
@@ -127,6 +127,6 @@ static unsigned int bcm1480_hpt_read(void) | |||
127 | 127 | ||
128 | void __init bcm1480_hpt_setup(void) | 128 | void __init bcm1480_hpt_setup(void) |
129 | { | 129 | { |
130 | mips_hpt_read = bcm1480_hpt_read; | 130 | clocksource_mips.read = bcm1480_hpt_read; |
131 | mips_hpt_frequency = BCM1480_HPT_VALUE; | 131 | mips_hpt_frequency = BCM1480_HPT_VALUE; |
132 | } | 132 | } |
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c index bcb74f2c1948..2efffe15ff23 100644 --- a/arch/mips/sibyte/sb1250/time.c +++ b/arch/mips/sibyte/sb1250/time.c | |||
@@ -51,7 +51,7 @@ | |||
51 | 51 | ||
52 | extern int sb1250_steal_irq(int irq); | 52 | extern int sb1250_steal_irq(int irq); |
53 | 53 | ||
54 | static unsigned int sb1250_hpt_read(void); | 54 | static cycle_t sb1250_hpt_read(void); |
55 | 55 | ||
56 | void __init sb1250_hpt_setup(void) | 56 | void __init sb1250_hpt_setup(void) |
57 | { | 57 | { |
@@ -66,8 +66,8 @@ void __init sb1250_hpt_setup(void) | |||
66 | IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); | 66 | IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); |
67 | 67 | ||
68 | mips_hpt_frequency = V_SCD_TIMER_FREQ; | 68 | mips_hpt_frequency = V_SCD_TIMER_FREQ; |
69 | mips_hpt_read = sb1250_hpt_read; | 69 | clocksource_mips.read = sb1250_hpt_read; |
70 | mips_hpt_mask = M_SCD_TIMER_INIT; | 70 | clocksource_mips.mask = M_SCD_TIMER_INIT; |
71 | } | 71 | } |
72 | } | 72 | } |
73 | 73 | ||
@@ -143,7 +143,7 @@ void sb1250_timer_interrupt(void) | |||
143 | * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over | 143 | * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over |
144 | * again. | 144 | * again. |
145 | */ | 145 | */ |
146 | static unsigned int sb1250_hpt_read(void) | 146 | static cycle_t sb1250_hpt_read(void) |
147 | { | 147 | { |
148 | unsigned int count; | 148 | unsigned int count; |
149 | 149 | ||