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authorPete Popov <ppopov@embeddedalley.com>2005-04-08 04:34:43 -0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:31:02 -0400
commitfe359bf58414478a0ddbd65923e2f1aceedf330f (patch)
treef40b1bffd5a974242dd3ee19872daaa9056ba900 /arch
parent494900af689a22479eb405ff1323cad673bd9208 (diff)
Fixed buglet with previous patch that broke non au1x builds.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/au1000/common/time.c2
-rw-r--r--arch/mips/kernel/cpu-probe.c16
2 files changed, 8 insertions, 10 deletions
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 2bc33824807b..2f81a0c00442 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -57,7 +57,7 @@ unsigned long missed_heart_beats = 0;
57static unsigned long r4k_offset; /* Amount to increment compare reg each time */ 57static unsigned long r4k_offset; /* Amount to increment compare reg each time */
58static unsigned long r4k_cur; /* What counter should be at next timer irq */ 58static unsigned long r4k_cur; /* What counter should be at next timer irq */
59int no_au1xxx_32khz; 59int no_au1xxx_32khz;
60int allow_au1k_wait = 0; /* default off for CP0 Counter */ 60extern int allow_au1k_wait; /* default off for CP0 Counter */
61 61
62/* Cycle counter value at the previous timer interrupt.. */ 62/* Cycle counter value at the previous timer interrupt.. */
63static unsigned int timerhi = 0, timerlo = 0; 63static unsigned int timerhi = 0, timerlo = 0;
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index b7c8346df3ca..69e5fff00edc 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -53,9 +53,10 @@ static void r4k_wait(void)
53 53
54/* The Au1xxx wait is available only if using 32khz counter or 54/* The Au1xxx wait is available only if using 32khz counter or
55 * external timer source, but specifically not CP0 Counter. */ 55 * external timer source, but specifically not CP0 Counter. */
56int allow_au1k_wait;
56static void au1k_wait(void) 57static void au1k_wait(void)
57{ 58{
58 unsigned long addr; 59 unsigned long addr = 0;
59 /* using the wait instruction makes CP0 counter unusable */ 60 /* using the wait instruction makes CP0 counter unusable */
60 __asm__("la %0,au1k_wait\n\t" 61 __asm__("la %0,au1k_wait\n\t"
61 ".set mips3\n\t" 62 ".set mips3\n\t"
@@ -113,14 +114,11 @@ static inline void check_wait(void)
113 case CPU_AU1500: 114 case CPU_AU1500:
114 case CPU_AU1550: 115 case CPU_AU1550:
115 case CPU_AU1200: 116 case CPU_AU1200:
116 { 117 if (allow_au1k_wait) {
117 extern int allow_au1k_wait; /* au1000/common/time.c */ 118 cpu_wait = au1k_wait;
118 if (allow_au1k_wait) { 119 printk(" available.\n");
119 cpu_wait = au1k_wait; 120 } else
120 printk(" available.\n"); 121 printk(" unavailable.\n");
121 } else
122 printk(" unavailable.\n");
123 }
124 break; 122 break;
125 default: 123 default:
126 printk(" unavailable.\n"); 124 printk(" unavailable.\n");