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authorLinus Torvalds <torvalds@g5.osdl.org>2006-10-31 11:10:03 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-31 11:10:03 -0500
commiteafa6cb18ec7e5424ce54017b5ce6d11dff58b79 (patch)
treed930417cd7d252fe171663aecd9229d19d42aa99 /arch
parent612b322ade7954a1d984fa410a70d4ae50f75c0d (diff)
parent4731f2dfd5049b7a2b3b5a7131525f6151855f0d (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: sh: Titan defconfig update. sh: Fix IPR-IRQ's for IRQ-chip change breakage. sh: Update r7780rp_defconfig. video: Fix include in hp680_bl. sh: Wire up new syscalls.
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/setup.c12
-rw-r--r--arch/sh/boards/renesas/sh7710voipgw/setup.c105
-rw-r--r--arch/sh/boards/se/7300/irq.c20
-rw-r--r--arch/sh/boards/se/73180/irq.c47
-rw-r--r--arch/sh/boards/se/7343/irq.c90
-rw-r--r--arch/sh/boards/se/770x/irq.c80
-rw-r--r--arch/sh/boards/se/7751/irq.c85
-rw-r--r--arch/sh/boards/sh03/setup.c13
-rw-r--r--arch/sh/boards/snapgear/setup.c12
-rw-r--r--arch/sh/boards/titan/setup.c12
-rw-r--r--arch/sh/configs/r7780rp_defconfig174
-rw-r--r--arch/sh/configs/titan_defconfig101
-rw-r--r--arch/sh/drivers/dma/dma-sh.c42
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c106
-rw-r--r--arch/sh/kernel/cpu/irq/pint.c8
-rw-r--r--arch/sh/kernel/syscalls.S3
16 files changed, 504 insertions, 406 deletions
diff --git a/arch/sh/boards/renesas/hs7751rvoip/setup.c b/arch/sh/boards/renesas/hs7751rvoip/setup.c
index 1d997ffd7931..f7d0e304d899 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/setup.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/setup.c
@@ -15,12 +15,16 @@
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/machvec.h> 16#include <asm/machvec.h>
17 17
18static void __init hs7751rvoip_init_irq(void) 18static struct ipr_data hs77501rvoip_ipr_map[] = {
19{
20#if defined(CONFIG_HS7751RVOIP_CODEC) 19#if defined(CONFIG_HS7751RVOIP_CODEC)
21 make_ipr_irq(DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); 20 { DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
22 make_ipr_irq(DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); 21 { DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
23#endif 22#endif
23};
24
25static void __init hs7751rvoip_init_irq(void)
26{
27 make_ipr_irq(hs77501rvoip_ipr_map, ARRAY_SIZE(hs77501rvoip_ipr_map));
24 28
25 init_hs7751rvoip_IRQ(); 29 init_hs7751rvoip_IRQ();
26} 30}
diff --git a/arch/sh/boards/renesas/sh7710voipgw/setup.c b/arch/sh/boards/renesas/sh7710voipgw/setup.c
index e57e7afab8c6..180810b12107 100644
--- a/arch/sh/boards/renesas/sh7710voipgw/setup.c
+++ b/arch/sh/boards/renesas/sh7710voipgw/setup.c
@@ -13,6 +13,51 @@
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/irq.h> 14#include <asm/irq.h>
15 15
16static struct ipr_data sh7710voipgw_ipr_map[] = {
17 { TIMER2_IRQ, TIMER2_IPR_ADDR, TIMER2_IPR_POS, TIMER2_PRIORITY },
18 { WDT_IRQ, WDT_IPR_ADDR, WDT_IPR_POS, WDT_PRIORITY },
19
20 /* SCIF0 */
21 { SCIF0_ERI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
22 { SCIF0_RXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
23 { SCIF0_BRI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
24 { SCIF0_TXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
25
26 /* DMAC-1 */
27 { DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
28 { DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
29 { DMTE2_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
30 { DMTE3_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
31
32 /* DMAC-2 */
33 { DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
34 { DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
35
36 /* IPSEC */
37 { IPSEC_IRQ, IPSEC_IPR_ADDR, IPSEC_IPR_POS, IPSEC_PRIORITY },
38
39 /* EDMAC */
40 { EDMAC0_IRQ, EDMAC0_IPR_ADDR, EDMAC0_IPR_POS, EDMAC0_PRIORITY },
41 { EDMAC1_IRQ, EDMAC1_IPR_ADDR, EDMAC1_IPR_POS, EDMAC1_PRIORITY },
42 { EDMAC2_IRQ, EDMAC2_IPR_ADDR, EDMAC2_IPR_POS, EDMAC2_PRIORITY },
43
44 /* SIOF0 */
45 { SIOF0_ERI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
46 { SIOF0_TXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
47 { SIOF0_RXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
48 { SIOF0_CCI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
49
50 /* SIOF1 */
51 { SIOF1_ERI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },
52 { SIOF1_TXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },
53 { SIOF1_RXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },
54 { SIOF1_CCI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },
55
56 /* SLIC IRQ's */
57 { IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY },
58 { IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY },
59};
60
16/* 61/*
17 * Initialize IRQ setting 62 * Initialize IRQ setting
18 */ 63 */
@@ -37,65 +82,7 @@ static void __init sh7710voipgw_init_irq(void)
37 */ 82 */
38 ctrl_outw(0x2aa, INTC_ICR1); 83 ctrl_outw(0x2aa, INTC_ICR1);
39 84
40 /* Now make IPR interrupts */ 85 make_ipr_irq(sh7710voipgw_ipr_map, ARRAY_SIZE(sh7710voipgw_ipr_map));
41 make_ipr_irq(TIMER2_IRQ, TIMER2_IPR_ADDR,
42 TIMER2_IPR_POS, TIMER2_PRIORITY);
43 make_ipr_irq(WDT_IRQ, WDT_IPR_ADDR, WDT_IPR_POS, WDT_PRIORITY);
44
45 /* SCIF0 */
46 make_ipr_irq(SCIF0_ERI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
47 SCIF0_PRIORITY);
48 make_ipr_irq(SCIF0_RXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
49 SCIF0_PRIORITY);
50 make_ipr_irq(SCIF0_BRI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
51 SCIF0_PRIORITY);
52 make_ipr_irq(SCIF0_TXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
53 SCIF0_PRIORITY);
54
55 /* DMAC-1 */
56 make_ipr_irq(DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
57 make_ipr_irq(DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
58 make_ipr_irq(DMTE2_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
59 make_ipr_irq(DMTE3_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
60
61 /* DMAC-2 */
62 make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
63 make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
64
65 /* IPSEC */
66 make_ipr_irq(IPSEC_IRQ, IPSEC_IPR_ADDR, IPSEC_IPR_POS, IPSEC_PRIORITY);
67
68 /* EDMAC */
69 make_ipr_irq(EDMAC0_IRQ, EDMAC0_IPR_ADDR, EDMAC0_IPR_POS,
70 EDMAC0_PRIORITY);
71 make_ipr_irq(EDMAC1_IRQ, EDMAC1_IPR_ADDR, EDMAC1_IPR_POS,
72 EDMAC1_PRIORITY);
73 make_ipr_irq(EDMAC2_IRQ, EDMAC2_IPR_ADDR, EDMAC2_IPR_POS,
74 EDMAC2_PRIORITY);
75
76 /* SIOF0 */
77 make_ipr_irq(SIOF0_ERI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
78 SIOF0_PRIORITY);
79 make_ipr_irq(SIOF0_TXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
80 SIOF0_PRIORITY);
81 make_ipr_irq(SIOF0_RXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
82 SIOF0_PRIORITY);
83 make_ipr_irq(SIOF0_CCI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
84 SIOF0_PRIORITY);
85
86 /* SIOF1 */
87 make_ipr_irq(SIOF1_ERI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
88 SIOF1_PRIORITY);
89 make_ipr_irq(SIOF1_TXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
90 SIOF1_PRIORITY);
91 make_ipr_irq(SIOF1_RXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
92 SIOF1_PRIORITY);
93 make_ipr_irq(SIOF1_CCI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
94 SIOF1_PRIORITY);
95
96 /* SLIC IRQ's */
97 make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY);
98 make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY);
99} 86}
100 87
101/* 88/*
diff --git a/arch/sh/boards/se/7300/irq.c b/arch/sh/boards/se/7300/irq.c
index ad1034f98a29..1279d776d60f 100644
--- a/arch/sh/boards/se/7300/irq.c
+++ b/arch/sh/boards/se/7300/irq.c
@@ -13,6 +13,17 @@
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/se7300.h> 14#include <asm/se7300.h>
15 15
16static struct ipr_data se7300_ipr_map[] = {
17 /* PC_IRQ[0-3] -> IRQ0 (32) */
18 { IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, 0x0f - IRQ0_IRQ },
19 /* A_IRQ[0-3] -> IRQ1 (33) */
20 { IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, 0x0f - IRQ1_IRQ },
21 { SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
22 { DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
23 { DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
24 { VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
25};
26
16/* 27/*
17 * Initialize IRQ setting 28 * Initialize IRQ setting
18 */ 29 */
@@ -23,14 +34,7 @@ init_7300se_IRQ(void)
23 ctrl_outw(0xa000, INTC_ICR1); /* IRQ mode; IRQ0,1 enable. */ 34 ctrl_outw(0xa000, INTC_ICR1); /* IRQ mode; IRQ0,1 enable. */
24 ctrl_outw(0x0000, PORT_PFCR); /* use F for IRQ[3:0] and SIU. */ 35 ctrl_outw(0x0000, PORT_PFCR); /* use F for IRQ[3:0] and SIU. */
25 36
26 /* PC_IRQ[0-3] -> IRQ0 (32) */ 37 make_ipr_irq(se7300_ipr_map, ARRAY_SIZE(se7300_ipr_map));
27 make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, 0x0f - IRQ0_IRQ);
28 /* A_IRQ[0-3] -> IRQ1 (33) */
29 make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, 0x0f - IRQ1_IRQ);
30 make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
31 make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
32 make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
33 make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
34 38
35 ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */ 39 ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
36} 40}
diff --git a/arch/sh/boards/se/73180/irq.c b/arch/sh/boards/se/73180/irq.c
index 2c62b8ea350e..e7200c56bb45 100644
--- a/arch/sh/boards/se/73180/irq.c
+++ b/arch/sh/boards/se/73180/irq.c
@@ -87,13 +87,38 @@ shmse_irq_demux(int irq)
87 return irq; 87 return irq;
88} 88}
89 89
90static struct ipr_data se73180_siof0_ipr_map[] = {
91 { SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
92};
93static struct ipr_data se73180_vpu_ipr_map[] = {
94 { VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8 },
95};
96static struct ipr_data se73180_other_ipr_map[] = {
97 { DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
98 { DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
99 { DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
100 { IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
101 { IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
102 { IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
103 { IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
104 { SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
105 { SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY },
106
107 /* VIO interrupt */
108 { CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
109 { BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
110 { VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
111
112 { LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY },
113};
114
90/* 115/*
91 * Initialize IRQ setting 116 * Initialize IRQ setting
92 */ 117 */
93void __init 118void __init
94init_73180se_IRQ(void) 119init_73180se_IRQ(void)
95{ 120{
96 make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY); 121 make_ipr_irq(se73180_siof0_ipr_map, ARRAY_SIZE(se73180_siof0_ipr_map));
97 122
98 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ 123 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */
99 ctrl_outw(0x2000, 0xb07fffec); /* mrshpc irq enable */ 124 ctrl_outw(0x2000, 0xb07fffec); /* mrshpc irq enable */
@@ -101,27 +126,11 @@ init_73180se_IRQ(void)
101 ctrl_outw(2 << ((7 - 5) * 2), INTC_ICR1); /* low-level irq */ 126 ctrl_outw(2 << ((7 - 5) * 2), INTC_ICR1); /* low-level irq */
102 make_intreq_irq(10); 127 make_intreq_irq(10);
103 128
104 make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8); 129 make_ipr_irq(se73180_vpu_ipr_map, ARRAY_SIZE(se73180_vpu_ipr_map));
105 130
106 ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */ 131 ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */
107 132
108 make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); 133 make_ipr_irq(se73180_other_ipr_map, ARRAY_SIZE(se73180_other_ipr_map));
109 make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
110 make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
111 make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
112 make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
113 IIC0_PRIORITY);
114 make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
115 IIC0_PRIORITY);
116 make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
117 make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
118 make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY);
119
120 /* VIO interrupt */
121 make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
122 make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
123 make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
124 134
125 make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY);
126 ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */ 135 ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
127} 136}
diff --git a/arch/sh/boards/se/7343/irq.c b/arch/sh/boards/se/7343/irq.c
index 288b62f59419..360153ecc55b 100644
--- a/arch/sh/boards/se/7343/irq.c
+++ b/arch/sh/boards/se/7343/irq.c
@@ -102,6 +102,51 @@ shmse_irq_demux(int irq)
102static struct irqaction irq5 = { no_action, 0, CPU_MASK_NONE, "IRQ5-cascade", 102static struct irqaction irq5 = { no_action, 0, CPU_MASK_NONE, "IRQ5-cascade",
103 NULL, NULL}; 103 NULL, NULL};
104 104
105static struct ipr_data se7343_irq5_ipr_map[] = {
106 { IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY },
107};
108static struct ipr_data se7343_siof0_vpu_ipr_map[] = {
109 { SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
110 { VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8 },
111};
112static struct ipr_data se7343_other_ipr_map[] = {
113 { DMTE0_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
114 { DMTE1_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
115 { DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
116 { DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
117 { DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
118 { DMTE5_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
119
120 /* I2C block */
121 { IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
122 { IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
123 { IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
124 { IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
125
126 { IIC1_ALI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },
127 { IIC1_TACKI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },
128 { IIC1_WAITI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },
129 { IIC1_DTEI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },
130
131 /* SIOF */
132 { SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
133
134 /* SIU */
135 { SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY },
136
137 /* VIO interrupt */
138 { CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
139 { BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
140 { VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
141
142 /*MFI interrupt*/
143
144 { MFI_IRQ, MFI_IPR_ADDR, MFI_IPR_POS, MFI_PRIORITY },
145
146 /* LCD controller */
147 { LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY },
148};
149
105/* 150/*
106 * Initialize IRQ setting 151 * Initialize IRQ setting
107 */ 152 */
@@ -138,54 +183,17 @@ init_7343se_IRQ(void)
138 /* Setup all external interrupts to be active low */ 183 /* Setup all external interrupts to be active low */
139 ctrl_outw(0xaaaa, INTC_ICR1); 184 ctrl_outw(0xaaaa, INTC_ICR1);
140 185
141 make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY); 186 make_ipr_irq(se7343_irq5_ipr_map, ARRAY_SIZE(se7343_irq5_ipr_map));
187
142 setup_irq(IRQ5_IRQ, &irq5); 188 setup_irq(IRQ5_IRQ, &irq5);
143 /* Set port control to use IRQ5 */ 189 /* Set port control to use IRQ5 */
144 *(u16 *)0xA4050108 &= ~0xc; 190 *(u16 *)0xA4050108 &= ~0xc;
145 191
146 make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY); 192 make_ipr_irq(se7343_siof0_vpu_ipr_map, ARRAY_SIZE(se7343_siof0_vpu_ipr_map));
147 make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8);
148 193
149 ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */ 194 ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */
150 195
151 make_ipr_irq(DMTE0_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); 196 make_ipr_irq(se7343_other_ipr_map, ARRAY_SIZE(se7343_other_ipr_map));
152 make_ipr_irq(DMTE1_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
153 make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
154 make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
155 make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
156 make_ipr_irq(DMTE5_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
157
158 /* I2C block */
159 make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
160 make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
161 IIC0_PRIORITY);
162 make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
163 IIC0_PRIORITY);
164 make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
165
166 make_ipr_irq(IIC1_ALI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);
167 make_ipr_irq(IIC1_TACKI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
168 IIC1_PRIORITY);
169 make_ipr_irq(IIC1_WAITI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
170 IIC1_PRIORITY);
171 make_ipr_irq(IIC1_DTEI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);
172
173 /* SIOF */
174 make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
175 197
176 /* SIU */
177 make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY);
178
179 /* VIO interrupt */
180 make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
181 make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
182 make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
183
184 /*MFI interrupt*/
185
186 make_ipr_irq(MFI_IRQ, MFI_IPR_ADDR, MFI_IPR_POS, MFI_PRIORITY);
187
188 /* LCD controller */
189 make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY);
190 ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */ 198 ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
191} 199}
diff --git a/arch/sh/boards/se/770x/irq.c b/arch/sh/boards/se/770x/irq.c
index cff6700bbafd..fcd7cd7fa05f 100644
--- a/arch/sh/boards/se/770x/irq.c
+++ b/arch/sh/boards/se/770x/irq.c
@@ -13,6 +13,48 @@
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/se.h> 14#include <asm/se.h>
15 15
16static struct ipr_data se770x_ipr_map[] = {
17#if defined(CONFIG_CPU_SUBTYPE_SH7705)
18 /* This is default value */
19 { 0xf-0x2, BCR_ILCRA, 2, 0x2 },
20 { 0xf-0xa, BCR_ILCRA, 1, 0xa },
21 { 0xf-0x5, BCR_ILCRB, 0, 0x5 },
22 { 0xf-0x8, BCR_ILCRC, 1, 0x8 },
23 { 0xf-0xc, BCR_ILCRC, 0, 0xc },
24 { 0xf-0xe, BCR_ILCRD, 3, 0xe },
25 { 0xf-0x3, BCR_ILCRD, 1, 0x3 }, /* LAN */
26 { 0xf-0xd, BCR_ILCRE, 2, 0xd },
27 { 0xf-0x9, BCR_ILCRE, 1, 0x9 },
28 { 0xf-0x1, BCR_ILCRE, 0, 0x1 },
29 { 0xf-0xf, BCR_ILCRF, 3, 0xf },
30 { 0xf-0xb, BCR_ILCRF, 1, 0xb },
31 { 0xf-0x7, BCR_ILCRG, 3, 0x7 },
32 { 0xf-0x6, BCR_ILCRG, 2, 0x6 },
33 { 0xf-0x4, BCR_ILCRG, 1, 0x4 },
34#else
35 { 14, BCR_ILCRA, 2, 0x0f-14 },
36 { 12, BCR_ILCRA, 1, 0x0f-12 },
37 { 8, BCR_ILCRB, 1, 0x0f- 8 },
38 { 6, BCR_ILCRC, 3, 0x0f- 6 },
39 { 5, BCR_ILCRC, 2, 0x0f- 5 },
40 { 4, BCR_ILCRC, 1, 0x0f- 4 },
41 { 3, BCR_ILCRC, 0, 0x0f- 3 },
42 { 1, BCR_ILCRD, 3, 0x0f- 1 },
43
44 { 10, BCR_ILCRD, 1, 0x0f-10 }, /* LAN */
45
46 { 0, BCR_ILCRE, 3, 0x0f- 0 }, /* PCIRQ3 */
47 { 11, BCR_ILCRE, 2, 0x0f-11 }, /* PCIRQ2 */
48 { 9, BCR_ILCRE, 1, 0x0f- 9 }, /* PCIRQ1 */
49 { 7, BCR_ILCRE, 0, 0x0f- 7 }, /* PCIRQ0 */
50
51 /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
52 /* NOTE: #2 and #13 are not used on PC */
53 { 13, BCR_ILCRG, 1, 0x0f-13 }, /* SLOTIRQ2 */
54 { 2, BCR_ILCRG, 0, 0x0f- 2 }, /* SLOTIRQ1 */
55#endif
56};
57
16/* 58/*
17 * Initialize IRQ setting 59 * Initialize IRQ setting
18 */ 60 */
@@ -38,42 +80,6 @@ void __init init_se_IRQ(void)
38 ctrl_outw(0, BCR_ILCRE); 80 ctrl_outw(0, BCR_ILCRE);
39 ctrl_outw(0, BCR_ILCRF); 81 ctrl_outw(0, BCR_ILCRF);
40 ctrl_outw(0, BCR_ILCRG); 82 ctrl_outw(0, BCR_ILCRG);
41 /* This is default value */
42 make_ipr_irq(0xf-0x2, BCR_ILCRA, 2, 0x2);
43 make_ipr_irq(0xf-0xa, BCR_ILCRA, 1, 0xa);
44 make_ipr_irq(0xf-0x5, BCR_ILCRB, 0, 0x5);
45 make_ipr_irq(0xf-0x8, BCR_ILCRC, 1, 0x8);
46 make_ipr_irq(0xf-0xc, BCR_ILCRC, 0, 0xc);
47 make_ipr_irq(0xf-0xe, BCR_ILCRD, 3, 0xe);
48 make_ipr_irq(0xf-0x3, BCR_ILCRD, 1, 0x3); /* LAN */
49 make_ipr_irq(0xf-0xd, BCR_ILCRE, 2, 0xd);
50 make_ipr_irq(0xf-0x9, BCR_ILCRE, 1, 0x9);
51 make_ipr_irq(0xf-0x1, BCR_ILCRE, 0, 0x1);
52 make_ipr_irq(0xf-0xf, BCR_ILCRF, 3, 0xf);
53 make_ipr_irq(0xf-0xb, BCR_ILCRF, 1, 0xb);
54 make_ipr_irq(0xf-0x7, BCR_ILCRG, 3, 0x7);
55 make_ipr_irq(0xf-0x6, BCR_ILCRG, 2, 0x6);
56 make_ipr_irq(0xf-0x4, BCR_ILCRG, 1, 0x4);
57#else
58 make_ipr_irq(14, BCR_ILCRA, 2, 0x0f-14);
59 make_ipr_irq(12, BCR_ILCRA, 1, 0x0f-12);
60 make_ipr_irq( 8, BCR_ILCRB, 1, 0x0f- 8);
61 make_ipr_irq( 6, BCR_ILCRC, 3, 0x0f- 6);
62 make_ipr_irq( 5, BCR_ILCRC, 2, 0x0f- 5);
63 make_ipr_irq( 4, BCR_ILCRC, 1, 0x0f- 4);
64 make_ipr_irq( 3, BCR_ILCRC, 0, 0x0f- 3);
65 make_ipr_irq( 1, BCR_ILCRD, 3, 0x0f- 1);
66
67 make_ipr_irq(10, BCR_ILCRD, 1, 0x0f-10); /* LAN */
68
69 make_ipr_irq( 0, BCR_ILCRE, 3, 0x0f- 0); /* PCIRQ3 */
70 make_ipr_irq(11, BCR_ILCRE, 2, 0x0f-11); /* PCIRQ2 */
71 make_ipr_irq( 9, BCR_ILCRE, 1, 0x0f- 9); /* PCIRQ1 */
72 make_ipr_irq( 7, BCR_ILCRE, 0, 0x0f- 7); /* PCIRQ0 */
73
74 /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
75 /* NOTE: #2 and #13 are not used on PC */
76 make_ipr_irq(13, BCR_ILCRG, 1, 0x0f-13); /* SLOTIRQ2 */
77 make_ipr_irq( 2, BCR_ILCRG, 0, 0x0f- 2); /* SLOTIRQ1 */
78#endif 83#endif
84 make_ipr_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map));
79} 85}
diff --git a/arch/sh/boards/se/7751/irq.c b/arch/sh/boards/se/7751/irq.c
index c607b0a48479..e4c63a48296c 100644
--- a/arch/sh/boards/se/7751/irq.c
+++ b/arch/sh/boards/se/7751/irq.c
@@ -14,53 +14,50 @@
14#include <asm/irq.h> 14#include <asm/irq.h>
15#include <asm/se7751.h> 15#include <asm/se7751.h>
16 16
17/* 17static struct ipr_data se7751_ipr_map[] = {
18 * Initialize IRQ setting
19 */
20void __init init_7751se_IRQ(void)
21{
22
23 /* Leave old Solution Engine code in for reference. */ 18 /* Leave old Solution Engine code in for reference. */
24#if defined(CONFIG_SH_SOLUTION_ENGINE) 19#if defined(CONFIG_SH_SOLUTION_ENGINE)
25 /* 20 /*
26 * Super I/O (Just mimic PC): 21 * Super I/O (Just mimic PC):
27 * 1: keyboard 22 * 1: keyboard
28 * 3: serial 0 23 * 3: serial 0
29 * 4: serial 1 24 * 4: serial 1
30 * 5: printer 25 * 5: printer
31 * 6: floppy 26 * 6: floppy
32 * 8: rtc 27 * 8: rtc
33 * 12: mouse 28 * 12: mouse
34 * 14: ide0 29 * 14: ide0
35 */ 30 */
36 make_ipr_irq(14, BCR_ILCRA, 2, 0x0f-14); 31 { 14, BCR_ILCRA, 2, 0x0f-14 },
37 make_ipr_irq(12, BCR_ILCRA, 1, 0x0f-12); 32 { 12, BCR_ILCRA, 1, 0x0f-12 },
38 make_ipr_irq( 8, BCR_ILCRB, 1, 0x0f- 8); 33 { 8, BCR_ILCRB, 1, 0x0f- 8 },
39 make_ipr_irq( 6, BCR_ILCRC, 3, 0x0f- 6); 34 { 6, BCR_ILCRC, 3, 0x0f- 6 },
40 make_ipr_irq( 5, BCR_ILCRC, 2, 0x0f- 5); 35 { 5, BCR_ILCRC, 2, 0x0f- 5 },
41 make_ipr_irq( 4, BCR_ILCRC, 1, 0x0f- 4); 36 { 4, BCR_ILCRC, 1, 0x0f- 4 },
42 make_ipr_irq( 3, BCR_ILCRC, 0, 0x0f- 3); 37 { 3, BCR_ILCRC, 0, 0x0f- 3 },
43 make_ipr_irq( 1, BCR_ILCRD, 3, 0x0f- 1); 38 { 1, BCR_ILCRD, 3, 0x0f- 1 },
44 39
45 make_ipr_irq(10, BCR_ILCRD, 1, 0x0f-10); /* LAN */ 40 { 10, BCR_ILCRD, 1, 0x0f-10 }, /* LAN */
46 41
47 make_ipr_irq( 0, BCR_ILCRE, 3, 0x0f- 0); /* PCIRQ3 */ 42 { 0, BCR_ILCRE, 3, 0x0f- 0 }, /* PCIRQ3 */
48 make_ipr_irq(11, BCR_ILCRE, 2, 0x0f-11); /* PCIRQ2 */ 43 { 11, BCR_ILCRE, 2, 0x0f-11 }, /* PCIRQ2 */
49 make_ipr_irq( 9, BCR_ILCRE, 1, 0x0f- 9); /* PCIRQ1 */ 44 { 9, BCR_ILCRE, 1, 0x0f- 9 }, /* PCIRQ1 */
50 make_ipr_irq( 7, BCR_ILCRE, 0, 0x0f- 7); /* PCIRQ0 */ 45 { 7, BCR_ILCRE, 0, 0x0f- 7 }, /* PCIRQ0 */
51 46
52 /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */ 47 /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
53 /* NOTE: #2 and #13 are not used on PC */ 48 /* NOTE: #2 and #13 are not used on PC */
54 make_ipr_irq(13, BCR_ILCRG, 1, 0x0f-13); /* SLOTIRQ2 */ 49 { 13, BCR_ILCRG, 1, 0x0f-13 }, /* SLOTIRQ2 */
55 make_ipr_irq( 2, BCR_ILCRG, 0, 0x0f- 2); /* SLOTIRQ1 */ 50 { 2, BCR_ILCRG, 0, 0x0f- 2 }, /* SLOTIRQ1 */
56
57#elif defined(CONFIG_SH_7751_SOLUTION_ENGINE) 51#elif defined(CONFIG_SH_7751_SOLUTION_ENGINE)
58 52 { 13, BCR_ILCRD, 3, 2 },
59 make_ipr_irq(13, BCR_ILCRD, 3, 2); 53 /* Add additional entries here as drivers are added and tested. */
60
61 /* Add additional calls to make_ipr_irq() as drivers are added
62 * and tested.
63 */
64#endif 54#endif
55};
65 56
57/*
58 * Initialize IRQ setting
59 */
60void __init init_7751se_IRQ(void)
61{
62 make_ipr_irq(se7751_ipr_map, ARRAY_SIZE(se7751_ipr_map));
66} 63}
diff --git a/arch/sh/boards/sh03/setup.c b/arch/sh/boards/sh03/setup.c
index 137e2ba9243e..5ad1e19771be 100644
--- a/arch/sh/boards/sh03/setup.c
+++ b/arch/sh/boards/sh03/setup.c
@@ -14,14 +14,17 @@
14#include <asm/sh03/sh03.h> 14#include <asm/sh03/sh03.h>
15#include <asm/addrspace.h> 15#include <asm/addrspace.h>
16 16
17static struct ipr_data sh03_ipr_map[] = {
18 { IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY },
19 { IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY },
20 { IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY },
21 { IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY },
22};
23
17static void __init init_sh03_IRQ(void) 24static void __init init_sh03_IRQ(void)
18{ 25{
19 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 26 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
20 27 make_ipr_irq(sh03_ipr_map, ARRAY_SIZE(sh03_ipr_map));
21 make_ipr_irq(IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY);
22 make_ipr_irq(IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY);
23 make_ipr_irq(IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY);
24 make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY);
25} 28}
26 29
27extern void *cf_io_base; 30extern void *cf_io_base;
diff --git a/arch/sh/boards/snapgear/setup.c b/arch/sh/boards/snapgear/setup.c
index 540d0bf16446..650fb3645947 100644
--- a/arch/sh/boards/snapgear/setup.c
+++ b/arch/sh/boards/snapgear/setup.c
@@ -68,6 +68,13 @@ module_init(eraseconfig_init);
68 * IRL3 = crypto 68 * IRL3 = crypto
69 */ 69 */
70 70
71static struct ipr_data snapgear_ipr_map[] = {
72 make_ipr_irq(IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY);
73 make_ipr_irq(IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY);
74 make_ipr_irq(IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY);
75 make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY);
76};
77
71static void __init init_snapgear_IRQ(void) 78static void __init init_snapgear_IRQ(void)
72{ 79{
73 /* enable individual interrupt mode for externals */ 80 /* enable individual interrupt mode for externals */
@@ -75,10 +82,7 @@ static void __init init_snapgear_IRQ(void)
75 82
76 printk("Setup SnapGear IRQ/IPR ...\n"); 83 printk("Setup SnapGear IRQ/IPR ...\n");
77 84
78 make_ipr_irq(IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY); 85 make_ipr_irq(snapgear_ipr_map, ARRAY_SIZE(snapgear_ipr_map));
79 make_ipr_irq(IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY);
80 make_ipr_irq(IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY);
81 make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY);
82} 86}
83 87
84/* 88/*
diff --git a/arch/sh/boards/titan/setup.c b/arch/sh/boards/titan/setup.c
index 52b66d8b8d2a..a6046d93758b 100644
--- a/arch/sh/boards/titan/setup.c
+++ b/arch/sh/boards/titan/setup.c
@@ -9,15 +9,19 @@
9 9
10extern void __init pcibios_init_platform(void); 10extern void __init pcibios_init_platform(void);
11 11
12static struct ipr_data titan_ipr_map[] = {
13 { TITAN_IRQ_WAN, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY },
14 { TITAN_IRQ_LAN, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY },
15 { TITAN_IRQ_MPCIA, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY },
16 { TITAN_IRQ_USB, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY },
17};
18
12static void __init init_titan_irq(void) 19static void __init init_titan_irq(void)
13{ 20{
14 /* enable individual interrupt mode for externals */ 21 /* enable individual interrupt mode for externals */
15 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 22 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
16 23
17 make_ipr_irq( TITAN_IRQ_WAN, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY); /* PCIRQ0 */ 24 make_ipr_irq(titan_ipr_map, ARRAY_SIZE(titan_ipr_map));
18 make_ipr_irq( TITAN_IRQ_LAN, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY); /* PCIRQ1 */
19 make_ipr_irq( TITAN_IRQ_MPCIA, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY); /* PCIRQ2 */
20 make_ipr_irq( TITAN_IRQ_USB, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY); /* PCIRQ3 */
21} 25}
22 26
23struct sh_machine_vector mv_titan __initmv = { 27struct sh_machine_vector mv_titan __initmv = {
diff --git a/arch/sh/configs/r7780rp_defconfig b/arch/sh/configs/r7780rp_defconfig
index 2470364948e7..34e2046c3213 100644
--- a/arch/sh/configs/r7780rp_defconfig
+++ b/arch/sh/configs/r7780rp_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18 3# Linux kernel version: 2.6.19-rc3
4# Tue Oct 3 11:32:47 2006 4# Tue Oct 31 12:32:06 2006
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
@@ -10,6 +10,7 @@ CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_HARDIRQS=y 10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_GENERIC_IRQ_PROBE=y 11CONFIG_GENERIC_IRQ_PROBE=y
12CONFIG_GENERIC_CALIBRATE_DELAY=y 12CONFIG_GENERIC_CALIBRATE_DELAY=y
13# CONFIG_GENERIC_TIME is not set
13CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 14CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
14 15
15# 16#
@@ -178,7 +179,7 @@ CONFIG_MMU=y
178CONFIG_PAGE_OFFSET=0x80000000 179CONFIG_PAGE_OFFSET=0x80000000
179CONFIG_MEMORY_START=0x08000000 180CONFIG_MEMORY_START=0x08000000
180CONFIG_MEMORY_SIZE=0x08000000 181CONFIG_MEMORY_SIZE=0x08000000
181CONFIG_32BIT=y 182# CONFIG_32BIT is not set
182CONFIG_VSYSCALL=y 183CONFIG_VSYSCALL=y
183CONFIG_HUGETLB_PAGE_SIZE_64K=y 184CONFIG_HUGETLB_PAGE_SIZE_64K=y
184# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set 185# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
@@ -229,9 +230,7 @@ CONFIG_SH_PCLK_FREQ=32000000
229# 230#
230# DMA support 231# DMA support
231# 232#
232CONFIG_SH_DMA=y 233# CONFIG_SH_DMA is not set
233CONFIG_NR_ONCHIP_DMA_CHANNELS=6
234# CONFIG_NR_DMA_CHANNELS_BOOL is not set
235 234
236# 235#
237# Companion Chips 236# Companion Chips
@@ -259,7 +258,7 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
259CONFIG_BOOT_LINK_OFFSET=0x00800000 258CONFIG_BOOT_LINK_OFFSET=0x00800000
260# CONFIG_UBC_WAKEUP is not set 259# CONFIG_UBC_WAKEUP is not set
261CONFIG_CMDLINE_BOOL=y 260CONFIG_CMDLINE_BOOL=y
262CONFIG_CMDLINE="mem=128M console=ttySC0,115200 root=/dev/hda1" 261CONFIG_CMDLINE="mem=128M console=ttySC0,115200 root=/dev/sda1"
263 262
264# 263#
265# Bus options 264# Bus options
@@ -336,6 +335,7 @@ CONFIG_IP_PNP_DHCP=y
336# CONFIG_INET_TUNNEL is not set 335# CONFIG_INET_TUNNEL is not set
337CONFIG_INET_XFRM_MODE_TRANSPORT=y 336CONFIG_INET_XFRM_MODE_TRANSPORT=y
338CONFIG_INET_XFRM_MODE_TUNNEL=y 337CONFIG_INET_XFRM_MODE_TUNNEL=y
338CONFIG_INET_XFRM_MODE_BEET=y
339CONFIG_INET_DIAG=y 339CONFIG_INET_DIAG=y
340CONFIG_INET_TCP_DIAG=y 340CONFIG_INET_TCP_DIAG=y
341# CONFIG_TCP_CONG_ADVANCED is not set 341# CONFIG_TCP_CONG_ADVANCED is not set
@@ -441,76 +441,28 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
441# CONFIG_ATA_OVER_ETH is not set 441# CONFIG_ATA_OVER_ETH is not set
442 442
443# 443#
444# Misc devices
445#
446# CONFIG_SGI_IOC4 is not set
447# CONFIG_TIFM_CORE is not set
448
449#
444# ATA/ATAPI/MFM/RLL support 450# ATA/ATAPI/MFM/RLL support
445# 451#
446CONFIG_IDE=m 452# CONFIG_IDE is not set
447CONFIG_IDE_MAX_HWIFS=4
448CONFIG_BLK_DEV_IDE=m
449
450#
451# Please see Documentation/ide.txt for help/info on IDE drives
452#
453CONFIG_BLK_DEV_IDE_SATA=y
454CONFIG_BLK_DEV_IDEDISK=m
455CONFIG_IDEDISK_MULTI_MODE=y
456# CONFIG_BLK_DEV_IDECD is not set
457# CONFIG_BLK_DEV_IDETAPE is not set
458# CONFIG_BLK_DEV_IDEFLOPPY is not set
459CONFIG_BLK_DEV_IDESCSI=m
460# CONFIG_IDE_TASK_IOCTL is not set
461
462#
463# IDE chipset support/bugfixes
464#
465CONFIG_IDE_GENERIC=m
466CONFIG_BLK_DEV_IDEPCI=y
467CONFIG_IDEPCI_SHARE_IRQ=y
468# CONFIG_BLK_DEV_OFFBOARD is not set
469CONFIG_BLK_DEV_GENERIC=m
470# CONFIG_BLK_DEV_OPTI621 is not set
471CONFIG_BLK_DEV_IDEDMA_PCI=y
472# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
473CONFIG_IDEDMA_PCI_AUTO=y
474# CONFIG_IDEDMA_ONLYDISK is not set
475CONFIG_BLK_DEV_AEC62XX=m
476# CONFIG_BLK_DEV_ALI15X3 is not set
477# CONFIG_BLK_DEV_AMD74XX is not set
478# CONFIG_BLK_DEV_CMD64X is not set
479# CONFIG_BLK_DEV_TRIFLEX is not set
480# CONFIG_BLK_DEV_CY82C693 is not set
481# CONFIG_BLK_DEV_CS5520 is not set
482# CONFIG_BLK_DEV_CS5530 is not set
483# CONFIG_BLK_DEV_HPT34X is not set
484# CONFIG_BLK_DEV_HPT366 is not set
485# CONFIG_BLK_DEV_SC1200 is not set
486# CONFIG_BLK_DEV_PIIX is not set
487# CONFIG_BLK_DEV_IT821X is not set
488# CONFIG_BLK_DEV_NS87415 is not set
489# CONFIG_BLK_DEV_PDC202XX_OLD is not set
490CONFIG_BLK_DEV_PDC202XX_NEW=m
491# CONFIG_BLK_DEV_SVWKS is not set
492CONFIG_BLK_DEV_SIIMAGE=m
493# CONFIG_BLK_DEV_SLC90E66 is not set
494# CONFIG_BLK_DEV_TRM290 is not set
495# CONFIG_BLK_DEV_VIA82CXXX is not set
496# CONFIG_IDE_ARM is not set
497CONFIG_BLK_DEV_IDEDMA=y
498# CONFIG_IDEDMA_IVB is not set
499CONFIG_IDEDMA_AUTO=y
500# CONFIG_BLK_DEV_HD is not set
501 453
502# 454#
503# SCSI device support 455# SCSI device support
504# 456#
505# CONFIG_RAID_ATTRS is not set 457# CONFIG_RAID_ATTRS is not set
506CONFIG_SCSI=m 458CONFIG_SCSI=y
507# CONFIG_SCSI_NETLINK is not set 459# CONFIG_SCSI_NETLINK is not set
508CONFIG_SCSI_PROC_FS=y 460CONFIG_SCSI_PROC_FS=y
509 461
510# 462#
511# SCSI support type (disk, tape, CD-ROM) 463# SCSI support type (disk, tape, CD-ROM)
512# 464#
513CONFIG_BLK_DEV_SD=m 465CONFIG_BLK_DEV_SD=y
514# CONFIG_CHR_DEV_ST is not set 466# CONFIG_CHR_DEV_ST is not set
515# CONFIG_CHR_DEV_OSST is not set 467# CONFIG_CHR_DEV_OSST is not set
516# CONFIG_BLK_DEV_SR is not set 468# CONFIG_BLK_DEV_SR is not set
@@ -561,6 +513,7 @@ CONFIG_CHR_DEV_SG=m
561# CONFIG_SCSI_IPR is not set 513# CONFIG_SCSI_IPR is not set
562# CONFIG_SCSI_QLOGIC_1280 is not set 514# CONFIG_SCSI_QLOGIC_1280 is not set
563# CONFIG_SCSI_QLA_FC is not set 515# CONFIG_SCSI_QLA_FC is not set
516# CONFIG_SCSI_QLA_ISCSI is not set
564# CONFIG_SCSI_LPFC is not set 517# CONFIG_SCSI_LPFC is not set
565# CONFIG_SCSI_DC395x is not set 518# CONFIG_SCSI_DC395x is not set
566# CONFIG_SCSI_DC390T is not set 519# CONFIG_SCSI_DC390T is not set
@@ -570,7 +523,55 @@ CONFIG_CHR_DEV_SG=m
570# 523#
571# Serial ATA (prod) and Parallel ATA (experimental) drivers 524# Serial ATA (prod) and Parallel ATA (experimental) drivers
572# 525#
573# CONFIG_ATA is not set 526CONFIG_ATA=y
527# CONFIG_SATA_AHCI is not set
528# CONFIG_SATA_SVW is not set
529# CONFIG_ATA_PIIX is not set
530# CONFIG_SATA_MV is not set
531# CONFIG_SATA_NV is not set
532# CONFIG_PDC_ADMA is not set
533# CONFIG_SATA_QSTOR is not set
534# CONFIG_SATA_PROMISE is not set
535# CONFIG_SATA_SX4 is not set
536CONFIG_SATA_SIL=y
537# CONFIG_SATA_SIL24 is not set
538# CONFIG_SATA_SIS is not set
539# CONFIG_SATA_ULI is not set
540# CONFIG_SATA_VIA is not set
541# CONFIG_SATA_VITESSE is not set
542# CONFIG_PATA_ALI is not set
543# CONFIG_PATA_AMD is not set
544# CONFIG_PATA_ARTOP is not set
545# CONFIG_PATA_ATIIXP is not set
546# CONFIG_PATA_CMD64X is not set
547# CONFIG_PATA_CS5520 is not set
548# CONFIG_PATA_CS5530 is not set
549# CONFIG_PATA_CYPRESS is not set
550# CONFIG_PATA_EFAR is not set
551# CONFIG_ATA_GENERIC is not set
552# CONFIG_PATA_HPT366 is not set
553# CONFIG_PATA_HPT37X is not set
554# CONFIG_PATA_HPT3X2N is not set
555# CONFIG_PATA_HPT3X3 is not set
556# CONFIG_PATA_IT821X is not set
557# CONFIG_PATA_JMICRON is not set
558# CONFIG_PATA_TRIFLEX is not set
559# CONFIG_PATA_MPIIX is not set
560# CONFIG_PATA_OLDPIIX is not set
561# CONFIG_PATA_NETCELL is not set
562# CONFIG_PATA_NS87410 is not set
563# CONFIG_PATA_OPTI is not set
564# CONFIG_PATA_OPTIDMA is not set
565# CONFIG_PATA_PDC_OLD is not set
566# CONFIG_PATA_RADISYS is not set
567# CONFIG_PATA_RZ1000 is not set
568# CONFIG_PATA_SC1200 is not set
569# CONFIG_PATA_SERVERWORKS is not set
570# CONFIG_PATA_PDC2027X is not set
571# CONFIG_PATA_SIL680 is not set
572# CONFIG_PATA_SIS is not set
573# CONFIG_PATA_VIA is not set
574# CONFIG_PATA_WINBOND is not set
574 575
575# 576#
576# Multi-device support (RAID and LVM) 577# Multi-device support (RAID and LVM)
@@ -840,7 +841,6 @@ CONFIG_HW_RANDOM=y
840# TPM devices 841# TPM devices
841# 842#
842# CONFIG_TCG_TPM is not set 843# CONFIG_TCG_TPM is not set
843# CONFIG_TELCLOCK is not set
844 844
845# 845#
846# I2C support 846# I2C support
@@ -856,6 +856,7 @@ CONFIG_HW_RANDOM=y
856# 856#
857# Dallas's 1-wire bus 857# Dallas's 1-wire bus
858# 858#
859# CONFIG_W1 is not set
859 860
860# 861#
861# Hardware Monitoring support 862# Hardware Monitoring support
@@ -868,14 +869,9 @@ CONFIG_HWMON=y
868# CONFIG_HWMON_DEBUG_CHIP is not set 869# CONFIG_HWMON_DEBUG_CHIP is not set
869 870
870# 871#
871# Misc devices
872#
873
874#
875# Multimedia devices 872# Multimedia devices
876# 873#
877# CONFIG_VIDEO_DEV is not set 874# CONFIG_VIDEO_DEV is not set
878CONFIG_VIDEO_V4L2=y
879 875
880# 876#
881# Digital Video Broadcasting Devices 877# Digital Video Broadcasting Devices
@@ -959,7 +955,29 @@ CONFIG_USB_ARCH_HAS_EHCI=y
959# 955#
960# Real Time Clock 956# Real Time Clock
961# 957#
962# CONFIG_RTC_CLASS is not set 958CONFIG_RTC_LIB=y
959CONFIG_RTC_CLASS=y
960CONFIG_RTC_HCTOSYS=y
961CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
962# CONFIG_RTC_DEBUG is not set
963
964#
965# RTC interfaces
966#
967CONFIG_RTC_INTF_SYSFS=y
968CONFIG_RTC_INTF_PROC=y
969CONFIG_RTC_INTF_DEV=y
970# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
971
972#
973# RTC drivers
974#
975# CONFIG_RTC_DRV_DS1553 is not set
976# CONFIG_RTC_DRV_DS1742 is not set
977# CONFIG_RTC_DRV_M48T86 is not set
978CONFIG_RTC_DRV_SH=y
979# CONFIG_RTC_DRV_TEST is not set
980# CONFIG_RTC_DRV_V3020 is not set
963 981
964# 982#
965# DMA Engine support 983# DMA Engine support
@@ -984,6 +1002,7 @@ CONFIG_EXT3_FS=y
984CONFIG_EXT3_FS_XATTR=y 1002CONFIG_EXT3_FS_XATTR=y
985# CONFIG_EXT3_FS_POSIX_ACL is not set 1003# CONFIG_EXT3_FS_POSIX_ACL is not set
986# CONFIG_EXT3_FS_SECURITY is not set 1004# CONFIG_EXT3_FS_SECURITY is not set
1005# CONFIG_EXT4DEV_FS is not set
987CONFIG_JBD=y 1006CONFIG_JBD=y
988# CONFIG_JBD_DEBUG is not set 1007# CONFIG_JBD_DEBUG is not set
989CONFIG_FS_MBCACHE=y 1008CONFIG_FS_MBCACHE=y
@@ -991,6 +1010,7 @@ CONFIG_FS_MBCACHE=y
991# CONFIG_JFS_FS is not set 1010# CONFIG_JFS_FS is not set
992CONFIG_FS_POSIX_ACL=y 1011CONFIG_FS_POSIX_ACL=y
993# CONFIG_XFS_FS is not set 1012# CONFIG_XFS_FS is not set
1013# CONFIG_GFS2_FS is not set
994# CONFIG_OCFS2_FS is not set 1014# CONFIG_OCFS2_FS is not set
995CONFIG_MINIX_FS=y 1015CONFIG_MINIX_FS=y
996# CONFIG_ROMFS_FS is not set 1016# CONFIG_ROMFS_FS is not set
@@ -1027,7 +1047,8 @@ CONFIG_PROC_FS=y
1027CONFIG_PROC_KCORE=y 1047CONFIG_PROC_KCORE=y
1028CONFIG_PROC_SYSCTL=y 1048CONFIG_PROC_SYSCTL=y
1029CONFIG_SYSFS=y 1049CONFIG_SYSFS=y
1030# CONFIG_TMPFS is not set 1050CONFIG_TMPFS=y
1051# CONFIG_TMPFS_POSIX_ACL is not set
1031CONFIG_HUGETLBFS=y 1052CONFIG_HUGETLBFS=y
1032CONFIG_HUGETLB_PAGE=y 1053CONFIG_HUGETLB_PAGE=y
1033CONFIG_RAMFS=y 1054CONFIG_RAMFS=y
@@ -1159,6 +1180,7 @@ CONFIG_DEBUG_FS=y
1159# CONFIG_DEBUG_LIST is not set 1180# CONFIG_DEBUG_LIST is not set
1160CONFIG_FRAME_POINTER=y 1181CONFIG_FRAME_POINTER=y
1161CONFIG_FORCED_INLINING=y 1182CONFIG_FORCED_INLINING=y
1183# CONFIG_HEADERS_CHECK is not set
1162# CONFIG_RCU_TORTURE_TEST is not set 1184# CONFIG_RCU_TORTURE_TEST is not set
1163# CONFIG_SH_STANDARD_BIOS is not set 1185# CONFIG_SH_STANDARD_BIOS is not set
1164# CONFIG_EARLY_SCIF_CONSOLE is not set 1186# CONFIG_EARLY_SCIF_CONSOLE is not set
@@ -1178,9 +1200,9 @@ CONFIG_FORCED_INLINING=y
1178# 1200#
1179CONFIG_CRYPTO=y 1201CONFIG_CRYPTO=y
1180CONFIG_CRYPTO_ALGAPI=y 1202CONFIG_CRYPTO_ALGAPI=y
1181CONFIG_CRYPTO_BLKCIPHER=m 1203CONFIG_CRYPTO_BLKCIPHER=y
1182CONFIG_CRYPTO_HASH=y 1204CONFIG_CRYPTO_HASH=y
1183CONFIG_CRYPTO_MANAGER=m 1205CONFIG_CRYPTO_MANAGER=y
1184CONFIG_CRYPTO_HMAC=y 1206CONFIG_CRYPTO_HMAC=y
1185# CONFIG_CRYPTO_NULL is not set 1207# CONFIG_CRYPTO_NULL is not set
1186# CONFIG_CRYPTO_MD4 is not set 1208# CONFIG_CRYPTO_MD4 is not set
@@ -1191,7 +1213,7 @@ CONFIG_CRYPTO_MD5=y
1191# CONFIG_CRYPTO_WP512 is not set 1213# CONFIG_CRYPTO_WP512 is not set
1192# CONFIG_CRYPTO_TGR192 is not set 1214# CONFIG_CRYPTO_TGR192 is not set
1193CONFIG_CRYPTO_ECB=m 1215CONFIG_CRYPTO_ECB=m
1194CONFIG_CRYPTO_CBC=m 1216CONFIG_CRYPTO_CBC=y
1195CONFIG_CRYPTO_DES=y 1217CONFIG_CRYPTO_DES=y
1196# CONFIG_CRYPTO_BLOWFISH is not set 1218# CONFIG_CRYPTO_BLOWFISH is not set
1197# CONFIG_CRYPTO_TWOFISH is not set 1219# CONFIG_CRYPTO_TWOFISH is not set
diff --git a/arch/sh/configs/titan_defconfig b/arch/sh/configs/titan_defconfig
index 5e8175461138..41049cf14b79 100644
--- a/arch/sh/configs/titan_defconfig
+++ b/arch/sh/configs/titan_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18 3# Linux kernel version: 2.6.19-rc3
4# Tue Oct 3 12:59:14 2006 4# Mon Oct 30 18:04:49 2006
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 7CONFIG_RWSEM_GENERIC_SPINLOCK=y
@@ -10,6 +10,7 @@ CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_HARDIRQS=y 10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_GENERIC_IRQ_PROBE=y 11CONFIG_GENERIC_IRQ_PROBE=y
12CONFIG_GENERIC_CALIBRATE_DELAY=y 12CONFIG_GENERIC_CALIBRATE_DELAY=y
13# CONFIG_GENERIC_TIME is not set
13CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 14CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
14 15
15# 16#
@@ -23,7 +24,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
23# General setup 24# General setup
24# 25#
25CONFIG_LOCALVERSION="" 26CONFIG_LOCALVERSION=""
26CONFIG_LOCALVERSION_AUTO=y 27# CONFIG_LOCALVERSION_AUTO is not set
27CONFIG_SWAP=y 28CONFIG_SWAP=y
28CONFIG_SYSVIPC=y 29CONFIG_SYSVIPC=y
29# CONFIG_IPC_NS is not set 30# CONFIG_IPC_NS is not set
@@ -236,8 +237,8 @@ CONFIG_HZ_250=y
236CONFIG_HZ=250 237CONFIG_HZ=250
237# CONFIG_KEXEC is not set 238# CONFIG_KEXEC is not set
238# CONFIG_SMP is not set 239# CONFIG_SMP is not set
239CONFIG_PREEMPT_NONE=y 240# CONFIG_PREEMPT_NONE is not set
240# CONFIG_PREEMPT_VOLUNTARY is not set 241CONFIG_PREEMPT_VOLUNTARY=y
241# CONFIG_PREEMPT is not set 242# CONFIG_PREEMPT is not set
242 243
243# 244#
@@ -247,7 +248,7 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
247CONFIG_BOOT_LINK_OFFSET=0x009e0000 248CONFIG_BOOT_LINK_OFFSET=0x009e0000
248# CONFIG_UBC_WAKEUP is not set 249# CONFIG_UBC_WAKEUP is not set
249CONFIG_CMDLINE_BOOL=y 250CONFIG_CMDLINE_BOOL=y
250CONFIG_CMDLINE="console=ttySC1,38400N81 root=/dev/nfs ip=:::::eth1:autoconf" 251CONFIG_CMDLINE="console=ttySC1,38400N81 root=/dev/nfs ip=:::::eth1:autoconf rw"
251 252
252# 253#
253# Bus options 254# Bus options
@@ -334,6 +335,7 @@ CONFIG_INET_XFRM_TUNNEL=y
334CONFIG_INET_TUNNEL=y 335CONFIG_INET_TUNNEL=y
335CONFIG_INET_XFRM_MODE_TRANSPORT=y 336CONFIG_INET_XFRM_MODE_TRANSPORT=y
336CONFIG_INET_XFRM_MODE_TUNNEL=y 337CONFIG_INET_XFRM_MODE_TUNNEL=y
338CONFIG_INET_XFRM_MODE_BEET=y
337CONFIG_INET_DIAG=m 339CONFIG_INET_DIAG=m
338CONFIG_INET_TCP_DIAG=m 340CONFIG_INET_TCP_DIAG=m
339# CONFIG_TCP_CONG_ADVANCED is not set 341# CONFIG_TCP_CONG_ADVANCED is not set
@@ -355,9 +357,10 @@ CONFIG_INET6_XFRM_TUNNEL=y
355CONFIG_INET6_TUNNEL=y 357CONFIG_INET6_TUNNEL=y
356CONFIG_INET6_XFRM_MODE_TRANSPORT=y 358CONFIG_INET6_XFRM_MODE_TRANSPORT=y
357CONFIG_INET6_XFRM_MODE_TUNNEL=y 359CONFIG_INET6_XFRM_MODE_TUNNEL=y
360CONFIG_INET6_XFRM_MODE_BEET=y
358# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set 361# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
362CONFIG_IPV6_SIT=m
359CONFIG_IPV6_TUNNEL=y 363CONFIG_IPV6_TUNNEL=y
360# CONFIG_IPV6_SUBTREES is not set
361# CONFIG_IPV6_MULTIPLE_TABLES is not set 364# CONFIG_IPV6_MULTIPLE_TABLES is not set
362# CONFIG_NETWORK_SECMARK is not set 365# CONFIG_NETWORK_SECMARK is not set
363CONFIG_NETFILTER=y 366CONFIG_NETFILTER=y
@@ -714,6 +717,12 @@ CONFIG_BLK_DEV_INITRD=y
714CONFIG_ATA_OVER_ETH=m 717CONFIG_ATA_OVER_ETH=m
715 718
716# 719#
720# Misc devices
721#
722# CONFIG_SGI_IOC4 is not set
723# CONFIG_TIFM_CORE is not set
724
725#
717# ATA/ATAPI/MFM/RLL support 726# ATA/ATAPI/MFM/RLL support
718# 727#
719# CONFIG_IDE is not set 728# CONFIG_IDE is not set
@@ -778,9 +787,9 @@ CONFIG_CHR_DEV_SG=m
778# CONFIG_SCSI_INIA100 is not set 787# CONFIG_SCSI_INIA100 is not set
779# CONFIG_SCSI_STEX is not set 788# CONFIG_SCSI_STEX is not set
780# CONFIG_SCSI_SYM53C8XX_2 is not set 789# CONFIG_SCSI_SYM53C8XX_2 is not set
781# CONFIG_SCSI_IPR is not set
782# CONFIG_SCSI_QLOGIC_1280 is not set 790# CONFIG_SCSI_QLOGIC_1280 is not set
783# CONFIG_SCSI_QLA_FC is not set 791# CONFIG_SCSI_QLA_FC is not set
792# CONFIG_SCSI_QLA_ISCSI is not set
784# CONFIG_SCSI_LPFC is not set 793# CONFIG_SCSI_LPFC is not set
785# CONFIG_SCSI_DC395x is not set 794# CONFIG_SCSI_DC395x is not set
786# CONFIG_SCSI_DC390T is not set 795# CONFIG_SCSI_DC390T is not set
@@ -1095,7 +1104,6 @@ CONFIG_HW_RANDOM=y
1095# TPM devices 1104# TPM devices
1096# 1105#
1097# CONFIG_TCG_TPM is not set 1106# CONFIG_TCG_TPM is not set
1098# CONFIG_TELCLOCK is not set
1099 1107
1100# 1108#
1101# I2C support 1109# I2C support
@@ -1124,14 +1132,9 @@ CONFIG_HWMON=y
1124# CONFIG_HWMON_DEBUG_CHIP is not set 1132# CONFIG_HWMON_DEBUG_CHIP is not set
1125 1133
1126# 1134#
1127# Misc devices
1128#
1129
1130#
1131# Multimedia devices 1135# Multimedia devices
1132# 1136#
1133# CONFIG_VIDEO_DEV is not set 1137# CONFIG_VIDEO_DEV is not set
1134CONFIG_VIDEO_V4L2=y
1135 1138
1136# 1139#
1137# Digital Video Broadcasting Devices 1140# Digital Video Broadcasting Devices
@@ -1177,9 +1180,9 @@ CONFIG_USB_DEVICEFS=y
1177# USB Host Controller Drivers 1180# USB Host Controller Drivers
1178# 1181#
1179CONFIG_USB_EHCI_HCD=y 1182CONFIG_USB_EHCI_HCD=y
1180# CONFIG_USB_EHCI_SPLIT_ISO is not set 1183CONFIG_USB_EHCI_SPLIT_ISO=y
1181# CONFIG_USB_EHCI_ROOT_HUB_TT is not set 1184CONFIG_USB_EHCI_ROOT_HUB_TT=y
1182# CONFIG_USB_EHCI_TT_NEWSCHED is not set 1185CONFIG_USB_EHCI_TT_NEWSCHED=y
1183# CONFIG_USB_ISP116X_HCD is not set 1186# CONFIG_USB_ISP116X_HCD is not set
1184CONFIG_USB_OHCI_HCD=y 1187CONFIG_USB_OHCI_HCD=y
1185# CONFIG_USB_OHCI_BIG_ENDIAN is not set 1188# CONFIG_USB_OHCI_BIG_ENDIAN is not set
@@ -1235,7 +1238,6 @@ CONFIG_USB_STORAGE=y
1235# CONFIG_USB_ATI_REMOTE2 is not set 1238# CONFIG_USB_ATI_REMOTE2 is not set
1236# CONFIG_USB_KEYSPAN_REMOTE is not set 1239# CONFIG_USB_KEYSPAN_REMOTE is not set
1237# CONFIG_USB_APPLETOUCH is not set 1240# CONFIG_USB_APPLETOUCH is not set
1238# CONFIG_USB_TRANCEVIBRATOR is not set
1239 1241
1240# 1242#
1241# USB Imaging devices 1243# USB Imaging devices
@@ -1246,11 +1248,20 @@ CONFIG_USB_STORAGE=y
1246# 1248#
1247# USB Network Adapters 1249# USB Network Adapters
1248# 1250#
1249# CONFIG_USB_CATC is not set 1251CONFIG_USB_CATC=m
1250# CONFIG_USB_KAWETH is not set 1252CONFIG_USB_KAWETH=m
1251# CONFIG_USB_PEGASUS is not set 1253CONFIG_USB_PEGASUS=m
1252# CONFIG_USB_RTL8150 is not set 1254CONFIG_USB_RTL8150=m
1253# CONFIG_USB_USBNET is not set 1255CONFIG_USB_USBNET=m
1256CONFIG_USB_NET_AX8817X=m
1257CONFIG_USB_NET_CDCETHER=m
1258# CONFIG_USB_NET_GL620A is not set
1259CONFIG_USB_NET_NET1080=m
1260CONFIG_USB_NET_PLUSB=m
1261# CONFIG_USB_NET_MCS7830 is not set
1262# CONFIG_USB_NET_RNDIS_HOST is not set
1263# CONFIG_USB_NET_CDC_SUBSET is not set
1264CONFIG_USB_NET_ZAURUS=m
1254CONFIG_USB_MON=y 1265CONFIG_USB_MON=y
1255 1266
1256# 1267#
@@ -1285,6 +1296,7 @@ CONFIG_USB_SERIAL_ARK3116=m
1285# CONFIG_USB_SERIAL_KLSI is not set 1296# CONFIG_USB_SERIAL_KLSI is not set
1286# CONFIG_USB_SERIAL_KOBIL_SCT is not set 1297# CONFIG_USB_SERIAL_KOBIL_SCT is not set
1287# CONFIG_USB_SERIAL_MCT_U232 is not set 1298# CONFIG_USB_SERIAL_MCT_U232 is not set
1299# CONFIG_USB_SERIAL_MOS7720 is not set
1288# CONFIG_USB_SERIAL_MOS7840 is not set 1300# CONFIG_USB_SERIAL_MOS7840 is not set
1289# CONFIG_USB_SERIAL_NAVMAN is not set 1301# CONFIG_USB_SERIAL_NAVMAN is not set
1290CONFIG_USB_SERIAL_PL2303=m 1302CONFIG_USB_SERIAL_PL2303=m
@@ -1316,6 +1328,7 @@ CONFIG_USB_SERIAL_PL2303=m
1316# CONFIG_USB_APPLEDISPLAY is not set 1328# CONFIG_USB_APPLEDISPLAY is not set
1317# CONFIG_USB_SISUSBVGA is not set 1329# CONFIG_USB_SISUSBVGA is not set
1318# CONFIG_USB_LD is not set 1330# CONFIG_USB_LD is not set
1331# CONFIG_USB_TRANCEVIBRATOR is not set
1319# CONFIG_USB_TEST is not set 1332# CONFIG_USB_TEST is not set
1320 1333
1321# 1334#
@@ -1357,7 +1370,26 @@ CONFIG_USB_SERIAL_PL2303=m
1357# 1370#
1358# Real Time Clock 1371# Real Time Clock
1359# 1372#
1360# CONFIG_RTC_CLASS is not set 1373CONFIG_RTC_LIB=m
1374CONFIG_RTC_CLASS=m
1375
1376#
1377# RTC interfaces
1378#
1379CONFIG_RTC_INTF_SYSFS=m
1380CONFIG_RTC_INTF_PROC=m
1381CONFIG_RTC_INTF_DEV=m
1382# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1383
1384#
1385# RTC drivers
1386#
1387# CONFIG_RTC_DRV_DS1553 is not set
1388# CONFIG_RTC_DRV_DS1742 is not set
1389# CONFIG_RTC_DRV_M48T86 is not set
1390CONFIG_RTC_DRV_SH=m
1391# CONFIG_RTC_DRV_TEST is not set
1392# CONFIG_RTC_DRV_V3020 is not set
1361 1393
1362# 1394#
1363# DMA Engine support 1395# DMA Engine support
@@ -1380,8 +1412,12 @@ CONFIG_EXT2_FS=y
1380# CONFIG_EXT2_FS_XIP is not set 1412# CONFIG_EXT2_FS_XIP is not set
1381CONFIG_EXT3_FS=y 1413CONFIG_EXT3_FS=y
1382# CONFIG_EXT3_FS_XATTR is not set 1414# CONFIG_EXT3_FS_XATTR is not set
1415CONFIG_EXT4DEV_FS=m
1416# CONFIG_EXT4DEV_FS_XATTR is not set
1383CONFIG_JBD=y 1417CONFIG_JBD=y
1384# CONFIG_JBD_DEBUG is not set 1418# CONFIG_JBD_DEBUG is not set
1419CONFIG_JBD2=m
1420# CONFIG_JBD2_DEBUG is not set
1385CONFIG_REISERFS_FS=m 1421CONFIG_REISERFS_FS=m
1386# CONFIG_REISERFS_CHECK is not set 1422# CONFIG_REISERFS_CHECK is not set
1387# CONFIG_REISERFS_PROC_INFO is not set 1423# CONFIG_REISERFS_PROC_INFO is not set
@@ -1393,9 +1429,10 @@ CONFIG_XFS_FS=m
1393# CONFIG_XFS_SECURITY is not set 1429# CONFIG_XFS_SECURITY is not set
1394# CONFIG_XFS_POSIX_ACL is not set 1430# CONFIG_XFS_POSIX_ACL is not set
1395# CONFIG_XFS_RT is not set 1431# CONFIG_XFS_RT is not set
1432# CONFIG_GFS2_FS is not set
1396# CONFIG_OCFS2_FS is not set 1433# CONFIG_OCFS2_FS is not set
1397# CONFIG_MINIX_FS is not set 1434# CONFIG_MINIX_FS is not set
1398# CONFIG_ROMFS_FS is not set 1435CONFIG_ROMFS_FS=y
1399CONFIG_INOTIFY=y 1436CONFIG_INOTIFY=y
1400CONFIG_INOTIFY_USER=y 1437CONFIG_INOTIFY_USER=y
1401# CONFIG_QUOTA is not set 1438# CONFIG_QUOTA is not set
@@ -1480,7 +1517,12 @@ CONFIG_SUNRPC=y
1480# CONFIG_RPCSEC_GSS_SPKM3 is not set 1517# CONFIG_RPCSEC_GSS_SPKM3 is not set
1481CONFIG_SMB_FS=m 1518CONFIG_SMB_FS=m
1482# CONFIG_SMB_NLS_DEFAULT is not set 1519# CONFIG_SMB_NLS_DEFAULT is not set
1483# CONFIG_CIFS is not set 1520CONFIG_CIFS=m
1521# CONFIG_CIFS_STATS is not set
1522CONFIG_CIFS_WEAK_PW_HASH=y
1523# CONFIG_CIFS_XATTR is not set
1524# CONFIG_CIFS_DEBUG2 is not set
1525# CONFIG_CIFS_EXPERIMENTAL is not set
1484# CONFIG_NCP_FS is not set 1526# CONFIG_NCP_FS is not set
1485# CONFIG_CODA_FS is not set 1527# CONFIG_CODA_FS is not set
1486# CONFIG_AFS_FS is not set 1528# CONFIG_AFS_FS is not set
@@ -1583,9 +1625,10 @@ CONFIG_LOG_BUF_SHIFT=16
1583# CONFIG_DEBUG_LIST is not set 1625# CONFIG_DEBUG_LIST is not set
1584# CONFIG_FRAME_POINTER is not set 1626# CONFIG_FRAME_POINTER is not set
1585# CONFIG_FORCED_INLINING is not set 1627# CONFIG_FORCED_INLINING is not set
1628# CONFIG_HEADERS_CHECK is not set
1586# CONFIG_RCU_TORTURE_TEST is not set 1629# CONFIG_RCU_TORTURE_TEST is not set
1587# CONFIG_SH_STANDARD_BIOS is not set 1630# CONFIG_SH_STANDARD_BIOS is not set
1588CONFIG_EARLY_SCIF_CONSOLE=y 1631# CONFIG_EARLY_SCIF_CONSOLE is not set
1589# CONFIG_EARLY_PRINTK is not set 1632# CONFIG_EARLY_PRINTK is not set
1590# CONFIG_DEBUG_STACKOVERFLOW is not set 1633# CONFIG_DEBUG_STACKOVERFLOW is not set
1591# CONFIG_DEBUG_STACK_USAGE is not set 1634# CONFIG_DEBUG_STACK_USAGE is not set
@@ -1605,7 +1648,7 @@ CONFIG_CRYPTO=y
1605CONFIG_CRYPTO_ALGAPI=y 1648CONFIG_CRYPTO_ALGAPI=y
1606CONFIG_CRYPTO_BLKCIPHER=y 1649CONFIG_CRYPTO_BLKCIPHER=y
1607CONFIG_CRYPTO_HASH=y 1650CONFIG_CRYPTO_HASH=y
1608CONFIG_CRYPTO_MANAGER=m 1651CONFIG_CRYPTO_MANAGER=y
1609CONFIG_CRYPTO_HMAC=y 1652CONFIG_CRYPTO_HMAC=y
1610CONFIG_CRYPTO_NULL=m 1653CONFIG_CRYPTO_NULL=m
1611CONFIG_CRYPTO_MD4=m 1654CONFIG_CRYPTO_MD4=m
@@ -1615,7 +1658,7 @@ CONFIG_CRYPTO_SHA256=m
1615CONFIG_CRYPTO_SHA512=m 1658CONFIG_CRYPTO_SHA512=m
1616CONFIG_CRYPTO_WP512=m 1659CONFIG_CRYPTO_WP512=m
1617CONFIG_CRYPTO_TGR192=m 1660CONFIG_CRYPTO_TGR192=m
1618CONFIG_CRYPTO_ECB=m 1661CONFIG_CRYPTO_ECB=y
1619CONFIG_CRYPTO_CBC=y 1662CONFIG_CRYPTO_CBC=y
1620CONFIG_CRYPTO_DES=y 1663CONFIG_CRYPTO_DES=y
1621CONFIG_CRYPTO_BLOWFISH=m 1664CONFIG_CRYPTO_BLOWFISH=m
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index d8ece20bb2cf..660786013350 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -19,23 +19,34 @@
19#include <asm/io.h> 19#include <asm/io.h>
20#include "dma-sh.h" 20#include "dma-sh.h"
21 21
22static inline unsigned int get_dmte_irq(unsigned int chan)
23{
24 unsigned int irq = 0;
25 22
23
24#ifdef CONFIG_CPU_SH4
25static struct ipr_data dmae_ipr_map[] = {
26 { DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
27};
28#endif
29static struct ipr_data dmte_ipr_map[] = {
26 /* 30 /*
27 * Normally we could just do DMTE0_IRQ + chan outright, though in the 31 * Normally we could just do DMTE0_IRQ + chan outright, though in the
28 * case of the 7751R, the DMTE IRQs for channels > 4 start right above 32 * case of the 7751R, the DMTE IRQs for channels > 4 start right above
29 * the SCIF 33 * the SCIF
30 */ 34 */
31 if (chan < 4) { 35 { DMTE0_IRQ + 0, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
32 irq = DMTE0_IRQ + chan; 36 { DMTE0_IRQ + 1, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
33 } else { 37 { DMTE0_IRQ + 2, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
34#ifdef DMTE4_IRQ 38 { DMTE0_IRQ + 3, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
35 irq = DMTE4_IRQ + chan - 4; 39 { DMTE4_IRQ + 0, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
36#endif 40 { DMTE4_IRQ + 1, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
37 } 41 { DMTE4_IRQ + 2, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
42 { DMTE4_IRQ + 3, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
43};
38 44
45static inline unsigned int get_dmte_irq(unsigned int chan)
46{
47 unsigned int irq = 0;
48 if (chan < ARRAY_SIZE(dmte_ipr_map))
49 irq = dmte_ipr_map[chan].irq;
39 return irq; 50 return irq;
40} 51}
41 52
@@ -258,17 +269,16 @@ static int __init sh_dmac_init(void)
258 int i; 269 int i;
259 270
260#ifdef CONFIG_CPU_SH4 271#ifdef CONFIG_CPU_SH4
261 make_ipr_irq(DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); 272 make_ipr_irq(dmae_ipr_map, ARRAY_SIZE(dmae_ipr_map));
262 i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0); 273 i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0);
263 if (unlikely(i < 0)) 274 if (unlikely(i < 0))
264 return i; 275 return i;
265#endif 276#endif
266 277
267 for (i = 0; i < info->nr_channels; i++) { 278 i = info->nr_channels;
268 int irq = get_dmte_irq(i); 279 if (i > ARRAY_SIZE(dmte_ipr_map))
269 280 i = ARRAY_SIZE(dmte_ipr_map);
270 make_ipr_irq(irq, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); 281 make_ipr_irq(dmte_ipr_map, i);
271 }
272 282
273 /* 283 /*
274 * Initialize DMAOR, and clean up any error flags that may have 284 * Initialize DMAOR, and clean up any error flags that may have
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index f7997312ef98..a0089563cbfc 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -23,24 +23,21 @@
23#include <asm/io.h> 23#include <asm/io.h>
24#include <asm/machvec.h> 24#include <asm/machvec.h>
25 25
26struct ipr_data {
27 unsigned int addr; /* Address of Interrupt Priority Register */
28 int shift; /* Shifts of the 16-bit data */
29 int priority; /* The priority */
30};
31 26
32static void disable_ipr_irq(unsigned int irq) 27static void disable_ipr_irq(unsigned int irq)
33{ 28{
34 struct ipr_data *p = get_irq_chip_data(irq); 29 struct ipr_data *p = get_irq_chip_data(irq);
30 int shift = p->shift*4;
35 /* Set the priority in IPR to 0 */ 31 /* Set the priority in IPR to 0 */
36 ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr); 32 ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << shift)), p->addr);
37} 33}
38 34
39static void enable_ipr_irq(unsigned int irq) 35static void enable_ipr_irq(unsigned int irq)
40{ 36{
41 struct ipr_data *p = get_irq_chip_data(irq); 37 struct ipr_data *p = get_irq_chip_data(irq);
38 int shift = p->shift*4;
42 /* Set priority in IPR back to original value */ 39 /* Set priority in IPR back to original value */
43 ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr); 40 ctrl_outw(ctrl_inw(p->addr) | (p->priority << shift), p->addr);
44} 41}
45 42
46static struct irq_chip ipr_irq_chip = { 43static struct irq_chip ipr_irq_chip = {
@@ -50,67 +47,57 @@ static struct irq_chip ipr_irq_chip = {
50 .mask_ack = disable_ipr_irq, 47 .mask_ack = disable_ipr_irq,
51}; 48};
52 49
53void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority) 50void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs)
54{ 51{
55 struct ipr_data ipr_data; 52 int i;
56
57 disable_irq_nosync(irq);
58
59 ipr_data.addr = addr;
60 ipr_data.shift = pos*4; /* POSition (0-3) x 4 means shift */
61 ipr_data.priority = priority;
62 53
63 set_irq_chip_and_handler_name(irq, &ipr_irq_chip, 54 for (i = 0; i < nr_irqs; i++) {
55 unsigned int irq = table[i].irq;
56 disable_irq_nosync(irq);
57 set_irq_chip_and_handler_name(irq, &ipr_irq_chip,
64 handle_level_irq, "level"); 58 handle_level_irq, "level");
65 set_irq_chip_data(irq, &ipr_data); 59 set_irq_chip_data(irq, &table[i]);
66 60 enable_ipr_irq(irq);
67 enable_ipr_irq(irq); 61 }
68} 62}
63EXPORT_SYMBOL(make_ipr_irq);
69 64
70/* XXX: This needs to die a horrible death.. */ 65static struct ipr_data sys_ipr_map[] = {
71void __init init_IRQ(void)
72{
73#ifndef CONFIG_CPU_SUBTYPE_SH7780 66#ifndef CONFIG_CPU_SUBTYPE_SH7780
74 make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY); 67 { TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY },
75 make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY); 68 { TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY },
76#ifdef RTC_IRQ 69#ifdef RTC_IRQ
77 make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY); 70 { RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY },
78#endif 71#endif
79
80#ifdef SCI_ERI_IRQ 72#ifdef SCI_ERI_IRQ
81 make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY); 73 { SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY },
82 make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY); 74 { SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY },
83 make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY); 75 { SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY },
84#endif 76#endif
85
86#ifdef SCIF1_ERI_IRQ 77#ifdef SCIF1_ERI_IRQ
87 make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); 78 { SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
88 make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); 79 { SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
89 make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); 80 { SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
90 make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); 81 { SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
91#endif 82#endif
92
93#if defined(CONFIG_CPU_SUBTYPE_SH7300) 83#if defined(CONFIG_CPU_SUBTYPE_SH7300)
94 make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY); 84 { SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
95 make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); 85 { DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
96 make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); 86 { DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
97 make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY); 87 { VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
98#endif 88#endif
99
100#ifdef SCIF_ERI_IRQ 89#ifdef SCIF_ERI_IRQ
101 make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); 90 { SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
102 make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); 91 { SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
103 make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); 92 { SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
104 make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); 93 { SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
105#endif 94#endif
106
107#ifdef IRDA_ERI_IRQ 95#ifdef IRDA_ERI_IRQ
108 make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); 96 { IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
109 make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); 97 { IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
110 make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); 98 { IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
111 make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); 99 { IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
112#endif 100#endif
113
114#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 101#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
115 defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 102 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
116 defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) 103 defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
@@ -124,14 +111,19 @@ void __init init_IRQ(void)
124 * You should set corresponding bits of PFC to "00" 111 * You should set corresponding bits of PFC to "00"
125 * to enable these interrupts. 112 * to enable these interrupts.
126 */ 113 */
127 make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY); 114 { IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY },
128 make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY); 115 { IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY },
129 make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY); 116 { IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY },
130 make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY); 117 { IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY },
131 make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY); 118 { IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY },
132 make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY); 119 { IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY },
133#endif 120#endif
134#endif 121#endif
122};
123
124void __init init_IRQ(void)
125{
126 make_ipr_irq(sys_ipr_map, ARRAY_SIZE(sys_ipr_map));
135 127
136#ifdef CONFIG_CPU_HAS_PINT_IRQ 128#ifdef CONFIG_CPU_HAS_PINT_IRQ
137 init_IRQ_pint(); 129 init_IRQ_pint();
@@ -153,5 +145,3 @@ int ipr_irq_demux(int irq)
153 return irq; 145 return irq;
154} 146}
155#endif 147#endif
156
157EXPORT_SYMBOL(make_ipr_irq);
diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c
index 17f47b373d6e..f60007783a21 100644
--- a/arch/sh/kernel/cpu/irq/pint.c
+++ b/arch/sh/kernel/cpu/irq/pint.c
@@ -84,12 +84,16 @@ void make_pint_irq(unsigned int irq)
84 disable_pint_irq(irq); 84 disable_pint_irq(irq);
85} 85}
86 86
87static struct ipr_data pint_ipr_map[] = {
88 { PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY },
89 { PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY },
90};
91
87void __init init_IRQ_pint(void) 92void __init init_IRQ_pint(void)
88{ 93{
89 int i; 94 int i;
90 95
91 make_ipr_irq(PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY); 96 make_ipr_irq(pint_ipr_map, ARRAY_SIZE(pint_ipr_map));
92 make_ipr_irq(PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY);
93 97
94 enable_irq(PINT0_IRQ); 98 enable_irq(PINT0_IRQ);
95 enable_irq(PINT8_IRQ); 99 enable_irq(PINT8_IRQ);
diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls.S
index 768334e95075..ca81976e9e34 100644
--- a/arch/sh/kernel/syscalls.S
+++ b/arch/sh/kernel/syscalls.S
@@ -351,3 +351,6 @@ ENTRY(sys_call_table)
351 .long sys_sync_file_range 351 .long sys_sync_file_range
352 .long sys_tee /* 315 */ 352 .long sys_tee /* 315 */
353 .long sys_vmsplice 353 .long sys_vmsplice
354 .long sys_move_pages
355 .long sys_getcpu
356 .long sys_epoll_pwait
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-20 03:56:16 -0500