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authorMark A. Greer <mgreer@mvista.com>2009-03-26 22:33:21 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-04-27 12:49:43 -0400
commitfe277d9bbba9c2851ec11edcd5701f82e034ddd4 (patch)
tree7a326816eed0cb4653ff90f48ad154b63f21e654 /arch
parent474dad54baee8f8abe63ac334357a37021147701 (diff)
davinci: PSC: Clear bits in MDCTL reg before setting new bits
Clear any set bits in the 'NEXT' field of the MDCTL register in the Power and Sleep Controller (PSC) before setting any new bits. This also allows some minor cleanup by removing some no longer needed lines of code. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-davinci/psc.c17
1 files changed, 6 insertions, 11 deletions
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index e44544ac2b16..84171abf5f7b 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -39,6 +39,7 @@
39#define MDSTAT 0x800 39#define MDSTAT 0x800
40#define MDCTL 0xA00 40#define MDCTL 0xA00
41 41
42#define MDSTAT_STATE_MASK 0x1f
42 43
43/* Return nonzero iff the domain's clock is active */ 44/* Return nonzero iff the domain's clock is active */
44int __init davinci_psc_is_clk_active(unsigned int id) 45int __init davinci_psc_is_clk_active(unsigned int id)
@@ -53,14 +54,13 @@ int __init davinci_psc_is_clk_active(unsigned int id)
53/* Enable or disable a PSC domain */ 54/* Enable or disable a PSC domain */
54void davinci_psc_config(unsigned int domain, unsigned int id, char enable) 55void davinci_psc_config(unsigned int domain, unsigned int id, char enable)
55{ 56{
56 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl, mdstat_mask; 57 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
57 void __iomem *psc_base = IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE); 58 void __iomem *psc_base = IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE);
59 u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */
58 60
59 mdctl = __raw_readl(psc_base + MDCTL + 4 * id); 61 mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
60 if (enable) 62 mdctl &= ~MDSTAT_STATE_MASK;
61 mdctl |= 0x00000003; /* Enable Module */ 63 mdctl |= next_state;
62 else
63 mdctl &= 0xFFFFFFE2; /* Disable Module */
64 __raw_writel(mdctl, psc_base + MDCTL + 4 * id); 64 __raw_writel(mdctl, psc_base + MDCTL + 4 * id);
65 65
66 pdstat = __raw_readl(psc_base + PDSTAT); 66 pdstat = __raw_readl(psc_base + PDSTAT);
@@ -93,12 +93,7 @@ void davinci_psc_config(unsigned int domain, unsigned int id, char enable)
93 } while (!(((ptstat >> domain) & 1) == 0)); 93 } while (!(((ptstat >> domain) & 1) == 0));
94 } 94 }
95 95
96 if (enable)
97 mdstat_mask = 0x3;
98 else
99 mdstat_mask = 0x2;
100
101 do { 96 do {
102 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); 97 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
103 } while (!((mdstat & 0x0000001F) == mdstat_mask)); 98 } while (!((mdstat & MDSTAT_STATE_MASK) == next_state));
104} 99}