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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-11-01 15:38:34 -0400
committerJiri Kosina <jkosina@suse.cz>2010-11-01 15:38:34 -0400
commitb595076a180a56d1bb170e6eceda6eb9d76f4cd3 (patch)
treebc01ec7283808013e0b8ce7713fd6fc40f810429 /arch
parent6aaccece1c483f189f76f1282b3984ff4c7ecb0a (diff)
tree-wide: fix comment/printk typos
"gadget", "through", "command", "maintain", "maintain", "controller", "address", "between", "initiali[zs]e", "instead", "function", "select", "already", "equal", "access", "management", "hierarchy", "registration", "interest", "relative", "memory", "offset", "already", Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/common/it8152.c2
-rw-r--r--arch/arm/common/vic.c2
-rw-r--r--arch/arm/mach-at91/board-ecbat91.c6
-rw-r--r--arch/arm/mach-bcmring/csp/chipc/chipcHw.c2
-rw-r--r--arch/arm/mach-bcmring/csp/dmac/dmacHw.c2
-rw-r--r--arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c2
-rw-r--r--arch/arm/mach-bcmring/csp/tmr/tmrHw.c2
-rw-r--r--arch/arm/mach-bcmring/dma.c2
-rw-r--r--arch/arm/mach-bcmring/include/csp/dmacHw.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h2
-rw-r--r--arch/arm/mach-gemini/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-msm/io.c2
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c2
-rw-r--r--arch/arm/mach-omap2/serial.c2
-rw-r--r--arch/arm/mach-pxa/mxm8x10.c2
-rw-r--r--arch/arm/mach-s3c64xx/dma.c2
-rw-r--r--arch/arm/mach-spear3xx/spear300.c4
-rw-r--r--arch/arm/mach-spear3xx/spear310.c2
-rw-r--r--arch/arm/mach-spear3xx/spear320.c2
-rw-r--r--arch/arm/mach-spear3xx/spear3xx.c6
-rw-r--r--arch/arm/mach-spear6xx/spear6xx.c4
-rw-r--r--arch/arm/mach-u300/Kconfig2
-rw-r--r--arch/arm/mach-u300/include/mach/coh901318.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/irqs.h2
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h2
-rw-r--r--arch/blackfin/mach-bf518/include/mach/defBF51x_base.h2
-rw-r--r--arch/blackfin/mach-bf527/include/mach/defBF52x_base.h2
-rw-r--r--arch/blackfin/mach-bf537/include/mach/defBF534.h2
-rw-r--r--arch/blackfin/mach-bf538/include/mach/defBF539.h2
-rw-r--r--arch/cris/arch-v32/lib/nand_init.S2
-rw-r--r--arch/cris/include/asm/etraxgpio.h2
-rw-r--r--arch/h8300/Kconfig.debug2
-rw-r--r--arch/ia64/kvm/mmio.c2
-rw-r--r--arch/mips/alchemy/common/power.c2
-rw-r--r--arch/mips/include/asm/mach-powertv/ioremap.h2
-rw-r--r--arch/mips/jz4740/board-qi_lb60.c4
-rw-r--r--arch/mips/jz4740/gpio.c2
-rw-r--r--arch/mips/mti-malta/malta-memory.c2
-rw-r--r--arch/mips/pci/pcie-octeon.c2
-rw-r--r--arch/mips/powertv/memory.c2
-rw-r--r--arch/mips/txx9/generic/pci.c2
-rw-r--r--arch/powerpc/include/asm/8xx_immap.h4
-rw-r--r--arch/powerpc/oprofile/op_model_cell.c2
-rw-r--r--arch/powerpc/platforms/83xx/suspend-asm.S6
-rw-r--r--arch/powerpc/platforms/ps3/device-init.c4
-rw-r--r--arch/powerpc/platforms/ps3/interrupt.c2
-rw-r--r--arch/sh/mm/cache-sh5.c2
-rw-r--r--arch/sparc/kernel/traps_64.c2
-rw-r--r--arch/x86/include/asm/pgalloc.h2
-rw-r--r--arch/x86/include/asm/processor.h2
-rw-r--r--arch/x86/kernel/amd_iommu.c4
-rw-r--r--arch/x86/kernel/early_printk_mrst.c2
-rw-r--r--arch/x86/kernel/head_32.S2
54 files changed, 67 insertions, 67 deletions
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 1bec96e85196..60dc077ea7cc 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -236,7 +236,7 @@ static struct resource it8152_mem = {
236 236
237/* 237/*
238 * The following functions are needed for DMA bouncing. 238 * The following functions are needed for DMA bouncing.
239 * ITE8152 chip can addrees up to 64MByte, so all the devices 239 * ITE8152 chip can address up to 64MByte, so all the devices
240 * connected to ITE8152 (PCI and USB) should have limited DMA window 240 * connected to ITE8152 (PCI and USB) should have limited DMA window
241 */ 241 */
242 242
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index ba65f6eedca6..cb660bc54d7a 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -70,7 +70,7 @@ static inline struct vic_device *to_vic(struct sys_device *sys)
70 * vic_init2 - common initialisation code 70 * vic_init2 - common initialisation code
71 * @base: Base of the VIC. 71 * @base: Base of the VIC.
72 * 72 *
73 * Common initialisation code for registeration 73 * Common initialisation code for registration
74 * and resume. 74 * and resume.
75*/ 75*/
76static void vic_init2(void __iomem *base) 76static void vic_init2(void __iomem *base)
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index 7b58c948a957..de2fd04e7c8a 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -128,17 +128,17 @@ static struct spi_board_info __initdata ecb_at91spi_devices[] = {
128 .platform_data = &my_flash0_platform, 128 .platform_data = &my_flash0_platform,
129#endif 129#endif
130 }, 130 },
131 { /* User accessable spi - cs1 (250KHz) */ 131 { /* User accessible spi - cs1 (250KHz) */
132 .modalias = "spi-cs1", 132 .modalias = "spi-cs1",
133 .chip_select = 1, 133 .chip_select = 1,
134 .max_speed_hz = 250 * 1000, 134 .max_speed_hz = 250 * 1000,
135 }, 135 },
136 { /* User accessable spi - cs2 (1MHz) */ 136 { /* User accessible spi - cs2 (1MHz) */
137 .modalias = "spi-cs2", 137 .modalias = "spi-cs2",
138 .chip_select = 2, 138 .chip_select = 2,
139 .max_speed_hz = 1 * 1000 * 1000, 139 .max_speed_hz = 1 * 1000 * 1000,
140 }, 140 },
141 { /* User accessable spi - cs3 (10MHz) */ 141 { /* User accessible spi - cs3 (10MHz) */
142 .modalias = "spi-cs3", 142 .modalias = "spi-cs3",
143 .chip_select = 3, 143 .chip_select = 3,
144 .max_speed_hz = 10 * 1000 * 1000, 144 .max_speed_hz = 10 * 1000 * 1000,
diff --git a/arch/arm/mach-bcmring/csp/chipc/chipcHw.c b/arch/arm/mach-bcmring/csp/chipc/chipcHw.c
index b3a61d860c65..96273ff34956 100644
--- a/arch/arm/mach-bcmring/csp/chipc/chipcHw.c
+++ b/arch/arm/mach-bcmring/csp/chipc/chipcHw.c
@@ -757,7 +757,7 @@ static int chipcHw_divide(int num, int denom)
757 t = t << 1; 757 t = t << 1;
758 } 758 }
759 759
760 /* Intialize the result */ 760 /* Initialize the result */
761 r = 0; 761 r = 0;
762 762
763 do { 763 do {
diff --git a/arch/arm/mach-bcmring/csp/dmac/dmacHw.c b/arch/arm/mach-bcmring/csp/dmac/dmacHw.c
index 7b9bac2d79a5..6b9be2e98e51 100644
--- a/arch/arm/mach-bcmring/csp/dmac/dmacHw.c
+++ b/arch/arm/mach-bcmring/csp/dmac/dmacHw.c
@@ -893,7 +893,7 @@ int dmacHw_setDataDescriptor(dmacHw_CONFIG_t *pConfig, /* [ IN ] Configuration
893*/ 893*/
894/****************************************************************************/ 894/****************************************************************************/
895uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */ 895uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */
896 dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controler attribute of type dmacHw_CONTROLLER_ATTRIB_e */ 896 dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controller attribute of type dmacHw_CONTROLLER_ATTRIB_e */
897 ) { 897 ) {
898 dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle); 898 dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle);
899 899
diff --git a/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c b/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
index ff7b436d0935..77f84b40dda9 100644
--- a/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
+++ b/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
@@ -316,7 +316,7 @@ static void DisplayDescRing(void *pDescriptor, /* [ IN ] Descriptor buffer */
316/** 316/**
317* @brief Check if DMA channel is the flow controller 317* @brief Check if DMA channel is the flow controller
318* 318*
319* @return 1 : If DMA is a flow controler 319* @return 1 : If DMA is a flow controller
320* 0 : Peripheral is the flow controller 320* 0 : Peripheral is the flow controller
321* 321*
322* @note 322* @note
diff --git a/arch/arm/mach-bcmring/csp/tmr/tmrHw.c b/arch/arm/mach-bcmring/csp/tmr/tmrHw.c
index 5c1c9a0e5ed2..16225e43f3c3 100644
--- a/arch/arm/mach-bcmring/csp/tmr/tmrHw.c
+++ b/arch/arm/mach-bcmring/csp/tmr/tmrHw.c
@@ -558,7 +558,7 @@ static int tmrHw_divide(int num, int denom)
558 t = t << 1; 558 t = t << 1;
559 } 559 }
560 560
561 /* Intialize the result */ 561 /* Initialize the result */
562 r = 0; 562 r = 0;
563 563
564 do { 564 do {
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index 77eb35c89cd0..8d1baf3f4683 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -671,7 +671,7 @@ static int ConfigChannel(DMA_Handle_t handle)
671 671
672/****************************************************************************/ 672/****************************************************************************/
673/** 673/**
674* Intializes all of the data structures associated with the DMA. 674* Initializes all of the data structures associated with the DMA.
675* @return 675* @return
676* >= 0 - Initialization was successfull. 676* >= 0 - Initialization was successfull.
677* 677*
diff --git a/arch/arm/mach-bcmring/include/csp/dmacHw.h b/arch/arm/mach-bcmring/include/csp/dmacHw.h
index 5d510130a25f..6c8da2b9fc1f 100644
--- a/arch/arm/mach-bcmring/include/csp/dmacHw.h
+++ b/arch/arm/mach-bcmring/include/csp/dmacHw.h
@@ -590,7 +590,7 @@ void dmacHw_printDebugInfo(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle
590*/ 590*/
591/****************************************************************************/ 591/****************************************************************************/
592uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */ 592uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */
593 dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controler attribute of type dmacHw_CONTROLLER_ATTRIB_e */ 593 dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controller attribute of type dmacHw_CONTROLLER_ATTRIB_e */
594 ); 594 );
595 595
596#endif /* _DMACHW_H */ 596#endif /* _DMACHW_H */
diff --git a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h
index cbf334d1c761..d67e2f8c22de 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_priv.h
@@ -28,7 +28,7 @@
28 28
29/* Data type for DMA Link List Item */ 29/* Data type for DMA Link List Item */
30typedef struct { 30typedef struct {
31 uint32_t sar; /* Source Adress Register. 31 uint32_t sar; /* Source Address Register.
32 Address must be aligned to CTLx.SRC_TR_WIDTH. */ 32 Address must be aligned to CTLx.SRC_TR_WIDTH. */
33 uint32_t dar; /* Destination Address Register. 33 uint32_t dar; /* Destination Address Register.
34 Address must be aligned to CTLx.DST_TR_WIDTH. */ 34 Address must be aligned to CTLx.DST_TR_WIDTH. */
diff --git a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h
index 891cea87e333..f1ecf96f2da5 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/dmacHw_reg.h
@@ -35,7 +35,7 @@ typedef struct {
35 35
36/* Data type representing DMA channel registers */ 36/* Data type representing DMA channel registers */
37typedef struct { 37typedef struct {
38 dmacHw_REG64_t ChannelSar; /* Source Adress Register. 64 bits (upper 32 bits are reserved) 38 dmacHw_REG64_t ChannelSar; /* Source Address Register. 64 bits (upper 32 bits are reserved)
39 Address must be aligned to CTLx.SRC_TR_WIDTH. 39 Address must be aligned to CTLx.SRC_TR_WIDTH.
40 */ 40 */
41 dmacHw_REG64_t ChannelDar; /* Destination Address Register.64 bits (upper 32 bits are reserved) 41 dmacHw_REG64_t ChannelDar; /* Destination Address Register.64 bits (upper 32 bits are reserved)
diff --git a/arch/arm/mach-gemini/include/mach/hardware.h b/arch/arm/mach-gemini/include/mach/hardware.h
index 213a4fcfeb1c..8c950e1d06be 100644
--- a/arch/arm/mach-gemini/include/mach/hardware.h
+++ b/arch/arm/mach-gemini/include/mach/hardware.h
@@ -33,7 +33,7 @@
33#define GEMINI_LPC_HOST_BASE 0x47000000 33#define GEMINI_LPC_HOST_BASE 0x47000000
34#define GEMINI_LPC_IO_BASE 0x47800000 34#define GEMINI_LPC_IO_BASE 0x47800000
35#define GEMINI_INTERRUPT_BASE 0x48000000 35#define GEMINI_INTERRUPT_BASE 0x48000000
36/* TODO: Different interrupt controlers when SMP 36/* TODO: Different interrupt controllers when SMP
37 * #define GEMINI_INTERRUPT0_BASE 0x48000000 37 * #define GEMINI_INTERRUPT0_BASE 0x48000000
38 * #define GEMINI_INTERRUPT1_BASE 0x49000000 38 * #define GEMINI_INTERRUPT1_BASE 0x49000000
39 */ 39 */
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index d36b61074146..7f8d15d56834 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -153,7 +153,7 @@ __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
153{ 153{
154 if (mtype == MT_DEVICE) { 154 if (mtype == MT_DEVICE) {
155 /* The peripherals in the 88000000 - D0000000 range 155 /* The peripherals in the 88000000 - D0000000 range
156 * are only accessable by type MT_DEVICE_NONSHARED. 156 * are only accessible by type MT_DEVICE_NONSHARED.
157 * Adjust mtype as necessary to make this "just work." 157 * Adjust mtype as necessary to make this "just work."
158 */ 158 */
159 if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000)) 159 if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 0d50b45d041c..1e6fe6d11aee 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -252,7 +252,7 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev,
252 * FIXME: we currently manage device-specific idle states 252 * FIXME: we currently manage device-specific idle states
253 * for PER and CORE in combination with CPU-specific 253 * for PER and CORE in combination with CPU-specific
254 * idle states. This is wrong, and device-specific 254 * idle states. This is wrong, and device-specific
255 * idle managment needs to be separated out into 255 * idle management needs to be separated out into
256 * its own code. 256 * its own code.
257 */ 257 */
258 258
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index becf0e38ef7e..db79ac68ed97 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -843,7 +843,7 @@ void __init omap_serial_init_port(int port)
843} 843}
844 844
845/** 845/**
846 * omap_serial_init() - intialize all supported serial ports 846 * omap_serial_init() - initialize all supported serial ports
847 * 847 *
848 * Initializes all available UARTs as serial ports. Platforms 848 * Initializes all available UARTs as serial ports. Platforms
849 * can call this function when they want to have default behaviour 849 * can call this function when they want to have default behaviour
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index 462167ac05f9..cdf7f41e2bb3 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -337,7 +337,7 @@ void __init mxm_8x10_mmc_init(void)
337} 337}
338#endif 338#endif
339 339
340/* USB Open Host Controler Interface */ 340/* USB Open Host Controller Interface */
341static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = { 341static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = {
342 .port_mode = PMM_NPS_MODE, 342 .port_mode = PMM_NPS_MODE,
343 .flags = ENABLE_PORT_ALL 343 .flags = ENABLE_PORT_ALL
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index e7d03ab41d80..372ea6855454 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -740,7 +740,7 @@ static int __init s3c64xx_dma_init(void)
740 /* Set all DMA configuration to be DMA, not SDMA */ 740 /* Set all DMA configuration to be DMA, not SDMA */
741 writel(0xffffff, S3C_SYSREG(0x110)); 741 writel(0xffffff, S3C_SYSREG(0x110));
742 742
743 /* Register standard DMA controlers */ 743 /* Register standard DMA controllers */
744 s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000); 744 s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000);
745 s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x75100000); 745 s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x75100000);
746 746
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 3560f8c1e723..5aa2d54ebfaa 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -371,7 +371,7 @@ struct pmx_driver pmx_driver = {
371}; 371};
372 372
373/* Add spear300 specific devices here */ 373/* Add spear300 specific devices here */
374/* arm gpio1 device registeration */ 374/* arm gpio1 device registration */
375static struct pl061_platform_data gpio1_plat_data = { 375static struct pl061_platform_data gpio1_plat_data = {
376 .gpio_base = 8, 376 .gpio_base = 8,
377 .irq_base = SPEAR_GPIO1_INT_BASE, 377 .irq_base = SPEAR_GPIO1_INT_BASE,
@@ -451,7 +451,7 @@ void __init spear300_init(void)
451 /* call spear3xx family common init function */ 451 /* call spear3xx family common init function */
452 spear3xx_init(); 452 spear3xx_init();
453 453
454 /* shared irq registeration */ 454 /* shared irq registration */
455 shirq_ras1.regs.base = 455 shirq_ras1.regs.base =
456 ioremap(SPEAR300_TELECOM_BASE, SPEAR300_TELECOM_REG_SIZE); 456 ioremap(SPEAR300_TELECOM_BASE, SPEAR300_TELECOM_REG_SIZE);
457 if (shirq_ras1.regs.base) { 457 if (shirq_ras1.regs.base) {
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 96a1ab824bac..53b41b52d7ee 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -266,7 +266,7 @@ void __init spear310_init(void)
266 /* call spear3xx family common init function */ 266 /* call spear3xx family common init function */
267 spear3xx_init(); 267 spear3xx_init();
268 268
269 /* shared irq registeration */ 269 /* shared irq registration */
270 base = ioremap(SPEAR310_SOC_CONFIG_BASE, SPEAR310_SOC_CONFIG_SIZE); 270 base = ioremap(SPEAR310_SOC_CONFIG_BASE, SPEAR310_SOC_CONFIG_SIZE);
271 if (base) { 271 if (base) {
272 /* shirq 1 */ 272 /* shirq 1 */
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 6a1219549369..88b465284c36 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -519,7 +519,7 @@ void __init spear320_init(void)
519 /* call spear3xx family common init function */ 519 /* call spear3xx family common init function */
520 spear3xx_init(); 520 spear3xx_init();
521 521
522 /* shared irq registeration */ 522 /* shared irq registration */
523 base = ioremap(SPEAR320_SOC_CONFIG_BASE, SPEAR320_SOC_CONFIG_SIZE); 523 base = ioremap(SPEAR320_SOC_CONFIG_BASE, SPEAR320_SOC_CONFIG_SIZE);
524 if (base) { 524 if (base) {
525 /* shirq 1 */ 525 /* shirq 1 */
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index e87313aeae20..52f553c8c46d 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -22,7 +22,7 @@
22#include <mach/spear.h> 22#include <mach/spear.h>
23 23
24/* Add spear3xx machines common devices here */ 24/* Add spear3xx machines common devices here */
25/* gpio device registeration */ 25/* gpio device registration */
26static struct pl061_platform_data gpio_plat_data = { 26static struct pl061_platform_data gpio_plat_data = {
27 .gpio_base = 0, 27 .gpio_base = 0,
28 .irq_base = SPEAR_GPIO_INT_BASE, 28 .irq_base = SPEAR_GPIO_INT_BASE,
@@ -41,7 +41,7 @@ struct amba_device gpio_device = {
41 .irq = {IRQ_BASIC_GPIO, NO_IRQ}, 41 .irq = {IRQ_BASIC_GPIO, NO_IRQ},
42}; 42};
43 43
44/* uart device registeration */ 44/* uart device registration */
45struct amba_device uart_device = { 45struct amba_device uart_device = {
46 .dev = { 46 .dev = {
47 .init_name = "uart", 47 .init_name = "uart",
@@ -543,6 +543,6 @@ void spear_pmx_init(struct pmx_driver *pmx_driver, uint base, uint size)
543 543
544pmx_fail: 544pmx_fail:
545 if (ret) 545 if (ret)
546 printk(KERN_ERR "padmux: registeration failed. err no: %d\n", 546 printk(KERN_ERR "padmux: registration failed. err no: %d\n",
547 ret); 547 ret);
548} 548}
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index baf6bcc3169c..f2fe14e8471d 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -23,7 +23,7 @@
23#include <mach/spear.h> 23#include <mach/spear.h>
24 24
25/* Add spear6xx machines common devices here */ 25/* Add spear6xx machines common devices here */
26/* uart device registeration */ 26/* uart device registration */
27struct amba_device uart_device[] = { 27struct amba_device uart_device[] = {
28 { 28 {
29 .dev = { 29 .dev = {
@@ -50,7 +50,7 @@ struct amba_device uart_device[] = {
50 } 50 }
51}; 51};
52 52
53/* gpio device registeration */ 53/* gpio device registration */
54static struct pl061_platform_data gpio_plat_data[] = { 54static struct pl061_platform_data gpio_plat_data[] = {
55 { 55 {
56 .gpio_base = 0, 56 .gpio_base = 0,
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig
index 801b21e7f677..32a7b0f7e9f7 100644
--- a/arch/arm/mach-u300/Kconfig
+++ b/arch/arm/mach-u300/Kconfig
@@ -64,7 +64,7 @@ config MACH_U300_DUAL_RAM
64 bool "Dual RAM" 64 bool "Dual RAM"
65 help 65 help
66 Select this if you want support for Dual RAM phones. 66 Select this if you want support for Dual RAM phones.
67 This is two RAM memorys on different EMIFs. 67 This is two RAM memories on different EMIFs.
68endchoice 68endchoice
69 69
70config U300_DEBUG 70config U300_DEBUG
diff --git a/arch/arm/mach-u300/include/mach/coh901318.h b/arch/arm/mach-u300/include/mach/coh901318.h
index 193da2df732c..6193aaa47794 100644
--- a/arch/arm/mach-u300/include/mach/coh901318.h
+++ b/arch/arm/mach-u300/include/mach/coh901318.h
@@ -24,7 +24,7 @@
24 * @src_addr: transfer source address 24 * @src_addr: transfer source address
25 * @dst_addr: transfer destination address 25 * @dst_addr: transfer destination address
26 * @link_addr: physical address to next lli 26 * @link_addr: physical address to next lli
27 * @virt_link_addr: virtual addres of next lli (only used by pool_free) 27 * @virt_link_addr: virtual address of next lli (only used by pool_free)
28 * @phy_this: physical address of current lli (only used by pool_free) 28 * @phy_this: physical address of current lli (only used by pool_free)
29 */ 29 */
30struct coh901318_lli { 30struct coh901318_lli {
@@ -90,7 +90,7 @@ struct powersave {
90 * struct coh901318_platform - platform arch structure 90 * struct coh901318_platform - platform arch structure
91 * @chans_slave: specifying dma slave channels 91 * @chans_slave: specifying dma slave channels
92 * @chans_memcpy: specifying dma memcpy channels 92 * @chans_memcpy: specifying dma memcpy channels
93 * @access_memory_state: requesting DMA memeory access (on / off) 93 * @access_memory_state: requesting DMA memory access (on / off)
94 * @chan_conf: dma channel configurations 94 * @chan_conf: dma channel configurations
95 * @max_channels: max number of dma chanenls 95 * @max_channels: max number of dma chanenls
96 */ 96 */
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 86781f7b0c0c..664c453babbe 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -66,7 +66,7 @@ extern int imx_irq_set_priority(unsigned char irq, unsigned char prio);
66 66
67/* all normal IRQs can be FIQs */ 67/* all normal IRQs can be FIQs */
68#define FIQ_START 0 68#define FIQ_START 0
69/* switch betwean IRQ and FIQ */ 69/* switch between IRQ and FIQ */
70extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); 70extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
71 71
72#endif /* __ASM_ARCH_MXC_IRQS_H__ */ 72#endif /* __ASM_ARCH_MXC_IRQS_H__ */
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 7eaa8edf3b14..79ac24ceb54d 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -339,7 +339,7 @@ struct omap_hwmod_omap2_prcm {
339/** 339/**
340 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data 340 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
341 * @clkctrl_reg: PRCM address of the clock control register 341 * @clkctrl_reg: PRCM address of the clock control register
342 * @rstctrl_reg: adress of the XXX_RSTCTRL register located in the PRM 342 * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM
343 * @submodule_wkdep_bit: bit shift of the WKDEP range 343 * @submodule_wkdep_bit: bit shift of the WKDEP range
344 */ 344 */
345struct omap_hwmod_omap4_prcm { 345struct omap_hwmod_omap4_prcm {
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
index 5f84913dcd91..750f4d803845 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
@@ -1197,7 +1197,7 @@
1197#define SADD_LEN 0x0002 /* Slave Address Length */ 1197#define SADD_LEN 0x0002 /* Slave Address Length */
1198#define STDVAL 0x0004 /* Slave Transmit Data Valid */ 1198#define STDVAL 0x0004 /* Slave Transmit Data Valid */
1199#define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ 1199#define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */
1200#define GEN 0x0010 /* General Call Adrress Matching Enabled */ 1200#define GEN 0x0010 /* General Call Address Matching Enabled */
1201 1201
1202/* TWI_SLAVE_STAT Masks */ 1202/* TWI_SLAVE_STAT Masks */
1203#define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ 1203#define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
index 09475034c6a1..e3ab78ef9001 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
@@ -1206,7 +1206,7 @@
1206#define SADD_LEN 0x0002 /* Slave Address Length */ 1206#define SADD_LEN 0x0002 /* Slave Address Length */
1207#define STDVAL 0x0004 /* Slave Transmit Data Valid */ 1207#define STDVAL 0x0004 /* Slave Transmit Data Valid */
1208#define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ 1208#define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */
1209#define GEN 0x0010 /* General Call Adrress Matching Enabled */ 1209#define GEN 0x0010 /* General Call Address Matching Enabled */
1210 1210
1211/* TWI_SLAVE_STAT Masks */ 1211/* TWI_SLAVE_STAT Masks */
1212#define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ 1212#define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */
diff --git a/arch/blackfin/mach-bf537/include/mach/defBF534.h b/arch/blackfin/mach-bf537/include/mach/defBF534.h
index 0323e6bacdae..042064b2b44a 100644
--- a/arch/blackfin/mach-bf537/include/mach/defBF534.h
+++ b/arch/blackfin/mach-bf537/include/mach/defBF534.h
@@ -1523,7 +1523,7 @@
1523#define SADD_LEN 0x0002 /* Slave Address Length */ 1523#define SADD_LEN 0x0002 /* Slave Address Length */
1524#define STDVAL 0x0004 /* Slave Transmit Data Valid */ 1524#define STDVAL 0x0004 /* Slave Transmit Data Valid */
1525#define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ 1525#define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */
1526#define GEN 0x0010 /* General Call Adrress Matching Enabled */ 1526#define GEN 0x0010 /* General Call Address Matching Enabled */
1527 1527
1528/* TWI_SLAVE_STAT Masks */ 1528/* TWI_SLAVE_STAT Masks */
1529#define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ 1529#define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h
index 7a8ac5f44204..d85d128c97ca 100644
--- a/arch/blackfin/mach-bf538/include/mach/defBF539.h
+++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h
@@ -2185,7 +2185,7 @@
2185#define SADD_LEN 0x0002 /* Slave Address Length */ 2185#define SADD_LEN 0x0002 /* Slave Address Length */
2186#define STDVAL 0x0004 /* Slave Transmit Data Valid */ 2186#define STDVAL 0x0004 /* Slave Transmit Data Valid */
2187#define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ 2187#define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */
2188#define GEN 0x0010 /* General Call Adrress Matching Enabled */ 2188#define GEN 0x0010 /* General Call Address Matching Enabled */
2189 2189
2190/* TWIx_SLAVE_STAT Masks */ 2190/* TWIx_SLAVE_STAT Masks */
2191#define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ 2191#define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */
diff --git a/arch/cris/arch-v32/lib/nand_init.S b/arch/cris/arch-v32/lib/nand_init.S
index e705f5cce969..d671fed451c9 100644
--- a/arch/cris/arch-v32/lib/nand_init.S
+++ b/arch/cris/arch-v32/lib/nand_init.S
@@ -139,7 +139,7 @@ copy_nand_to_ram:
139 lsrq 8, $r4 139 lsrq 8, $r4
140 move.b $r4, [$r1] ; Row address 140 move.b $r4, [$r1] ; Row address
141 lsrq 8, $r4 141 lsrq 8, $r4
142 move.b $r4, [$r1] ; Row adddress 142 move.b $r4, [$r1] ; Row address
143 moveq 20, $r4 143 moveq 20, $r4
1442: bne 2b 1442: bne 2b
145 subq 1, $r4 145 subq 1, $r4
diff --git a/arch/cris/include/asm/etraxgpio.h b/arch/cris/include/asm/etraxgpio.h
index d474818a537e..461c089db765 100644
--- a/arch/cris/include/asm/etraxgpio.h
+++ b/arch/cris/include/asm/etraxgpio.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * The following devices are accessable using this driver using 2 * The following devices are accessible using this driver using
3 * GPIO_MAJOR (120) and a couple of minor numbers. 3 * GPIO_MAJOR (120) and a couple of minor numbers.
4 * 4 *
5 * For ETRAX 100LX (CONFIG_ETRAX_ARCH_V10): 5 * For ETRAX 100LX (CONFIG_ETRAX_ARCH_V10):
diff --git a/arch/h8300/Kconfig.debug b/arch/h8300/Kconfig.debug
index ee671c3f2c74..e8d1b236ad8c 100644
--- a/arch/h8300/Kconfig.debug
+++ b/arch/h8300/Kconfig.debug
@@ -48,7 +48,7 @@ config DEFAULT_CMDLINE
48 builtin kernel commandline enabled. 48 builtin kernel commandline enabled.
49 49
50config KERNEL_COMMAND 50config KERNEL_COMMAND
51 string "Buildin commmand string" 51 string "Buildin command string"
52 depends on DEFAULT_CMDLINE 52 depends on DEFAULT_CMDLINE
53 help 53 help
54 builtin kernel commandline strings. 54 builtin kernel commandline strings.
diff --git a/arch/ia64/kvm/mmio.c b/arch/ia64/kvm/mmio.c
index fb8f9f59a1ed..f1e17d3d6cd9 100644
--- a/arch/ia64/kvm/mmio.c
+++ b/arch/ia64/kvm/mmio.c
@@ -130,7 +130,7 @@ static void mmio_access(struct kvm_vcpu *vcpu, u64 src_pa, u64 *dest,
130 130
131 local_irq_save(psr); 131 local_irq_save(psr);
132 132
133 /*Intercept the acces for PIB range*/ 133 /*Intercept the access for PIB range*/
134 if (iot == GPFN_PIB) { 134 if (iot == GPFN_PIB) {
135 if (!dir) 135 if (!dir)
136 lsapic_write(vcpu, src_pa, s, *dest); 136 lsapic_write(vcpu, src_pa, s, *dest);
diff --git a/arch/mips/alchemy/common/power.c b/arch/mips/alchemy/common/power.c
index e5916a516e58..647e518c90bc 100644
--- a/arch/mips/alchemy/common/power.c
+++ b/arch/mips/alchemy/common/power.c
@@ -130,7 +130,7 @@ static void restore_core_regs(void)
130 au_writel(sleep_usb[1], USBD_ENABLE); 130 au_writel(sleep_usb[1], USBD_ENABLE);
131 au_sync(); 131 au_sync();
132#else 132#else
133 /* enable accces to OTG memory */ 133 /* enable access to OTG memory */
134 au_writel(au_readl(USB_MSR_BASE + 4) | (1 << 6), USB_MSR_BASE + 4); 134 au_writel(au_readl(USB_MSR_BASE + 4) | (1 << 6), USB_MSR_BASE + 4);
135 au_sync(); 135 au_sync();
136 136
diff --git a/arch/mips/include/asm/mach-powertv/ioremap.h b/arch/mips/include/asm/mach-powertv/ioremap.h
index 076f2eeaa575..c86ef094ec37 100644
--- a/arch/mips/include/asm/mach-powertv/ioremap.h
+++ b/arch/mips/include/asm/mach-powertv/ioremap.h
@@ -88,7 +88,7 @@ static inline dma_addr_t _dma_to_phys_offset_raw(dma_addr_t dma)
88} 88}
89 89
90/* These are not portable and should not be used in drivers. Drivers should 90/* These are not portable and should not be used in drivers. Drivers should
91 * be using ioremap() and friends to map physical addreses to virtual 91 * be using ioremap() and friends to map physical addresses to virtual
92 * addresses and dma_map*() and friends to map virtual addresses into DMA 92 * addresses and dma_map*() and friends to map virtual addresses into DMA
93 * addresses and back. 93 * addresses and back.
94 */ 94 */
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index 5742bb4d78f4..de4433c5a771 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -65,7 +65,7 @@ static struct nand_ecclayout qi_lb60_ecclayout_1gb = {
65 65
66/* Early prototypes of the QI LB60 had only 1GB of NAND. 66/* Early prototypes of the QI LB60 had only 1GB of NAND.
67 * In order to support these devices aswell the partition and ecc layout is 67 * In order to support these devices aswell the partition and ecc layout is
68 * initalized depending on the NAND size */ 68 * initialized depending on the NAND size */
69static struct mtd_partition qi_lb60_partitions_1gb[] = { 69static struct mtd_partition qi_lb60_partitions_1gb[] = {
70 { 70 {
71 .name = "NAND BOOT partition", 71 .name = "NAND BOOT partition",
@@ -464,7 +464,7 @@ static int __init qi_lb60_board_setup(void)
464 board_gpio_setup(); 464 board_gpio_setup();
465 465
466 if (qi_lb60_init_platform_devices()) 466 if (qi_lb60_init_platform_devices())
467 panic("Failed to initalize platform devices\n"); 467 panic("Failed to initialize platform devices\n");
468 468
469 return 0; 469 return 0;
470} 470}
diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c
index 38f60f35156c..88e6aeda5bf1 100644
--- a/arch/mips/jz4740/gpio.c
+++ b/arch/mips/jz4740/gpio.c
@@ -546,7 +546,7 @@ static int __init jz4740_gpio_init(void)
546 for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i) 546 for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i)
547 jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i); 547 jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i);
548 548
549 printk(KERN_INFO "JZ4740 GPIO initalized\n"); 549 printk(KERN_INFO "JZ4740 GPIO initialized\n");
550 550
551 return 0; 551 return 0;
552} 552}
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c
index b27419c84919..a96d281f9221 100644
--- a/arch/mips/mti-malta/malta-memory.c
+++ b/arch/mips/mti-malta/malta-memory.c
@@ -43,7 +43,7 @@ static struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
43static char *mtypes[3] = { 43static char *mtypes[3] = {
44 "Dont use memory", 44 "Dont use memory",
45 "YAMON PROM memory", 45 "YAMON PROM memory",
46 "Free memmory", 46 "Free memory",
47}; 47};
48#endif 48#endif
49 49
diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c
index 385f035b24e4..0583c463e5f1 100644
--- a/arch/mips/pci/pcie-octeon.c
+++ b/arch/mips/pci/pcie-octeon.c
@@ -900,7 +900,7 @@ static int cvmx_pcie_rc_initialize(int pcie_port)
900 mem_access_subid.s.ror = 0; 900 mem_access_subid.s.ror = 0;
901 /* Disable Relaxed Ordering for Writes. */ 901 /* Disable Relaxed Ordering for Writes. */
902 mem_access_subid.s.row = 0; 902 mem_access_subid.s.row = 0;
903 /* PCIe Adddress Bits <63:34>. */ 903 /* PCIe Address Bits <63:34>. */
904 mem_access_subid.s.ba = 0; 904 mem_access_subid.s.ba = 0;
905 905
906 /* 906 /*
diff --git a/arch/mips/powertv/memory.c b/arch/mips/powertv/memory.c
index 73880ad29bc2..fb3d29660c42 100644
--- a/arch/mips/powertv/memory.c
+++ b/arch/mips/powertv/memory.c
@@ -57,7 +57,7 @@
57unsigned long ptv_memsize; 57unsigned long ptv_memsize;
58 58
59/* 59/*
60 * struct low_mem_reserved - Items in low memmory that are reserved 60 * struct low_mem_reserved - Items in low memory that are reserved
61 * @start: Physical address of item 61 * @start: Physical address of item
62 * @size: Size, in bytes, of this item 62 * @size: Size, in bytes, of this item
63 * @is_aliased: True if this is RAM aliased from another location. If false, 63 * @is_aliased: True if this is RAM aliased from another location. If false,
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
index 9a0be810cafa..96e69a00ffc8 100644
--- a/arch/mips/txx9/generic/pci.c
+++ b/arch/mips/txx9/generic/pci.c
@@ -107,7 +107,7 @@ int txx9_pci_mem_high __initdata;
107 107
108/* 108/*
109 * allocate pci_controller and resources. 109 * allocate pci_controller and resources.
110 * mem_base, io_base: physical addresss. 0 for auto assignment. 110 * mem_base, io_base: physical address. 0 for auto assignment.
111 * mem_size and io_size means max size on auto assignment. 111 * mem_size and io_size means max size on auto assignment.
112 * pcic must be &txx9_primary_pcic or NULL. 112 * pcic must be &txx9_primary_pcic or NULL.
113 */ 113 */
diff --git a/arch/powerpc/include/asm/8xx_immap.h b/arch/powerpc/include/asm/8xx_immap.h
index 4b0e15206006..6b6dc20b0beb 100644
--- a/arch/powerpc/include/asm/8xx_immap.h
+++ b/arch/powerpc/include/asm/8xx_immap.h
@@ -93,7 +93,7 @@ typedef struct mem_ctlr {
93} memctl8xx_t; 93} memctl8xx_t;
94 94
95/*----------------------------------------------------------------------- 95/*-----------------------------------------------------------------------
96 * BR - Memory Controler: Base Register 16-9 96 * BR - Memory Controller: Base Register 16-9
97 */ 97 */
98#define BR_BA_MSK 0xffff8000 /* Base Address Mask */ 98#define BR_BA_MSK 0xffff8000 /* Base Address Mask */
99#define BR_AT_MSK 0x00007000 /* Address Type Mask */ 99#define BR_AT_MSK 0x00007000 /* Address Type Mask */
@@ -110,7 +110,7 @@ typedef struct mem_ctlr {
110#define BR_V 0x00000001 /* Bank Valid */ 110#define BR_V 0x00000001 /* Bank Valid */
111 111
112/*----------------------------------------------------------------------- 112/*-----------------------------------------------------------------------
113 * OR - Memory Controler: Option Register 16-11 113 * OR - Memory Controller: Option Register 16-11
114 */ 114 */
115#define OR_AM_MSK 0xffff8000 /* Address Mask Mask */ 115#define OR_AM_MSK 0xffff8000 /* Address Mask Mask */
116#define OR_ATM_MSK 0x00007000 /* Address Type Mask Mask */ 116#define OR_ATM_MSK 0x00007000 /* Address Type Mask Mask */
diff --git a/arch/powerpc/oprofile/op_model_cell.c b/arch/powerpc/oprofile/op_model_cell.c
index 7fd90d02d8c6..c4d2b7167568 100644
--- a/arch/powerpc/oprofile/op_model_cell.c
+++ b/arch/powerpc/oprofile/op_model_cell.c
@@ -1469,7 +1469,7 @@ static int cell_global_start(struct op_counter_config *ctr)
1469 * The pm_interval register is setup to write the SPU PC value into the 1469 * The pm_interval register is setup to write the SPU PC value into the
1470 * trace buffer at the maximum rate possible. The trace buffer is configured 1470 * trace buffer at the maximum rate possible. The trace buffer is configured
1471 * to store the PCs, wrapping when it is full. The performance counter is 1471 * to store the PCs, wrapping when it is full. The performance counter is
1472 * intialized to the max hardware count minus the number of events, N, between 1472 * initialized to the max hardware count minus the number of events, N, between
1473 * samples. Once the N events have occured, a HW counter overflow occurs 1473 * samples. Once the N events have occured, a HW counter overflow occurs
1474 * causing the generation of a HW counter interrupt which also stops the 1474 * causing the generation of a HW counter interrupt which also stops the
1475 * writing of the SPU PC values to the trace buffer. Hence the last PC 1475 * writing of the SPU PC values to the trace buffer. Hence the last PC
diff --git a/arch/powerpc/platforms/83xx/suspend-asm.S b/arch/powerpc/platforms/83xx/suspend-asm.S
index 1930543c98d3..3d1ecd211776 100644
--- a/arch/powerpc/platforms/83xx/suspend-asm.S
+++ b/arch/powerpc/platforms/83xx/suspend-asm.S
@@ -231,7 +231,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep)
231 ori r4, r4, 0x002a 231 ori r4, r4, 0x002a
232 mtspr SPRN_DBAT0L, r4 232 mtspr SPRN_DBAT0L, r4
233 lis r8, TMP_VIRT_IMMR@h 233 lis r8, TMP_VIRT_IMMR@h
234 ori r4, r8, 0x001e /* 1 MByte accessable from Kernel Space only */ 234 ori r4, r8, 0x001e /* 1 MByte accessible from Kernel Space only */
235 mtspr SPRN_DBAT0U, r4 235 mtspr SPRN_DBAT0U, r4
236 isync 236 isync
237 237
@@ -241,7 +241,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep)
241 ori r4, r4, 0x002a 241 ori r4, r4, 0x002a
242 mtspr SPRN_DBAT1L, r4 242 mtspr SPRN_DBAT1L, r4
243 lis r9, (TMP_VIRT_IMMR + 0x01000000)@h 243 lis r9, (TMP_VIRT_IMMR + 0x01000000)@h
244 ori r4, r9, 0x001e /* 1 MByte accessable from Kernel Space only */ 244 ori r4, r9, 0x001e /* 1 MByte accessible from Kernel Space only */
245 mtspr SPRN_DBAT1U, r4 245 mtspr SPRN_DBAT1U, r4
246 isync 246 isync
247 247
@@ -253,7 +253,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep)
253 li r4, 0x0002 253 li r4, 0x0002
254 mtspr SPRN_DBAT2L, r4 254 mtspr SPRN_DBAT2L, r4
255 lis r4, KERNELBASE@h 255 lis r4, KERNELBASE@h
256 ori r4, r4, 0x001e /* 1 MByte accessable from Kernel Space only */ 256 ori r4, r4, 0x001e /* 1 MByte accessible from Kernel Space only */
257 mtspr SPRN_DBAT2U, r4 257 mtspr SPRN_DBAT2U, r4
258 isync 258 isync
259 259
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c
index b341018326df..6c4b5837fc8a 100644
--- a/arch/powerpc/platforms/ps3/device-init.c
+++ b/arch/powerpc/platforms/ps3/device-init.c
@@ -566,10 +566,10 @@ static int ps3_setup_dynamic_device(const struct ps3_repository_device *repo)
566 case PS3_DEV_TYPE_STOR_DISK: 566 case PS3_DEV_TYPE_STOR_DISK:
567 result = ps3_setup_storage_dev(repo, PS3_MATCH_ID_STOR_DISK); 567 result = ps3_setup_storage_dev(repo, PS3_MATCH_ID_STOR_DISK);
568 568
569 /* Some devices are not accessable from the Other OS lpar. */ 569 /* Some devices are not accessible from the Other OS lpar. */
570 if (result == -ENODEV) { 570 if (result == -ENODEV) {
571 result = 0; 571 result = 0;
572 pr_debug("%s:%u: not accessable\n", __func__, 572 pr_debug("%s:%u: not accessible\n", __func__,
573 __LINE__); 573 __LINE__);
574 } 574 }
575 575
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 59d9712d7364..92290ff4761a 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -44,7 +44,7 @@
44 * @lock: 44 * @lock:
45 * @ipi_debug_brk_mask: 45 * @ipi_debug_brk_mask:
46 * 46 *
47 * The HV mantains per SMT thread mappings of HV outlet to HV plug on 47 * The HV maintains per SMT thread mappings of HV outlet to HV plug on
48 * behalf of the guest. These mappings are implemented as 256 bit guest 48 * behalf of the guest. These mappings are implemented as 256 bit guest
49 * supplied bitmaps indexed by plug number. The addresses of the bitmaps 49 * supplied bitmaps indexed by plug number. The addresses of the bitmaps
50 * are registered with the HV through lv1_configure_irq_state_bitmap(). 50 * are registered with the HV through lv1_configure_irq_state_bitmap().
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c
index eb4cc4ec7952..d1bffbcd9d52 100644
--- a/arch/sh/mm/cache-sh5.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -568,7 +568,7 @@ static void sh5_flush_dcache_page(void *page)
568} 568}
569 569
570/* 570/*
571 * Flush the range [start,end] of kernel virtual adddress space from 571 * Flush the range [start,end] of kernel virtual address space from
572 * the I-cache. The corresponding range must be purged from the 572 * the I-cache. The corresponding range must be purged from the
573 * D-cache also because the SH-5 doesn't have cache snooping between 573 * D-cache also because the SH-5 doesn't have cache snooping between
574 * the caches. The addresses will be visible through the superpage 574 * the caches. The addresses will be visible through the superpage
diff --git a/arch/sparc/kernel/traps_64.c b/arch/sparc/kernel/traps_64.c
index 42ad2ba85010..1e9770936c3b 100644
--- a/arch/sparc/kernel/traps_64.c
+++ b/arch/sparc/kernel/traps_64.c
@@ -622,7 +622,7 @@ static const char CHAFSR_PERR_msg[] =
622static const char CHAFSR_IERR_msg[] = 622static const char CHAFSR_IERR_msg[] =
623 "Internal processor error"; 623 "Internal processor error";
624static const char CHAFSR_ISAP_msg[] = 624static const char CHAFSR_ISAP_msg[] =
625 "System request parity error on incoming addresss"; 625 "System request parity error on incoming address";
626static const char CHAFSR_UCU_msg[] = 626static const char CHAFSR_UCU_msg[] =
627 "Uncorrectable E-cache ECC error for ifetch/data"; 627 "Uncorrectable E-cache ECC error for ifetch/data";
628static const char CHAFSR_UCC_msg[] = 628static const char CHAFSR_UCC_msg[] =
diff --git a/arch/x86/include/asm/pgalloc.h b/arch/x86/include/asm/pgalloc.h
index 271de94c3810..b4389a468fb6 100644
--- a/arch/x86/include/asm/pgalloc.h
+++ b/arch/x86/include/asm/pgalloc.h
@@ -92,7 +92,7 @@ static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
92extern void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd); 92extern void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd);
93 93
94static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd, 94static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
95 unsigned long adddress) 95 unsigned long address)
96{ 96{
97 ___pmd_free_tlb(tlb, pmd); 97 ___pmd_free_tlb(tlb, pmd);
98} 98}
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index cae9c3cb95cf..c3e6d9a3de65 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -902,7 +902,7 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk);
902/* 902/*
903 * The below -8 is to reserve 8 bytes on top of the ring0 stack. 903 * The below -8 is to reserve 8 bytes on top of the ring0 stack.
904 * This is necessary to guarantee that the entire "struct pt_regs" 904 * This is necessary to guarantee that the entire "struct pt_regs"
905 * is accessable even if the CPU haven't stored the SS/ESP registers 905 * is accessible even if the CPU haven't stored the SS/ESP registers
906 * on the stack (interrupt gate does not save these registers 906 * on the stack (interrupt gate does not save these registers
907 * when switching to the same priv ring). 907 * when switching to the same priv ring).
908 * Therefore beware: accessing the ss/esp fields of the 908 * Therefore beware: accessing the ss/esp fields of the
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index d2fdb0826df2..57ca77787220 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -1086,7 +1086,7 @@ static int alloc_new_range(struct dma_ops_domain *dma_dom,
1086 1086
1087 dma_dom->aperture_size += APERTURE_RANGE_SIZE; 1087 dma_dom->aperture_size += APERTURE_RANGE_SIZE;
1088 1088
1089 /* Intialize the exclusion range if necessary */ 1089 /* Initialize the exclusion range if necessary */
1090 for_each_iommu(iommu) { 1090 for_each_iommu(iommu) {
1091 if (iommu->exclusion_start && 1091 if (iommu->exclusion_start &&
1092 iommu->exclusion_start >= dma_dom->aperture[index]->offset 1092 iommu->exclusion_start >= dma_dom->aperture[index]->offset
@@ -1353,7 +1353,7 @@ static void dma_ops_domain_free(struct dma_ops_domain *dom)
1353 1353
1354/* 1354/*
1355 * Allocates a new protection domain usable for the dma_ops functions. 1355 * Allocates a new protection domain usable for the dma_ops functions.
1356 * It also intializes the page table and the address allocator data 1356 * It also initializes the page table and the address allocator data
1357 * structures required for the dma_ops interface 1357 * structures required for the dma_ops interface
1358 */ 1358 */
1359static struct dma_ops_domain *dma_ops_domain_alloc(void) 1359static struct dma_ops_domain *dma_ops_domain_alloc(void)
diff --git a/arch/x86/kernel/early_printk_mrst.c b/arch/x86/kernel/early_printk_mrst.c
index 65df603622b2..25bfdbb5b130 100644
--- a/arch/x86/kernel/early_printk_mrst.c
+++ b/arch/x86/kernel/early_printk_mrst.c
@@ -103,7 +103,7 @@ struct dw_spi_reg {
103static unsigned long mrst_spi_paddr = MRST_REGBASE_SPI0; 103static unsigned long mrst_spi_paddr = MRST_REGBASE_SPI0;
104 104
105static u32 *pclk_spi0; 105static u32 *pclk_spi0;
106/* Always contains an accessable address, start with 0 */ 106/* Always contains an accessible address, start with 0 */
107static struct dw_spi_reg *pspi; 107static struct dw_spi_reg *pspi;
108 108
109static struct kmsg_dumper dw_dumper; 109static struct kmsg_dumper dw_dumper;
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index bcece91dd311..8e09aa3aa6d6 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -124,7 +124,7 @@ ENTRY(startup_32)
124 movsl 124 movsl
125 movl pa(boot_params) + NEW_CL_POINTER,%esi 125 movl pa(boot_params) + NEW_CL_POINTER,%esi
126 andl %esi,%esi 126 andl %esi,%esi
127 jz 1f # No comand line 127 jz 1f # No command line
128 movl $pa(boot_command_line),%edi 128 movl $pa(boot_command_line),%edi
129 movl $(COMMAND_LINE_SIZE/4),%ecx 129 movl $(COMMAND_LINE_SIZE/4),%ecx
130 rep 130 rep